Don't cast command to int.
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
4e6d744d 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.20 2005/05/24 09:52:12 joerg Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
103#include <machine/clock.h> /* for DELAY */
104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
317 struct an_ltv_ssidlist ssid;
318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
323 if (error != 0)
324 return (0);
325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
328 return(0);
329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
342 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
343 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
344
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345 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
346 device_get_unit(dev));
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347 an_reset(sc);
348 /* No need for an_init_mpi350_desc since it will be done in attach */
349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
351 return(0);
352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
354 return(0);
355
356 /* See if the ssid matches what we expect ... but doesn't have to */
357 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
358 return(0);
359
360 return(AN_IOSIZ);
361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
472 r = bus_dmamap_create(sc->an_dtag, BUS_DMA_NOWAIT, &dma->an_dma_map);
473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
477 BUS_DMA_NOWAIT, &dma->an_dma_map);
478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
485 mapflags | BUS_DMA_NOWAIT);
486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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591 if_printf(&sc->arpcom.ac_if,
592 "failed to allocate RX descriptor\n");
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593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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620 if_printf(&sc->arpcom.ac_if,
621 "failed to allocate TX descriptor\n");
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622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
650 if_printf(&sc->arpcom.ac_if,
651 "failed to allocate host descriptor\n");
984263bc
MD
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
1c70eebf 669an_attach(sc, dev, flags)
984263bc 670 struct an_softc *sc;
1c70eebf 671 device_t dev;
984263bc
MD
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
984263bc
MD
678 sc->an_gone = 0;
679 sc->an_associated = 0;
680 sc->an_monitor = 0;
681 sc->an_was_monitor = 0;
682 sc->an_flash_buffer = NULL;
683
1c70eebf
JS
684 ifp->if_softc = sc;
685 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
686
984263bc
MD
687 /* Reset the NIC. */
688 an_reset(sc);
689 if (sc->mpi350) {
690 error = an_init_mpi350_desc(sc);
691 if (error)
692 return(error);
693 }
694
695 /* Load factory config */
696 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 697 device_printf(dev, "failed to load config data\n");
984263bc
MD
698 return(EIO);
699 }
700
701 /* Read the current configuration */
702 sc->an_config.an_type = AN_RID_GENCONFIG;
703 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
704 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 705 device_printf(dev, "read record failed\n");
984263bc
MD
706 return(EIO);
707 }
708
709 /* Read the card capabilities */
710 sc->an_caps.an_type = AN_RID_CAPABILITIES;
711 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
712 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 713 device_printf(dev, "read record failed\n");
984263bc
MD
714 return(EIO);
715 }
716
717 /* Read ssid list */
718 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
719 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
720 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 721 device_printf(dev, "read record failed\n");
984263bc
MD
722 return(EIO);
723 }
724
725 /* Read AP list */
726 sc->an_aplist.an_type = AN_RID_APLIST;
727 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
728 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 729 device_printf(dev, "read record failed\n");
984263bc
MD
730 return(EIO);
731 }
732
733#ifdef ANCACHE
734 /* Read the RSSI <-> dBm map */
735 sc->an_have_rssimap = 0;
736 if (sc->an_caps.an_softcaps & 8) {
737 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
738 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
739 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 740 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 741 } else {
1c70eebf 742 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
743 sc->an_have_rssimap = 1;
744 }
745 } else {
1c70eebf 746 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
747 }
748#endif
749
984263bc
MD
750 ifp->if_mtu = ETHERMTU;
751 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
752 ifp->if_ioctl = an_ioctl;
984263bc
MD
753 ifp->if_start = an_start;
754 ifp->if_watchdog = an_watchdog;
755 ifp->if_init = an_init;
756 ifp->if_baudrate = 10000000;
38de8487
JS
757 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
758 ifq_set_ready(&ifp->if_snd);
984263bc
MD
759
760 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
761 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
762 sizeof(AN_DEFAULT_NODENAME) - 1);
763
764 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
765 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
766 sizeof(AN_DEFAULT_NETNAME) - 1);
767 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
768
769 sc->an_config.an_opmode =
770 AN_OPMODE_INFRASTRUCTURE_STATION;
771
772 sc->an_tx_rate = 0;
773 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
774
775 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
776#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
777 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
778 IFM_IEEE80211_ADHOC, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
780 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
781 IFM_IEEE80211_ADHOC, 0), 0);
782 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
783 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
784 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
785 IFM_IEEE80211_ADHOC, 0), 0);
786 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
787 }
788 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
789 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
790 IFM_IEEE80211_ADHOC, 0), 0);
791 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
792 }
793 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
794 IFM_IEEE80211_ADHOC, 0), 0);
795 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
796#undef ADD
797 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
798 0, 0));
799
800 /*
801 * Call MI attach routine.
802 */
0a8b5977 803 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
MD
804
805 return(0);
806}
807
808static void
809an_rxeof(sc)
810 struct an_softc *sc;
811{
812 struct ifnet *ifp;
813 struct ether_header *eh;
814 struct ieee80211_frame *ih;
815 struct an_rxframe rx_frame;
816 struct an_rxframe_802_3 rx_frame_802_3;
817 struct mbuf *m;
818 int len, id, error = 0, i, count = 0;
819 int ieee80211_header_len;
820 u_char *bpf_buf;
821 u_short fc1;
822 struct an_card_rx_desc an_rx_desc;
823 u_int8_t *buf;
824
825 ifp = &sc->arpcom.ac_if;
826
827 if (!sc->mpi350) {
828 id = CSR_READ_2(sc, AN_RX_FID);
829
830 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
831 /* read raw 802.11 packet */
832 bpf_buf = sc->buf_802_11;
833
834 /* read header */
835 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
836 sizeof(rx_frame))) {
837 ifp->if_ierrors++;
838 return;
839 }
840
841 /*
842 * skip beacon by default since this increases the
843 * system load a lot
844 */
845
846 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
847 (rx_frame.an_frame_ctl &
848 IEEE80211_FC0_SUBTYPE_BEACON)) {
849 return;
850 }
851
852 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
853 len = rx_frame.an_rx_payload_len
854 + sizeof(rx_frame);
855 /* Check for insane frame length */
856 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
857 if_printf(ifp,
858 "oversized packet received "
859 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
860 ifp->if_ierrors++;
861 return;
862 }
863
864 bcopy((char *)&rx_frame,
865 bpf_buf, sizeof(rx_frame));
866
867 error = an_read_data(sc, id, sizeof(rx_frame),
868 (caddr_t)bpf_buf+sizeof(rx_frame),
869 rx_frame.an_rx_payload_len);
870 } else {
871 fc1=rx_frame.an_frame_ctl >> 8;
872 ieee80211_header_len =
873 sizeof(struct ieee80211_frame);
874 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
875 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
876 ieee80211_header_len += ETHER_ADDR_LEN;
877 }
878
879 len = rx_frame.an_rx_payload_len
880 + ieee80211_header_len;
881 /* Check for insane frame length */
882 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
883 if_printf(ifp,
884 "oversized packet received "
885 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
886 ifp->if_ierrors++;
887 return;
888 }
889
890 ih = (struct ieee80211_frame *)bpf_buf;
891
892 bcopy((char *)&rx_frame.an_frame_ctl,
893 (char *)ih, ieee80211_header_len);
894
895 error = an_read_data(sc, id, sizeof(rx_frame) +
896 rx_frame.an_gaplen,
897 (caddr_t)ih +ieee80211_header_len,
898 rx_frame.an_rx_payload_len);
899 }
7600679e 900 BPF_TAP(ifp, bpf_buf, len);
984263bc
MD
901 } else {
902 MGETHDR(m, M_NOWAIT, MT_DATA);
903 if (m == NULL) {
904 ifp->if_ierrors++;
905 return;
906 }
907 MCLGET(m, M_NOWAIT);
908 if (!(m->m_flags & M_EXT)) {
909 m_freem(m);
910 ifp->if_ierrors++;
911 return;
912 }
913 m->m_pkthdr.rcvif = ifp;
914 /* Read Ethernet encapsulated packet */
915
916#ifdef ANCACHE
917 /* Read NIC frame header */
918 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
919 sizeof(rx_frame))) {
920 ifp->if_ierrors++;
921 return;
922 }
923#endif
924 /* Read in the 802_3 frame header */
925 if (an_read_data(sc, id, 0x34,
926 (caddr_t)&rx_frame_802_3,
927 sizeof(rx_frame_802_3))) {
928 ifp->if_ierrors++;
929 return;
930 }
931 if (rx_frame_802_3.an_rx_802_3_status != 0) {
932 ifp->if_ierrors++;
933 return;
934 }
935 /* Check for insane frame length */
936 len = rx_frame_802_3.an_rx_802_3_payload_len;
937 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
938 if_printf(ifp,
939 "oversized packet received (%d, %d)\n",
940 len, MCLBYTES);
984263bc
MD
941 ifp->if_ierrors++;
942 return;
943 }
944 m->m_pkthdr.len = m->m_len =
945 rx_frame_802_3.an_rx_802_3_payload_len + 12;
946
947 eh = mtod(m, struct ether_header *);
948
949 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
950 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
951 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
952 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
953
954 /* in mbuf header type is just before payload */
955 error = an_read_data(sc, id, 0x44,
956 (caddr_t)&(eh->ether_type),
957 rx_frame_802_3.an_rx_802_3_payload_len);
958
959 if (error) {
960 m_freem(m);
961 ifp->if_ierrors++;
962 return;
963 }
964 ifp->if_ipackets++;
965
984263bc 966#ifdef ANCACHE
3013ac0e 967 an_cache_store(sc, m,
984263bc
MD
968 rx_frame.an_rx_signal_strength,
969 rx_frame.an_rsvd0);
970#endif
3013ac0e 971 (*ifp->if_input)(ifp, m);
984263bc
MD
972 }
973
974 } else { /* MPI-350 */
975 for (count = 0; count < AN_MAX_RX_DESC; count++){
976 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
977 ((u_int32_t*)&an_rx_desc)[i]
978 = CSR_MEM_AUX_READ_4(sc,
979 AN_RX_DESC_OFFSET
980 + (count * sizeof(an_rx_desc))
981 + (i * 4));
982
983 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
984 buf = sc->an_rx_buffer[count].an_dma_vaddr;
985
986 MGETHDR(m, M_NOWAIT, MT_DATA);
987 if (m == NULL) {
988 ifp->if_ierrors++;
989 return;
990 }
991 MCLGET(m, M_NOWAIT);
992 if (!(m->m_flags & M_EXT)) {
993 m_freem(m);
994 ifp->if_ierrors++;
995 return;
996 }
997 m->m_pkthdr.rcvif = ifp;
998 /* Read Ethernet encapsulated packet */
999
1000 /*
1001 * No ANCACHE support since we just get back
1002 * an Ethernet packet no 802.11 info
1003 */
1004#if 0
1005#ifdef ANCACHE
1006 /* Read NIC frame header */
1007 bcopy(buf, (caddr_t)&rx_frame,
1008 sizeof(rx_frame));
1009#endif
1010#endif
1011 /* Check for insane frame length */
1012 len = an_rx_desc.an_len + 12;
1013 if (len > MCLBYTES) {
1c70eebf
JS
1014 if_printf(ifp,
1015 "oversized packet received "
1016 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1017 ifp->if_ierrors++;
1018 return;
1019 }
1020
1021 m->m_pkthdr.len = m->m_len =
1022 an_rx_desc.an_len + 12;
1023
1024 eh = mtod(m, struct ether_header *);
1025
1026 bcopy(buf, (char *)eh,
1027 m->m_pkthdr.len);
1028
1029 ifp->if_ipackets++;
1030
984263bc
MD
1031#if 0
1032#ifdef ANCACHE
3013ac0e 1033 an_cache_store(sc, m,
984263bc
MD
1034 rx_frame.an_rx_signal_strength,
1035 rx_frame.an_rsvd0);
1036#endif
1037#endif
3013ac0e 1038 (*ifp->if_input)(ifp, m);
984263bc
MD
1039
1040 an_rx_desc.an_valid = 1;
1041 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1042 an_rx_desc.an_done = 0;
1043 an_rx_desc.an_phys =
1044 sc->an_rx_buffer[count].an_dma_paddr;
1045
1046 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1047 CSR_MEM_AUX_WRITE_4(sc,
1048 AN_RX_DESC_OFFSET
1049 + (count * sizeof(an_rx_desc))
1050 + (i * 4),
1051 ((u_int32_t*)&an_rx_desc)[i]);
1052
1053 } else {
1c70eebf
JS
1054 if_printf(ifp, "Didn't get valid RX packet "
1055 "%x %x %d\n",
1056 an_rx_desc.an_done,
1057 an_rx_desc.an_valid,
1058 an_rx_desc.an_len);
984263bc
MD
1059 }
1060 }
1061 }
1062}
1063
1064static void
1065an_txeof(sc, status)
1066 struct an_softc *sc;
1067 int status;
1068{
1069 struct ifnet *ifp;
1070 int id, i;
1071
1072 ifp = &sc->arpcom.ac_if;
1073
1074 ifp->if_timer = 0;
1075 ifp->if_flags &= ~IFF_OACTIVE;
1076
1077 if (!sc->mpi350) {
1078 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1079
1080 if (status & AN_EV_TX_EXC) {
1081 ifp->if_oerrors++;
1082 } else
1083 ifp->if_opackets++;
1084
1085 for (i = 0; i < AN_TX_RING_CNT; i++) {
1086 if (id == sc->an_rdata.an_tx_ring[i]) {
1087 sc->an_rdata.an_tx_ring[i] = 0;
1088 break;
1089 }
1090 }
1091
1092 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1093 } else { /* MPI 350 */
1094 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1095 if (sc->an_rdata.an_tx_prod ==
1096 sc->an_rdata.an_tx_cons)
1097 sc->an_rdata.an_tx_empty = 1;
1098 }
1099
1100 return;
1101}
1102
1103/*
1104 * We abuse the stats updater to check the current NIC status. This
1105 * is important because we don't want to allow transmissions until
1106 * the NIC has synchronized to the current cell (either as the master
1107 * in an ad-hoc group, or as a station connected to an access point).
1108 */
1109static void
1110an_stats_update(xsc)
1111 void *xsc;
1112{
1113 struct an_softc *sc;
1114 struct ifnet *ifp;
1115 int s;
1116
1117 s = splimp();
1118
1119 sc = xsc;
1120 ifp = &sc->arpcom.ac_if;
1121
1122 sc->an_status.an_type = AN_RID_STATUS;
1123 sc->an_status.an_len = sizeof(struct an_ltv_status);
1124 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1125
1126 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1127 sc->an_associated = 1;
1128 else
1129 sc->an_associated = 0;
1130
1131 /* Don't do this while we're transmitting */
1132 if (ifp->if_flags & IFF_OACTIVE) {
89c0f216 1133 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1134 splx(s);
1135 return;
1136 }
1137
1138 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1139 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1140 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
1141
89c0f216 1142 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1143 splx(s);
1144
1145 return;
1146}
1147
1148void
1149an_intr(xsc)
1150 void *xsc;
1151{
1152 struct an_softc *sc;
1153 struct ifnet *ifp;
1154 u_int16_t status;
1155
1156 sc = (struct an_softc*)xsc;
1157
1158 if (sc->an_gone)
1159 return;
1160
1161 ifp = &sc->arpcom.ac_if;
1162
1163 /* Disable interrupts. */
1164 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1165
1166 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1167 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1168
1169 if (status & AN_EV_AWAKE) {
1170 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1171 }
1172
1173 if (status & AN_EV_LINKSTAT) {
1174 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1175 == AN_LINKSTAT_ASSOCIATED)
1176 sc->an_associated = 1;
1177 else
1178 sc->an_associated = 0;
1179 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1180 }
1181
1182 if (status & AN_EV_RX) {
1183 an_rxeof(sc);
1184 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1185 }
1186
1187 if (status & AN_EV_TX) {
1188 an_txeof(sc, status);
1189 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1190 }
1191
1192 if (status & AN_EV_TX_EXC) {
1193 an_txeof(sc, status);
1194 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1195 }
1196
1197 if (status & AN_EV_ALLOC)
1198 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1199
1200 /* Re-enable interrupts. */
1201 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1202
38de8487 1203 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1204 an_start(ifp);
1205
1206 return;
1207}
1208
1209static int
1210an_cmd_struct(sc, cmd, reply)
1211 struct an_softc *sc;
1212 struct an_command *cmd;
1213 struct an_reply *reply;
1214{
1215 int i;
1216
1217 for (i = 0; i != AN_TIMEOUT; i++) {
1218 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1219 DELAY(1000);
1220 } else
1221 break;
1222 }
1223 if( i == AN_TIMEOUT) {
1224 printf("BUSY\n");
1225 return(ETIMEDOUT);
1226 }
1227
1228 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1229 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1230 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1231 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1232
1233 for (i = 0; i < AN_TIMEOUT; i++) {
1234 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1235 break;
1236 DELAY(1000);
1237 }
1238
1239 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1240 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1241 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1242 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1243
1244 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1245 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1246
1247 /* Ack the command */
1248 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1249
1250 if (i == AN_TIMEOUT)
1251 return(ETIMEDOUT);
1252
1253 return(0);
1254}
1255
1256static int
1257an_cmd(sc, cmd, val)
1258 struct an_softc *sc;
1259 int cmd;
1260 int val;
1261{
1262 int i, s = 0;
1263
1264 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1265 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1266 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1267 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1268
1269 for (i = 0; i < AN_TIMEOUT; i++) {
1270 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1271 break;
1272 else {
1273 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1274 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1275 }
1276 }
1277
1278 for (i = 0; i < AN_TIMEOUT; i++) {
1279 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1280 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1281 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1282 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1283 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1284 break;
1285 }
1286
1287 /* Ack the command */
1288 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1289
1290 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1291 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1292
1293 if (i == AN_TIMEOUT)
1294 return(ETIMEDOUT);
1295
1296 return(0);
1297}
1298
1299/*
1300 * This reset sequence may look a little strange, but this is the
1301 * most reliable method I've found to really kick the NIC in the
1302 * head and force it to reboot correctly.
1303 */
1304static void
1305an_reset(sc)
1306 struct an_softc *sc;
1307{
1308 if (sc->an_gone)
1309 return;
1310
1311 an_cmd(sc, AN_CMD_ENABLE, 0);
1312 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1313 an_cmd(sc, AN_CMD_NOOP2, 0);
1314
1315 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1316 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1317
1318 an_cmd(sc, AN_CMD_DISABLE, 0);
1319
1320 return;
1321}
1322
1323/*
1324 * Read an LTV record from the NIC.
1325 */
1326static int
1327an_read_record(sc, ltv)
1328 struct an_softc *sc;
1329 struct an_ltv_gen *ltv;
1330{
1331 struct an_ltv_gen *an_ltv;
1332 struct an_card_rid_desc an_rid_desc;
1333 struct an_command cmd;
1334 struct an_reply reply;
1335 u_int16_t *ptr;
1336 u_int8_t *ptr2;
1337 int i, len;
1338
1339 if (ltv->an_len < 4 || ltv->an_type == 0)
1340 return(EINVAL);
1341
1342 if (!sc->mpi350){
1343 /* Tell the NIC to enter record read mode. */
1344 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1345 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1346 return(EIO);
1347 }
1348
1349 /* Seek to the record. */
1350 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1351 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1352 return(EIO);
1353 }
1354
1355 /*
1356 * Read the length and record type and make sure they
1357 * match what we expect (this verifies that we have enough
1358 * room to hold all of the returned data).
1359 * Length includes type but not length.
1360 */
1361 len = CSR_READ_2(sc, AN_DATA1);
1362 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1363 if_printf(&sc->arpcom.ac_if,
1364 "record length mismatch -- expected %d, "
1365 "got %d for Rid %x\n",
1366 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1367 len = ltv->an_len - 2;
1368 } else {
1369 ltv->an_len = len + 2;
1370 }
1371
1372 /* Now read the data. */
1373 len -= 2; /* skip the type */
1374 ptr = &ltv->an_val;
1375 for (i = len; i > 1; i -= 2)
1376 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1377 if (i) {
1378 ptr2 = (u_int8_t *)ptr;
1379 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1380 }
1381 } else { /* MPI-350 */
1382 an_rid_desc.an_valid = 1;
1383 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1384 an_rid_desc.an_rid = 0;
1385 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1386 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1387
1388 bzero(&cmd, sizeof(cmd));
1389 bzero(&reply, sizeof(reply));
1390 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1391 cmd.an_parm0 = ltv->an_type;
1392
1393 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1394 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1395 ((u_int32_t*)&an_rid_desc)[i]);
1396
1397 if (an_cmd_struct(sc, &cmd, &reply)
1398 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1399 if_printf(&sc->arpcom.ac_if,
1400 "failed to read RID %x %x %x %x %x, %d\n",
1401 ltv->an_type,
1402 reply.an_status,
1403 reply.an_resp0,
1404 reply.an_resp1,
1405 reply.an_resp2,
1406 i);
984263bc
MD
1407 return(EIO);
1408 }
1409
1410 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1411 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1412 an_rid_desc.an_len = an_ltv->an_len;
1413 }
1414
1415 if (an_rid_desc.an_len > 2)
1416 bcopy(&an_ltv->an_type,
1417 &ltv->an_val,
1418 an_rid_desc.an_len - 2);
1419 ltv->an_len = an_rid_desc.an_len + 2;
1420 }
1421
1422 if (an_dump)
1423 an_dump_record(sc, ltv, "Read");
1424
1425 return(0);
1426}
1427
1428/*
1429 * Same as read, except we inject data instead of reading it.
1430 */
1431static int
1432an_write_record(sc, ltv)
1433 struct an_softc *sc;
1434 struct an_ltv_gen *ltv;
1435{
1436 struct an_card_rid_desc an_rid_desc;
1437 struct an_command cmd;
1438 struct an_reply reply;
1439 char *buf;
1440 u_int16_t *ptr;
1441 u_int8_t *ptr2;
1442 int i, len;
1443
1444 if (an_dump)
1445 an_dump_record(sc, ltv, "Write");
1446
1447 if (!sc->mpi350){
1448 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1449 return(EIO);
1450
1451 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1452 return(EIO);
1453
1454 /*
1455 * Length includes type but not length.
1456 */
1457 len = ltv->an_len - 2;
1458 CSR_WRITE_2(sc, AN_DATA1, len);
1459
1460 len -= 2; /* skip the type */
1461 ptr = &ltv->an_val;
1462 for (i = len; i > 1; i -= 2)
1463 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1464 if (i) {
1465 ptr2 = (u_int8_t *)ptr;
1466 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1467 }
1468
1469 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1470 return(EIO);
1471 } else {
1472 /* MPI-350 */
1473
1474 for (i = 0; i != AN_TIMEOUT; i++) {
1475 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1476 & AN_CMD_BUSY) {
1477 DELAY(10);
1478 } else
1479 break;
1480 }
1481 if (i == AN_TIMEOUT) {
1482 printf("BUSY\n");
1483 }
1484
1485 an_rid_desc.an_valid = 1;
1486 an_rid_desc.an_len = ltv->an_len - 2;
1487 an_rid_desc.an_rid = ltv->an_type;
1488 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1489
1490 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1491 an_rid_desc.an_len);
1492
1493 bzero(&cmd,sizeof(cmd));
1494 bzero(&reply,sizeof(reply));
1495 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1496 cmd.an_parm0 = ltv->an_type;
1497
1498 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1499 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1500 ((u_int32_t*)&an_rid_desc)[i]);
1501
1502 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1503 if_printf(&sc->arpcom.ac_if,
1504 "failed to write RID 1 %x %x %x %x %x, %d\n",
1505 ltv->an_type,
984263bc
MD
1506 reply.an_status,
1507 reply.an_resp0,
1508 reply.an_resp1,
1509 reply.an_resp2,
1510 i);
1511 return(EIO);
1512 }
1513
1514 ptr = (u_int16_t *)buf;
1515
1516 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1517 if_printf(&sc->arpcom.ac_if,
1518 "failed to write RID 2 %x %x %x %x %x, %d\n",
1519 ltv->an_type,
984263bc
MD
1520 reply.an_status,
1521 reply.an_resp0,
1522 reply.an_resp1,
1523 reply.an_resp2,
1524 i);
1525 return(EIO);
1526 }
1527 }
1528
1529 return(0);
1530}
1531
1532static void
1533an_dump_record(sc, ltv, string)
1534 struct an_softc *sc;
1535 struct an_ltv_gen *ltv;
1536 char *string;
1537{
1538 u_int8_t *ptr2;
1539 int len;
1540 int i;
1541 int count = 0;
1542 char buf[17], temp;
1543
1544 len = ltv->an_len - 4;
1c70eebf
JS
1545 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1546 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1547
1548 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1549 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1550 bzero(buf,sizeof(buf));
1551
1552 ptr2 = (u_int8_t *)&ltv->an_val;
1553 for (i = len; i > 0; i--) {
1554 printf("%02x ", *ptr2);
1555
1556 temp = *ptr2++;
1557 if (temp >= ' ' && temp <= '~')
1558 buf[count] = temp;
1559 else if (temp >= 'A' && temp <= 'Z')
1560 buf[count] = temp;
1561 else
1562 buf[count] = '.';
1563 if (++count == 16) {
1564 count = 0;
1565 printf("%s\n",buf);
1c70eebf 1566 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1567 bzero(buf,sizeof(buf));
1568 }
1569 }
1570 for (; count != 16; count++) {
1571 printf(" ");
1572 }
1573 printf(" %s\n",buf);
1574 }
1575}
1576
1577static int
1578an_seek(sc, id, off, chan)
1579 struct an_softc *sc;
1580 int id, off, chan;
1581{
1582 int i;
1583 int selreg, offreg;
1584
1585 switch (chan) {
1586 case AN_BAP0:
1587 selreg = AN_SEL0;
1588 offreg = AN_OFF0;
1589 break;
1590 case AN_BAP1:
1591 selreg = AN_SEL1;
1592 offreg = AN_OFF1;
1593 break;
1594 default:
1c70eebf 1595 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1596 return(EIO);
1597 }
1598
1599 CSR_WRITE_2(sc, selreg, id);
1600 CSR_WRITE_2(sc, offreg, off);
1601
1602 for (i = 0; i < AN_TIMEOUT; i++) {
1603 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1604 break;
1605 }
1606
1607 if (i == AN_TIMEOUT)
1608 return(ETIMEDOUT);
1609
1610 return(0);
1611}
1612
1613static int
1614an_read_data(sc, id, off, buf, len)
1615 struct an_softc *sc;
1616 int id, off;
1617 caddr_t buf;
1618 int len;
1619{
1620 int i;
1621 u_int16_t *ptr;
1622 u_int8_t *ptr2;
1623
1624 if (off != -1) {
1625 if (an_seek(sc, id, off, AN_BAP1))
1626 return(EIO);
1627 }
1628
1629 ptr = (u_int16_t *)buf;
1630 for (i = len; i > 1; i -= 2)
1631 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1632 if (i) {
1633 ptr2 = (u_int8_t *)ptr;
1634 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1635 }
1636
1637 return(0);
1638}
1639
1640static int
1641an_write_data(sc, id, off, buf, len)
1642 struct an_softc *sc;
1643 int id, off;
1644 caddr_t buf;
1645 int len;
1646{
1647 int i;
1648 u_int16_t *ptr;
1649 u_int8_t *ptr2;
1650
1651 if (off != -1) {
1652 if (an_seek(sc, id, off, AN_BAP0))
1653 return(EIO);
1654 }
1655
1656 ptr = (u_int16_t *)buf;
1657 for (i = len; i > 1; i -= 2)
1658 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1659 if (i) {
1660 ptr2 = (u_int8_t *)ptr;
1661 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1662 }
1663
1664 return(0);
1665}
1666
1667/*
1668 * Allocate a region of memory inside the NIC and zero
1669 * it out.
1670 */
1671static int
1672an_alloc_nicmem(sc, len, id)
1673 struct an_softc *sc;
1674 int len;
1675 int *id;
1676{
1677 int i;
1678
1679 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1680 if_printf(&sc->arpcom.ac_if,
1681 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1682 return(ENOMEM);
1683 }
1684
1685 for (i = 0; i < AN_TIMEOUT; i++) {
1686 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1687 break;
1688 }
1689
1690 if (i == AN_TIMEOUT)
1691 return(ETIMEDOUT);
1692
1693 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1694 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1695
1696 if (an_seek(sc, *id, 0, AN_BAP0))
1697 return(EIO);
1698
1699 for (i = 0; i < len / 2; i++)
1700 CSR_WRITE_2(sc, AN_DATA0, 0);
1701
1702 return(0);
1703}
1704
1705static void
1706an_setdef(sc, areq)
1707 struct an_softc *sc;
1708 struct an_req *areq;
1709{
1710 struct sockaddr_dl *sdl;
1711 struct ifaddr *ifa;
1712 struct ifnet *ifp;
1713 struct an_ltv_genconfig *cfg;
1714 struct an_ltv_ssidlist *ssid;
1715 struct an_ltv_aplist *ap;
1716 struct an_ltv_gen *sp;
1717
1718 ifp = &sc->arpcom.ac_if;
1719
1720 switch (areq->an_type) {
1721 case AN_RID_GENCONFIG:
1722 cfg = (struct an_ltv_genconfig *)areq;
1723
1724 ifa = ifnet_addrs[ifp->if_index - 1];
1725 sdl = (struct sockaddr_dl *)ifa->ifa_addr;
1726 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1727 ETHER_ADDR_LEN);
1728 bcopy((char *)&cfg->an_macaddr, LLADDR(sdl), ETHER_ADDR_LEN);
1729
1730 bcopy((char *)cfg, (char *)&sc->an_config,
1731 sizeof(struct an_ltv_genconfig));
1732 break;
1733 case AN_RID_SSIDLIST:
1734 ssid = (struct an_ltv_ssidlist *)areq;
1735 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1736 sizeof(struct an_ltv_ssidlist));
1737 break;
1738 case AN_RID_APLIST:
1739 ap = (struct an_ltv_aplist *)areq;
1740 bcopy((char *)ap, (char *)&sc->an_aplist,
1741 sizeof(struct an_ltv_aplist));
1742 break;
1743 case AN_RID_TX_SPEED:
1744 sp = (struct an_ltv_gen *)areq;
1745 sc->an_tx_rate = sp->an_val;
1746
1747 /* Read the current configuration */
1748 sc->an_config.an_type = AN_RID_GENCONFIG;
1749 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1750 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1751 cfg = &sc->an_config;
1752
1753 /* clear other rates and set the only one we want */
1754 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1755 cfg->an_rates[0] = sc->an_tx_rate;
1756
1757 /* Save the new rate */
1758 sc->an_config.an_type = AN_RID_GENCONFIG;
1759 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1760 break;
1761 case AN_RID_WEP_TEMP:
1762 /* Cache the temp keys */
1763 bcopy(areq,
1764 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1765 sizeof(struct an_ltv_key));
1766 case AN_RID_WEP_PERM:
1767 case AN_RID_LEAPUSERNAME:
1768 case AN_RID_LEAPPASSWORD:
1769 /* Disable the MAC. */
1770 an_cmd(sc, AN_CMD_DISABLE, 0);
1771
1772 /* Write the key */
1773 an_write_record(sc, (struct an_ltv_gen *)areq);
1774
1775 /* Turn the MAC back on. */
1776 an_cmd(sc, AN_CMD_ENABLE, 0);
1777
1778 break;
1779 case AN_RID_MONITOR_MODE:
1780 cfg = (struct an_ltv_genconfig *)areq;
1781 bpfdetach(ifp);
1782 if (ng_ether_detach_p != NULL)
1783 (*ng_ether_detach_p) (ifp);
1784 sc->an_monitor = cfg->an_len;
1785
1786 if (sc->an_monitor & AN_MONITOR) {
1787 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1788 bpfattach(ifp, DLT_AIRONET_HEADER,
1789 sizeof(struct ether_header));
1790 } else {
1791 bpfattach(ifp, DLT_IEEE802_11,
1792 sizeof(struct ether_header));
1793 }
1794 } else {
1795 bpfattach(ifp, DLT_EN10MB,
1796 sizeof(struct ether_header));
1797 if (ng_ether_attach_p != NULL)
1798 (*ng_ether_attach_p) (ifp);
1799 }
1800 break;
1801 default:
1c70eebf 1802 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc
MD
1803 return;
1804 break;
1805 }
1806
1807
1808 /* Reinitialize the card. */
1809 if (ifp->if_flags)
1810 an_init(sc);
1811
1812 return;
1813}
1814
1815/*
1816 * Derived from Linux driver to enable promiscious mode.
1817 */
1818
1819static void
1820an_promisc(sc, promisc)
1821 struct an_softc *sc;
1822 int promisc;
1823{
1824 if (sc->an_was_monitor)
1825 an_reset(sc);
1c70eebf
JS
1826 if (sc->mpi350)
1827 an_init_mpi350_desc(sc);
984263bc
MD
1828 if (sc->an_monitor || sc->an_was_monitor)
1829 an_init(sc);
1830
1831 sc->an_was_monitor = sc->an_monitor;
1832 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1833
1834 return;
1835}
1836
1837static int
bd4539cc 1838an_ioctl(ifp, command, data, cr)
984263bc
MD
1839 struct ifnet *ifp;
1840 u_long command;
1841 caddr_t data;
bd4539cc 1842 struct ucred *cr;
984263bc
MD
1843{
1844 int s, error = 0;
1845 int len;
1846 int i;
1847 struct an_softc *sc;
1848 struct ifreq *ifr;
984263bc
MD
1849 struct ieee80211req *ireq;
1850 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1851 u_int8_t *tmpptr;
1852 struct an_ltv_genconfig *config;
1853 struct an_ltv_key *key;
1854 struct an_ltv_status *status;
1855 struct an_ltv_ssidlist *ssids;
1856 int mode;
1857 struct aironet_ioctl l_ioctl;
1858
1859 sc = ifp->if_softc;
1860 s = splimp();
1861 ifr = (struct ifreq *)data;
1862 ireq = (struct ieee80211req *)data;
1863
1864 config = (struct an_ltv_genconfig *)&sc->areq;
1865 key = (struct an_ltv_key *)&sc->areq;
1866 status = (struct an_ltv_status *)&sc->areq;
1867 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1868
1869 if (sc->an_gone) {
1870 error = ENODEV;
1871 goto out;
1872 }
1873
1874 switch (command) {
1875 case SIOCSIFADDR:
1876 case SIOCGIFADDR:
1877 case SIOCSIFMTU:
1878 error = ether_ioctl(ifp, command, data);
1879 break;
1880 case SIOCSIFFLAGS:
1881 if (ifp->if_flags & IFF_UP) {
1882 if (ifp->if_flags & IFF_RUNNING &&
1883 ifp->if_flags & IFF_PROMISC &&
1884 !(sc->an_if_flags & IFF_PROMISC)) {
1885 an_promisc(sc, 1);
1886 } else if (ifp->if_flags & IFF_RUNNING &&
1887 !(ifp->if_flags & IFF_PROMISC) &&
1888 sc->an_if_flags & IFF_PROMISC) {
1889 an_promisc(sc, 0);
1890 } else
1891 an_init(sc);
1892 } else {
1893 if (ifp->if_flags & IFF_RUNNING)
1894 an_stop(sc);
1895 }
1896 sc->an_if_flags = ifp->if_flags;
1897 error = 0;
1898 break;
1899 case SIOCSIFMEDIA:
1900 case SIOCGIFMEDIA:
1901 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1902 break;
1903 case SIOCADDMULTI:
1904 case SIOCDELMULTI:
1905 /* The Aironet has no multicast filter. */
1906 error = 0;
1907 break;
1908 case SIOCGAIRONET:
1909 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1910 if (error != 0)
1911 break;
1912#ifdef ANCACHE
1913 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1914 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1915 if (error)
1916 break;
1917 sc->an_sigitems = sc->an_nextitem = 0;
1918 break;
1919 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1920 char *pt = (char *)&sc->areq.an_val;
1921 bcopy((char *)&sc->an_sigitems, (char *)pt,
1922 sizeof(int));
1923 pt += sizeof(int);
1924 sc->areq.an_len = sizeof(int) / 2;
1925 bcopy((char *)&sc->an_sigcache, (char *)pt,
1926 sizeof(struct an_sigcache) * sc->an_sigitems);
1927 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1928 sc->an_sigitems) / 2) + 1;
1929 } else
1930#endif
1931 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1932 error = EINVAL;
1933 break;
1934 }
1935 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1936 break;
1937 case SIOCSAIRONET:
bd4539cc 1938 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1939 goto out;
1940 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1941 if (error != 0)
1942 break;
1943 an_setdef(sc, &sc->areq);
1944 break;
1945 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1946 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1947 goto out;
1948 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1949 mode = l_ioctl.command;
1950
1951 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1952 error = readrids(ifp, &l_ioctl);
1953 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1954 error = writerids(ifp, &l_ioctl);
1955 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1956 error = flashcard(ifp, &l_ioctl);
1957 } else {
1958 error =-1;
1959 }
1960
1961 /* copy out the updated command info */
1962 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1963
1964 break;
1965 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1966 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1967 goto out;
1968 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1969 l_ioctl.command = 0;
1970 error = AIROMAGIC;
1971 copyout(&error, l_ioctl.data, sizeof(error));
1972 error = 0;
1973 break;
1974 case SIOCG80211:
1975 sc->areq.an_len = sizeof(sc->areq);
1976 /* was that a good idea DJA we are doing a short-cut */
1977 switch (ireq->i_type) {
1978 case IEEE80211_IOC_SSID:
1979 if (ireq->i_val == -1) {
1980 sc->areq.an_type = AN_RID_STATUS;
1981 if (an_read_record(sc,
1982 (struct an_ltv_gen *)&sc->areq)) {
1983 error = EINVAL;
1984 break;
1985 }
1986 len = status->an_ssidlen;
1987 tmpptr = status->an_ssid;
1988 } else if (ireq->i_val >= 0) {
1989 sc->areq.an_type = AN_RID_SSIDLIST;
1990 if (an_read_record(sc,
1991 (struct an_ltv_gen *)&sc->areq)) {
1992 error = EINVAL;
1993 break;
1994 }
1995 if (ireq->i_val == 0) {
1996 len = ssids->an_ssid1_len;
1997 tmpptr = ssids->an_ssid1;
1998 } else if (ireq->i_val == 1) {
1999 len = ssids->an_ssid2_len;
2000 tmpptr = ssids->an_ssid2;
2001 } else if (ireq->i_val == 2) {
2002 len = ssids->an_ssid3_len;
2003 tmpptr = ssids->an_ssid3;
2004 } else {
2005 error = EINVAL;
2006 break;
2007 }
2008 } else {
2009 error = EINVAL;
2010 break;
2011 }
2012 if (len > IEEE80211_NWID_LEN) {
2013 error = EINVAL;
2014 break;
2015 }
2016 ireq->i_len = len;
2017 bzero(tmpstr, IEEE80211_NWID_LEN);
2018 bcopy(tmpptr, tmpstr, len);
2019 error = copyout(tmpstr, ireq->i_data,
2020 IEEE80211_NWID_LEN);
2021 break;
2022 case IEEE80211_IOC_NUMSSIDS:
2023 ireq->i_val = 3;
2024 break;
2025 case IEEE80211_IOC_WEP:
2026 sc->areq.an_type = AN_RID_ACTUALCFG;
2027 if (an_read_record(sc,
2028 (struct an_ltv_gen *)&sc->areq)) {
2029 error = EINVAL;
2030 break;
2031 }
2032 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2033 if (config->an_authtype &
2034 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2035 ireq->i_val = IEEE80211_WEP_MIXED;
2036 else
2037 ireq->i_val = IEEE80211_WEP_ON;
2038 } else {
2039 ireq->i_val = IEEE80211_WEP_OFF;
2040 }
2041 break;
2042 case IEEE80211_IOC_WEPKEY:
2043 /*
2044 * XXX: I'm not entierly convinced this is
2045 * correct, but it's what is implemented in
2046 * ancontrol so it will have to do until we get
2047 * access to actual Cisco code.
2048 */
2049 if (ireq->i_val < 0 || ireq->i_val > 8) {
2050 error = EINVAL;
2051 break;
2052 }
2053 len = 0;
2054 if (ireq->i_val < 5) {
2055 sc->areq.an_type = AN_RID_WEP_TEMP;
2056 for (i = 0; i < 5; i++) {
2057 if (an_read_record(sc,
2058 (struct an_ltv_gen *)&sc->areq)) {
2059 error = EINVAL;
2060 break;
2061 }
2062 if (key->kindex == 0xffff)
2063 break;
2064 if (key->kindex == ireq->i_val)
2065 len = key->klen;
2066 /* Required to get next entry */
2067 sc->areq.an_type = AN_RID_WEP_PERM;
2068 }
2069 if (error != 0)
2070 break;
2071 }
2072 /* We aren't allowed to read the value of the
2073 * key from the card so we just output zeros
2074 * like we would if we could read the card, but
2075 * denied the user access.
2076 */
2077 bzero(tmpstr, len);
2078 ireq->i_len = len;
2079 error = copyout(tmpstr, ireq->i_data, len);
2080 break;
2081 case IEEE80211_IOC_NUMWEPKEYS:
2082 ireq->i_val = 9; /* include home key */
2083 break;
2084 case IEEE80211_IOC_WEPTXKEY:
2085 /*
2086 * For some strange reason, you have to read all
2087 * keys before you can read the txkey.
2088 */
2089 sc->areq.an_type = AN_RID_WEP_TEMP;
2090 for (i = 0; i < 5; i++) {
2091 if (an_read_record(sc,
2092 (struct an_ltv_gen *) &sc->areq)) {
2093 error = EINVAL;
2094 break;
2095 }
2096 if (key->kindex == 0xffff)
2097 break;
2098 /* Required to get next entry */
2099 sc->areq.an_type = AN_RID_WEP_PERM;
2100 }
2101 if (error != 0)
2102 break;
2103
2104 sc->areq.an_type = AN_RID_WEP_PERM;
2105 key->kindex = 0xffff;
2106 if (an_read_record(sc,
2107 (struct an_ltv_gen *)&sc->areq)) {
2108 error = EINVAL;
2109 break;
2110 }
2111 ireq->i_val = key->mac[0];
2112 /*
2113 * Check for home mode. Map home mode into
2114 * 5th key since that is how it is stored on
2115 * the card
2116 */
2117 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2118 sc->areq.an_type = AN_RID_GENCONFIG;
2119 if (an_read_record(sc,
2120 (struct an_ltv_gen *)&sc->areq)) {
2121 error = EINVAL;
2122 break;
2123 }
2124 if (config->an_home_product & AN_HOME_NETWORK)
2125 ireq->i_val = 4;
2126 break;
2127 case IEEE80211_IOC_AUTHMODE:
2128 sc->areq.an_type = AN_RID_ACTUALCFG;
2129 if (an_read_record(sc,
2130 (struct an_ltv_gen *)&sc->areq)) {
2131 error = EINVAL;
2132 break;
2133 }
2134 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2135 AN_AUTHTYPE_NONE) {
2136 ireq->i_val = IEEE80211_AUTH_NONE;
2137 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2138 AN_AUTHTYPE_OPEN) {
2139 ireq->i_val = IEEE80211_AUTH_OPEN;
2140 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2141 AN_AUTHTYPE_SHAREDKEY) {
2142 ireq->i_val = IEEE80211_AUTH_SHARED;
2143 } else
2144 error = EINVAL;
2145 break;
2146 case IEEE80211_IOC_STATIONNAME:
2147 sc->areq.an_type = AN_RID_ACTUALCFG;
2148 if (an_read_record(sc,
2149 (struct an_ltv_gen *)&sc->areq)) {
2150 error = EINVAL;
2151 break;
2152 }
2153 ireq->i_len = sizeof(config->an_nodename);
2154 tmpptr = config->an_nodename;
2155 bzero(tmpstr, IEEE80211_NWID_LEN);
2156 bcopy(tmpptr, tmpstr, ireq->i_len);
2157 error = copyout(tmpstr, ireq->i_data,
2158 IEEE80211_NWID_LEN);
2159 break;
2160 case IEEE80211_IOC_CHANNEL:
2161 sc->areq.an_type = AN_RID_STATUS;
2162 if (an_read_record(sc,
2163 (struct an_ltv_gen *)&sc->areq)) {
2164 error = EINVAL;
2165 break;
2166 }
2167 ireq->i_val = status->an_cur_channel;
2168 break;
2169 case IEEE80211_IOC_POWERSAVE:
2170 sc->areq.an_type = AN_RID_ACTUALCFG;
2171 if (an_read_record(sc,
2172 (struct an_ltv_gen *)&sc->areq)) {
2173 error = EINVAL;
2174 break;
2175 }
2176 if (config->an_psave_mode == AN_PSAVE_NONE) {
2177 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2178 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2179 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2180 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2181 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2182 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2183 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2184 } else
2185 error = EINVAL;
2186 break;
2187 case IEEE80211_IOC_POWERSAVESLEEP:
2188 sc->areq.an_type = AN_RID_ACTUALCFG;
2189 if (an_read_record(sc,
2190 (struct an_ltv_gen *)&sc->areq)) {
2191 error = EINVAL;
2192 break;
2193 }
2194 ireq->i_val = config->an_listen_interval;
2195 break;
2196 }
2197 break;
2198 case SIOCS80211:
bd4539cc 2199 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
2200 goto out;
2201 sc->areq.an_len = sizeof(sc->areq);
2202 /*
2203 * We need a config structure for everything but the WEP
2204 * key management and SSIDs so we get it now so avoid
2205 * duplicating this code every time.
2206 */
2207 if (ireq->i_type != IEEE80211_IOC_SSID &&
2208 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2209 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2210 sc->areq.an_type = AN_RID_GENCONFIG;
2211 if (an_read_record(sc,
2212 (struct an_ltv_gen *)&sc->areq)) {
2213 error = EINVAL;
2214 break;
2215 }
2216 }
2217 switch (ireq->i_type) {
2218 case IEEE80211_IOC_SSID:
2219 sc->areq.an_type = AN_RID_SSIDLIST;
2220 if (an_read_record(sc,
2221 (struct an_ltv_gen *)&sc->areq)) {
2222 error = EINVAL;
2223 break;
2224 }
2225 if (ireq->i_len > IEEE80211_NWID_LEN) {
2226 error = EINVAL;
2227 break;
2228 }
2229 switch (ireq->i_val) {
2230 case 0:
2231 error = copyin(ireq->i_data,
2232 ssids->an_ssid1, ireq->i_len);
2233 ssids->an_ssid1_len = ireq->i_len;
2234 break;
2235 case 1:
2236 error = copyin(ireq->i_data,
2237 ssids->an_ssid2, ireq->i_len);
2238 ssids->an_ssid2_len = ireq->i_len;
2239 break;
2240 case 2:
2241 error = copyin(ireq->i_data,
2242 ssids->an_ssid3, ireq->i_len);
2243 ssids->an_ssid3_len = ireq->i_len;
2244 break;
2245 default:
2246 error = EINVAL;
2247 break;
2248 }
2249 break;
2250 case IEEE80211_IOC_WEP:
2251 switch (ireq->i_val) {
2252 case IEEE80211_WEP_OFF:
2253 config->an_authtype &=
2254 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2255 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2256 break;
2257 case IEEE80211_WEP_ON:
2258 config->an_authtype |=
2259 AN_AUTHTYPE_PRIVACY_IN_USE;
2260 config->an_authtype &=
2261 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2262 break;
2263 case IEEE80211_WEP_MIXED:
2264 config->an_authtype |=
2265 AN_AUTHTYPE_PRIVACY_IN_USE |
2266 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2267 break;
2268 default:
2269 error = EINVAL;
2270 break;
2271 }
2272 break;
2273 case IEEE80211_IOC_WEPKEY:
2274 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2275 ireq->i_len > 13) {
2276 error = EINVAL;
2277 break;
2278 }
2279 error = copyin(ireq->i_data, tmpstr, 13);
2280 if (error != 0)
2281 break;
2282 /*
2283 * Map the 9th key into the home mode
2284 * since that is how it is stored on
2285 * the card
2286 */
2287 bzero(&sc->areq, sizeof(struct an_ltv_key));
2288 sc->areq.an_len = sizeof(struct an_ltv_key);
2289 key->mac[0] = 1; /* The others are 0. */
2290 if (ireq->i_val < 4) {
2291 sc->areq.an_type = AN_RID_WEP_TEMP;
2292 key->kindex = ireq->i_val;
2293 } else {
2294 sc->areq.an_type = AN_RID_WEP_PERM;
2295 key->kindex = ireq->i_val - 4;
2296 }
2297 key->klen = ireq->i_len;
2298 bcopy(tmpstr, key->key, key->klen);
2299 break;
2300 case IEEE80211_IOC_WEPTXKEY:
2301 if (ireq->i_val < 0 || ireq->i_val > 4) {
2302 error = EINVAL;
2303 break;
2304 }
2305
2306 /*
2307 * Map the 5th key into the home mode
2308 * since that is how it is stored on
2309 * the card
2310 */
2311 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2312 sc->areq.an_type = AN_RID_ACTUALCFG;
2313 if (an_read_record(sc,
2314 (struct an_ltv_gen *)&sc->areq)) {
2315 error = EINVAL;
2316 break;
2317 }
2318 if (ireq->i_val == 4) {
2319 config->an_home_product |= AN_HOME_NETWORK;
2320 ireq->i_val = 0;
2321 } else {
2322 config->an_home_product &= ~AN_HOME_NETWORK;
2323 }
2324
2325 sc->an_config.an_home_product
2326 = config->an_home_product;
2327
2328 /* update configuration */
2329 an_init(sc);
2330
2331 bzero(&sc->areq, sizeof(struct an_ltv_key));
2332 sc->areq.an_len = sizeof(struct an_ltv_key);
2333 sc->areq.an_type = AN_RID_WEP_PERM;
2334 key->kindex = 0xffff;
2335 key->mac[0] = ireq->i_val;
2336 break;
2337 case IEEE80211_IOC_AUTHMODE:
2338 switch (ireq->i_val) {
2339 case IEEE80211_AUTH_NONE:
2340 config->an_authtype = AN_AUTHTYPE_NONE |
2341 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2342 break;
2343 case IEEE80211_AUTH_OPEN:
2344 config->an_authtype = AN_AUTHTYPE_OPEN |
2345 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2346 break;
2347 case IEEE80211_AUTH_SHARED:
2348 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2349 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2350 break;
2351 default:
2352 error = EINVAL;
2353 }
2354 break;
2355 case IEEE80211_IOC_STATIONNAME:
2356 if (ireq->i_len > 16) {
2357 error = EINVAL;
2358 break;
2359 }
2360 bzero(config->an_nodename, 16);
2361 error = copyin(ireq->i_data,
2362 config->an_nodename, ireq->i_len);
2363 break;
2364 case IEEE80211_IOC_CHANNEL:
2365 /*
2366 * The actual range is 1-14, but if you set it
2367 * to 0 you get the default so we let that work
2368 * too.
2369 */
2370 if (ireq->i_val < 0 || ireq->i_val >14) {
2371 error = EINVAL;
2372 break;
2373 }
2374 config->an_ds_channel = ireq->i_val;
2375 break;
2376 case IEEE80211_IOC_POWERSAVE:
2377 switch (ireq->i_val) {
2378 case IEEE80211_POWERSAVE_OFF:
2379 config->an_psave_mode = AN_PSAVE_NONE;
2380 break;
2381 case IEEE80211_POWERSAVE_CAM:
2382 config->an_psave_mode = AN_PSAVE_CAM;
2383 break;
2384 case IEEE80211_POWERSAVE_PSP:
2385 config->an_psave_mode = AN_PSAVE_PSP;
2386 break;
2387 case IEEE80211_POWERSAVE_PSP_CAM:
2388 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2389 break;
2390 default:
2391 error = EINVAL;
2392 break;
2393 }
2394 break;
2395 case IEEE80211_IOC_POWERSAVESLEEP:
2396 config->an_listen_interval = ireq->i_val;
2397 break;
2398 }
2399
2400 if (!error)
2401 an_setdef(sc, &sc->areq);
2402 break;
2403 default:
2404 error = EINVAL;
2405 break;
2406 }
2407out:
2408 splx(s);
2409
2410 return(error != 0);
2411}
2412
2413static int
2414an_init_tx_ring(sc)
2415 struct an_softc *sc;
2416{
2417 int i;
2418 int id;
2419
2420 if (sc->an_gone)
2421 return (0);
2422
2423 if (!sc->mpi350) {
2424 for (i = 0; i < AN_TX_RING_CNT; i++) {
2425 if (an_alloc_nicmem(sc, 1518 +
2426 0x44, &id))
2427 return(ENOMEM);
2428 sc->an_rdata.an_tx_fids[i] = id;
2429 sc->an_rdata.an_tx_ring[i] = 0;
2430 }
2431 }
2432
2433 sc->an_rdata.an_tx_prod = 0;
2434 sc->an_rdata.an_tx_cons = 0;
2435 sc->an_rdata.an_tx_empty = 1;
2436
2437 return(0);
2438}
2439
2440static void
2441an_init(xsc)
2442 void *xsc;
2443{
2444 struct an_softc *sc = xsc;
2445 struct ifnet *ifp = &sc->arpcom.ac_if;
2446 int s;
2447
2448 s = splimp();
2449
2450 if (sc->an_gone) {
2451 splx(s);
2452 return;
2453 }
2454
2455 if (ifp->if_flags & IFF_RUNNING)
2456 an_stop(sc);
2457
2458 sc->an_associated = 0;
2459
2460 /* Allocate the TX buffers */
2461 if (an_init_tx_ring(sc)) {
2462 an_reset(sc);
2463 if (sc->mpi350)
2464 an_init_mpi350_desc(sc);
2465 if (an_init_tx_ring(sc)) {
1c70eebf 2466 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2467 splx(s);
2468 return;
2469 }
2470 }
2471
2472 /* Set our MAC address. */
2473 bcopy((char *)&sc->arpcom.ac_enaddr,
2474 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2475
2476 if (ifp->if_flags & IFF_BROADCAST)
2477 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2478 else
2479 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2480
2481 if (ifp->if_flags & IFF_MULTICAST)
2482 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2483
2484 if (ifp->if_flags & IFF_PROMISC) {
2485 if (sc->an_monitor & AN_MONITOR) {
2486 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2487 sc->an_config.an_rxmode |=
2488 AN_RXMODE_80211_MONITOR_ANYBSS |
2489 AN_RXMODE_NO_8023_HEADER;
2490 } else {
2491 sc->an_config.an_rxmode |=
2492 AN_RXMODE_80211_MONITOR_CURBSS |
2493 AN_RXMODE_NO_8023_HEADER;
2494 }
2495 }
2496 }
2497
2498 if (sc->an_have_rssimap)
2499 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2500
2501 /* Set the ssid list */
2502 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2503 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2504 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 2505 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2506 splx(s);
2507 return;
2508 }
2509
2510 /* Set the AP list */
2511 sc->an_aplist.an_type = AN_RID_APLIST;
2512 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2513 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 2514 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2515 splx(s);
2516 return;
2517 }
2518
2519 /* Set the configuration in the NIC */
2520 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2521 sc->an_config.an_type = AN_RID_GENCONFIG;
2522 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 2523 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2524 splx(s);
2525 return;
2526 }
2527
2528 /* Enable the MAC */
2529 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
1c70eebf 2530 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2531 splx(s);
2532 return;
2533 }
2534
2535 if (ifp->if_flags & IFF_PROMISC)
2536 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2537
2538 /* enable interrupts */
2539 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2540
2541 ifp->if_flags |= IFF_RUNNING;
2542 ifp->if_flags &= ~IFF_OACTIVE;
2543
89c0f216 2544 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2545 splx(s);
2546
2547 return;
2548}
2549
2550static void
2551an_start(ifp)
2552 struct ifnet *ifp;
2553{
2554 struct an_softc *sc;
2555 struct mbuf *m0 = NULL;
2556 struct an_txframe_802_3 tx_frame_802_3;
2557 struct ether_header *eh;
2558 int id, idx, i;
2559 unsigned char txcontrol;
2560 struct an_card_tx_desc an_tx_desc;
2561 u_int8_t *ptr;
2562 u_int8_t *buf;
2563
2564 sc = ifp->if_softc;
2565
2566 if (sc->an_gone)
2567 return;
2568
2569 if (ifp->if_flags & IFF_OACTIVE)
2570 return;
2571
2572 if (!sc->an_associated)
2573 return;
2574
2575 /* We can't send in monitor mode so toss any attempts. */
2576 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2577 ifq_purge(&ifp->if_snd);
984263bc
MD
2578 return;
2579 }
2580
2581 idx = sc->an_rdata.an_tx_prod;
2582
2583 if (!sc->mpi350) {
2584 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2585
2586 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2587 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2588 if (m0 == NULL)
2589 break;
2590
2591 id = sc->an_rdata.an_tx_fids[idx];
2592 eh = mtod(m0, struct ether_header *);
2593
2594 bcopy((char *)&eh->ether_dhost,
2595 (char *)&tx_frame_802_3.an_tx_dst_addr,
2596 ETHER_ADDR_LEN);
2597 bcopy((char *)&eh->ether_shost,
2598 (char *)&tx_frame_802_3.an_tx_src_addr,
2599 ETHER_ADDR_LEN);
2600
2601 /* minus src/dest mac & type */
2602 tx_frame_802_3.an_tx_802_3_payload_len =
2603 m0->m_pkthdr.len - 12;
2604
2605 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2606 tx_frame_802_3.an_tx_802_3_payload_len,
2607 (caddr_t)&sc->an_txbuf);
2608
2609 txcontrol = AN_TXCTL_8023;
2610 /* write the txcontrol only */
2611 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2612 sizeof(txcontrol));
2613
2614 /* 802_3 header */
2615 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2616 sizeof(struct an_txframe_802_3));
2617
2618 /* in mbuf header type is just before payload */
2619 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2620 tx_frame_802_3.an_tx_802_3_payload_len);
2621
7600679e 2622 BPF_MTAP(ifp, m0);
984263bc
MD
2623
2624 m_freem(m0);
2625 m0 = NULL;
2626
2627 sc->an_rdata.an_tx_ring[idx] = id;
2628 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2629 if_printf(ifp, "xmit failed\n");
984263bc
MD
2630
2631 AN_INC(idx, AN_TX_RING_CNT);
2632 }
2633 } else { /* MPI-350 */
2634 while (sc->an_rdata.an_tx_empty ||
2635 idx != sc->an_rdata.an_tx_cons) {
38de8487 2636 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2637 if (m0 == NULL) {
2638 break;
2639 }
2640 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2641
2642 eh = mtod(m0, struct ether_header *);
2643
2644 /* DJA optimize this to limit bcopy */
2645 bcopy((char *)&eh->ether_dhost,
2646 (char *)&tx_frame_802_3.an_tx_dst_addr,
2647 ETHER_ADDR_LEN);
2648 bcopy((char *)&eh->ether_shost,
2649 (char *)&tx_frame_802_3.an_tx_src_addr,
2650 ETHER_ADDR_LEN);
2651
2652 /* minus src/dest mac & type */
2653 tx_frame_802_3.an_tx_802_3_payload_len =
2654 m0->m_pkthdr.len - 12;
2655
2656 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2657 tx_frame_802_3.an_tx_802_3_payload_len,
2658 (caddr_t)&sc->an_txbuf);
2659
2660 txcontrol = AN_TXCTL_8023;
2661 /* write the txcontrol only */
2662 bcopy((caddr_t)&txcontrol, &buf[0x08],
2663 sizeof(txcontrol));
2664
2665 /* 802_3 header */
2666 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2667 sizeof(struct an_txframe_802_3));
2668
2669 /* in mbuf header type is just before payload */
2670 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2671 tx_frame_802_3.an_tx_802_3_payload_len);
2672
2673
2674 bzero(&an_tx_desc, sizeof(an_tx_desc));
2675 an_tx_desc.an_offset = 0;
2676 an_tx_desc.an_eoc = 1;
2677 an_tx_desc.an_valid = 1;
2678 an_tx_desc.an_len = 0x44 +
2679 tx_frame_802_3.an_tx_802_3_payload_len;
2680 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2681 ptr = (u_int8_t*)&an_tx_desc;
2682 for (i = 0; i < sizeof(an_tx_desc); i++) {
2683 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2684 ptr[i]);
2685 }
2686
7600679e 2687 BPF_MTAP(ifp, m0);
984263bc
MD
2688
2689 m_freem(m0);
2690 m0 = NULL;
2691
2692 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2693
2694 AN_INC(idx, AN_MAX_TX_DESC);
2695 sc->an_rdata.an_tx_empty = 0;
2696 }
2697 }
2698
2699 if (m0 != NULL)
2700 ifp->if_flags |= IFF_OACTIVE;
2701
2702 sc->an_rdata.an_tx_prod = idx;
2703
2704 /*
2705 * Set a timeout in case the chip goes out to lunch.
2706 */
2707 ifp->if_timer = 5;
2708
2709 return;
2710}
2711
2712void
2713an_stop(sc)
2714 struct an_softc *sc;
2715{
2716 struct ifnet *ifp;
2717 int i;
2718 int s;
2719
2720 s = splimp();
2721
2722 if (sc->an_gone) {
2723 splx(s);
2724 return;
2725 }
2726
2727 ifp = &sc->arpcom.ac_if;
2728
2729 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2730 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2731 an_cmd(sc, AN_CMD_DISABLE, 0);
2732
2733 for (i = 0; i < AN_TX_RING_CNT; i++)
2734 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2735
89c0f216 2736 callout_stop(&sc->an_stat_timer);
984263bc
MD
2737
2738 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2739
2740 if (sc->an_flash_buffer) {
2741 free(sc->an_flash_buffer, M_DEVBUF);
2742 sc->an_flash_buffer = NULL;
2743 }
2744
2745 splx(s);
2746
2747 return;
2748}
2749
2750static void
2751an_watchdog(ifp)
2752 struct ifnet *ifp;
2753{
2754 struct an_softc *sc;
2755 int s;
2756
2757 sc = ifp->if_softc;
2758 s = splimp();
2759
2760 if (sc->an_gone) {
2761 splx(s);
2762 return;
2763 }
2764
1c70eebf 2765 if_printf(ifp, "device timeout\n");
984263bc
MD
2766
2767 an_reset(sc);
2768 if (sc->mpi350)
2769 an_init_mpi350_desc(sc);
2770 an_init(sc);
2771
2772 ifp->if_oerrors++;
2773 splx(s);
2774
2775 return;
2776}
2777
2778void
2779an_shutdown(dev)
2780 device_t dev;
2781{
2782 struct an_softc *sc;
2783
2784 sc = device_get_softc(dev);
2785 an_stop(sc);
2786
2787 return;
2788}
2789
2790void
2791an_resume(dev)
2792 device_t dev;
2793{
2794 struct an_softc *sc;
2795 struct ifnet *ifp;
2796 int i;
2797
2798 sc = device_get_softc(dev);
2799 ifp = &sc->arpcom.ac_if;
2800
2801 an_reset(sc);
2802 if (sc->mpi350)
2803 an_init_mpi350_desc(sc);
2804 an_init(sc);
2805
2806 /* Recovery temporary keys */
2807 for (i = 0; i < 4; i++) {
2808 sc->areq.an_type = AN_RID_WEP_TEMP;
2809 sc->areq.an_len = sizeof(struct an_ltv_key);
2810 bcopy(&sc->an_temp_keys[i],
2811 &sc->areq, sizeof(struct an_ltv_key));
2812 an_setdef(sc, &sc->areq);
2813 }
2814
2815 if (ifp->if_flags & IFF_UP)
2816 an_start(ifp);
2817
2818 return;
2819}
2820
2821#ifdef ANCACHE
2822/* Aironet signal strength cache code.
2823 * store signal/noise/quality on per MAC src basis in
2824 * a small fixed cache. The cache wraps if > MAX slots
2825 * used. The cache may be zeroed out to start over.
2826 * Two simple filters exist to reduce computation:
2827 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2828 * to ignore some packets. It defaults to ip only.
2829 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2830 * 2. multicast/broadcast only. This may be used to
2831 * ignore unicast packets and only cache signal strength
2832 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2833 * beacons and not unicast traffic.
2834 *
2835 * The cache stores (MAC src(index), IP src (major clue), signal,
2836 * quality, noise)
2837 *
2838 * No apologies for storing IP src here. It's easy and saves much
2839 * trouble elsewhere. The cache is assumed to be INET dependent,
2840 * although it need not be.
2841 *
2842 * Note: the Aironet only has a single byte of signal strength value
2843 * in the rx frame header, and it's not scaled to anything sensible.
2844 * This is kind of lame, but it's all we've got.
2845 */
2846
2847#ifdef documentation
2848
2849int an_sigitems; /* number of cached entries */
2850struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2851int an_nextitem; /* index/# of entries */
2852
2853
2854#endif
2855
2856/* control variables for cache filtering. Basic idea is
2857 * to reduce cost (e.g., to only Mobile-IP agent beacons
2858 * which are broadcast or multicast). Still you might
2859 * want to measure signal strength anth unicast ping packets
2860 * on a pt. to pt. ant. setup.
2861 */
2862/* set true if you want to limit cache items to broadcast/mcast
2863 * only packets (not unicast). Useful for mobile-ip beacons which
2864 * are broadcast/multicast at network layer. Default is all packets
2865 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2866 */
2867static int an_cache_mcastonly = 0;
2868SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2869 &an_cache_mcastonly, 0, "");
2870
2871/* set true if you want to limit cache items to IP packets only
2872*/
2873static int an_cache_iponly = 1;
2874SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2875 &an_cache_iponly, 0, "");
2876
2877/*
2878 * an_cache_store, per rx packet store signal
2879 * strength in MAC (src) indexed cache.
2880 */
2881static void
3013ac0e 2882an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2883 struct an_softc *sc;
984263bc
MD
2884 struct mbuf *m;
2885 u_int8_t rx_rssi;
2886 u_int8_t rx_quality;
2887{
3013ac0e
JS
2888 struct ether_header *eh = mtod(m, struct ether_header *);
2889 struct ip *ip = NULL;
984263bc
MD
2890 int i;
2891 static int cache_slot = 0; /* use this cache entry */
2892 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2893
2894 /* filters:
2895 * 1. ip only
2896 * 2. configurable filter to throw out unicast packets,
2897 * keep multicast only.
2898 */
2899
3013ac0e
JS
2900 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2901 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2902 else if (an_cache_iponly)
984263bc 2903 return;
984263bc
MD
2904
2905 /* filter for broadcast/multicast only
2906 */
2907 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2908 return;
2909 }
2910
2911#ifdef SIGDEBUG
1c70eebf
JS
2912 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2913 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2914#endif
2915
984263bc
MD
2916 /* do a linear search for a matching MAC address
2917 * in the cache table
2918 * . MAC address is 6 bytes,
2919 * . var w_nextitem holds total number of entries already cached
2920 */
2921 for (i = 0; i < sc->an_nextitem; i++) {
2922 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2923 /* Match!,
2924 * so we already have this entry,
2925 * update the data
2926 */
2927 break;
2928 }
2929 }
2930
2931 /* did we find a matching mac address?
2932 * if yes, then overwrite a previously existing cache entry
2933 */
2934 if (i < sc->an_nextitem ) {
2935 cache_slot = i;
2936 }
2937 /* else, have a new address entry,so
2938 * add this new entry,
2939 * if table full, then we need to replace LRU entry
2940 */
2941 else {
2942
2943 /* check for space in cache table
2944 * note: an_nextitem also holds number of entries
2945 * added in the cache table
2946 */
2947 if ( sc->an_nextitem < MAXANCACHE ) {
2948 cache_slot = sc->an_nextitem;
2949 sc->an_nextitem++;
2950 sc->an_sigitems = sc->an_nextitem;
2951 }
2952 /* no space found, so simply wrap anth wrap index
2953 * and "zap" the next entry
2954 */
2955 else {
2956 if (wrapindex == MAXANCACHE) {
2957 wrapindex = 0;
2958 }
2959 cache_slot = wrapindex++;
2960 }
2961 }
2962
2963 /* invariant: cache_slot now points at some slot
2964 * in cache.
2965 */
2966 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2967 log(LOG_ERR, "an_cache_store, bad index: %d of "
2968 "[0..%d], gross cache error\n",
2969 cache_slot, MAXANCACHE);
2970 return;
2971 }
2972
2973 /* store items in cache
2974 * .ip source address
2975 * .mac src
2976 * .signal, etc.
2977 */
3013ac0e 2978 if (ip != NULL) {
984263bc
MD
2979 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2980 }
2981 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2982
2983
2984 switch (an_cache_mode) {
2985 case DBM:
2986 if (sc->an_have_rssimap) {
2987 sc->an_sigcache[cache_slot].signal =
2988 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2989 sc->an_sigcache[cache_slot].quality =
2990 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2991 } else {
2992 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2993 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2994 }
2995 break;
2996 case PERCENT:
2997 if (sc->an_have_rssimap) {
2998 sc->an_sigcache[cache_slot].signal =
2999 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
3000 sc->an_sigcache[cache_slot].quality =
3001 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
3002 } else {
3003 if (rx_rssi > 100)
3004 rx_rssi = 100;
3005 if (rx_quality > 100)
3006 rx_quality = 100;
3007 sc->an_sigcache[cache_slot].signal = rx_rssi;
3008 sc->an_sigcache[cache_slot].quality = rx_quality;
3009 }
3010 break;
3011 case RAW:
3012 sc->an_sigcache[cache_slot].signal = rx_rssi;
3013 sc->an_sigcache[cache_slot].quality = rx_quality;
3014 break;
3015 }
3016
3017 sc->an_sigcache[cache_slot].noise = 0;
3018
3019 return;
3020}
3021#endif
3022
3023static int
3024an_media_change(ifp)
3025 struct ifnet *ifp;
3026{
3027 struct an_softc *sc = ifp->if_softc;
3028 struct an_ltv_genconfig *cfg;
3029 int otype = sc->an_config.an_opmode;
3030 int orate = sc->an_tx_rate;
3031
3032 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3033 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
3034 else
3035 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
3036
3037 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3038 case IFM_IEEE80211_DS1:
3039 sc->an_tx_rate = AN_RATE_1MBPS;
3040 break;
3041 case IFM_IEEE80211_DS2:
3042 sc->an_tx_rate = AN_RATE_2MBPS;
3043 break;
3044 case IFM_IEEE80211_DS5:
3045 sc->an_tx_rate = AN_RATE_5_5MBPS;
3046 break;
3047 case IFM_IEEE80211_DS11:
3048 sc->an_tx_rate = AN_RATE_11MBPS;
3049 break;
3050 case IFM_AUTO:
3051 sc->an_tx_rate = 0;
3052 break;
3053 }
3054
3055 if (orate != sc->an_tx_rate) {
3056 /* Read the current configuration */
3057 sc->an_config.an_type = AN_RID_GENCONFIG;
3058 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3059 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3060 cfg = &sc->an_config;
3061
3062 /* clear other rates and set the only one we want */
3063 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3064 cfg->an_rates[0] = sc->an_tx_rate;
3065
3066 /* Save the new rate */
3067 sc->an_config.an_type = AN_RID_GENCONFIG;
3068 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3069 }
3070
3071 if (otype != sc->an_config.an_opmode ||
3072 orate != sc->an_tx_rate)
3073 an_init(sc);
3074
3075 return(0);
3076}
3077
3078static void
3079an_media_status(ifp, imr)
3080 struct ifnet *ifp;
3081 struct ifmediareq *imr;
3082{
3083 struct an_ltv_status status;
3084 struct an_softc *sc = ifp->if_softc;
3085
3086 status.an_len = sizeof(status);
3087 status.an_type = AN_RID_STATUS;
3088 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3089 /* If the status read fails, just lie. */
3090 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3091 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3092 }
3093
3094 if (sc->an_tx_rate == 0) {
3095 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3096 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3097 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3098 switch (status.an_current_tx_rate) {
3099 case AN_RATE_1MBPS:
3100 imr->ifm_active |= IFM_IEEE80211_DS1;
3101 break;
3102 case AN_RATE_2MBPS:
3103 imr->ifm_active |= IFM_IEEE80211_DS2;
3104 break;
3105 case AN_RATE_5_5MBPS:
3106 imr->ifm_active |= IFM_IEEE80211_DS5;
3107 break;
3108 case AN_RATE_11MBPS:
3109 imr->ifm_active |= IFM_IEEE80211_DS11;
3110 break;
3111 }
3112 } else {
3113 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3114 }
3115
3116 imr->ifm_status = IFM_AVALID;
3117 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3118 imr->ifm_status |= IFM_ACTIVE;
3119}
3120
3121/********************** Cisco utility support routines *************/
3122
3123/*
3124 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3125 * Linux driver
3126 */
3127
3128static int
3129readrids(ifp, l_ioctl)
3130 struct ifnet *ifp;
3131 struct aironet_ioctl *l_ioctl;
3132{
3133 unsigned short rid;
3134 struct an_softc *sc;
3135
3136 switch (l_ioctl->command) {
3137 case AIROGCAP:
3138 rid = AN_RID_CAPABILITIES;
3139 break;
3140 case AIROGCFG:
3141 rid = AN_RID_GENCONFIG;
3142 break;
3143 case AIROGSLIST:
3144 rid = AN_RID_SSIDLIST;
3145 break;
3146 case AIROGVLIST:
3147 rid = AN_RID_APLIST;
3148 break;
3149 case AIROGDRVNAM:
3150 rid = AN_RID_DRVNAME;
3151 break;
3152 case AIROGEHTENC:
3153 rid = AN_RID_ENCAPPROTO;
3154 break;
3155 case AIROGWEPKTMP:
3156 rid = AN_RID_WEP_TEMP;
3157 break;
3158 case AIROGWEPKNV:
3159 rid = AN_RID_WEP_PERM;
3160 break;
3161 case AIROGSTAT:
3162 rid = AN_RID_STATUS;
3163 break;
3164 case AIROGSTATSD32:
3165 rid = AN_RID_32BITS_DELTA;
3166 break;
3167 case AIROGSTATSC32:
3168 rid = AN_RID_32BITS_CUM;
3169 break;
3170 default:
3171 rid = 999;
3172 break;
3173 }
3174
3175 if (rid == 999) /* Is bad command */
3176 return -EINVAL;
3177
3178 sc = ifp->if_softc;
3179 sc->areq.an_len = AN_MAX_DATALEN;
3180 sc->areq.an_type = rid;
3181
3182 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3183
3184 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3185
3186 /* the data contains the length at first */
3187 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3188 sizeof(sc->areq.an_len))) {
3189 return -EFAULT;
3190 }
3191 /* Just copy the data back */
3192 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3193 l_ioctl->len)) {
3194 return -EFAULT;
3195 }
3196 return 0;
3197}
3198
3199static int
3200writerids(ifp, l_ioctl)
3201 struct ifnet *ifp;
3202 struct aironet_ioctl *l_ioctl;
3203{
3204 struct an_softc *sc;
3205 int rid, command;
3206
3207 sc = ifp->if_softc;
3208 rid = 0;
3209 command = l_ioctl->command;
3210
3211 switch (command) {
3212 case AIROPSIDS:
3213 rid = AN_RID_SSIDLIST;
3214 break;
3215 case AIROPCAP:
3216 rid = AN_RID_CAPABILITIES;
3217 break;
3218 case AIROPAPLIST:
3219 rid = AN_RID_APLIST;
3220 break;
3221 case AIROPCFG:
3222 rid = AN_RID_GENCONFIG;
3223 break;
3224 case AIROPMACON:
3225 an_cmd(sc, AN_CMD_ENABLE, 0);
3226 return 0;
3227 break;
3228 case AIROPMACOFF:
3229 an_cmd(sc, AN_CMD_DISABLE, 0);
3230 return 0;
3231 break;
3232 case AIROPSTCLR:
3233 /*
3234 * This command merely clears the counts does not actually
3235 * store any data only reads rid. But as it changes the cards
3236 * state, I put it in the writerid routines.
3237 */
3238
3239 rid = AN_RID_32BITS_DELTACLR;
3240 sc = ifp->if_softc;
3241 sc->areq.an_len = AN_MAX_DATALEN;
3242 sc->areq.an_type = rid;
3243
3244 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3245 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3246
3247 /* the data contains the length at first */
3248 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3249 sizeof(sc->areq.an_len))) {
3250 return -EFAULT;
3251 }
3252 /* Just copy the data */
3253 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3254 l_ioctl->len)) {
3255 return -EFAULT;
3256 }
3257 return 0;
3258 break;
3259 case AIROPWEPKEY:
3260 rid = AN_RID_WEP_TEMP;
3261 break;
3262 case AIROPWEPKEYNV:
3263 rid = AN_RID_WEP_PERM;
3264 break;
3265 case AIROPLEAPUSR:
3266 rid = AN_RID_LEAPUSERNAME;
3267 break;
3268 case AIROPLEAPPWD:
3269 rid = AN_RID_LEAPPASSWORD;
3270 break;
3271 default:
3272 return -EOPNOTSUPP;
3273 }
3274
3275 if (rid) {
3276 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3277 return -EINVAL;
3278 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3279 sc->areq.an_type = rid;
3280
3281 /* Just copy the data back */
3282 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3283 l_ioctl->len);
3284
3285 an_cmd(sc, AN_CMD_DISABLE, 0);
3286 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3287 an_cmd(sc, AN_CMD_ENABLE, 0);
3288 return 0;
3289 }
3290 return -EOPNOTSUPP;
3291}
3292
3293/*
3294 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3295 * Linux driver
3296 */
3297
377d4740 3298#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3299#define FLASH_COMMAND 0x7e7e
3300#define FLASH_SIZE 32 * 1024
3301
3302static int
3303unstickbusy(ifp)
3304 struct ifnet *ifp;
3305{
3306 struct an_softc *sc = ifp->if_softc;
3307
3308 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3309 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3310 AN_EV_CLR_STUCK_BUSY);
3311 return 1;
3312 }
3313 return 0;
3314}
3315
3316/*
3317 * Wait for busy completion from card wait for delay uSec's Return true for
3318 * success meaning command reg is clear
3319 */
3320
3321static int
3322WaitBusy(ifp, uSec)
3323 struct ifnet *ifp;
3324 int uSec;
3325{
3326 int statword = 0xffff;
3327 int delay = 0;
3328 struct an_softc *sc = ifp->if_softc;
3329
3330 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3331 FLASH_DELAY(10);
3332 delay += 10;
3333 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3334
3335 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3336 unstickbusy(ifp);
3337 }
3338 }
3339
3340 return 0 == (AN_CMD_BUSY & statword);
3341}
3342
3343/*
3344 * STEP 1) Disable MAC and do soft reset on card.
3345 */
3346
3347static int
3348cmdreset(ifp)
3349 struct ifnet *ifp;
3350{
3351 int status;
3352 struct an_softc *sc = ifp->if_softc;
3353
3354 an_stop(sc);
3355
3356 an_cmd(sc, AN_CMD_DISABLE, 0);
3357
3358 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3359 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3360 return -EBUSY;
3361 }
3362 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3363
3364 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3365
3366
3367 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3368 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3369 return -EBUSY;
3370 }
3371 return 0;
3372}
3373
3374/*
3375 * STEP 2) Put the card in legendary flash mode
3376 */
3377
3378static int
3379setflashmode(ifp)
3380 struct ifnet *ifp;
3381{
3382 int status;
3383 struct an_softc *sc = ifp->if_softc;
3384
3385 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3386 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3387 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3388 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3389
3390 /*
3391 * mdelay(500); // 500ms delay
3392 */
3393
3394 FLASH_DELAY(500);
3395
3396 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3397 printf("Waitbusy hang after setflash mode\n");
3398 return -EIO;
3399 }
3400 return 0;
3401}
3402
3403/*
3404 * Get a character from the card matching matchbyte Step 3)
3405 */
3406
3407static int
3408flashgchar(ifp, matchbyte, dwelltime)
3409 struct ifnet *ifp;
3410 int matchbyte;
3411 int dwelltime;
3412{
3413 int rchar;
3414 unsigned char rbyte = 0;
3415 int success = -1;
3416 struct an_softc *sc = ifp->if_softc;
3417
3418
3419 do {
3420 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3421
3422 if (dwelltime && !(0x8000 & rchar)) {
3423 dwelltime -= 10;
3424 FLASH_DELAY(10);
3425 continue;
3426 }
3427 rbyte = 0xff & rchar;
3428
3429 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3430 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3431 success = 1;
3432 break;
3433 }
3434 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3435 break;
3436 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3437
3438 } while (dwelltime > 0);
3439 return success;
3440}
3441
3442/*
3443 * Put character to SWS0 wait for dwelltime x 50us for echo .
3444 */
3445
3446static int
3447flashpchar(ifp, byte, dwelltime)
3448 struct ifnet *ifp;
3449 int byte;
3450 int dwelltime;
3451{
3452 int echo;
3453 int pollbusy, waittime;
3454 struct an_softc *sc = ifp->if_softc;
3455
3456 byte |= 0x8000;
3457
3458 if (dwelltime == 0)
3459 dwelltime = 200;
3460
3461 waittime = dwelltime;
3462
3463 /*
3464 * Wait for busy bit d15 to go false indicating buffer empty
3465 */
3466 do {
3467 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3468
3469 if (pollbusy & 0x8000) {
3470 FLASH_DELAY(50);
3471 waittime -= 50;
3472 continue;
3473 } else
3474 break;
3475 }
3476 while (waittime >= 0);
3477
3478 /* timeout for busy clear wait */
3479
3480 if (waittime <= 0) {
1c70eebf 3481 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3482 return -1;
3483 }
3484 /*
3485 * Port is clear now write byte and wait for it to echo back
3486 */
3487 do {
3488 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3489 FLASH_DELAY(50);
3490 dwelltime -= 50;
3491 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3492 } while (dwelltime >= 0 && echo != byte);
3493
3494
3495 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3496
3497 return echo == byte;
3498}
3499
3500/*
3501 * Transfer 32k of firmware data from user buffer to our buffer and send to
3502 * the card
3503 */
3504
3505static int
3506flashputbuf(ifp)
3507 struct ifnet *ifp;
3508{
3509 unsigned short *bufp;
3510 int nwords;
3511 struct an_softc *sc = ifp->if_softc;
3512
3513 /* Write stuff */
3514
3515 bufp = sc->an_flash_buffer;
3516
3517 if (!sc->mpi350) {
3518 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3519 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3520
3521 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3522 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3523 }
3524 } else {
3525 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3526 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3527 ((u_int32_t *)bufp)[nwords] & 0xffff);
3528 }
3529 }
3530
3531 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3532
3533 return 0;
3534}
3535
3536/*
3537 * After flashing restart the card.
3538 */
3539
3540static int
3541flashrestart(ifp)
3542 struct ifnet *ifp;
3543{
3544 int status = 0;
3545 struct an_softc *sc = ifp->if_softc;
3546
3547 FLASH_DELAY(1024); /* Added 12/7/00 */
3548
3549 an_init(sc);
3550
3551 FLASH_DELAY(1024); /* Added 12/7/00 */
3552 return status;
3553}
3554
3555/*
3556 * Entry point for flash ioclt.
3557 */
3558
3559static int
3560flashcard(ifp, l_ioctl)
3561 struct ifnet *ifp;
3562 struct aironet_ioctl *l_ioctl;
3563{
3564 int z = 0, status;
3565 struct an_softc *sc;
3566
3567 sc = ifp->if_softc;
3568 if (sc->mpi350) {
1c70eebf 3569 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3570 return(-1);
3571 }
3572 status = l_ioctl->command;
3573
3574 switch (l_ioctl->command) {
3575 case AIROFLSHRST:
3576 return cmdreset(ifp);
3577 break;
3578 case AIROFLSHSTFL:
3579 if (sc->an_flash_buffer) {
3580 free(sc->an_flash_buffer, M_DEVBUF);
3581 sc->an_flash_buffer = NULL;
3582 }
3583 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3584 if (sc->an_flash_buffer)
3585 return setflashmode(ifp);
3586 else
3587 return ENOBUFS;
3588 break;
3589 case AIROFLSHGCHR: /* Get char from aux */
3590 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3591 z = *(int *)&sc->areq;
3592 if ((status = flashgchar(ifp, z, 8000)) == 1)
3593 return 0;
3594 else
3595 return -1;
3596 break;
3597 case AIROFLSHPCHR: /* Send char to card. */
3598 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3599 z = *(int *)&sc->areq;
3600 if ((status = flashpchar(ifp, z, 8000)) == -1)
3601 return -EIO;
3602 else
3603 return 0;
3604 break;
3605 case AIROFLPUTBUF: /* Send 32k to card */
3606 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3607 if_printf(ifp, "Buffer to big, %x %x\n",
3608 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3609 return -EINVAL;
3610 }
3611 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3612
3613 if ((status = flashputbuf(ifp)) != 0)
3614 return -EIO;
3615 else
3616 return 0;
3617 break;
3618 case AIRORESTART:
3619 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3620 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3621 return -EIO;
3622 } else
3623 return 0;
3624
3625 break;
3626 default:
3627 return -EINVAL;
3628 }
3629
3630 return -EINVAL;
3631}