proc->thread stage 6: kernel threads now create processless LWKT threads.
[dragonfly.git] / sys / i386 / i386 / swtch.s
CommitLineData
984263bc
MD
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
f1d1c3fa 4 * LWKT threads Copyright (c) 2003 Matthew Dillon
984263bc
MD
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
0cfcada1 38 * $DragonFly: src/sys/i386/i386/Attic/swtch.s,v 1.13 2003/06/27 01:53:24 dillon Exp $
984263bc
MD
39 */
40
41#include "npx.h"
42#include "opt_user_ldt.h"
43
44#include <sys/rtprio.h>
45
46#include <machine/asmacros.h>
47#include <machine/ipl.h>
48
49#ifdef SMP
50#include <machine/pmap.h>
51#include <machine/smptests.h> /** GRAB_LOPRIO */
52#include <machine/apic.h>
53#include <machine/lock.h>
54#endif /* SMP */
55
56#include "assym.s"
57
984263bc
MD
58 .data
59
984263bc
MD
60 .globl _panic
61
62#if defined(SWTCH_OPTIM_STATS)
63 .globl _swtch_optim_stats, _tlb_flush_count
64_swtch_optim_stats: .long 0 /* number of _swtch_optims */
65_tlb_flush_count: .long 0
66#endif
67
68 .text
69
984263bc
MD
70
71/*
8ad65e08
MD
72 * cpu_heavy_switch(next_thread)
73 *
74 * Switch from the current thread to a new thread. This entry
75 * is normally called via the thread->td_switch function, and will
76 * only be called when the current thread is a heavy weight process.
77 *
78 * YYY disable interrupts once giant is removed.
984263bc 79 */
8ad65e08 80ENTRY(cpu_heavy_switch)
84b592ba
MD
81 movl _curthread,%ecx
82 movl TD_PROC(%ecx),%ecx
984263bc 83
8ad65e08 84 cli
984263bc
MD
85#ifdef SMP
86 movb P_ONCPU(%ecx), %al /* save "last" cpu */
87 movb %al, P_LASTCPU(%ecx)
88 movb $0xff, P_ONCPU(%ecx) /* "leave" the cpu */
89#endif /* SMP */
90 movl P_VMSPACE(%ecx), %edx
91#ifdef SMP
92 movl _cpuid, %eax
93#else
94 xorl %eax, %eax
95#endif /* SMP */
96 btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
97
8ad65e08
MD
98 /*
99 * Save general regs
100 */
101 movl P_THREAD(%ecx),%edx
b7c628e4 102 movl TD_PCB(%edx),%edx
984263bc
MD
103 movl (%esp),%eax /* Hardware registers */
104 movl %eax,PCB_EIP(%edx)
105 movl %ebx,PCB_EBX(%edx)
106 movl %esp,PCB_ESP(%edx)
107 movl %ebp,PCB_EBP(%edx)
108 movl %esi,PCB_ESI(%edx)
109 movl %edi,PCB_EDI(%edx)
110 movl %gs,PCB_GS(%edx)
111
8ad65e08
MD
112 /*
113 * Push the LWKT switch restore function, which resumes a heavy
114 * weight process. Note that the LWKT switcher is based on
115 * TD_SP, while the heavy weight process switcher is based on
116 * PCB_ESP. TD_SP is usually one pointer pushed relative to
117 * PCB_ESP.
118 */
119 movl P_THREAD(%ecx),%eax
120 pushl $cpu_heavy_restore
121 movl %esp,TD_SP(%eax)
122
123 /*
124 * Save debug regs if necessary
125 */
984263bc
MD
126 movb PCB_FLAGS(%edx),%al
127 andb $PCB_DBREGS,%al
128 jz 1f /* no, skip over */
129 movl %dr7,%eax /* yes, do the save */
130 movl %eax,PCB_DR7(%edx)
131 andl $0x0000fc00, %eax /* disable all watchpoints */
132 movl %eax,%dr7
133 movl %dr6,%eax
134 movl %eax,PCB_DR6(%edx)
135 movl %dr3,%eax
136 movl %eax,PCB_DR3(%edx)
137 movl %dr2,%eax
138 movl %eax,PCB_DR2(%edx)
139 movl %dr1,%eax
140 movl %eax,PCB_DR1(%edx)
141 movl %dr0,%eax
142 movl %eax,PCB_DR0(%edx)
1431:
144
8ad65e08
MD
145 /*
146 * Save BGL nesting count. Note that we hold the BGL with a
147 * count of at least 1 on entry to cpu_heavy_switch().
148 */
984263bc
MD
149#ifdef SMP
150 movl _mp_lock, %eax
151 /* XXX FIXME: we should be saving the local APIC TPR */
152#ifdef DIAGNOSTIC
153 cmpl $FREE_LOCK, %eax /* is it free? */
154 je badsw4 /* yes, bad medicine! */
155#endif /* DIAGNOSTIC */
156 andl $COUNT_FIELD, %eax /* clear CPU portion */
157 movl %eax, PCB_MPNEST(%edx) /* store it */
158#endif /* SMP */
159
8ad65e08
MD
160 /*
161 * Save the FP state if we have used the FP.
162 */
984263bc 163#if NNPX > 0
263e4574 164 movl P_THREAD(%ecx),%ecx
af0bff84 165 cmpl %ecx,_npxthread
984263bc
MD
166 jne 1f
167 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
168 pushl %edx
169 call _npxsave /* do it in a big C function */
170 popl %eax
1711:
af0bff84 172 /* %ecx,%edx trashed */
984263bc
MD
173#endif /* NNPX > 0 */
174
84b592ba 175 /*
8ad65e08
MD
176 * Switch to the next thread, which was passed as an argument
177 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
178 * the argument is at 8(%esp). Set the current thread, load the
179 * stack pointer, and 'ret' into the switch-restore function.
84b592ba 180 */
8ad65e08
MD
181 movl 8(%esp),%eax
182 movl %eax,_curthread
183 movl TD_SP(%eax),%esp
184 ret
984263bc 185
8ad65e08
MD
186/*
187 * cpu_exit_switch()
188 *
189 * The switch function is changed to this when a thread is going away
190 * for good. We have to ensure that the MMU state is not cached, and
191 * we don't bother saving the existing thread state before switching.
ae8050a4
MD
192 *
193 * At this point we are in a critical section and this cpu owns the
194 * thread's token, which serves as an interlock until the switchout is
195 * complete.
8ad65e08
MD
196 */
197ENTRY(cpu_exit_switch)
ae8050a4
MD
198 /*
199 * Get us out of the vmspace
200 */
8ad65e08
MD
201 movl _IdlePTD,%ecx
202 movl %cr3,%eax
203 cmpl %ecx,%eax
204 je 1f
205 movl %ecx,%cr3
ae8050a4 206 movl _curthread,%ecx
984263bc 2071:
ae8050a4
MD
208 /*
209 * Switch to the next thread.
210 */
8ad65e08
MD
211 cli
212 movl 4(%esp),%eax
213 movl %eax,_curthread
214 movl TD_SP(%eax),%esp
ae8050a4
MD
215
216 /*
217 * We are now effectively the next thread, transfer ownership to
218 * this thread and release the original thread's RW lock, which
219 * will allow it to be reaped. Messy but rock solid.
220 */
221 addl $TD_RWLOCK,%ecx
222 movl %eax,RW_OWNER(%ecx)
223 pushl %eax
224 pushl %ecx
225 call lwkt_exunlock
226 addl $4,%esp
227 popl %eax
228
229 /*
230 * Restore the next thread's state and resume it. Note: the
231 * restore function assumes that the next thread's address is
232 * in %eax.
233 */
8ad65e08 234 ret
984263bc 235
8ad65e08
MD
236/*
237 * cpu_heavy_restore() (current thread in %eax on entry)
238 *
239 * Restore the thread after an LWKT switch. This entry is normally
240 * called via the LWKT switch restore function, which was pulled
241 * off the thread stack and jumped to.
242 *
243 * This entry is only called if the thread was previously saved
244 * using cpu_heavy_switch() (the heavy weight process thread switcher).
245 *
246 * YYY theoretically we do not have to restore everything here, a lot
247 * of this junk can wait until we return to usermode. But for now
248 * we restore everything.
249 *
250 * YYY STI/CLI sequencing.
7d0bac62
MD
251 *
252 * YYY note: spl check is done in mi_switch when it splx()'s.
8ad65e08
MD
253 */
254ENTRY(cpu_heavy_restore)
255 /* interrupts are disabled */
8f41e33b 256 movl TD_PCB(%eax),%edx
8ad65e08 257 movl TD_PROC(%eax),%ecx
984263bc 258#ifdef DIAGNOSTIC
984263bc
MD
259 cmpb $SRUN,P_STAT(%ecx)
260 jne badsw2
261#endif
984263bc
MD
262
263#if defined(SWTCH_OPTIM_STATS)
264 incl _swtch_optim_stats
265#endif
8ad65e08
MD
266 /*
267 * Restore the MMU address space
268 */
984263bc
MD
269 movl %cr3,%ebx
270 cmpl PCB_CR3(%edx),%ebx
271 je 4f
272#if defined(SWTCH_OPTIM_STATS)
273 decl _swtch_optim_stats
274 incl _tlb_flush_count
275#endif
276 movl PCB_CR3(%edx),%ebx
277 movl %ebx,%cr3
2784:
279
8ad65e08
MD
280 /*
281 * Deal with the PCB extension, restore the private tss
282 */
984263bc
MD
283#ifdef SMP
284 movl _cpuid, %esi
285#else
286 xorl %esi, %esi
287#endif
288 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
289 je 1f
290 btsl %esi, _private_tss /* mark use of private tss */
291 movl PCB_EXT(%edx), %edi /* new tss descriptor */
292 jmp 2f
2931:
294
b7c628e4
MD
295 /*
296 * update common_tss.tss_esp0 pointer. This is the supervisor
297 * stack pointer on entry from user mode. Since the pcb is
298 * at the top of the supervisor stack esp0 starts just below it.
299 * We leave enough space for vm86 (16 bytes).
8ad65e08
MD
300 *
301 * common_tss.tss_esp0 is needed when user mode traps into the
302 * kernel.
b7c628e4
MD
303 */
304 leal -16(%edx),%ebx
984263bc
MD
305 movl %ebx, _common_tss + TSS_ESP0
306
307 btrl %esi, _private_tss
308 jae 3f
309#ifdef SMP
310 movl $gd_common_tssd, %edi
311 addl %fs:0, %edi
312#else
313 movl $_common_tssd, %edi
314#endif
8ad65e08
MD
315 /*
316 * Move the correct TSS descriptor into the GDT slot, then reload
317 * tr. YYY not sure what is going on here
318 */
984263bc 3192:
984263bc
MD
320 movl _tss_gdt, %ebx /* entry in GDT */
321 movl 0(%edi), %eax
322 movl %eax, 0(%ebx)
323 movl 4(%edi), %eax
324 movl %eax, 4(%ebx)
325 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
326 ltr %si
8ad65e08
MD
327
328 /*
329 * Tell the pmap that our cpu is using the VMSPACE now.
330 */
984263bc
MD
3313:
332 movl P_VMSPACE(%ecx), %ebx
333#ifdef SMP
334 movl _cpuid, %eax
335#else
336 xorl %eax, %eax
337#endif
338 btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
339
8ad65e08
MD
340 /*
341 * Restore general registers.
342 */
984263bc
MD
343 movl PCB_EBX(%edx),%ebx
344 movl PCB_ESP(%edx),%esp
345 movl PCB_EBP(%edx),%ebp
346 movl PCB_ESI(%edx),%esi
347 movl PCB_EDI(%edx),%edi
348 movl PCB_EIP(%edx),%eax
349 movl %eax,(%esp)
350
8ad65e08
MD
351 /*
352 * SMP ickyness to direct interrupts.
353 */
354
984263bc
MD
355#ifdef SMP
356#ifdef GRAB_LOPRIO /* hold LOPRIO for INTs */
357#ifdef CHEAP_TPR
358 movl $0, lapic_tpr
359#else
360 andl $~APIC_TPR_PRIO, lapic_tpr
361#endif /** CHEAP_TPR */
362#endif /** GRAB_LOPRIO */
363 movl _cpuid,%eax
364 movb %al, P_ONCPU(%ecx)
365#endif /* SMP */
984263bc 366
8ad65e08
MD
367 /*
368 * Restore the BGL nesting count. Note that the nesting count will
369 * be at least 1.
370 */
984263bc
MD
371#ifdef SMP
372 movl _cpu_lockid, %eax
373 orl PCB_MPNEST(%edx), %eax /* add next count from PROC */
374 movl %eax, _mp_lock /* load the mp_lock */
375 /* XXX FIXME: we should be restoring the local APIC TPR */
376#endif /* SMP */
377
8ad65e08
MD
378 /*
379 * Restore the user LDT if we have one
380 */
984263bc
MD
381#ifdef USER_LDT
382 cmpl $0, PCB_USERLDT(%edx)
383 jnz 1f
384 movl __default_ldt,%eax
385 cmpl _currentldt,%eax
386 je 2f
387 lldt __default_ldt
388 movl %eax,_currentldt
389 jmp 2f
3901: pushl %edx
391 call _set_user_ldt
392 popl %edx
3932:
394#endif
8ad65e08
MD
395 /*
396 * Restore the %gs segment register, which must be done after
397 * loading the user LDT. Since user processes can modify the
398 * register via procfs, this may result in a fault which is
399 * detected by checking the fault address against cpu_switch_load_gs
400 * in i386/i386/trap.c
401 */
984263bc
MD
402 .globl cpu_switch_load_gs
403cpu_switch_load_gs:
404 movl PCB_GS(%edx),%gs
405
8ad65e08
MD
406 /*
407 * Restore the DEBUG register state if necessary.
408 */
984263bc
MD
409 movb PCB_FLAGS(%edx),%al
410 andb $PCB_DBREGS,%al
411 jz 1f /* no, skip over */
412 movl PCB_DR6(%edx),%eax /* yes, do the restore */
413 movl %eax,%dr6
414 movl PCB_DR3(%edx),%eax
415 movl %eax,%dr3
416 movl PCB_DR2(%edx),%eax
417 movl %eax,%dr2
418 movl PCB_DR1(%edx),%eax
419 movl %eax,%dr1
420 movl PCB_DR0(%edx),%eax
421 movl %eax,%dr0
422 movl %dr7,%eax /* load dr7 so as not to disturb */
423 andl $0x0000fc00,%eax /* reserved bits */
424 pushl %ebx
425 movl PCB_DR7(%edx),%ebx
426 andl $~0x0000fc00,%ebx
427 orl %ebx,%eax
428 popl %ebx
429 movl %eax,%dr7
4301:
8ad65e08
MD
431#if 0
432 /*
433 * Remove the heavy weight process from the heavy weight queue.
434 * this will also have the side effect of removing the thread from
435 * the run queue. YYY temporary?
436 *
437 * LWKT threads stay on the run queue until explicitly removed.
438 */
439 pushl %ecx
440 call remrunqueue
441 addl $4,%esp
442#endif
984263bc 443
8ad65e08 444 sti /* XXX */
984263bc
MD
445 ret
446
447CROSSJUMPTARGET(sw1a)
448
449#ifdef DIAGNOSTIC
450badsw1:
451 pushl $sw0_1
452 call _panic
453
454sw0_1: .asciz "cpu_switch: has wchan"
455
456badsw2:
457 pushl $sw0_2
458 call _panic
459
460sw0_2: .asciz "cpu_switch: not SRUN"
461#endif
462
463#if defined(SMP) && defined(DIAGNOSTIC)
464badsw4:
465 pushl $sw0_4
466 call _panic
467
468sw0_4: .asciz "cpu_switch: do not have lock"
469#endif /* SMP && DIAGNOSTIC */
470
0cfcada1
MD
471string: .asciz "SWITCHING\n"
472
984263bc
MD
473/*
474 * savectx(pcb)
475 * Update pcb, saving current processor state.
476 */
477ENTRY(savectx)
478 /* fetch PCB */
479 movl 4(%esp),%ecx
480
481 /* caller's return address - child won't execute this routine */
482 movl (%esp),%eax
483 movl %eax,PCB_EIP(%ecx)
484
485 movl %cr3,%eax
486 movl %eax,PCB_CR3(%ecx)
487
488 movl %ebx,PCB_EBX(%ecx)
489 movl %esp,PCB_ESP(%ecx)
490 movl %ebp,PCB_EBP(%ecx)
491 movl %esi,PCB_ESI(%ecx)
492 movl %edi,PCB_EDI(%ecx)
493 movl %gs,PCB_GS(%ecx)
494
495#if NNPX > 0
496 /*
af0bff84 497 * If npxthread == NULL, then the npx h/w state is irrelevant and the
984263bc
MD
498 * state had better already be in the pcb. This is true for forks
499 * but not for dumps (the old book-keeping with FP flags in the pcb
500 * always lost for dumps because the dump pcb has 0 flags).
501 *
af0bff84
MD
502 * If npxthread != NULL, then we have to save the npx h/w state to
503 * npxthread's pcb and copy it to the requested pcb, or save to the
984263bc
MD
504 * requested pcb and reload. Copying is easier because we would
505 * have to handle h/w bugs for reloading. We used to lose the
506 * parent's npx state for forks by forgetting to reload.
507 */
af0bff84 508 movl _npxthread,%eax
984263bc
MD
509 testl %eax,%eax
510 je 1f
511
512 pushl %ecx
b7c628e4 513 movl TD_PCB(%eax),%eax
984263bc
MD
514 leal PCB_SAVEFPU(%eax),%eax
515 pushl %eax
516 pushl %eax
517 call _npxsave
518 addl $4,%esp
519 popl %eax
520 popl %ecx
521
522 pushl $PCB_SAVEFPU_SIZE
523 leal PCB_SAVEFPU(%ecx),%ecx
524 pushl %ecx
525 pushl %eax
526 call _bcopy
527 addl $12,%esp
528#endif /* NNPX > 0 */
529
5301:
531 ret
8ad65e08
MD
532
533/*
534 * cpu_idle_restore() (current thread in %eax on entry)
535 *
536 * Don't bother setting up any regs other then %ebp so backtraces
537 * don't die. This restore function is used to bootstrap into the
538 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
539 * switching.
540 */
541ENTRY(cpu_idle_restore)
542 movl $0,%ebp
543 pushl $0
544 jmp cpu_idle
545
0cfcada1
MD
546/*
547 * cpu_kthread_restore() (current thread is %eax on entry)
548 *
549 * Don't bother setting up any regs other then %ebp so backtraces
550 * don't die. This restore function is used to bootstrap into an
551 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
552 * after this.
553 */
554ENTRY(cpu_kthread_restore)
555 movl TD_PCB(%eax),%ebx
556 movl $0,%ebp
557 popl %edx /* kthread exit function */
558 pushl PCB_EBX(%ebx) /* argument to ESI function */
559 pushl %edx /* set exit func as return address */
560 movl PCB_ESI(%ebx),%eax
561 jmp *%eax
562
8ad65e08
MD
563/*
564 * cpu_lwkt_switch()
565 *
566 * Standard LWKT switching function. Only non-scratch registers are
567 * saved and we don't bother with the MMU state or anything else.
568 * YYY BGL, SPL
569 */
570ENTRY(cpu_lwkt_switch)
571 movl 4(%esp),%eax
572 pushl %ebp
573 pushl %ebx
574 pushl %esi
575 pushl %edi
576 pushfl
577 movl _curthread,%ecx
578 pushl $cpu_lwkt_restore
579 cli
580 movl %esp,TD_SP(%ecx)
581 movl %eax,_curthread
582 movl TD_SP(%eax),%esp
583 ret
584
585/*
586 * cpu_idle_restore() (current thread in %eax on entry)
587 *
8ad65e08
MD
588 */
589ENTRY(cpu_lwkt_restore)
590 popfl
591 popl %edi
592 popl %esi
593 popl %ebx
594 popl %ebp
09f0701d
MD
595 movl TD_MACH+MTD_CPL(%eax),%ecx /* unmasked cpl? YYY too complex */
596 notl %ecx
8f41e33b 597 andl _ipending,%ecx
7d0bac62 598 je 1f
09f0701d
MD
599 cmpl $0,_intr_nesting_level /* don't stack too deeply */
600 jne 1f
8f41e33b 601 call splz /* execute unmasked ints */
7d0bac62 6021:
8ad65e08
MD
603 ret
604