[dragonfly.git] / sys / bus / u4b / controller / ohci_pci.c

/*-
 * Copyright (c) 1998 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Lennart Augustsson (augustss@carlstedt.se) at
 * Carlstedt Research & Technology.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * USB Open Host Controller driver.
 *
 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
 */

/* The low level controller code for OHCI has been split into
 * PCI probes and OHCI specific code. This was done to facilitate the
 * sharing of code between *BSD's
 */

#include <sys/stdint.h>
#include <sys/param.h>
#include <sys/queue.h>
#include <sys/types.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
#include <sys/lock.h>
#include <sys/condvar.h>
#include <sys/sysctl.h>
#include <sys/unistd.h>
#include <sys/callout.h>
#include <sys/malloc.h>
#include <sys/priv.h>

#include <bus/u4b/usb.h>
#include <bus/u4b/usbdi.h>

#include <bus/u4b/usb_core.h>
#include <bus/u4b/usb_busdma.h>
#include <bus/u4b/usb_process.h>
#include <bus/u4b/usb_util.h>

#include <bus/u4b/usb_controller.h>
#include <bus/u4b/usb_bus.h>
#include <bus/u4b/usb_pci.h>
#include <bus/u4b/controller/ohci.h>
#include <bus/u4b/controller/ohcireg.h>
#include "usb_if.h"

#define	PCI_OHCI_VENDORID_ACERLABS	0x10b9
#define	PCI_OHCI_VENDORID_AMD		0x1022
#define	PCI_OHCI_VENDORID_APPLE		0x106b
#define	PCI_OHCI_VENDORID_ATI		0x1002
#define	PCI_OHCI_VENDORID_CMDTECH	0x1095
#define	PCI_OHCI_VENDORID_NEC		0x1033
#define	PCI_OHCI_VENDORID_NVIDIA	0x12D2
#define	PCI_OHCI_VENDORID_NVIDIA2	0x10DE
#define	PCI_OHCI_VENDORID_OPTI		0x1045
#define	PCI_OHCI_VENDORID_SIS		0x1039
#define	PCI_OHCI_VENDORID_SUN		0x108e

#define	PCI_OHCI_BASE_REG	0x10

static device_probe_t ohci_pci_probe;
static device_attach_t ohci_pci_attach;
static device_detach_t ohci_pci_detach;
static usb_take_controller_t ohci_pci_take_controller;

static int
ohci_pci_take_controller(device_t self)
{
	uint32_t reg;
	uint32_t int_line;

	if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
		device_printf(self, "chip is in D%d mode "
		    "-- setting to D0\n", pci_get_powerstate(self));
		reg = pci_read_config(self, PCI_CBMEM, 4);
		int_line = pci_read_config(self, PCIR_INTLINE, 4);
		pci_set_powerstate(self, PCI_POWERSTATE_D0);
		pci_write_config(self, PCI_CBMEM, reg, 4);
		pci_write_config(self, PCIR_INTLINE, int_line, 4);
	}
	return (0);
}

static const char *
ohci_pci_match(device_t self)
{
	uint32_t device_id = pci_get_devid(self);

	switch (device_id) {
	case 0x523710b9:
		return ("AcerLabs M5237 (Aladdin-V) USB controller");

	case 0x740c1022:
		return ("AMD-756 USB Controller");

	case 0x74141022:
		return ("AMD-766 USB Controller");

	case 0x43741002:
		return "ATI SB400 USB Controller";
	case 0x43751002:
		return "ATI SB400 USB Controller";

	case 0x06701095:
		return ("CMD Tech 670 (USB0670) USB controller");

	case 0x06731095:
		return ("CMD Tech 673 (USB0673) USB controller");

	case 0xc8611045:
		return ("OPTi 82C861 (FireLink) USB controller");

	case 0x00351033:
		return ("NEC uPD 9210 USB controller");

	case 0x00d710de:
		return ("nVidia nForce3 USB Controller");

	case 0x036c10de:
		return ("nVidia nForce MCP55 USB Controller");
	case 0x03f110de:
		return ("nVidia nForce MCP61 USB Controller");
	case 0x0aa510de:
		return ("nVidia nForce MCP79 USB Controller");
	case 0x0aa710de:
		return ("nVidia nForce MCP79 USB Controller");
	case 0x0aa810de:
		return ("nVidia nForce MCP79 USB Controller");

	case 0x70011039:
		return ("SiS 5571 USB controller");

	case 0x1103108e:
		return "Sun PCIO-2 USB controller";

	case 0x0019106b:
		return ("Apple KeyLargo USB controller");

	default:
		break;
	}
	if ((pci_get_class(self) == PCIC_SERIALBUS) &&
	    (pci_get_subclass(self) == PCIS_SERIALBUS_USB) &&
	    (pci_get_progif(self) == PCI_INTERFACE_OHCI)) {
		return ("OHCI (generic) USB controller");
	}
	return (NULL);
}

static int
ohci_pci_probe(device_t self)
{
	const char *desc = ohci_pci_match(self);

	if (desc) {
		device_set_desc(self, desc);
		return (0);
	} else {
		return (ENXIO);
	}
}

static int
ohci_pci_attach(device_t self)
{
	ohci_softc_t *sc = device_get_softc(self);
	int rid;
	int err;

	/* initialise some bus fields */
	sc->sc_bus.parent = self;
	sc->sc_bus.devices = sc->sc_devices;
	sc->sc_bus.devices_max = OHCI_MAX_DEVICES;

	/* get all DMA memory */
	if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
	    &ohci_iterate_hw_softc)) {
		return (ENOMEM);
	}
	sc->sc_dev = self;

	pci_enable_busmaster(self);

	/*
	 * Some Sun PCIO-2 USB controllers have their intpin register
	 * bogusly set to 0, although it should be 4.  Correct that.
	 */
	if (pci_get_devid(self) == 0x1103108e && pci_get_intpin(self) == 0)
		pci_set_intpin(self, 4);

	rid = PCI_CBMEM;
	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
	    RF_ACTIVE);
	if (!sc->sc_io_res) {
		device_printf(self, "Could not map memory\n");
		goto error;
	}
	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
	sc->sc_io_size = rman_get_size(sc->sc_io_res);

	rid = 0;
	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
	    RF_SHAREABLE | RF_ACTIVE);
	if (sc->sc_irq_res == NULL) {
		device_printf(self, "Could not allocate irq\n");
		goto error;
	}
	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
	if (!sc->sc_bus.bdev) {
		device_printf(self, "Could not add USB device\n");
		goto error;
	}
	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);

	/*
	 * ohci_pci_match will never return NULL if ohci_pci_probe
	 * succeeded
	 */
	device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
	switch (pci_get_vendor(self)) {
	case PCI_OHCI_VENDORID_ACERLABS:
		ksprintf(sc->sc_vendor, "AcerLabs");
		break;
	case PCI_OHCI_VENDORID_AMD:
		ksprintf(sc->sc_vendor, "AMD");
		break;
	case PCI_OHCI_VENDORID_APPLE:
		ksprintf(sc->sc_vendor, "Apple");
		break;
	case PCI_OHCI_VENDORID_ATI:
		ksprintf(sc->sc_vendor, "ATI");
		break;
	case PCI_OHCI_VENDORID_CMDTECH:
		ksprintf(sc->sc_vendor, "CMDTECH");
		break;
	case PCI_OHCI_VENDORID_NEC:
		ksprintf(sc->sc_vendor, "NEC");
		break;
	case PCI_OHCI_VENDORID_NVIDIA:
	case PCI_OHCI_VENDORID_NVIDIA2:
		ksprintf(sc->sc_vendor, "nVidia");
		break;
	case PCI_OHCI_VENDORID_OPTI:
		ksprintf(sc->sc_vendor, "OPTi");
		break;
	case PCI_OHCI_VENDORID_SIS:
		ksprintf(sc->sc_vendor, "SiS");
		break;
	case PCI_OHCI_VENDORID_SUN:
		ksprintf(sc->sc_vendor, "SUN");
		break;
	default:
		if (bootverbose) {
			device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
			    pci_get_devid(self));
		}
		ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
	}

	/* sc->sc_bus.usbrev; set by ohci_init() */

	err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE,
	    (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl, NULL);
	if (err) {
		device_printf(self, "Could not setup irq, %d\n", err);
		sc->sc_intr_hdl = NULL;
		goto error;
	}
	err = ohci_init(sc);
	if (!err) {
		err = device_probe_and_attach(sc->sc_bus.bdev);
	}
	if (err) {
		device_printf(self, "USB init failed\n");
		goto error;
	}
	return (0);

error:
	ohci_pci_detach(self);
	return (ENXIO);
}

static int
ohci_pci_detach(device_t self)
{
	ohci_softc_t *sc = device_get_softc(self);
	device_t bdev;

	if (sc->sc_bus.bdev) {
		bdev = sc->sc_bus.bdev;
		device_detach(bdev);
		device_delete_child(self, bdev);
	}
#if 0 /* XXX Implement this */
 	/* during module unload there are lots of children leftover */
	device_delete_children(self);
#endif

	pci_disable_busmaster(self);

	if (sc->sc_irq_res && sc->sc_intr_hdl) {
		/*
		 * only call ohci_detach() after ohci_init()
		 */
		ohci_detach(sc);

		int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);

		if (err) {
			/* XXX or should we panic? */
			device_printf(self, "Could not tear down irq, %d\n",
			    err);
		}
		sc->sc_intr_hdl = NULL;
	}
	if (sc->sc_irq_res) {
		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
		sc->sc_irq_res = NULL;
	}
	if (sc->sc_io_res) {
		bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
		    sc->sc_io_res);
		sc->sc_io_res = NULL;
	}
	usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc);

	return (0);
}

static device_method_t ohci_pci_methods[] = {
	/* Device interface */
	DEVMETHOD(device_probe, ohci_pci_probe),
	DEVMETHOD(device_attach, ohci_pci_attach),
	DEVMETHOD(device_detach, ohci_pci_detach),
	DEVMETHOD(device_suspend, bus_generic_suspend),
	DEVMETHOD(device_resume, bus_generic_resume),
	DEVMETHOD(device_shutdown, bus_generic_shutdown),
	DEVMETHOD(usb_take_controller, ohci_pci_take_controller),

	{ 0, 0 }
};

static driver_t ohci_driver = {
	.name = "ohci",
	.methods = ohci_pci_methods,
	.size = sizeof(struct ohci_softc),
};

static devclass_t ohci_devclass;

DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, NULL, NULL);
MODULE_DEPEND(ohci, usb, 1, 1, 1);
Commit	Line	Data
12bd3c8b SW	1	/*-
	2	* Copyright (c) 1998 The NetBSD Foundation, Inc.
	3	* All rights reserved.
	4	*
	5	* This code is derived from software contributed to The NetBSD Foundation
	6	* by Lennart Augustsson (augustss@carlstedt.se) at
	7	* Carlstedt Research & Technology.
	8	*
	9	* Redistribution and use in source and binary forms, with or without
	10	* modification, are permitted provided that the following conditions
	11	* are met:
	12	* 1. Redistributions of source code must retain the above copyright
	13	* notice, this list of conditions and the following disclaimer.
	14	* 2. Redistributions in binary form must reproduce the above copyright
	15	* notice, this list of conditions and the following disclaimer in the
	16	* documentation and/or other materials provided with the distribution.
	17	*
	18	* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
	19	* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
	20	* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
	21	* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
	22	* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	23	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	24	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
	25	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
	26	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	27	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	28	* POSSIBILITY OF SUCH DAMAGE.
	29	*/
	30
12bd3c8b SW	31	/*
	32	* USB Open Host Controller driver.
	33	*
	34	* OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
	35	*/
	36
	37	/* The low level controller code for OHCI has been split into
	38	* PCI probes and OHCI specific code. This was done to facilitate the
	39	* sharing of code between *BSD's
	40	*/
	41
	42	#include <sys/stdint.h>
12bd3c8b SW	43	#include <sys/param.h>
	44	#include <sys/queue.h>
	45	#include <sys/types.h>
	46	#include <sys/systm.h>
	47	#include <sys/kernel.h>
	48	#include <sys/bus.h>
	49	#include <sys/module.h>
	50	#include <sys/lock.h>
12bd3c8b SW	51	#include <sys/condvar.h>
12bd3c8b SW	52	#include <sys/sysctl.h>
12bd3c8b SW	53	#include <sys/unistd.h>
	54	#include <sys/callout.h>
	55	#include <sys/malloc.h>
	56	#include <sys/priv.h>
	57
722d05c3 SW	58	#include <bus/u4b/usb.h>
722d05c3 SW	59	#include <bus/u4b/usbdi.h>
12bd3c8b	60
722d05c3 SW	61	#include <bus/u4b/usb_core.h>
	62	#include <bus/u4b/usb_busdma.h>
	63	#include <bus/u4b/usb_process.h>
	64	#include <bus/u4b/usb_util.h>
12bd3c8b	65
722d05c3 SW	66	#include <bus/u4b/usb_controller.h>
	67	#include <bus/u4b/usb_bus.h>
	68	#include <bus/u4b/usb_pci.h>
	69	#include <bus/u4b/controller/ohci.h>
	70	#include <bus/u4b/controller/ohcireg.h>
12bd3c8b SW	71	#include "usb_if.h"
	72
	73	#define PCI_OHCI_VENDORID_ACERLABS 0x10b9
	74	#define PCI_OHCI_VENDORID_AMD 0x1022
	75	#define PCI_OHCI_VENDORID_APPLE 0x106b
	76	#define PCI_OHCI_VENDORID_ATI 0x1002
	77	#define PCI_OHCI_VENDORID_CMDTECH 0x1095
	78	#define PCI_OHCI_VENDORID_NEC 0x1033
	79	#define PCI_OHCI_VENDORID_NVIDIA 0x12D2
	80	#define PCI_OHCI_VENDORID_NVIDIA2 0x10DE
	81	#define PCI_OHCI_VENDORID_OPTI 0x1045
	82	#define PCI_OHCI_VENDORID_SIS 0x1039
	83	#define PCI_OHCI_VENDORID_SUN 0x108e
	84
	85	#define PCI_OHCI_BASE_REG 0x10
	86
	87	static device_probe_t ohci_pci_probe;
	88	static device_attach_t ohci_pci_attach;
	89	static device_detach_t ohci_pci_detach;
	90	static usb_take_controller_t ohci_pci_take_controller;
	91
	92	static int
	93	ohci_pci_take_controller(device_t self)
	94	{
	95	uint32_t reg;
	96	uint32_t int_line;
	97
	98	if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
	99	device_printf(self, "chip is in D%d mode "
	100	"-- setting to D0\n", pci_get_powerstate(self));
	101	reg = pci_read_config(self, PCI_CBMEM, 4);
	102	int_line = pci_read_config(self, PCIR_INTLINE, 4);
	103	pci_set_powerstate(self, PCI_POWERSTATE_D0);
	104	pci_write_config(self, PCI_CBMEM, reg, 4);
	105	pci_write_config(self, PCIR_INTLINE, int_line, 4);
	106	}
	107	return (0);
	108	}
	109
	110	static const char *
	111	ohci_pci_match(device_t self)
	112	{
	113	uint32_t device_id = pci_get_devid(self);
	114
	115	switch (device_id) {
	116	case 0x523710b9:
	117	return ("AcerLabs M5237 (Aladdin-V) USB controller");
	118
	119	case 0x740c1022:
	120	return ("AMD-756 USB Controller");
	121
	122	case 0x74141022:
	123	return ("AMD-766 USB Controller");
	124
	125	case 0x43741002:
	126	return "ATI SB400 USB Controller";
	127	case 0x43751002:
	128	return "ATI SB400 USB Controller";
	129
	130	case 0x06701095:
	131	return ("CMD Tech 670 (USB0670) USB controller");
	132
	133	case 0x06731095:
	134	return ("CMD Tech 673 (USB0673) USB controller");
135
136	case 0xc8611045:
137	return ("OPTi 82C861 (FireLink) USB controller");
138
139	case 0x00351033:
140	return ("NEC uPD 9210 USB controller");
141
142	case 0x00d710de:
143	return ("nVidia nForce3 USB Controller");
144
145	case 0x036c10de:
146	return ("nVidia nForce MCP55 USB Controller");
147	case 0x03f110de:
148	return ("nVidia nForce MCP61 USB Controller");
149	case 0x0aa510de:
150	return ("nVidia nForce MCP79 USB Controller");
151	case 0x0aa710de:
152	return ("nVidia nForce MCP79 USB Controller");
153	case 0x0aa810de:
154	return ("nVidia nForce MCP79 USB Controller");
155
156	case 0x70011039:
157	return ("SiS 5571 USB controller");
158
159	case 0x1103108e:
160	return "Sun PCIO-2 USB controller";
161
162	case 0x0019106b:
163	return ("Apple KeyLargo USB controller");
164
165	default:
166	break;
167	}
168	if ((pci_get_class(self) == PCIC_SERIALBUS) &&
169	(pci_get_subclass(self) == PCIS_SERIALBUS_USB) &&
170	(pci_get_progif(self) == PCI_INTERFACE_OHCI)) {
171	return ("OHCI (generic) USB controller");
172	}
173	return (NULL);
174	}
175
176	static int
177	ohci_pci_probe(device_t self)
178	{
179	const char *desc = ohci_pci_match(self);
180
181	if (desc) {
182	device_set_desc(self, desc);
183	return (0);
184	} else {
185	return (ENXIO);
186	}
187	}
188
189	static int
190	ohci_pci_attach(device_t self)
191	{
192	ohci_softc_t *sc = device_get_softc(self);
193	int rid;
194	int err;
195
196	/* initialise some bus fields */
197	sc->sc_bus.parent = self;
198	sc->sc_bus.devices = sc->sc_devices;
199	sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
200
201	/* get all DMA memory */
202	if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
203	&ohci_iterate_hw_softc)) {
204	return (ENOMEM);
205	}
206	sc->sc_dev = self;
207
208	pci_enable_busmaster(self);
209
210	/*
211	* Some Sun PCIO-2 USB controllers have their intpin register
212	* bogusly set to 0, although it should be 4. Correct that.
213	*/
214	if (pci_get_devid(self) == 0x1103108e && pci_get_intpin(self) == 0)
215	pci_set_intpin(self, 4);
216
217	rid = PCI_CBMEM;
218	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
219	RF_ACTIVE);
220	if (!sc->sc_io_res) {
221	device_printf(self, "Could not map memory\n");
222	goto error;
223	}
224	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
225	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
226	sc->sc_io_size = rman_get_size(sc->sc_io_res);
227
228	rid = 0;
229	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
230	RF_SHAREABLE \| RF_ACTIVE);
231	if (sc->sc_irq_res == NULL) {
232	device_printf(self, "Could not allocate irq\n");
233	goto error;
234	}
235	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
236	if (!sc->sc_bus.bdev) {
237	device_printf(self, "Could not add USB device\n");
238	goto error;
239	}
240	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
241
242	/*
243	* ohci_pci_match will never return NULL if ohci_pci_probe
244	* succeeded
245	*/
246	device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
247	switch (pci_get_vendor(self)) {
248	case PCI_OHCI_VENDORID_ACERLABS:
722d05c3	249	ksprintf(sc->sc_vendor, "AcerLabs");
12bd3c8b SW	250	break;
12bd3c8b SW	251	case PCI_OHCI_VENDORID_AMD:
722d05c3	252	ksprintf(sc->sc_vendor, "AMD");
12bd3c8b SW	253	break;
12bd3c8b SW	254	case PCI_OHCI_VENDORID_APPLE:
722d05c3	255	ksprintf(sc->sc_vendor, "Apple");
12bd3c8b SW	256	break;
12bd3c8b SW	257	case PCI_OHCI_VENDORID_ATI:
722d05c3	258	ksprintf(sc->sc_vendor, "ATI");
12bd3c8b SW	259	break;
12bd3c8b SW	260	case PCI_OHCI_VENDORID_CMDTECH:
722d05c3	261	ksprintf(sc->sc_vendor, "CMDTECH");
12bd3c8b SW	262	break;
12bd3c8b SW	263	case PCI_OHCI_VENDORID_NEC:
722d05c3	264	ksprintf(sc->sc_vendor, "NEC");
12bd3c8b SW	265	break;
	266	case PCI_OHCI_VENDORID_NVIDIA:
	267	case PCI_OHCI_VENDORID_NVIDIA2:
722d05c3	268	ksprintf(sc->sc_vendor, "nVidia");
12bd3c8b SW	269	break;
12bd3c8b SW	270	case PCI_OHCI_VENDORID_OPTI:
722d05c3	271	ksprintf(sc->sc_vendor, "OPTi");
12bd3c8b SW	272	break;
12bd3c8b SW	273	case PCI_OHCI_VENDORID_SIS:
722d05c3	274	ksprintf(sc->sc_vendor, "SiS");
12bd3c8b SW	275	break;
12bd3c8b SW	276	case PCI_OHCI_VENDORID_SUN:
722d05c3	277	ksprintf(sc->sc_vendor, "SUN");
12bd3c8b SW	278	break;
	279	default:
	280	if (bootverbose) {
	281	device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
	282	pci_get_devid(self));
	283	}
722d05c3	284	ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
12bd3c8b SW	285	}
	286
	287	/* sc->sc_bus.usbrev; set by ohci_init() */
	288
722d05c3 SW	289	err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE,
722d05c3 SW	290	(driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl, NULL);
12bd3c8b SW	291	if (err) {
	292	device_printf(self, "Could not setup irq, %d\n", err);
	293	sc->sc_intr_hdl = NULL;
	294	goto error;
	295	}
	296	err = ohci_init(sc);
	297	if (!err) {
	298	err = device_probe_and_attach(sc->sc_bus.bdev);
	299	}
	300	if (err) {
	301	device_printf(self, "USB init failed\n");
	302	goto error;
	303	}
	304	return (0);
	305
	306	error:
	307	ohci_pci_detach(self);
	308	return (ENXIO);
	309	}
	310
	311	static int
	312	ohci_pci_detach(device_t self)
	313	{
	314	ohci_softc_t *sc = device_get_softc(self);
	315	device_t bdev;
	316
	317	if (sc->sc_bus.bdev) {
	318	bdev = sc->sc_bus.bdev;
	319	device_detach(bdev);
	320	device_delete_child(self, bdev);
	321	}
63da4a34 SW	322	#if 0 /* XXX Implement this */
63da4a34 SW	323	/* during module unload there are lots of children leftover */
12bd3c8b	324	device_delete_children(self);
63da4a34	325	#endif
12bd3c8b SW	326
	327	pci_disable_busmaster(self);
	328
	329	if (sc->sc_irq_res && sc->sc_intr_hdl) {
	330	/*
	331	* only call ohci_detach() after ohci_init()
	332	*/
	333	ohci_detach(sc);
	334
	335	int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
	336
	337	if (err) {
	338	/* XXX or should we panic? */
	339	device_printf(self, "Could not tear down irq, %d\n",
	340	err);
	341	}
	342	sc->sc_intr_hdl = NULL;
	343	}
	344	if (sc->sc_irq_res) {
	345	bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
	346	sc->sc_irq_res = NULL;
	347	}
	348	if (sc->sc_io_res) {
	349	bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
	350	sc->sc_io_res);
	351	sc->sc_io_res = NULL;
	352	}
	353	usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc);
	354
	355	return (0);
	356	}
	357
	358	static device_method_t ohci_pci_methods[] = {
	359	/* Device interface */
	360	DEVMETHOD(device_probe, ohci_pci_probe),
	361	DEVMETHOD(device_attach, ohci_pci_attach),
	362	DEVMETHOD(device_detach, ohci_pci_detach),
	363	DEVMETHOD(device_suspend, bus_generic_suspend),
	364	DEVMETHOD(device_resume, bus_generic_resume),
	365	DEVMETHOD(device_shutdown, bus_generic_shutdown),
	366	DEVMETHOD(usb_take_controller, ohci_pci_take_controller),
	367
63da4a34	368	{ 0, 0 }
12bd3c8b SW	369	};
	370
	371	static driver_t ohci_driver = {
	372	.name = "ohci",
	373	.methods = ohci_pci_methods,
	374	.size = sizeof(struct ohci_softc),
	375	};
	376
	377	static devclass_t ohci_devclass;
	378
15f415f6	379	DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, NULL, NULL);
12bd3c8b	380	MODULE_DEPEND(ohci, usb, 1, 1, 1);