[dragonfly.git] / sys / bus / u4b / controller / uhci_pci.c

/*-
 * Copyright (c) 1998 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Lennart Augustsson (augustss@carlstedt.se) at
 * Carlstedt Research & Technology.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/* Universal Host Controller Interface
 *
 * UHCI spec: http://www.intel.com/
 */

/* The low level controller code for UHCI has been split into
 * PCI probes and UHCI specific code. This was done to facilitate the
 * sharing of code between *BSD's
 */

#include <sys/stdint.h>
#include <sys/param.h>
#include <sys/queue.h>
#include <sys/types.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
#include <sys/lock.h>
#include <sys/condvar.h>
#include <sys/sysctl.h>
#include <sys/unistd.h>
#include <sys/callout.h>
#include <sys/malloc.h>
#include <sys/priv.h>

#include <bus/u4b/usb.h>
#include <bus/u4b/usbdi.h>

#include <bus/u4b/usb_core.h>
#include <bus/u4b/usb_busdma.h>
#include <bus/u4b/usb_process.h>
#include <bus/u4b/usb_util.h>
#include <bus/u4b/usb_debug.h>

#include <bus/u4b/usb_controller.h>
#include <bus/u4b/usb_bus.h>
#include <bus/u4b/usb_pci.h>
#include <bus/u4b/controller/uhci.h>
#include <bus/u4b/controller/uhcireg.h>
#include "usb_if.h"

#define	PCI_UHCI_VENDORID_INTEL		0x8086
#define	PCI_UHCI_VENDORID_VIA		0x1106

/* PIIX4E has no separate stepping */

static device_probe_t uhci_pci_probe;
static device_attach_t uhci_pci_attach;
static device_detach_t uhci_pci_detach;
static usb_take_controller_t uhci_pci_take_controller;

static int
uhci_pci_take_controller(device_t self)
{
	pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);

	return (0);
}

static const char *
uhci_pci_match(device_t self)
{
	uint32_t device_id = pci_get_devid(self);

	switch (device_id) {
	case 0x26888086:
		return ("Intel 631XESB/632XESB/3100 USB controller USB-1");

	case 0x26898086:
		return ("Intel 631XESB/632XESB/3100 USB controller USB-2");

	case 0x268a8086:
		return ("Intel 631XESB/632XESB/3100 USB controller USB-3");

	case 0x268b8086:
		return ("Intel 631XESB/632XESB/3100 USB controller USB-4");

	case 0x70208086:
		return ("Intel 82371SB (PIIX3) USB controller");

	case 0x71128086:
		return ("Intel 82371AB/EB (PIIX4) USB controller");

	case 0x24128086:
		return ("Intel 82801AA (ICH) USB controller");

	case 0x24228086:
		return ("Intel 82801AB (ICH0) USB controller");

	case 0x24428086:
		return ("Intel 82801BA/BAM (ICH2) USB controller USB-A");

	case 0x24448086:
		return ("Intel 82801BA/BAM (ICH2) USB controller USB-B");

	case 0x24828086:
		return ("Intel 82801CA/CAM (ICH3) USB controller USB-A");

	case 0x24848086:
		return ("Intel 82801CA/CAM (ICH3) USB controller USB-B");

	case 0x24878086:
		return ("Intel 82801CA/CAM (ICH3) USB controller USB-C");

	case 0x24c28086:
		return ("Intel 82801DB (ICH4) USB controller USB-A");

	case 0x24c48086:
		return ("Intel 82801DB (ICH4) USB controller USB-B");

	case 0x24c78086:
		return ("Intel 82801DB (ICH4) USB controller USB-C");

	case 0x24d28086:
		return ("Intel 82801EB (ICH5) USB controller USB-A");

	case 0x24d48086:
		return ("Intel 82801EB (ICH5) USB controller USB-B");

	case 0x24d78086:
		return ("Intel 82801EB (ICH5) USB controller USB-C");

	case 0x24de8086:
		return ("Intel 82801EB (ICH5) USB controller USB-D");

	case 0x26588086:
		return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-A");

	case 0x26598086:
		return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-B");

	case 0x265a8086:
		return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-C");

	case 0x265b8086:
		return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-D");

	case 0x27c88086:
		return ("Intel 82801G (ICH7) USB controller USB-A");
	case 0x27c98086:
		return ("Intel 82801G (ICH7) USB controller USB-B");
	case 0x27ca8086:
		return ("Intel 82801G (ICH7) USB controller USB-C");
	case 0x27cb8086:
		return ("Intel 82801G (ICH7) USB controller USB-D");

	case 0x28308086:
		return ("Intel 82801H (ICH8) USB controller USB-A");
	case 0x28318086:
		return ("Intel 82801H (ICH8) USB controller USB-B");
	case 0x28328086:
		return ("Intel 82801H (ICH8) USB controller USB-C");
	case 0x28348086:
		return ("Intel 82801H (ICH8) USB controller USB-D");
	case 0x28358086:
		return ("Intel 82801H (ICH8) USB controller USB-E");
	case 0x29348086:
		return ("Intel 82801I (ICH9) USB controller");
	case 0x29358086:
		return ("Intel 82801I (ICH9) USB controller");
	case 0x29368086:
		return ("Intel 82801I (ICH9) USB controller");
	case 0x29378086:
		return ("Intel 82801I (ICH9) USB controller");
	case 0x29388086:
		return ("Intel 82801I (ICH9) USB controller");
	case 0x29398086:
		return ("Intel 82801I (ICH9) USB controller");
	case 0x3a348086:
		return ("Intel 82801JI (ICH10) USB controller USB-A");
	case 0x3a358086:
		return ("Intel 82801JI (ICH10) USB controller USB-B");
	case 0x3a368086:
		return ("Intel 82801JI (ICH10) USB controller USB-C");
	case 0x3a378086:
		return ("Intel 82801JI (ICH10) USB controller USB-D");
	case 0x3a388086:
		return ("Intel 82801JI (ICH10) USB controller USB-E");
	case 0x3a398086:
		return ("Intel 82801JI (ICH10) USB controller USB-F");

	case 0x719a8086:
		return ("Intel 82443MX USB controller");

	case 0x76028086:
		return ("Intel 82372FB/82468GX USB controller");

	case 0x30381106:
		return ("VIA 83C572 USB controller");

	default:
		break;
	}

	if ((pci_get_class(self) == PCIC_SERIALBUS) &&
	    (pci_get_subclass(self) == PCIS_SERIALBUS_USB) &&
	    (pci_get_progif(self) == PCI_INTERFACE_UHCI)) {
		return ("UHCI (generic) USB controller");
	}
	return (NULL);
}

static int
uhci_pci_probe(device_t self)
{
	const char *desc = uhci_pci_match(self);

	if (desc) {
		device_set_desc(self, desc);
		return (0);
	} else {
		return (ENXIO);
	}
}

static int
uhci_pci_attach(device_t self)
{
	uhci_softc_t *sc = device_get_softc(self);
	int rid;
	int err;

	/* initialise some bus fields */
	sc->sc_bus.parent = self;
	sc->sc_bus.devices = sc->sc_devices;
	sc->sc_bus.devices_max = UHCI_MAX_DEVICES;

	/* get all DMA memory */
	if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
	    &uhci_iterate_hw_softc)) {
		return ENOMEM;
	}
	sc->sc_dev = self;

	pci_enable_busmaster(self);

	rid = PCI_UHCI_BASE_REG;
	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_IOPORT, &rid,
	    RF_ACTIVE);
	if (!sc->sc_io_res) {
		device_printf(self, "Could not map ports\n");
		goto error;
	}
	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
	sc->sc_io_size = rman_get_size(sc->sc_io_res);

	/* disable interrupts */
	bus_space_write_2(sc->sc_io_tag, sc->sc_io_hdl, UHCI_INTR, 0);

	rid = 0;
	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
	    RF_SHAREABLE | RF_ACTIVE);
	if (sc->sc_irq_res == NULL) {
		device_printf(self, "Could not allocate irq\n");
		goto error;
	}
	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
	if (!sc->sc_bus.bdev) {
		device_printf(self, "Could not add USB device\n");
		goto error;
	}
	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);

	/*
	 * uhci_pci_match must never return NULL if uhci_pci_probe
	 * succeeded
	 */
	device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
	switch (pci_get_vendor(self)) {
	case PCI_UHCI_VENDORID_INTEL:
		ksprintf(sc->sc_vendor, "Intel");
		break;
	case PCI_UHCI_VENDORID_VIA:
		ksprintf(sc->sc_vendor, "VIA");
		break;
	default:
		if (bootverbose) {
			device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
			    pci_get_devid(self));
		}
		ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
	}

	switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) {
	case PCI_USB_REV_PRE_1_0:
		sc->sc_bus.usbrev = USB_REV_PRE_1_0;
		break;
	case PCI_USB_REV_1_0:
		sc->sc_bus.usbrev = USB_REV_1_0;
		break;
	default:
		/* Quirk for Parallels Desktop 4.0 */
		device_printf(self, "USB revision is unknown. Assuming v1.1.\n");
		sc->sc_bus.usbrev = USB_REV_1_1;
		break;
	}

	err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE,
	    (driver_intr_t *)uhci_interrupt, sc, &sc->sc_intr_hdl, NULL);

	if (err) {
		device_printf(self, "Could not setup irq, %d\n", err);
		sc->sc_intr_hdl = NULL;
		goto error;
	}
	/*
	 * Set the PIRQD enable bit and switch off all the others. We don't
	 * want legacy support to interfere with us XXX Does this also mean
	 * that the BIOS won't touch the keyboard anymore if it is connected
	 * to the ports of the root hub?
	 */
#ifdef USB_DEBUG
	if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN) {
		device_printf(self, "LegSup = 0x%04x\n",
		    pci_read_config(self, PCI_LEGSUP, 2));
	}
#endif
	pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);

	err = uhci_init(sc);
	if (!err) {
		err = device_probe_and_attach(sc->sc_bus.bdev);
	}
	if (err) {
		device_printf(self, "USB init failed\n");
		goto error;
	}
	return (0);

error:
	uhci_pci_detach(self);
	return (ENXIO);
}

int
uhci_pci_detach(device_t self)
{
	uhci_softc_t *sc = device_get_softc(self);
	device_t bdev;

	if (sc->sc_bus.bdev) {
		bdev = sc->sc_bus.bdev;
		device_detach(bdev);
		device_delete_child(self, bdev);
	}
#if 0 /* XXX */
	/* during module unload there are lots of children leftover */
	device_delete_children(self);
#endif

	/*
	 * disable interrupts that might have been switched on in
	 * uhci_init.
	 */
	if (sc->sc_io_res) {
		USB_BUS_LOCK(&sc->sc_bus);

		/* stop the controller */
		uhci_reset(sc);

		USB_BUS_UNLOCK(&sc->sc_bus);
	}
	pci_disable_busmaster(self);

	if (sc->sc_irq_res && sc->sc_intr_hdl) {
		int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);

		if (err) {
			/* XXX or should we panic? */
			device_printf(self, "Could not tear down irq, %d\n",
			    err);
		}
		sc->sc_intr_hdl = NULL;
	}
	if (sc->sc_irq_res) {
		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
		sc->sc_irq_res = NULL;
	}
	if (sc->sc_io_res) {
		bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG,
		    sc->sc_io_res);
		sc->sc_io_res = NULL;
	}
	usb_bus_mem_free_all(&sc->sc_bus, &uhci_iterate_hw_softc);

	return (0);
}

static device_method_t uhci_pci_methods[] = {
	/* Device interface */
	DEVMETHOD(device_probe, uhci_pci_probe),
	DEVMETHOD(device_attach, uhci_pci_attach),
	DEVMETHOD(device_detach, uhci_pci_detach),
	DEVMETHOD(device_suspend, bus_generic_suspend),
	DEVMETHOD(device_resume, bus_generic_resume),
	DEVMETHOD(device_shutdown, bus_generic_shutdown),
	DEVMETHOD(usb_take_controller, uhci_pci_take_controller),

	{ 0, 0 }
};

static driver_t uhci_driver = {
	.name = "uhci",
	.methods = uhci_pci_methods,
	.size = sizeof(struct uhci_softc),
};

static devclass_t uhci_devclass;

DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, NULL, NULL);
MODULE_DEPEND(uhci, usb, 1, 1, 1);
Commit	Line	Data
12bd3c8b SW	1	/*-
	2	* Copyright (c) 1998 The NetBSD Foundation, Inc.
	3	* All rights reserved.
	4	*
	5	* This code is derived from software contributed to The NetBSD Foundation
	6	* by Lennart Augustsson (augustss@carlstedt.se) at
	7	* Carlstedt Research & Technology.
	8	*
	9	* Redistribution and use in source and binary forms, with or without
	10	* modification, are permitted provided that the following conditions
	11	* are met:
	12	* 1. Redistributions of source code must retain the above copyright
	13	* notice, this list of conditions and the following disclaimer.
	14	* 2. Redistributions in binary form must reproduce the above copyright
	15	* notice, this list of conditions and the following disclaimer in the
	16	* documentation and/or other materials provided with the distribution.
	17	*
	18	* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
	19	* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
	20	* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
	21	* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
	22	* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	23	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	24	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
	25	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
	26	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	27	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	28	* POSSIBILITY OF SUCH DAMAGE.
	29	*/
	30
12bd3c8b SW	31	/* Universal Host Controller Interface
	32	*
	33	* UHCI spec: http://www.intel.com/
	34	*/
	35
	36	/* The low level controller code for UHCI has been split into
	37	* PCI probes and UHCI specific code. This was done to facilitate the
	38	* sharing of code between *BSD's
	39	*/
	40
	41	#include <sys/stdint.h>
12bd3c8b SW	42	#include <sys/param.h>
	43	#include <sys/queue.h>
	44	#include <sys/types.h>
	45	#include <sys/systm.h>
	46	#include <sys/kernel.h>
	47	#include <sys/bus.h>
	48	#include <sys/module.h>
	49	#include <sys/lock.h>
12bd3c8b SW	50	#include <sys/condvar.h>
12bd3c8b SW	51	#include <sys/sysctl.h>
12bd3c8b SW	52	#include <sys/unistd.h>
	53	#include <sys/callout.h>
	54	#include <sys/malloc.h>
	55	#include <sys/priv.h>
	56
722d05c3 SW	57	#include <bus/u4b/usb.h>
722d05c3 SW	58	#include <bus/u4b/usbdi.h>
12bd3c8b	59
722d05c3 SW	60	#include <bus/u4b/usb_core.h>
	61	#include <bus/u4b/usb_busdma.h>
	62	#include <bus/u4b/usb_process.h>
	63	#include <bus/u4b/usb_util.h>
	64	#include <bus/u4b/usb_debug.h>
12bd3c8b	65
722d05c3 SW	66	#include <bus/u4b/usb_controller.h>
	67	#include <bus/u4b/usb_bus.h>
	68	#include <bus/u4b/usb_pci.h>
	69	#include <bus/u4b/controller/uhci.h>
	70	#include <bus/u4b/controller/uhcireg.h>
12bd3c8b SW	71	#include "usb_if.h"
	72
	73	#define PCI_UHCI_VENDORID_INTEL 0x8086
	74	#define PCI_UHCI_VENDORID_VIA 0x1106
	75
	76	/* PIIX4E has no separate stepping */
	77
	78	static device_probe_t uhci_pci_probe;
	79	static device_attach_t uhci_pci_attach;
	80	static device_detach_t uhci_pci_detach;
	81	static usb_take_controller_t uhci_pci_take_controller;
	82
	83	static int
	84	uhci_pci_take_controller(device_t self)
	85	{
	86	pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
	87
	88	return (0);
	89	}
	90
	91	static const char *
	92	uhci_pci_match(device_t self)
	93	{
	94	uint32_t device_id = pci_get_devid(self);
	95
	96	switch (device_id) {
	97	case 0x26888086:
	98	return ("Intel 631XESB/632XESB/3100 USB controller USB-1");
	99
	100	case 0x26898086:
	101	return ("Intel 631XESB/632XESB/3100 USB controller USB-2");
	102
	103	case 0x268a8086:
	104	return ("Intel 631XESB/632XESB/3100 USB controller USB-3");
	105
	106	case 0x268b8086:
	107	return ("Intel 631XESB/632XESB/3100 USB controller USB-4");
	108
	109	case 0x70208086:
	110	return ("Intel 82371SB (PIIX3) USB controller");
	111
	112	case 0x71128086:
	113	return ("Intel 82371AB/EB (PIIX4) USB controller");
	114
	115	case 0x24128086:
	116	return ("Intel 82801AA (ICH) USB controller");
	117
	118	case 0x24228086:
	119	return ("Intel 82801AB (ICH0) USB controller");
	120
	121	case 0x24428086:
	122	return ("Intel 82801BA/BAM (ICH2) USB controller USB-A");
	123
	124	case 0x24448086:
	125	return ("Intel 82801BA/BAM (ICH2) USB controller USB-B");
	126
	127	case 0x24828086:
	128	return ("Intel 82801CA/CAM (ICH3) USB controller USB-A");
	129
	130	case 0x24848086:
	131	return ("Intel 82801CA/CAM (ICH3) USB controller USB-B");
	132
	133	case 0x24878086:
	134	return ("Intel 82801CA/CAM (ICH3) USB controller USB-C");
135
136	case 0x24c28086:
137	return ("Intel 82801DB (ICH4) USB controller USB-A");
138
139	case 0x24c48086:
140	return ("Intel 82801DB (ICH4) USB controller USB-B");
141
142	case 0x24c78086:
143	return ("Intel 82801DB (ICH4) USB controller USB-C");
144
145	case 0x24d28086:
146	return ("Intel 82801EB (ICH5) USB controller USB-A");
147
148	case 0x24d48086:
149	return ("Intel 82801EB (ICH5) USB controller USB-B");
150
151	case 0x24d78086:
152	return ("Intel 82801EB (ICH5) USB controller USB-C");
153
154	case 0x24de8086:
155	return ("Intel 82801EB (ICH5) USB controller USB-D");
156
157	case 0x26588086:
158	return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-A");
159
160	case 0x26598086:
161	return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-B");
162
163	case 0x265a8086:
164	return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-C");
165
166	case 0x265b8086:
167	return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-D");
168
169	case 0x27c88086:
170	return ("Intel 82801G (ICH7) USB controller USB-A");
171	case 0x27c98086:
172	return ("Intel 82801G (ICH7) USB controller USB-B");
173	case 0x27ca8086:
174	return ("Intel 82801G (ICH7) USB controller USB-C");
175	case 0x27cb8086:
176	return ("Intel 82801G (ICH7) USB controller USB-D");
177
178	case 0x28308086:
179	return ("Intel 82801H (ICH8) USB controller USB-A");
180	case 0x28318086:
181	return ("Intel 82801H (ICH8) USB controller USB-B");
182	case 0x28328086:
183	return ("Intel 82801H (ICH8) USB controller USB-C");
184	case 0x28348086:
185	return ("Intel 82801H (ICH8) USB controller USB-D");
186	case 0x28358086:
187	return ("Intel 82801H (ICH8) USB controller USB-E");
188	case 0x29348086:
189	return ("Intel 82801I (ICH9) USB controller");
190	case 0x29358086:
191	return ("Intel 82801I (ICH9) USB controller");
192	case 0x29368086:
193	return ("Intel 82801I (ICH9) USB controller");
194	case 0x29378086:
195	return ("Intel 82801I (ICH9) USB controller");
196	case 0x29388086:
197	return ("Intel 82801I (ICH9) USB controller");
198	case 0x29398086:
199	return ("Intel 82801I (ICH9) USB controller");
200	case 0x3a348086:
201	return ("Intel 82801JI (ICH10) USB controller USB-A");
202	case 0x3a358086:
203	return ("Intel 82801JI (ICH10) USB controller USB-B");
204	case 0x3a368086:
205	return ("Intel 82801JI (ICH10) USB controller USB-C");
206	case 0x3a378086:
207	return ("Intel 82801JI (ICH10) USB controller USB-D");
208	case 0x3a388086:
209	return ("Intel 82801JI (ICH10) USB controller USB-E");
210	case 0x3a398086:
211	return ("Intel 82801JI (ICH10) USB controller USB-F");
212
213	case 0x719a8086:
214	return ("Intel 82443MX USB controller");
215
216	case 0x76028086:
217	return ("Intel 82372FB/82468GX USB controller");
218
219	case 0x30381106:
220	return ("VIA 83C572 USB controller");
221
222	default:
223	break;
224	}
225
226	if ((pci_get_class(self) == PCIC_SERIALBUS) &&
227	(pci_get_subclass(self) == PCIS_SERIALBUS_USB) &&
228	(pci_get_progif(self) == PCI_INTERFACE_UHCI)) {
229	return ("UHCI (generic) USB controller");
230	}
231	return (NULL);
232	}
233
234	static int
235	uhci_pci_probe(device_t self)
236	{
237	const char *desc = uhci_pci_match(self);
238
239	if (desc) {
240	device_set_desc(self, desc);
241	return (0);
242	} else {
243	return (ENXIO);
244	}
245	}
246
247	static int
248	uhci_pci_attach(device_t self)
249	{
250	uhci_softc_t *sc = device_get_softc(self);
251	int rid;
252	int err;
253
254	/* initialise some bus fields */
255	sc->sc_bus.parent = self;
256	sc->sc_bus.devices = sc->sc_devices;
257	sc->sc_bus.devices_max = UHCI_MAX_DEVICES;
258
259	/* get all DMA memory */
260	if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
261	&uhci_iterate_hw_softc)) {
262	return ENOMEM;
263	}
264	sc->sc_dev = self;
265
266	pci_enable_busmaster(self);
267
268	rid = PCI_UHCI_BASE_REG;
269	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_IOPORT, &rid,
270	RF_ACTIVE);
271	if (!sc->sc_io_res) {
272	device_printf(self, "Could not map ports\n");
273	goto error;
274	}
275	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
276	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
277	sc->sc_io_size = rman_get_size(sc->sc_io_res);
278
279	/* disable interrupts */
280	bus_space_write_2(sc->sc_io_tag, sc->sc_io_hdl, UHCI_INTR, 0);
281
282	rid = 0;
283	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
284	RF_SHAREABLE \| RF_ACTIVE);
285	if (sc->sc_irq_res == NULL) {
286	device_printf(self, "Could not allocate irq\n");
287	goto error;
288	}
289	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
290	if (!sc->sc_bus.bdev) {
291	device_printf(self, "Could not add USB device\n");
292	goto error;
293	}
294	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
295
296	/*
297	* uhci_pci_match must never return NULL if uhci_pci_probe
298	* succeeded
299	*/
300	device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
301	switch (pci_get_vendor(self)) {
302	case PCI_UHCI_VENDORID_INTEL:
722d05c3	303	ksprintf(sc->sc_vendor, "Intel");
12bd3c8b SW	304	break;
12bd3c8b SW	305	case PCI_UHCI_VENDORID_VIA:
722d05c3	306	ksprintf(sc->sc_vendor, "VIA");
12bd3c8b SW	307	break;
	308	default:
	309	if (bootverbose) {
	310	device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
	311	pci_get_devid(self));
	312	}
722d05c3	313	ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
12bd3c8b SW	314	}
	315
	316	switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) {
	317	case PCI_USB_REV_PRE_1_0:
	318	sc->sc_bus.usbrev = USB_REV_PRE_1_0;
	319	break;
	320	case PCI_USB_REV_1_0:
	321	sc->sc_bus.usbrev = USB_REV_1_0;
	322	break;
	323	default:
	324	/* Quirk for Parallels Desktop 4.0 */
	325	device_printf(self, "USB revision is unknown. Assuming v1.1.\n");
	326	sc->sc_bus.usbrev = USB_REV_1_1;
	327	break;
	328	}
	329
722d05c3 SW	330	err = bus_setup_intr(self, sc->sc_irq_res, INTR_MPSAFE,
722d05c3 SW	331	(driver_intr_t *)uhci_interrupt, sc, &sc->sc_intr_hdl, NULL);
12bd3c8b SW	332
	333	if (err) {
	334	device_printf(self, "Could not setup irq, %d\n", err);
	335	sc->sc_intr_hdl = NULL;
	336	goto error;
	337	}
	338	/*
	339	* Set the PIRQD enable bit and switch off all the others. We don't
	340	* want legacy support to interfere with us XXX Does this also mean
	341	* that the BIOS won't touch the keyboard anymore if it is connected
	342	* to the ports of the root hub?
	343	*/
	344	#ifdef USB_DEBUG
	345	if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN) {
	346	device_printf(self, "LegSup = 0x%04x\n",
	347	pci_read_config(self, PCI_LEGSUP, 2));
	348	}
	349	#endif
	350	pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
	351
	352	err = uhci_init(sc);
	353	if (!err) {
	354	err = device_probe_and_attach(sc->sc_bus.bdev);
	355	}
	356	if (err) {
	357	device_printf(self, "USB init failed\n");
	358	goto error;
	359	}
	360	return (0);
	361
	362	error:
	363	uhci_pci_detach(self);
	364	return (ENXIO);
	365	}
	366
	367	int
	368	uhci_pci_detach(device_t self)
	369	{
	370	uhci_softc_t *sc = device_get_softc(self);
	371	device_t bdev;
	372
	373	if (sc->sc_bus.bdev) {
	374	bdev = sc->sc_bus.bdev;
	375	device_detach(bdev);
	376	device_delete_child(self, bdev);
	377	}
63da4a34	378	#if 0 /* XXX */
12bd3c8b	379	/* during module unload there are lots of children leftover */
63da4a34 SW	380	device_delete_children(self);
	381	#endif
	382
12bd3c8b SW	383	/*
	384	* disable interrupts that might have been switched on in
	385	* uhci_init.
	386	*/
	387	if (sc->sc_io_res) {
	388	USB_BUS_LOCK(&sc->sc_bus);
	389
	390	/* stop the controller */
	391	uhci_reset(sc);
	392
	393	USB_BUS_UNLOCK(&sc->sc_bus);
	394	}
	395	pci_disable_busmaster(self);
	396
	397	if (sc->sc_irq_res && sc->sc_intr_hdl) {
	398	int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
	399
	400	if (err) {
	401	/* XXX or should we panic? */
	402	device_printf(self, "Could not tear down irq, %d\n",
	403	err);
	404	}
	405	sc->sc_intr_hdl = NULL;
	406	}
	407	if (sc->sc_irq_res) {
	408	bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
	409	sc->sc_irq_res = NULL;
	410	}
	411	if (sc->sc_io_res) {
	412	bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG,
	413	sc->sc_io_res);
	414	sc->sc_io_res = NULL;
	415	}
	416	usb_bus_mem_free_all(&sc->sc_bus, &uhci_iterate_hw_softc);
	417
	418	return (0);
	419	}
	420
	421	static device_method_t uhci_pci_methods[] = {
	422	/* Device interface */
	423	DEVMETHOD(device_probe, uhci_pci_probe),
	424	DEVMETHOD(device_attach, uhci_pci_attach),
	425	DEVMETHOD(device_detach, uhci_pci_detach),
	426	DEVMETHOD(device_suspend, bus_generic_suspend),
	427	DEVMETHOD(device_resume, bus_generic_resume),
	428	DEVMETHOD(device_shutdown, bus_generic_shutdown),
	429	DEVMETHOD(usb_take_controller, uhci_pci_take_controller),
	430
63da4a34	431	{ 0, 0 }
12bd3c8b SW	432	};
	433
	434	static driver_t uhci_driver = {
	435	.name = "uhci",
	436	.methods = uhci_pci_methods,
	437	.size = sizeof(struct uhci_softc),
	438	};
	439
	440	static devclass_t uhci_devclass;
	441
15f415f6	442	DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, NULL, NULL);
12bd3c8b	443	MODULE_DEPEND(uhci, usb, 1, 1, 1);