Optimize lwkt_rwlock.c a bit
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
8f41e33b 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.10 2003/06/22 08:54:18 dillon Exp $
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40 */
41
42#include "apm.h"
43#include "ether.h"
44#include "npx.h"
45#include "opt_atalk.h"
46#include "opt_compat.h"
47#include "opt_cpu.h"
48#include "opt_ddb.h"
49#include "opt_directio.h"
50#include "opt_inet.h"
51#include "opt_ipx.h"
52#include "opt_maxmem.h"
53#include "opt_msgbuf.h"
54#include "opt_perfmon.h"
55#include "opt_swap.h"
56#include "opt_user_ldt.h"
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
87#include <sys/user.h>
88#include <sys/exec.h>
89#include <sys/cons.h>
90
91#include <ddb/ddb.h>
92
93#include <net/netisr.h>
94
95#include <machine/cpu.h>
96#include <machine/reg.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#include <machine/bootinfo.h>
100#include <machine/ipl.h>
101#include <machine/md_var.h>
102#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103#ifdef SMP
104#include <machine/smp.h>
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105#endif
106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
112#include <i386/isa/isa_device.h>
113#endif
114#include <i386/isa/intr_machdep.h>
115#include <isa/rtc.h>
116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
121extern void init386 __P((int first));
122extern void dblfault_handler __P((void));
123
124extern void printcpuinfo(void); /* XXX header file */
125extern void finishidentcpu(void);
126extern void panicifcpuunsupported(void);
127extern void initializecpu(void);
128
129static void cpu_startup __P((void *));
130#ifdef CPU_ENABLE_SSE
131static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
132static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
133#endif /* CPU_ENABLE_SSE */
134#ifdef DIRECTIO
135extern void ffs_rawread_setup(void);
136#endif /* DIRECTIO */
137
138SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
139
140static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
141
142int _udatasel, _ucodesel;
143u_int atdevbase;
144
145#if defined(SWTCH_OPTIM_STATS)
146extern int swtch_optim_stats;
147SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
148 CTLFLAG_RD, &swtch_optim_stats, 0, "");
149SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
150 CTLFLAG_RD, &tlb_flush_count, 0, "");
151#endif
152
153#ifdef PC98
154static int ispc98 = 1;
155#else
156static int ispc98 = 0;
157#endif
158SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
159
160int physmem = 0;
161int cold = 1;
162
163static int
164sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
165{
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
167 return (error);
168}
169
170SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
172
173static int
174sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
175{
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - cnt.v_wire_count), req);
178 return (error);
179}
180
181SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
183
184static int
185sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
186{
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
189 return (error);
190}
191
192SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
194
195static int
196sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
197{
198 int error;
199
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
202 */
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
209 }
210 return(error);
211}
212
213SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
215
216static int msgbuf_clear;
217
218static int
219sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
220{
221 int error;
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
223 req);
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
228 msgbuf_clear=0;
229 }
230 return (error);
231}
232
233SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
236
237int bootverbose = 0, Maxmem = 0;
238long dumplo;
239
240vm_offset_t phys_avail[10];
241
242/* must be 2 less so 0 0 can signal end of chunks */
243#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
244
245static vm_offset_t buffer_sva, buffer_eva;
246vm_offset_t clean_sva, clean_eva;
247static vm_offset_t pager_sva, pager_eva;
248static struct trapframe proc0_tf;
249
250static void
251cpu_startup(dummy)
252 void *dummy;
253{
254 register unsigned i;
255 register caddr_t v;
256 vm_offset_t maxaddr;
257 vm_size_t size = 0;
258 int firstaddr;
259 vm_offset_t minaddr;
260
261 if (boothowto & RB_VERBOSE)
262 bootverbose++;
263
264 /*
265 * Good {morning,afternoon,evening,night}.
266 */
267 printf("%s", version);
268 startrtclock();
269 printcpuinfo();
270 panicifcpuunsupported();
271#ifdef PERFMON
272 perfmon_init();
273#endif
274 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
275 /*
276 * Display any holes after the first chunk of extended memory.
277 */
278 if (bootverbose) {
279 int indx;
280
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
283 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
284
285 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
286 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
287 size1 / PAGE_SIZE);
288 }
289 }
290
291 /*
292 * Calculate callout wheel size
293 */
294 for (callwheelsize = 1, callwheelbits = 0;
295 callwheelsize < ncallout;
296 callwheelsize <<= 1, ++callwheelbits)
297 ;
298 callwheelmask = callwheelsize - 1;
299
300 /*
301 * Allocate space for system data structures.
302 * The first available kernel virtual address is in "v".
303 * As pages of kernel virtual memory are allocated, "v" is incremented.
304 * As pages of memory are allocated and cleared,
305 * "firstaddr" is incremented.
306 * An index into the kernel page table corresponding to the
307 * virtual memory address maintained in "v" is kept in "mapaddr".
308 */
309
310 /*
311 * Make two passes. The first pass calculates how much memory is
312 * needed and allocates it. The second pass assigns virtual
313 * addresses to the various data structures.
314 */
315 firstaddr = 0;
316again:
317 v = (caddr_t)firstaddr;
318
319#define valloc(name, type, num) \
320 (name) = (type *)v; v = (caddr_t)((name)+(num))
321#define valloclim(name, type, num, lim) \
322 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
323
324 valloc(callout, struct callout, ncallout);
325 valloc(callwheel, struct callout_tailq, callwheelsize);
326
327 /*
328 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
329 * For the first 64MB of ram nominally allocate sufficient buffers to
330 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
331 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
332 * the buffer cache we limit the eventual kva reservation to
333 * maxbcache bytes.
334 *
335 * factor represents the 1/4 x ram conversion.
336 */
337 if (nbuf == 0) {
338 int factor = 4 * BKVASIZE / 1024;
339 int kbytes = physmem * (PAGE_SIZE / 1024);
340
341 nbuf = 50;
342 if (kbytes > 4096)
343 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
344 if (kbytes > 65536)
345 nbuf += (kbytes - 65536) * 2 / (factor * 5);
346 if (maxbcache && nbuf > maxbcache / BKVASIZE)
347 nbuf = maxbcache / BKVASIZE;
348 }
349
350 /*
351 * Do not allow the buffer_map to be more then 1/2 the size of the
352 * kernel_map.
353 */
354 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
355 (BKVASIZE * 2)) {
356 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
357 (BKVASIZE * 2);
358 printf("Warning: nbufs capped at %d\n", nbuf);
359 }
360
361 nswbuf = max(min(nbuf/4, 256), 16);
362#ifdef NSWBUF_MIN
363 if (nswbuf < NSWBUF_MIN)
364 nswbuf = NSWBUF_MIN;
365#endif
366#ifdef DIRECTIO
367 ffs_rawread_setup();
368#endif
369
370 valloc(swbuf, struct buf, nswbuf);
371 valloc(buf, struct buf, nbuf);
372 v = bufhashinit(v);
373
374 /*
375 * End of first pass, size has been calculated so allocate memory
376 */
377 if (firstaddr == 0) {
378 size = (vm_size_t)(v - firstaddr);
379 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
380 if (firstaddr == 0)
381 panic("startup: no room for tables");
382 goto again;
383 }
384
385 /*
386 * End of second pass, addresses have been assigned
387 */
388 if ((vm_size_t)(v - firstaddr) != size)
389 panic("startup: table size inconsistency");
390
391 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
392 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
393 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
394 (nbuf*BKVASIZE));
395 buffer_map->system_map = 1;
396 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
397 (nswbuf*MAXPHYS) + pager_map_size);
398 pager_map->system_map = 1;
399 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
400 (16*(ARG_MAX+(PAGE_SIZE*3))));
401
402 /*
403 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
404 * we use the more space efficient malloc in place of kmem_alloc.
405 */
406 {
407 vm_offset_t mb_map_size;
408
409 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
410 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
411 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
412 bzero(mclrefcnt, mb_map_size / MCLBYTES);
413 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
414 mb_map_size);
415 mb_map->system_map = 1;
416 }
417
418 /*
419 * Initialize callouts
420 */
421 SLIST_INIT(&callfree);
422 for (i = 0; i < ncallout; i++) {
423 callout_init(&callout[i]);
424 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
425 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
426 }
427
428 for (i = 0; i < callwheelsize; i++) {
429 TAILQ_INIT(&callwheel[i]);
430 }
431
432#if defined(USERCONFIG)
433 userconfig();
434 cninit(); /* the preferred console may have changed */
435#endif
436
437 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count),
438 ptoa(cnt.v_free_count) / 1024);
439
440 /*
441 * Set up buffers, so they can be used to read disk labels.
442 */
443 bufinit();
444 vm_pager_bufferinit();
445
446#ifdef SMP
447 /*
448 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
449 */
450 mp_start(); /* fire up the APs and APICs */
451 mp_announce();
452#endif /* SMP */
453 cpu_setregs();
454}
455
456int
457register_netisr(num, handler)
458 int num;
459 netisr_t *handler;
460{
461
462 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
463 printf("register_netisr: bad isr number: %d\n", num);
464 return (EINVAL);
465 }
466 netisrs[num] = handler;
467 return (0);
468}
469
470int
471unregister_netisr(num)
472 int num;
473{
474
475 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
476 printf("unregister_netisr: bad isr number: %d\n", num);
477 return (EINVAL);
478 }
479 netisrs[num] = NULL;
480 return (0);
481}
482
483/*
484 * Send an interrupt to process.
485 *
486 * Stack is set up to allow sigcode stored
487 * at top to call routine, followed by kcall
488 * to sigreturn routine below. After sigreturn
489 * resets the signal mask, the stack, and the
490 * frame pointer, it returns to the user
491 * specified pc, psl.
492 */
493static void
494osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
495{
496 register struct proc *p = curproc;
497 register struct trapframe *regs;
498 register struct osigframe *fp;
499 struct osigframe sf;
500 struct sigacts *psp = p->p_sigacts;
501 int oonstack;
502
503 regs = p->p_md.md_regs;
504 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
505
506 /* Allocate and validate space for the signal handler context. */
507 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
508 SIGISMEMBER(psp->ps_sigonstack, sig)) {
509 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
510 p->p_sigstk.ss_size - sizeof(struct osigframe));
511 p->p_sigstk.ss_flags |= SS_ONSTACK;
512 }
513 else
514 fp = (struct osigframe *)regs->tf_esp - 1;
515
516 /* Translate the signal if appropriate */
517 if (p->p_sysent->sv_sigtbl) {
518 if (sig <= p->p_sysent->sv_sigsize)
519 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
520 }
521
522 /* Build the argument list for the signal handler. */
523 sf.sf_signum = sig;
524 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
525 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
526 /* Signal handler installed with SA_SIGINFO. */
527 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
528 sf.sf_siginfo.si_signo = sig;
529 sf.sf_siginfo.si_code = code;
530 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
531 }
532 else {
533 /* Old FreeBSD-style arguments. */
534 sf.sf_arg2 = code;
535 sf.sf_addr = regs->tf_err;
536 sf.sf_ahu.sf_handler = catcher;
537 }
538
539 /* save scratch registers */
540 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
541 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
542 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
543 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
544 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
545 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
546 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
547 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
548 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
549 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
550 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
551 sf.sf_siginfo.si_sc.sc_gs = rgs();
552 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
553
554 /* Build the signal context to be used by sigreturn. */
555 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
556 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
557 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
558 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
559 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
560 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
561 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
562 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
563
564 /*
565 * If we're a vm86 process, we want to save the segment registers.
566 * We also change eflags to be our emulated eflags, not the actual
567 * eflags.
568 */
569 if (regs->tf_eflags & PSL_VM) {
570 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 571 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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572
573 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
574 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
575 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
576 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
577
578 if (vm86->vm86_has_vme == 0)
579 sf.sf_siginfo.si_sc.sc_ps =
580 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
581 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
582 /* see sendsig for comment */
583 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
584 }
585
586 /* Copy the sigframe out to the user's stack. */
587 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
588 /*
589 * Something is wrong with the stack pointer.
590 * ...Kill the process.
591 */
592 sigexit(p, SIGILL);
593 }
594
595 regs->tf_esp = (int)fp;
596 regs->tf_eip = PS_STRINGS - szosigcode;
597 regs->tf_eflags &= ~PSL_T;
598 regs->tf_cs = _ucodesel;
599 regs->tf_ds = _udatasel;
600 regs->tf_es = _udatasel;
601 regs->tf_fs = _udatasel;
602 load_gs(_udatasel);
603 regs->tf_ss = _udatasel;
604}
605
606void
607sendsig(catcher, sig, mask, code)
608 sig_t catcher;
609 int sig;
610 sigset_t *mask;
611 u_long code;
612{
613 struct proc *p = curproc;
614 struct trapframe *regs;
615 struct sigacts *psp = p->p_sigacts;
616 struct sigframe sf, *sfp;
617 int oonstack;
618
619 if (SIGISMEMBER(psp->ps_osigset, sig)) {
620 osendsig(catcher, sig, mask, code);
621 return;
622 }
623
624 regs = p->p_md.md_regs;
625 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
626
627 /* save user context */
628 bzero(&sf, sizeof(struct sigframe));
629 sf.sf_uc.uc_sigmask = *mask;
630 sf.sf_uc.uc_stack = p->p_sigstk;
631 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
632 sf.sf_uc.uc_mcontext.mc_gs = rgs();
633 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
634
635 /* Allocate and validate space for the signal handler context. */
636 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
637 SIGISMEMBER(psp->ps_sigonstack, sig)) {
638 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
639 p->p_sigstk.ss_size - sizeof(struct sigframe));
640 p->p_sigstk.ss_flags |= SS_ONSTACK;
641 }
642 else
643 sfp = (struct sigframe *)regs->tf_esp - 1;
644
645 /* Translate the signal is appropriate */
646 if (p->p_sysent->sv_sigtbl) {
647 if (sig <= p->p_sysent->sv_sigsize)
648 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
649 }
650
651 /* Build the argument list for the signal handler. */
652 sf.sf_signum = sig;
653 sf.sf_ucontext = (register_t)&sfp->sf_uc;
654 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
655 /* Signal handler installed with SA_SIGINFO. */
656 sf.sf_siginfo = (register_t)&sfp->sf_si;
657 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
658
659 /* fill siginfo structure */
660 sf.sf_si.si_signo = sig;
661 sf.sf_si.si_code = code;
662 sf.sf_si.si_addr = (void*)regs->tf_err;
663 }
664 else {
665 /* Old FreeBSD-style arguments. */
666 sf.sf_siginfo = code;
667 sf.sf_addr = regs->tf_err;
668 sf.sf_ahu.sf_handler = catcher;
669 }
670
671 /*
672 * If we're a vm86 process, we want to save the segment registers.
673 * We also change eflags to be our emulated eflags, not the actual
674 * eflags.
675 */
676 if (regs->tf_eflags & PSL_VM) {
677 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 678 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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679
680 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
681 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
682 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
683 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
684
685 if (vm86->vm86_has_vme == 0)
686 sf.sf_uc.uc_mcontext.mc_eflags =
687 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
688 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
689
690 /*
691 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
692 * syscalls made by the signal handler. This just avoids
693 * wasting time for our lazy fixup of such faults. PSL_NT
694 * does nothing in vm86 mode, but vm86 programs can set it
695 * almost legitimately in probes for old cpu types.
696 */
697 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
698 }
699
700 /*
701 * Copy the sigframe out to the user's stack.
702 */
703 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
704 /*
705 * Something is wrong with the stack pointer.
706 * ...Kill the process.
707 */
708 sigexit(p, SIGILL);
709 }
710
711 regs->tf_esp = (int)sfp;
712 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
713 regs->tf_eflags &= ~PSL_T;
714 regs->tf_cs = _ucodesel;
715 regs->tf_ds = _udatasel;
716 regs->tf_es = _udatasel;
717 regs->tf_fs = _udatasel;
718 load_gs(_udatasel);
719 regs->tf_ss = _udatasel;
720}
721
722/*
723 * System call to cleanup state after a signal
724 * has been taken. Reset signal mask and
725 * stack state from context left by sendsig (above).
726 * Return to previous pc and psl as specified by
727 * context left by sendsig. Check carefully to
728 * make sure that the user has not modified the
729 * state to gain improper privileges.
730 */
731#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
732#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
733
734int
735osigreturn(p, uap)
736 struct proc *p;
737 struct osigreturn_args /* {
738 struct osigcontext *sigcntxp;
739 } */ *uap;
740{
741 register struct osigcontext *scp;
742 register struct trapframe *regs = p->p_md.md_regs;
743 int eflags;
744
745 scp = uap->sigcntxp;
746
747 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
748 return(EFAULT);
749
750 eflags = scp->sc_ps;
751 if (eflags & PSL_VM) {
752 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
753 struct vm86_kernel *vm86;
754
755 /*
756 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
757 * set up the vm86 area, and we can't enter vm86 mode.
758 */
b7c628e4 759 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 760 return (EINVAL);
b7c628e4 761 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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762 if (vm86->vm86_inited == 0)
763 return (EINVAL);
764
765 /* go back to user mode if both flags are set */
766 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
767 trapsignal(p, SIGBUS, 0);
768
769 if (vm86->vm86_has_vme) {
770 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
771 (eflags & VME_USERCHANGE) | PSL_VM;
772 } else {
773 vm86->vm86_eflags = eflags; /* save VIF, VIP */
774 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
775 }
776 tf->tf_vm86_ds = scp->sc_ds;
777 tf->tf_vm86_es = scp->sc_es;
778 tf->tf_vm86_fs = scp->sc_fs;
779 tf->tf_vm86_gs = scp->sc_gs;
780 tf->tf_ds = _udatasel;
781 tf->tf_es = _udatasel;
782 tf->tf_fs = _udatasel;
783 } else {
784 /*
785 * Don't allow users to change privileged or reserved flags.
786 */
787 /*
788 * XXX do allow users to change the privileged flag PSL_RF.
789 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
790 * should sometimes set it there too. tf_eflags is kept in
791 * the signal context during signal handling and there is no
792 * other place to remember it, so the PSL_RF bit may be
793 * corrupted by the signal handler without us knowing.
794 * Corruption of the PSL_RF bit at worst causes one more or
795 * one less debugger trap, so allowing it is fairly harmless.
796 */
797 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
798 return(EINVAL);
799 }
800
801 /*
802 * Don't allow users to load a valid privileged %cs. Let the
803 * hardware check for invalid selectors, excess privilege in
804 * other selectors, invalid %eip's and invalid %esp's.
805 */
806 if (!CS_SECURE(scp->sc_cs)) {
807 trapsignal(p, SIGBUS, T_PROTFLT);
808 return(EINVAL);
809 }
810 regs->tf_ds = scp->sc_ds;
811 regs->tf_es = scp->sc_es;
812 regs->tf_fs = scp->sc_fs;
813 }
814
815 /* restore scratch registers */
816 regs->tf_eax = scp->sc_eax;
817 regs->tf_ebx = scp->sc_ebx;
818 regs->tf_ecx = scp->sc_ecx;
819 regs->tf_edx = scp->sc_edx;
820 regs->tf_esi = scp->sc_esi;
821 regs->tf_edi = scp->sc_edi;
822 regs->tf_cs = scp->sc_cs;
823 regs->tf_ss = scp->sc_ss;
824 regs->tf_isp = scp->sc_isp;
825
826 if (scp->sc_onstack & 01)
827 p->p_sigstk.ss_flags |= SS_ONSTACK;
828 else
829 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
830
831 SIGSETOLD(p->p_sigmask, scp->sc_mask);
832 SIG_CANTMASK(p->p_sigmask);
833 regs->tf_ebp = scp->sc_fp;
834 regs->tf_esp = scp->sc_sp;
835 regs->tf_eip = scp->sc_pc;
836 regs->tf_eflags = eflags;
837 return(EJUSTRETURN);
838}
839
840int
841sigreturn(p, uap)
842 struct proc *p;
843 struct sigreturn_args /* {
844 ucontext_t *sigcntxp;
845 } */ *uap;
846{
847 struct trapframe *regs;
848 ucontext_t *ucp;
849 int cs, eflags;
850
851 ucp = uap->sigcntxp;
852
853 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
854 return (EFAULT);
855 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
856 return (osigreturn(p, (struct osigreturn_args *)uap));
857
858 /*
859 * Since ucp is not an osigcontext but a ucontext_t, we have to
860 * check again if all of it is accessible. A ucontext_t is
861 * much larger, so instead of just checking for the pointer
862 * being valid for the size of an osigcontext, now check for
863 * it being valid for a whole, new-style ucontext_t.
864 */
865 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
866 return (EFAULT);
867
868 regs = p->p_md.md_regs;
869 eflags = ucp->uc_mcontext.mc_eflags;
870
871 if (eflags & PSL_VM) {
872 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
873 struct vm86_kernel *vm86;
874
875 /*
876 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
877 * set up the vm86 area, and we can't enter vm86 mode.
878 */
b7c628e4 879 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 880 return (EINVAL);
b7c628e4 881 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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882 if (vm86->vm86_inited == 0)
883 return (EINVAL);
884
885 /* go back to user mode if both flags are set */
886 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
887 trapsignal(p, SIGBUS, 0);
888
889 if (vm86->vm86_has_vme) {
890 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
891 (eflags & VME_USERCHANGE) | PSL_VM;
892 } else {
893 vm86->vm86_eflags = eflags; /* save VIF, VIP */
894 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
895 }
896 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
897 tf->tf_eflags = eflags;
898 tf->tf_vm86_ds = tf->tf_ds;
899 tf->tf_vm86_es = tf->tf_es;
900 tf->tf_vm86_fs = tf->tf_fs;
901 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
902 tf->tf_ds = _udatasel;
903 tf->tf_es = _udatasel;
904 tf->tf_fs = _udatasel;
905 } else {
906 /*
907 * Don't allow users to change privileged or reserved flags.
908 */
909 /*
910 * XXX do allow users to change the privileged flag PSL_RF.
911 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
912 * should sometimes set it there too. tf_eflags is kept in
913 * the signal context during signal handling and there is no
914 * other place to remember it, so the PSL_RF bit may be
915 * corrupted by the signal handler without us knowing.
916 * Corruption of the PSL_RF bit at worst causes one more or
917 * one less debugger trap, so allowing it is fairly harmless.
918 */
919 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
920 printf("sigreturn: eflags = 0x%x\n", eflags);
921 return(EINVAL);
922 }
923
924 /*
925 * Don't allow users to load a valid privileged %cs. Let the
926 * hardware check for invalid selectors, excess privilege in
927 * other selectors, invalid %eip's and invalid %esp's.
928 */
929 cs = ucp->uc_mcontext.mc_cs;
930 if (!CS_SECURE(cs)) {
931 printf("sigreturn: cs = 0x%x\n", cs);
932 trapsignal(p, SIGBUS, T_PROTFLT);
933 return(EINVAL);
934 }
935 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
936 }
937
938 if (ucp->uc_mcontext.mc_onstack & 1)
939 p->p_sigstk.ss_flags |= SS_ONSTACK;
940 else
941 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
942
943 p->p_sigmask = ucp->uc_sigmask;
944 SIG_CANTMASK(p->p_sigmask);
945 return(EJUSTRETURN);
946}
947
948/*
949 * Machine dependent boot() routine
950 *
951 * I haven't seen anything to put here yet
952 * Possibly some stuff might be grafted back here from boot()
953 */
954void
955cpu_boot(int howto)
956{
957}
958
959/*
960 * Shutdown the CPU as much as possible
961 */
962void
963cpu_halt(void)
964{
965 for (;;)
966 __asm__ ("hlt");
967}
968
969/*
8ad65e08
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970 * cpu_idle() represents the idle LWKT. You cannot return from this function
971 * (unless you want to blow things up!). Instead we look for runnable threads
972 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 973 *
8ad65e08
MD
974 * Note on cpu_idle_hlt: On an SMP system this may cause the system to
975 * halt until the next clock tick, even if a thread is ready YYY
984263bc
MD
976 */
977#ifdef SMP
978static int cpu_idle_hlt = 0;
979#else
980static int cpu_idle_hlt = 1;
981#endif
982SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
983 &cpu_idle_hlt, 0, "Idle loop HLT enable");
984
985void
986cpu_idle(void)
987{
f1d1c3fa 988 spl0();
8ad65e08 989 for (;;) {
8ad65e08
MD
990 lwkt_switch();
991 if (cpu_idle_hlt) {
992 /*
993 * We must guarentee that hlt is exactly the instruction
994 * following the sti.
995 */
996 __asm __volatile("sti; hlt");
997 } else {
998 __asm __volatile("sti");
999 }
8ad65e08 1000 /* YYY BGL */
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MD
1001 }
1002}
1003
1004/*
1005 * Clear registers on exec
1006 */
1007void
1008setregs(p, entry, stack, ps_strings)
1009 struct proc *p;
1010 u_long entry;
1011 u_long stack;
1012 u_long ps_strings;
1013{
1014 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 1015 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
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1016
1017 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1018 pcb->pcb_gs = _udatasel;
1019 load_gs(_udatasel);
1020
1021#ifdef USER_LDT
1022 /* was i386_user_cleanup() in NetBSD */
1023 user_ldt_free(pcb);
1024#endif
1025
1026 bzero((char *)regs, sizeof(struct trapframe));
1027 regs->tf_eip = entry;
1028 regs->tf_esp = stack;
1029 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1030 regs->tf_ss = _udatasel;
1031 regs->tf_ds = _udatasel;
1032 regs->tf_es = _udatasel;
1033 regs->tf_fs = _udatasel;
1034 regs->tf_cs = _ucodesel;
1035
1036 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1037 regs->tf_ebx = ps_strings;
1038
1039 /*
1040 * Reset the hardware debug registers if they were in use.
1041 * They won't have any meaning for the newly exec'd process.
1042 */
1043 if (pcb->pcb_flags & PCB_DBREGS) {
1044 pcb->pcb_dr0 = 0;
1045 pcb->pcb_dr1 = 0;
1046 pcb->pcb_dr2 = 0;
1047 pcb->pcb_dr3 = 0;
1048 pcb->pcb_dr6 = 0;
1049 pcb->pcb_dr7 = 0;
b7c628e4 1050 if (pcb == curthread->td_pcb) {
984263bc
MD
1051 /*
1052 * Clear the debug registers on the running
1053 * CPU, otherwise they will end up affecting
1054 * the next process we switch to.
1055 */
1056 reset_dbregs();
1057 }
1058 pcb->pcb_flags &= ~PCB_DBREGS;
1059 }
1060
1061 /*
1062 * Initialize the math emulator (if any) for the current process.
1063 * Actually, just clear the bit that says that the emulator has
1064 * been initialized. Initialization is delayed until the process
1065 * traps to the emulator (if it is done at all) mainly because
1066 * emulators don't provide an entry point for initialization.
1067 */
b7c628e4 1068 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
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1069
1070 /*
1071 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1072 * for why fwait must be trapped at least if there is an npx or an
1073 * emulator). This is mainly to handle the case where npx0 is not
1074 * configured, since the npx routines normally set up the trap
1075 * otherwise. It should be done only at boot time, but doing it
1076 * here allows modifying `npx_exists' for testing the emulator on
1077 * systems with an npx.
1078 */
1079 load_cr0(rcr0() | CR0_MP | CR0_TS);
1080
1081#if NNPX > 0
1082 /* Initialize the npx (if any) for the current process. */
1083 npxinit(__INITIAL_NPXCW__);
1084#endif
1085
1086 /*
1087 * XXX - Linux emulator
1088 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1089 * on it.
1090 */
1091 p->p_retval[1] = 0;
1092}
1093
1094void
1095cpu_setregs(void)
1096{
1097 unsigned int cr0;
1098
1099 cr0 = rcr0();
1100 cr0 |= CR0_NE; /* Done by npxinit() */
1101 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1102#ifdef I386_CPU
1103 if (cpu_class != CPUCLASS_386)
1104#endif
1105 cr0 |= CR0_WP | CR0_AM;
1106 load_cr0(cr0);
1107 load_gs(_udatasel);
1108}
1109
1110static int
1111sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1112{
1113 int error;
1114 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1115 req);
1116 if (!error && req->newptr)
1117 resettodr();
1118 return (error);
1119}
1120
1121SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1122 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1123
1124SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1125 CTLFLAG_RW, &disable_rtc_set, 0, "");
1126
1127SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1128 CTLFLAG_RD, &bootinfo, bootinfo, "");
1129
1130SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1131 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1132
1133extern u_long bootdev; /* not a dev_t - encoding is different */
1134SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1135 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1136
1137/*
1138 * Initialize 386 and configure to run kernel
1139 */
1140
1141/*
1142 * Initialize segments & interrupt table
1143 */
1144
1145int _default_ldt;
1146union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1147static struct gate_descriptor idt0[NIDT];
1148struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1149union descriptor ldt[NLDT]; /* local descriptor table */
1150#ifdef SMP
1151/* table descriptors - used to load tables by microp */
1152struct region_descriptor r_gdt, r_idt;
1153#endif
1154
1155#ifndef SMP
1156extern struct segment_descriptor common_tssd, *tss_gdt;
1157#endif
1158int private_tss; /* flag indicating private tss */
1159
1160#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1161extern int has_f00f_bug;
1162#endif
1163
1164static struct i386tss dblfault_tss;
1165static char dblfault_stack[PAGE_SIZE];
1166
1167extern struct user *proc0paddr;
1168
1169
1170/* software prototypes -- in more palatable form */
1171struct soft_segment_descriptor gdt_segs[] = {
1172/* GNULL_SEL 0 Null Descriptor */
1173{ 0x0, /* segment base address */
1174 0x0, /* length */
1175 0, /* segment type */
1176 0, /* segment descriptor priority level */
1177 0, /* segment descriptor present */
1178 0, 0,
1179 0, /* default 32 vs 16 bit size */
1180 0 /* limit granularity (byte/page units)*/ },
1181/* GCODE_SEL 1 Code Descriptor for kernel */
1182{ 0x0, /* segment base address */
1183 0xfffff, /* length - all address space */
1184 SDT_MEMERA, /* segment type */
1185 0, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1187 0, 0,
1188 1, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190/* GDATA_SEL 2 Data Descriptor for kernel */
1191{ 0x0, /* segment base address */
1192 0xfffff, /* length - all address space */
1193 SDT_MEMRWA, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1196 0, 0,
1197 1, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1200{ 0x0, /* segment base address */
1201 0xfffff, /* length - all address space */
1202 SDT_MEMRWA, /* segment type */
1203 0, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1205 0, 0,
1206 1, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1209{
1210 0x0, /* segment base address */
1211 sizeof(struct i386tss)-1,/* length - all address space */
1212 SDT_SYS386TSS, /* segment type */
1213 0, /* segment descriptor priority level */
1214 1, /* segment descriptor present */
1215 0, 0,
1216 0, /* unused - default 32 vs 16 bit size */
1217 0 /* limit granularity (byte/page units)*/ },
1218/* GLDT_SEL 5 LDT Descriptor */
1219{ (int) ldt, /* segment base address */
1220 sizeof(ldt)-1, /* length - all address space */
1221 SDT_SYSLDT, /* segment type */
1222 SEL_UPL, /* segment descriptor priority level */
1223 1, /* segment descriptor present */
1224 0, 0,
1225 0, /* unused - default 32 vs 16 bit size */
1226 0 /* limit granularity (byte/page units)*/ },
1227/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1228{ (int) ldt, /* segment base address */
1229 (512 * sizeof(union descriptor)-1), /* length */
1230 SDT_SYSLDT, /* segment type */
1231 0, /* segment descriptor priority level */
1232 1, /* segment descriptor present */
1233 0, 0,
1234 0, /* unused - default 32 vs 16 bit size */
1235 0 /* limit granularity (byte/page units)*/ },
1236/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1237{ 0x0, /* segment base address */
1238 0x0, /* length - all address space */
1239 0, /* segment type */
1240 0, /* segment descriptor priority level */
1241 0, /* segment descriptor present */
1242 0, 0,
1243 0, /* default 32 vs 16 bit size */
1244 0 /* limit granularity (byte/page units)*/ },
1245/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1246{ 0x400, /* segment base address */
1247 0xfffff, /* length */
1248 SDT_MEMRWA, /* segment type */
1249 0, /* segment descriptor priority level */
1250 1, /* segment descriptor present */
1251 0, 0,
1252 1, /* default 32 vs 16 bit size */
1253 1 /* limit granularity (byte/page units)*/ },
1254/* GPANIC_SEL 9 Panic Tss Descriptor */
1255{ (int) &dblfault_tss, /* segment base address */
1256 sizeof(struct i386tss)-1,/* length - all address space */
1257 SDT_SYS386TSS, /* segment type */
1258 0, /* segment descriptor priority level */
1259 1, /* segment descriptor present */
1260 0, 0,
1261 0, /* unused - default 32 vs 16 bit size */
1262 0 /* limit granularity (byte/page units)*/ },
1263/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1264{ 0, /* segment base address (overwritten) */
1265 0xfffff, /* length */
1266 SDT_MEMERA, /* segment type */
1267 0, /* segment descriptor priority level */
1268 1, /* segment descriptor present */
1269 0, 0,
1270 0, /* default 32 vs 16 bit size */
1271 1 /* limit granularity (byte/page units)*/ },
1272/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1273{ 0, /* segment base address (overwritten) */
1274 0xfffff, /* length */
1275 SDT_MEMERA, /* segment type */
1276 0, /* segment descriptor priority level */
1277 1, /* segment descriptor present */
1278 0, 0,
1279 0, /* default 32 vs 16 bit size */
1280 1 /* limit granularity (byte/page units)*/ },
1281/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1282{ 0, /* segment base address (overwritten) */
1283 0xfffff, /* length */
1284 SDT_MEMRWA, /* segment type */
1285 0, /* segment descriptor priority level */
1286 1, /* segment descriptor present */
1287 0, 0,
1288 1, /* default 32 vs 16 bit size */
1289 1 /* limit granularity (byte/page units)*/ },
1290/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1291{ 0, /* segment base address (overwritten) */
1292 0xfffff, /* length */
1293 SDT_MEMRWA, /* segment type */
1294 0, /* segment descriptor priority level */
1295 1, /* segment descriptor present */
1296 0, 0,
1297 0, /* default 32 vs 16 bit size */
1298 1 /* limit granularity (byte/page units)*/ },
1299/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1300{ 0, /* segment base address (overwritten) */
1301 0xfffff, /* length */
1302 SDT_MEMRWA, /* segment type */
1303 0, /* segment descriptor priority level */
1304 1, /* segment descriptor present */
1305 0, 0,
1306 0, /* default 32 vs 16 bit size */
1307 1 /* limit granularity (byte/page units)*/ },
1308};
1309
1310static struct soft_segment_descriptor ldt_segs[] = {
1311 /* Null Descriptor - overwritten by call gate */
1312{ 0x0, /* segment base address */
1313 0x0, /* length - all address space */
1314 0, /* segment type */
1315 0, /* segment descriptor priority level */
1316 0, /* segment descriptor present */
1317 0, 0,
1318 0, /* default 32 vs 16 bit size */
1319 0 /* limit granularity (byte/page units)*/ },
1320 /* Null Descriptor - overwritten by call gate */
1321{ 0x0, /* segment base address */
1322 0x0, /* length - all address space */
1323 0, /* segment type */
1324 0, /* segment descriptor priority level */
1325 0, /* segment descriptor present */
1326 0, 0,
1327 0, /* default 32 vs 16 bit size */
1328 0 /* limit granularity (byte/page units)*/ },
1329 /* Null Descriptor - overwritten by call gate */
1330{ 0x0, /* segment base address */
1331 0x0, /* length - all address space */
1332 0, /* segment type */
1333 0, /* segment descriptor priority level */
1334 0, /* segment descriptor present */
1335 0, 0,
1336 0, /* default 32 vs 16 bit size */
1337 0 /* limit granularity (byte/page units)*/ },
1338 /* Code Descriptor for user */
1339{ 0x0, /* segment base address */
1340 0xfffff, /* length - all address space */
1341 SDT_MEMERA, /* segment type */
1342 SEL_UPL, /* segment descriptor priority level */
1343 1, /* segment descriptor present */
1344 0, 0,
1345 1, /* default 32 vs 16 bit size */
1346 1 /* limit granularity (byte/page units)*/ },
1347 /* Null Descriptor - overwritten by call gate */
1348{ 0x0, /* segment base address */
1349 0x0, /* length - all address space */
1350 0, /* segment type */
1351 0, /* segment descriptor priority level */
1352 0, /* segment descriptor present */
1353 0, 0,
1354 0, /* default 32 vs 16 bit size */
1355 0 /* limit granularity (byte/page units)*/ },
1356 /* Data Descriptor for user */
1357{ 0x0, /* segment base address */
1358 0xfffff, /* length - all address space */
1359 SDT_MEMRWA, /* segment type */
1360 SEL_UPL, /* segment descriptor priority level */
1361 1, /* segment descriptor present */
1362 0, 0,
1363 1, /* default 32 vs 16 bit size */
1364 1 /* limit granularity (byte/page units)*/ },
1365};
1366
1367void
1368setidt(idx, func, typ, dpl, selec)
1369 int idx;
1370 inthand_t *func;
1371 int typ;
1372 int dpl;
1373 int selec;
1374{
1375 struct gate_descriptor *ip;
1376
1377 ip = idt + idx;
1378 ip->gd_looffset = (int)func;
1379 ip->gd_selector = selec;
1380 ip->gd_stkcpy = 0;
1381 ip->gd_xx = 0;
1382 ip->gd_type = typ;
1383 ip->gd_dpl = dpl;
1384 ip->gd_p = 1;
1385 ip->gd_hioffset = ((int)func)>>16 ;
1386}
1387
1388#define IDTVEC(name) __CONCAT(X,name)
1389
1390extern inthand_t
1391 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1392 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1393 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1394 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1395 IDTVEC(xmm), IDTVEC(syscall), IDTVEC(int0x80_syscall);
1396
1397void
1398sdtossd(sd, ssd)
1399 struct segment_descriptor *sd;
1400 struct soft_segment_descriptor *ssd;
1401{
1402 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1403 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1404 ssd->ssd_type = sd->sd_type;
1405 ssd->ssd_dpl = sd->sd_dpl;
1406 ssd->ssd_p = sd->sd_p;
1407 ssd->ssd_def32 = sd->sd_def32;
1408 ssd->ssd_gran = sd->sd_gran;
1409}
1410
1411#define PHYSMAP_SIZE (2 * 8)
1412
1413/*
1414 * Populate the (physmap) array with base/bound pairs describing the
1415 * available physical memory in the system, then test this memory and
1416 * build the phys_avail array describing the actually-available memory.
1417 *
1418 * If we cannot accurately determine the physical memory map, then use
1419 * value from the 0xE801 call, and failing that, the RTC.
1420 *
1421 * Total memory size may be set by the kernel environment variable
1422 * hw.physmem or the compile-time define MAXMEM.
1423 */
1424static void
1425getmemsize(int first)
1426{
1427 int i, physmap_idx, pa_indx;
1428 int hasbrokenint12;
1429 u_int basemem, extmem;
1430 struct vm86frame vmf;
1431 struct vm86context vmc;
1432 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1433 pt_entry_t pte;
1434 const char *cp;
1435 struct {
1436 u_int64_t base;
1437 u_int64_t length;
1438 u_int32_t type;
1439 } *smap;
1440
1441 hasbrokenint12 = 0;
1442 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1443 bzero(&vmf, sizeof(struct vm86frame));
1444 bzero(physmap, sizeof(physmap));
1445 basemem = 0;
1446
1447 /*
1448 * Some newer BIOSes has broken INT 12H implementation which cause
1449 * kernel panic immediately. In this case, we need to scan SMAP
1450 * with INT 15:E820 first, then determine base memory size.
1451 */
1452 if (hasbrokenint12) {
1453 goto int15e820;
1454 }
1455
1456 /*
1457 * Perform "base memory" related probes & setup
1458 */
1459 vm86_intcall(0x12, &vmf);
1460 basemem = vmf.vmf_ax;
1461 if (basemem > 640) {
1462 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1463 basemem);
1464 basemem = 640;
1465 }
1466
1467 /*
1468 * XXX if biosbasemem is now < 640, there is a `hole'
1469 * between the end of base memory and the start of
1470 * ISA memory. The hole may be empty or it may
1471 * contain BIOS code or data. Map it read/write so
1472 * that the BIOS can write to it. (Memory from 0 to
1473 * the physical end of the kernel is mapped read-only
1474 * to begin with and then parts of it are remapped.
1475 * The parts that aren't remapped form holes that
1476 * remain read-only and are unused by the kernel.
1477 * The base memory area is below the physical end of
1478 * the kernel and right now forms a read-only hole.
1479 * The part of it from PAGE_SIZE to
1480 * (trunc_page(biosbasemem * 1024) - 1) will be
1481 * remapped and used by the kernel later.)
1482 *
1483 * This code is similar to the code used in
1484 * pmap_mapdev, but since no memory needs to be
1485 * allocated we simply change the mapping.
1486 */
1487 for (pa = trunc_page(basemem * 1024);
1488 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1489 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1490 *pte = pa | PG_RW | PG_V;
1491 }
1492
1493 /*
1494 * if basemem != 640, map pages r/w into vm86 page table so
1495 * that the bios can scribble on it.
1496 */
1497 pte = (pt_entry_t)vm86paddr;
1498 for (i = basemem / 4; i < 160; i++)
1499 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1500
1501int15e820:
1502 /*
1503 * map page 1 R/W into the kernel page table so we can use it
1504 * as a buffer. The kernel will unmap this page later.
1505 */
1506 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1507 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1508
1509 /*
1510 * get memory map with INT 15:E820
1511 */
1512#define SMAPSIZ sizeof(*smap)
1513#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1514
1515 vmc.npages = 0;
1516 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1517 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1518
1519 physmap_idx = 0;
1520 vmf.vmf_ebx = 0;
1521 do {
1522 vmf.vmf_eax = 0xE820;
1523 vmf.vmf_edx = SMAP_SIG;
1524 vmf.vmf_ecx = SMAPSIZ;
1525 i = vm86_datacall(0x15, &vmf, &vmc);
1526 if (i || vmf.vmf_eax != SMAP_SIG)
1527 break;
1528 if (boothowto & RB_VERBOSE)
1529 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1530 smap->type,
1531 *(u_int32_t *)((char *)&smap->base + 4),
1532 (u_int32_t)smap->base,
1533 *(u_int32_t *)((char *)&smap->length + 4),
1534 (u_int32_t)smap->length);
1535
1536 if (smap->type != 0x01)
1537 goto next_run;
1538
1539 if (smap->length == 0)
1540 goto next_run;
1541
1542 if (smap->base >= 0xffffffff) {
1543 printf("%uK of memory above 4GB ignored\n",
1544 (u_int)(smap->length / 1024));
1545 goto next_run;
1546 }
1547
1548 for (i = 0; i <= physmap_idx; i += 2) {
1549 if (smap->base < physmap[i + 1]) {
1550 if (boothowto & RB_VERBOSE)
1551 printf(
1552 "Overlapping or non-montonic memory region, ignoring second region\n");
1553 goto next_run;
1554 }
1555 }
1556
1557 if (smap->base == physmap[physmap_idx + 1]) {
1558 physmap[physmap_idx + 1] += smap->length;
1559 goto next_run;
1560 }
1561
1562 physmap_idx += 2;
1563 if (physmap_idx == PHYSMAP_SIZE) {
1564 printf(
1565 "Too many segments in the physical address map, giving up\n");
1566 break;
1567 }
1568 physmap[physmap_idx] = smap->base;
1569 physmap[physmap_idx + 1] = smap->base + smap->length;
1570next_run:
1571 } while (vmf.vmf_ebx != 0);
1572
1573 /*
1574 * Perform "base memory" related probes & setup based on SMAP
1575 */
1576 if (basemem == 0) {
1577 for (i = 0; i <= physmap_idx; i += 2) {
1578 if (physmap[i] == 0x00000000) {
1579 basemem = physmap[i + 1] / 1024;
1580 break;
1581 }
1582 }
1583
1584 if (basemem == 0) {
1585 basemem = 640;
1586 }
1587
1588 if (basemem > 640) {
1589 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1590 basemem);
1591 basemem = 640;
1592 }
1593
1594 for (pa = trunc_page(basemem * 1024);
1595 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1596 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1597 *pte = pa | PG_RW | PG_V;
1598 }
1599
1600 pte = (pt_entry_t)vm86paddr;
1601 for (i = basemem / 4; i < 160; i++)
1602 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1603 }
1604
1605 if (physmap[1] != 0)
1606 goto physmap_done;
1607
1608 /*
1609 * If we failed above, try memory map with INT 15:E801
1610 */
1611 vmf.vmf_ax = 0xE801;
1612 if (vm86_intcall(0x15, &vmf) == 0) {
1613 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1614 } else {
1615#if 0
1616 vmf.vmf_ah = 0x88;
1617 vm86_intcall(0x15, &vmf);
1618 extmem = vmf.vmf_ax;
1619#else
1620 /*
1621 * Prefer the RTC value for extended memory.
1622 */
1623 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1624#endif
1625 }
1626
1627 /*
1628 * Special hack for chipsets that still remap the 384k hole when
1629 * there's 16MB of memory - this really confuses people that
1630 * are trying to use bus mastering ISA controllers with the
1631 * "16MB limit"; they only have 16MB, but the remapping puts
1632 * them beyond the limit.
1633 *
1634 * If extended memory is between 15-16MB (16-17MB phys address range),
1635 * chop it to 15MB.
1636 */
1637 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1638 extmem = 15 * 1024;
1639
1640 physmap[0] = 0;
1641 physmap[1] = basemem * 1024;
1642 physmap_idx = 2;
1643 physmap[physmap_idx] = 0x100000;
1644 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1645
1646physmap_done:
1647 /*
1648 * Now, physmap contains a map of physical memory.
1649 */
1650
1651#ifdef SMP
1652 /* make hole for AP bootstrap code */
1653 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1654
1655 /* look for the MP hardware - needed for apic addresses */
1656 mp_probe();
1657#endif
1658
1659 /*
1660 * Maxmem isn't the "maximum memory", it's one larger than the
1661 * highest page of the physical address space. It should be
1662 * called something like "Maxphyspage". We may adjust this
1663 * based on ``hw.physmem'' and the results of the memory test.
1664 */
1665 Maxmem = atop(physmap[physmap_idx + 1]);
1666
1667#ifdef MAXMEM
1668 Maxmem = MAXMEM / 4;
1669#endif
1670
1671 /*
1672 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1673 * for the appropriate modifiers. This overrides MAXMEM.
1674 */
1675 if ((cp = getenv("hw.physmem")) != NULL) {
1676 u_int64_t AllowMem, sanity;
1677 char *ep;
1678
1679 sanity = AllowMem = strtouq(cp, &ep, 0);
1680 if ((ep != cp) && (*ep != 0)) {
1681 switch(*ep) {
1682 case 'g':
1683 case 'G':
1684 AllowMem <<= 10;
1685 case 'm':
1686 case 'M':
1687 AllowMem <<= 10;
1688 case 'k':
1689 case 'K':
1690 AllowMem <<= 10;
1691 break;
1692 default:
1693 AllowMem = sanity = 0;
1694 }
1695 if (AllowMem < sanity)
1696 AllowMem = 0;
1697 }
1698 if (AllowMem == 0)
1699 printf("Ignoring invalid memory size of '%s'\n", cp);
1700 else
1701 Maxmem = atop(AllowMem);
1702 }
1703
1704 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1705 (boothowto & RB_VERBOSE))
1706 printf("Physical memory use set to %uK\n", Maxmem * 4);
1707
1708 /*
1709 * If Maxmem has been increased beyond what the system has detected,
1710 * extend the last memory segment to the new limit.
1711 */
1712 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1713 physmap[physmap_idx + 1] = ptoa(Maxmem);
1714
1715 /* call pmap initialization to make new kernel address space */
1716 pmap_bootstrap(first, 0);
1717
1718 /*
1719 * Size up each available chunk of physical memory.
1720 */
1721 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1722 pa_indx = 0;
1723 phys_avail[pa_indx++] = physmap[0];
1724 phys_avail[pa_indx] = physmap[0];
1725#if 0
1726 pte = (pt_entry_t)vtopte(KERNBASE);
1727#else
1728 pte = (pt_entry_t)CMAP1;
1729#endif
1730
1731 /*
1732 * physmap is in bytes, so when converting to page boundaries,
1733 * round up the start address and round down the end address.
1734 */
1735 for (i = 0; i <= physmap_idx; i += 2) {
1736 vm_offset_t end;
1737
1738 end = ptoa(Maxmem);
1739 if (physmap[i + 1] < end)
1740 end = trunc_page(physmap[i + 1]);
1741 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1742 int tmp, page_bad;
1743#if 0
1744 int *ptr = 0;
1745#else
1746 int *ptr = (int *)CADDR1;
1747#endif
1748
1749 /*
1750 * block out kernel memory as not available.
1751 */
1752 if (pa >= 0x100000 && pa < first)
1753 continue;
1754
1755 page_bad = FALSE;
1756
1757 /*
1758 * map page into kernel: valid, read/write,non-cacheable
1759 */
1760 *pte = pa | PG_V | PG_RW | PG_N;
1761 invltlb();
1762
1763 tmp = *(int *)ptr;
1764 /*
1765 * Test for alternating 1's and 0's
1766 */
1767 *(volatile int *)ptr = 0xaaaaaaaa;
1768 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1769 page_bad = TRUE;
1770 }
1771 /*
1772 * Test for alternating 0's and 1's
1773 */
1774 *(volatile int *)ptr = 0x55555555;
1775 if (*(volatile int *)ptr != 0x55555555) {
1776 page_bad = TRUE;
1777 }
1778 /*
1779 * Test for all 1's
1780 */
1781 *(volatile int *)ptr = 0xffffffff;
1782 if (*(volatile int *)ptr != 0xffffffff) {
1783 page_bad = TRUE;
1784 }
1785 /*
1786 * Test for all 0's
1787 */
1788 *(volatile int *)ptr = 0x0;
1789 if (*(volatile int *)ptr != 0x0) {
1790 page_bad = TRUE;
1791 }
1792 /*
1793 * Restore original value.
1794 */
1795 *(int *)ptr = tmp;
1796
1797 /*
1798 * Adjust array of valid/good pages.
1799 */
1800 if (page_bad == TRUE) {
1801 continue;
1802 }
1803 /*
1804 * If this good page is a continuation of the
1805 * previous set of good pages, then just increase
1806 * the end pointer. Otherwise start a new chunk.
1807 * Note that "end" points one higher than end,
1808 * making the range >= start and < end.
1809 * If we're also doing a speculative memory
1810 * test and we at or past the end, bump up Maxmem
1811 * so that we keep going. The first bad page
1812 * will terminate the loop.
1813 */
1814 if (phys_avail[pa_indx] == pa) {
1815 phys_avail[pa_indx] += PAGE_SIZE;
1816 } else {
1817 pa_indx++;
1818 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1819 printf("Too many holes in the physical address space, giving up\n");
1820 pa_indx--;
1821 break;
1822 }
1823 phys_avail[pa_indx++] = pa; /* start */
1824 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1825 }
1826 physmem++;
1827 }
1828 }
1829 *pte = 0;
1830 invltlb();
1831
1832 /*
1833 * XXX
1834 * The last chunk must contain at least one page plus the message
1835 * buffer to avoid complicating other code (message buffer address
1836 * calculation, etc.).
1837 */
1838 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1839 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1840 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1841 phys_avail[pa_indx--] = 0;
1842 phys_avail[pa_indx--] = 0;
1843 }
1844
1845 Maxmem = atop(phys_avail[pa_indx]);
1846
1847 /* Trim off space for the message buffer. */
1848 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1849
1850 avail_end = phys_avail[pa_indx];
1851}
1852
1853void
1854init386(first)
1855 int first;
1856{
1857 struct gate_descriptor *gdp;
1858 int gsel_tss, metadata_missing, off, x;
1859#ifndef SMP
1860 /* table descriptors - used to load tables by microp */
1861 struct region_descriptor r_gdt, r_idt;
1862#endif
84b592ba 1863 struct globaldata *gd;
984263bc
MD
1864
1865 /*
1866 * Prevent lowering of the ipl if we call tsleep() early.
1867 */
7d0bac62 1868 gd = &CPU_prvspace[0].globaldata;
984263bc 1869
7d0bac62
MD
1870 lwkt_init_thread(&thread0, proc0paddr);
1871 gd->gd_curthread = &thread0;
8f41e33b 1872 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
7d0bac62 1873 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
7e1d4bf4 1874 proc0.p_addr = (void *)thread0.td_kstack;
b7c628e4
MD
1875 proc0.p_thread = &thread0;
1876 thread0.td_proc = &proc0;
f1d1c3fa 1877 thread0.td_flags = TDF_RUNNING;
984263bc
MD
1878
1879 atdevbase = ISA_HOLE_START + KERNBASE;
1880
1881 metadata_missing = 0;
1882 if (bootinfo.bi_modulep) {
1883 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1884 preload_bootstrap_relocate(KERNBASE);
1885 } else {
1886 metadata_missing = 1;
1887 }
1888 if (bootinfo.bi_envp)
1889 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1890
1891 /* Init basic tunables, hz etc */
1892 init_param1();
1893
1894 /*
1895 * make gdt memory segments, the code segment goes up to end of the
1896 * page with etext in it, the data segment goes to the end of
1897 * the address space
1898 */
1899 /*
1900 * XXX text protection is temporarily (?) disabled. The limit was
1901 * i386_btop(round_page(etext)) - 1.
1902 */
1903 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1904 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1905#ifdef SMP
1906 gdt_segs[GPRIV_SEL].ssd_limit =
1907 atop(sizeof(struct privatespace) - 1);
8ad65e08 1908 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1909 gdt_segs[GPROC0_SEL].ssd_base =
8ad65e08 1910 (int) &CPU_prvspace[0].globaldata.gd_common_tss;
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1911#else
1912 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
1913 gdt_segs[GPROC0_SEL].ssd_base = (int) &common_tss;
1914#endif
8ad65e08 1915 gd->gd_prvspace = &CPU_prvspace[0];
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1916 /*
1917 * Note: on both UP and SMP curthread must be set non-NULL
1918 * early in the boot sequence because the system assumes
1919 * that 'curthread' is never NULL.
1920 */
1921 /* YYY use prvspace for UP too and set here rather then later */
8ad65e08
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1922 mi_gdinit(gd, 0);
1923 cpu_gdinit(gd, 0);
984263bc
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1924
1925 for (x = 0; x < NGDT; x++) {
1926#ifdef BDE_DEBUGGER
1927 /* avoid overwriting db entries with APM ones */
1928 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1929 continue;
1930#endif
1931 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1932 }
1933
1934 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1935 r_gdt.rd_base = (int) gdt;
1936 lgdt(&r_gdt);
1937
1938 /* make ldt memory segments */
1939 /*
1940 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1941 * should be spelled ...MAX_USER...
1942 */
1943 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1944 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1945 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1946 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1947
1948 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1949 lldt(_default_ldt);
1950#ifdef USER_LDT
1951 currentldt = _default_ldt;
1952#endif
1953
1954 /* exceptions */
1955 for (x = 0; x < NIDT; x++)
1956 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1965 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1966 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1967 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1968 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1969 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1970 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1971 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1972 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1973 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1974 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1975 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1976 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1977 setidt(0x80, &IDTVEC(int0x80_syscall),
1978 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1979
1980 r_idt.rd_limit = sizeof(idt0) - 1;
1981 r_idt.rd_base = (int) idt;
1982 lidt(&r_idt);
1983
1984 /*
1985 * Initialize the console before we print anything out.
1986 */
1987 cninit();
1988
1989 if (metadata_missing)
1990 printf("WARNING: loader(8) metadata is missing!\n");
1991
1992#include "isa.h"
1993#if NISA >0
1994 isa_defaultirq();
1995#endif
1996 rand_initialize();
1997
1998#ifdef DDB
1999 kdb_init();
2000 if (boothowto & RB_KDB)
2001 Debugger("Boot flags requested debugger");
2002#endif
2003
2004 finishidentcpu(); /* Final stage of CPU initialization */
2005 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2006 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2007 initializecpu(); /* Initialize CPU registers */
2008
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2009 /*
2010 * make an initial tss so cpu can get interrupt stack on syscall!
2011 * The 16 bytes is to save room for a VM86 context.
2012 */
2013 common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
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2014 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2015 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2016 private_tss = 0;
2017 tss_gdt = &gdt[GPROC0_SEL].sd;
2018 common_tssd = *tss_gdt;
2019 common_tss.tss_ioopt = (sizeof common_tss) << 16;
2020 ltr(gsel_tss);
2021
2022 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2023 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2024 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2025 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2026 dblfault_tss.tss_cr3 = (int)IdlePTD;
2027 dblfault_tss.tss_eip = (int) dblfault_handler;
2028 dblfault_tss.tss_eflags = PSL_KERNEL;
2029 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2030 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2031 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2032 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2033 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2034
2035 vm86_initialize();
2036 getmemsize(first);
2037 init_param2(physmem);
2038
2039 /* now running on new page tables, configured,and u/iom is accessible */
2040
2041 /* Map the message buffer. */
2042 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2043 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2044
2045 msgbufinit(msgbufp, MSGBUF_SIZE);
2046
2047 /* make a call gate to reenter kernel with */
2048 gdp = &ldt[LSYS5CALLS_SEL].gd;
2049
2050 x = (int) &IDTVEC(syscall);
2051 gdp->gd_looffset = x++;
2052 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2053 gdp->gd_stkcpy = 1;
2054 gdp->gd_type = SDT_SYS386CGT;
2055 gdp->gd_dpl = SEL_UPL;
2056 gdp->gd_p = 1;
2057 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2058
2059 /* XXX does this work? */
2060 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2061 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2062
2063 /* transfer to user mode */
2064
2065 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2066 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2067
2068 /* setup proc 0's pcb */
b7c628e4
MD
2069 thread0.td_pcb->pcb_flags = 0;
2070 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
984263bc 2071#ifdef SMP
b7c628e4 2072 thread0.td_pcb->pcb_mpnest = 1;
984263bc 2073#endif
b7c628e4 2074 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2075 proc0.p_md.md_regs = &proc0_tf;
2076}
2077
8ad65e08
MD
2078/*
2079 * Initialize machine-dependant portions of the global data structure
2080 *
2081 * YYY do we need to reserve pcb space for idlethread?
2082 */
2083void
2084cpu_gdinit(struct globaldata *gd, int cpu)
2085{
2086 char *sp;
8ad65e08 2087
7d0bac62
MD
2088 TAILQ_INIT(&gd->gd_tdfreeq); /* for pmap_{new,dispose}_thread() */
2089 if (cpu)
8ad65e08
MD
2090 gd->gd_curthread = &gd->gd_idlethread;
2091 sp = gd->gd_prvspace->idlestack;
7d0bac62 2092 lwkt_init_thread(&gd->gd_idlethread, sp);
8ad65e08 2093 gd->gd_idlethread.td_switch = cpu_lwkt_switch;
7d0bac62 2094 gd->gd_idlethread.td_sp -= sizeof(void *);
8ad65e08 2095 *(void **)gd->gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2096}
2097
984263bc
MD
2098#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2099static void f00f_hack(void *unused);
2100SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2101
2102static void
2103f00f_hack(void *unused) {
2104 struct gate_descriptor *new_idt;
2105#ifndef SMP
2106 struct region_descriptor r_idt;
2107#endif
2108 vm_offset_t tmp;
2109
2110 if (!has_f00f_bug)
2111 return;
2112
2113 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2114
2115 r_idt.rd_limit = sizeof(idt0) - 1;
2116
2117 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2118 if (tmp == 0)
2119 panic("kmem_alloc returned 0");
2120 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2121 panic("kmem_alloc returned non-page-aligned memory");
2122 /* Put the first seven entries in the lower page */
2123 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2124 bcopy(idt, new_idt, sizeof(idt0));
2125 r_idt.rd_base = (int)new_idt;
2126 lidt(&r_idt);
2127 idt = new_idt;
2128 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2129 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2130 panic("vm_map_protect failed");
2131 return;
2132}
2133#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2134
2135int
2136ptrace_set_pc(p, addr)
2137 struct proc *p;
2138 unsigned long addr;
2139{
2140 p->p_md.md_regs->tf_eip = addr;
2141 return (0);
2142}
2143
2144int
2145ptrace_single_step(p)
2146 struct proc *p;
2147{
2148 p->p_md.md_regs->tf_eflags |= PSL_T;
2149 return (0);
2150}
2151
2152int ptrace_read_u_check(p, addr, len)
2153 struct proc *p;
2154 vm_offset_t addr;
2155 size_t len;
2156{
2157 vm_offset_t gap;
2158
2159 if ((vm_offset_t) (addr + len) < addr)
2160 return EPERM;
2161 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2162 return 0;
2163
2164 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2165
2166 if ((vm_offset_t) addr < gap)
2167 return EPERM;
2168 if ((vm_offset_t) (addr + len) <=
2169 (vm_offset_t) (gap + sizeof(struct trapframe)))
2170 return 0;
2171 return EPERM;
2172}
2173
2174int ptrace_write_u(p, off, data)
2175 struct proc *p;
2176 vm_offset_t off;
2177 long data;
2178{
2179 struct trapframe frame_copy;
2180 vm_offset_t min;
2181 struct trapframe *tp;
2182
2183 /*
2184 * Privileged kernel state is scattered all over the user area.
2185 * Only allow write access to parts of regs and to fpregs.
2186 */
2187 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2188 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2189 tp = p->p_md.md_regs;
2190 frame_copy = *tp;
2191 *(int *)((char *)&frame_copy + (off - min)) = data;
2192 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2193 !CS_SECURE(frame_copy.tf_cs))
2194 return (EINVAL);
2195 *(int*)((char *)p->p_addr + off) = data;
2196 return (0);
2197 }
b7c628e4
MD
2198
2199 /*
2200 * The PCB is at the end of the user area YYY
2201 */
2202 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2203 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2204 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2205 *(int*)((char *)p->p_addr + off) = data;
2206 return (0);
2207 }
2208 return (EFAULT);
2209}
2210
2211int
2212fill_regs(p, regs)
2213 struct proc *p;
2214 struct reg *regs;
2215{
2216 struct pcb *pcb;
2217 struct trapframe *tp;
2218
2219 tp = p->p_md.md_regs;
2220 regs->r_fs = tp->tf_fs;
2221 regs->r_es = tp->tf_es;
2222 regs->r_ds = tp->tf_ds;
2223 regs->r_edi = tp->tf_edi;
2224 regs->r_esi = tp->tf_esi;
2225 regs->r_ebp = tp->tf_ebp;
2226 regs->r_ebx = tp->tf_ebx;
2227 regs->r_edx = tp->tf_edx;
2228 regs->r_ecx = tp->tf_ecx;
2229 regs->r_eax = tp->tf_eax;
2230 regs->r_eip = tp->tf_eip;
2231 regs->r_cs = tp->tf_cs;
2232 regs->r_eflags = tp->tf_eflags;
2233 regs->r_esp = tp->tf_esp;
2234 regs->r_ss = tp->tf_ss;
b7c628e4 2235 pcb = p->p_thread->td_pcb;
984263bc
MD
2236 regs->r_gs = pcb->pcb_gs;
2237 return (0);
2238}
2239
2240int
2241set_regs(p, regs)
2242 struct proc *p;
2243 struct reg *regs;
2244{
2245 struct pcb *pcb;
2246 struct trapframe *tp;
2247
2248 tp = p->p_md.md_regs;
2249 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2250 !CS_SECURE(regs->r_cs))
2251 return (EINVAL);
2252 tp->tf_fs = regs->r_fs;
2253 tp->tf_es = regs->r_es;
2254 tp->tf_ds = regs->r_ds;
2255 tp->tf_edi = regs->r_edi;
2256 tp->tf_esi = regs->r_esi;
2257 tp->tf_ebp = regs->r_ebp;
2258 tp->tf_ebx = regs->r_ebx;
2259 tp->tf_edx = regs->r_edx;
2260 tp->tf_ecx = regs->r_ecx;
2261 tp->tf_eax = regs->r_eax;
2262 tp->tf_eip = regs->r_eip;
2263 tp->tf_cs = regs->r_cs;
2264 tp->tf_eflags = regs->r_eflags;
2265 tp->tf_esp = regs->r_esp;
2266 tp->tf_ss = regs->r_ss;
b7c628e4 2267 pcb = p->p_thread->td_pcb;
984263bc
MD
2268 pcb->pcb_gs = regs->r_gs;
2269 return (0);
2270}
2271
2272#ifdef CPU_ENABLE_SSE
2273static void
2274fill_fpregs_xmm(sv_xmm, sv_87)
2275 struct savexmm *sv_xmm;
2276 struct save87 *sv_87;
2277{
2278 register struct env87 *penv_87 = &sv_87->sv_env;
2279 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2280 int i;
2281
2282 /* FPU control/status */
2283 penv_87->en_cw = penv_xmm->en_cw;
2284 penv_87->en_sw = penv_xmm->en_sw;
2285 penv_87->en_tw = penv_xmm->en_tw;
2286 penv_87->en_fip = penv_xmm->en_fip;
2287 penv_87->en_fcs = penv_xmm->en_fcs;
2288 penv_87->en_opcode = penv_xmm->en_opcode;
2289 penv_87->en_foo = penv_xmm->en_foo;
2290 penv_87->en_fos = penv_xmm->en_fos;
2291
2292 /* FPU registers */
2293 for (i = 0; i < 8; ++i)
2294 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2295
2296 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2297}
2298
2299static void
2300set_fpregs_xmm(sv_87, sv_xmm)
2301 struct save87 *sv_87;
2302 struct savexmm *sv_xmm;
2303{
2304 register struct env87 *penv_87 = &sv_87->sv_env;
2305 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2306 int i;
2307
2308 /* FPU control/status */
2309 penv_xmm->en_cw = penv_87->en_cw;
2310 penv_xmm->en_sw = penv_87->en_sw;
2311 penv_xmm->en_tw = penv_87->en_tw;
2312 penv_xmm->en_fip = penv_87->en_fip;
2313 penv_xmm->en_fcs = penv_87->en_fcs;
2314 penv_xmm->en_opcode = penv_87->en_opcode;
2315 penv_xmm->en_foo = penv_87->en_foo;
2316 penv_xmm->en_fos = penv_87->en_fos;
2317
2318 /* FPU registers */
2319 for (i = 0; i < 8; ++i)
2320 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2321
2322 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2323}
2324#endif /* CPU_ENABLE_SSE */
2325
2326int
2327fill_fpregs(p, fpregs)
2328 struct proc *p;
2329 struct fpreg *fpregs;
2330{
2331#ifdef CPU_ENABLE_SSE
2332 if (cpu_fxsr) {
b7c628e4 2333 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2334 (struct save87 *)fpregs);
2335 return (0);
2336 }
2337#endif /* CPU_ENABLE_SSE */
b7c628e4 2338 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2339 return (0);
2340}
2341
2342int
2343set_fpregs(p, fpregs)
2344 struct proc *p;
2345 struct fpreg *fpregs;
2346{
2347#ifdef CPU_ENABLE_SSE
2348 if (cpu_fxsr) {
2349 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2350 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2351 return (0);
2352 }
2353#endif /* CPU_ENABLE_SSE */
b7c628e4 2354 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2355 return (0);
2356}
2357
2358int
2359fill_dbregs(p, dbregs)
2360 struct proc *p;
2361 struct dbreg *dbregs;
2362{
2363 struct pcb *pcb;
2364
2365 if (p == NULL) {
2366 dbregs->dr0 = rdr0();
2367 dbregs->dr1 = rdr1();
2368 dbregs->dr2 = rdr2();
2369 dbregs->dr3 = rdr3();
2370 dbregs->dr4 = rdr4();
2371 dbregs->dr5 = rdr5();
2372 dbregs->dr6 = rdr6();
2373 dbregs->dr7 = rdr7();
2374 }
2375 else {
b7c628e4 2376 pcb = p->p_thread->td_pcb;
984263bc
MD
2377 dbregs->dr0 = pcb->pcb_dr0;
2378 dbregs->dr1 = pcb->pcb_dr1;
2379 dbregs->dr2 = pcb->pcb_dr2;
2380 dbregs->dr3 = pcb->pcb_dr3;
2381 dbregs->dr4 = 0;
2382 dbregs->dr5 = 0;
2383 dbregs->dr6 = pcb->pcb_dr6;
2384 dbregs->dr7 = pcb->pcb_dr7;
2385 }
2386 return (0);
2387}
2388
2389int
2390set_dbregs(p, dbregs)
2391 struct proc *p;
2392 struct dbreg *dbregs;
2393{
2394 struct pcb *pcb;
2395 int i;
2396 u_int32_t mask1, mask2;
2397
2398 if (p == NULL) {
2399 load_dr0(dbregs->dr0);
2400 load_dr1(dbregs->dr1);
2401 load_dr2(dbregs->dr2);
2402 load_dr3(dbregs->dr3);
2403 load_dr4(dbregs->dr4);
2404 load_dr5(dbregs->dr5);
2405 load_dr6(dbregs->dr6);
2406 load_dr7(dbregs->dr7);
2407 }
2408 else {
2409 /*
2410 * Don't let an illegal value for dr7 get set. Specifically,
2411 * check for undefined settings. Setting these bit patterns
2412 * result in undefined behaviour and can lead to an unexpected
2413 * TRCTRAP.
2414 */
2415 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2416 i++, mask1 <<= 2, mask2 <<= 2)
2417 if ((dbregs->dr7 & mask1) == mask2)
2418 return (EINVAL);
2419
b7c628e4 2420 pcb = p->p_thread->td_pcb;
984263bc
MD
2421
2422 /*
2423 * Don't let a process set a breakpoint that is not within the
2424 * process's address space. If a process could do this, it
2425 * could halt the system by setting a breakpoint in the kernel
2426 * (if ddb was enabled). Thus, we need to check to make sure
2427 * that no breakpoints are being enabled for addresses outside
2428 * process's address space, unless, perhaps, we were called by
2429 * uid 0.
2430 *
2431 * XXX - what about when the watched area of the user's
2432 * address space is written into from within the kernel
2433 * ... wouldn't that still cause a breakpoint to be generated
2434 * from within kernel mode?
2435 */
2436
2437 if (suser(p) != 0) {
2438 if (dbregs->dr7 & 0x3) {
2439 /* dr0 is enabled */
2440 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2441 return (EINVAL);
2442 }
2443
2444 if (dbregs->dr7 & (0x3<<2)) {
2445 /* dr1 is enabled */
2446 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2447 return (EINVAL);
2448 }
2449
2450 if (dbregs->dr7 & (0x3<<4)) {
2451 /* dr2 is enabled */
2452 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2453 return (EINVAL);
2454 }
2455
2456 if (dbregs->dr7 & (0x3<<6)) {
2457 /* dr3 is enabled */
2458 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2459 return (EINVAL);
2460 }
2461 }
2462
2463 pcb->pcb_dr0 = dbregs->dr0;
2464 pcb->pcb_dr1 = dbregs->dr1;
2465 pcb->pcb_dr2 = dbregs->dr2;
2466 pcb->pcb_dr3 = dbregs->dr3;
2467 pcb->pcb_dr6 = dbregs->dr6;
2468 pcb->pcb_dr7 = dbregs->dr7;
2469
2470 pcb->pcb_flags |= PCB_DBREGS;
2471 }
2472
2473 return (0);
2474}
2475
2476/*
2477 * Return > 0 if a hardware breakpoint has been hit, and the
2478 * breakpoint was in user space. Return 0, otherwise.
2479 */
2480int
2481user_dbreg_trap(void)
2482{
2483 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2484 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2485 int nbp; /* number of breakpoints that triggered */
2486 caddr_t addr[4]; /* breakpoint addresses */
2487 int i;
2488
2489 dr7 = rdr7();
2490 if ((dr7 & 0x000000ff) == 0) {
2491 /*
2492 * all GE and LE bits in the dr7 register are zero,
2493 * thus the trap couldn't have been caused by the
2494 * hardware debug registers
2495 */
2496 return 0;
2497 }
2498
2499 nbp = 0;
2500 dr6 = rdr6();
2501 bp = dr6 & 0x0000000f;
2502
2503 if (!bp) {
2504 /*
2505 * None of the breakpoint bits are set meaning this
2506 * trap was not caused by any of the debug registers
2507 */
2508 return 0;
2509 }
2510
2511 /*
2512 * at least one of the breakpoints were hit, check to see
2513 * which ones and if any of them are user space addresses
2514 */
2515
2516 if (bp & 0x01) {
2517 addr[nbp++] = (caddr_t)rdr0();
2518 }
2519 if (bp & 0x02) {
2520 addr[nbp++] = (caddr_t)rdr1();
2521 }
2522 if (bp & 0x04) {
2523 addr[nbp++] = (caddr_t)rdr2();
2524 }
2525 if (bp & 0x08) {
2526 addr[nbp++] = (caddr_t)rdr3();
2527 }
2528
2529 for (i=0; i<nbp; i++) {
2530 if (addr[i] <
2531 (caddr_t)VM_MAXUSER_ADDRESS) {
2532 /*
2533 * addr[i] is in user space
2534 */
2535 return nbp;
2536 }
2537 }
2538
2539 /*
2540 * None of the breakpoints are in user space.
2541 */
2542 return 0;
2543}
2544
2545
2546#ifndef DDB
2547void
2548Debugger(const char *msg)
2549{
2550 printf("Debugger(\"%s\") called.\n", msg);
2551}
2552#endif /* no DDB */
2553
2554#include <sys/disklabel.h>
2555
2556/*
2557 * Determine the size of the transfer, and make sure it is
2558 * within the boundaries of the partition. Adjust transfer
2559 * if needed, and signal errors or early completion.
2560 */
2561int
2562bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2563{
2564 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2565 int labelsect = lp->d_partitions[0].p_offset;
2566 int maxsz = p->p_size,
2567 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2568
2569 /* overwriting disk label ? */
2570 /* XXX should also protect bootstrap in first 8K */
2571 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2572#if LABELSECTOR != 0
2573 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2574#endif
2575 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2576 bp->b_error = EROFS;
2577 goto bad;
2578 }
2579
2580#if defined(DOSBBSECTOR) && defined(notyet)
2581 /* overwriting master boot record? */
2582 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2583 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2584 bp->b_error = EROFS;
2585 goto bad;
2586 }
2587#endif
2588
2589 /* beyond partition? */
2590 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2591 /* if exactly at end of disk, return an EOF */
2592 if (bp->b_blkno == maxsz) {
2593 bp->b_resid = bp->b_bcount;
2594 return(0);
2595 }
2596 /* or truncate if part of it fits */
2597 sz = maxsz - bp->b_blkno;
2598 if (sz <= 0) {
2599 bp->b_error = EINVAL;
2600 goto bad;
2601 }
2602 bp->b_bcount = sz << DEV_BSHIFT;
2603 }
2604
2605 bp->b_pblkno = bp->b_blkno + p->p_offset;
2606 return(1);
2607
2608bad:
2609 bp->b_flags |= B_ERROR;
2610 return(-1);
2611}
2612
2613#ifdef DDB
2614
2615/*
2616 * Provide inb() and outb() as functions. They are normally only
2617 * available as macros calling inlined functions, thus cannot be
2618 * called inside DDB.
2619 *
2620 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2621 */
2622
2623#undef inb
2624#undef outb
2625
2626/* silence compiler warnings */
2627u_char inb(u_int);
2628void outb(u_int, u_char);
2629
2630u_char
2631inb(u_int port)
2632{
2633 u_char data;
2634 /*
2635 * We use %%dx and not %1 here because i/o is done at %dx and not at
2636 * %edx, while gcc generates inferior code (movw instead of movl)
2637 * if we tell it to load (u_short) port.
2638 */
2639 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2640 return (data);
2641}
2642
2643void
2644outb(u_int port, u_char data)
2645{
2646 u_char al;
2647 /*
2648 * Use an unnecessary assignment to help gcc's register allocator.
2649 * This make a large difference for gcc-1.40 and a tiny difference
2650 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2651 * best results. gcc-2.6.0 can't handle this.
2652 */
2653 al = data;
2654 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2655}
2656
2657#endif /* DDB */