Exhaust the virtual kernel network interface even if we cannot allocate
[dragonfly.git] / sys / platform / vkernel / i386 / cpu_regs.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (C) 1994, David Greenman
4 * Copyright (c) 1982, 1987, 1990, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
b402c633 40 * $DragonFly: src/sys/platform/vkernel/i386/cpu_regs.c,v 1.19 2007/07/02 01:37:10 dillon Exp $
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41 */
42
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_ddb.h"
49#include "opt_directio.h"
50#include "opt_inet.h"
51#include "opt_ipx.h"
52#include "opt_msgbuf.h"
53#include "opt_swap.h"
54
55#include <sys/param.h>
56#include <sys/systm.h>
57#include <sys/sysproto.h>
58#include <sys/signalvar.h>
59#include <sys/kernel.h>
60#include <sys/linker.h>
61#include <sys/malloc.h>
62#include <sys/proc.h>
63#include <sys/buf.h>
64#include <sys/reboot.h>
65#include <sys/mbuf.h>
66#include <sys/msgbuf.h>
67#include <sys/sysent.h>
68#include <sys/sysctl.h>
69#include <sys/vmmeter.h>
70#include <sys/bus.h>
71#include <sys/upcall.h>
72#include <sys/usched.h>
73#include <sys/reg.h>
74
75#include <vm/vm.h>
76#include <vm/vm_param.h>
77#include <sys/lock.h>
78#include <vm/vm_kern.h>
79#include <vm/vm_object.h>
80#include <vm/vm_page.h>
81#include <vm/vm_map.h>
82#include <vm/vm_pager.h>
83#include <vm/vm_extern.h>
84
85#include <sys/thread2.h>
86
87#include <sys/user.h>
88#include <sys/exec.h>
89#include <sys/cons.h>
90
91#include <ddb/ddb.h>
92
93#include <machine/cpu.h>
94#include <machine/clock.h>
95#include <machine/specialreg.h>
96#include <machine/md_var.h>
97#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
98#include <machine/globaldata.h> /* CPU_prvspace */
99#include <machine/smp.h>
100#ifdef PERFMON
101#include <machine/perfmon.h>
102#endif
103#include <machine/cputypes.h>
104
105#include <bus/isa/rtc.h>
106#include <machine/vm86.h>
107#include <sys/random.h>
108#include <sys/ptrace.h>
109#include <machine/sigframe.h>
b402c633 110#include <unistd.h> /* umtx_* functions */
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111
112extern void dblfault_handler (void);
113
114#ifndef CPU_DISABLE_SSE
115static void set_fpregs_xmm (struct save87 *, struct savexmm *);
116static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
117#endif /* CPU_DISABLE_SSE */
118#ifdef DIRECTIO
119extern void ffs_rawread_setup(void);
120#endif /* DIRECTIO */
121
122#ifdef SMP
123int64_t tsc_offsets[MAXCPU];
124#else
125int64_t tsc_offsets[1];
126#endif
127
128#if defined(SWTCH_OPTIM_STATS)
129extern int swtch_optim_stats;
130SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
131 CTLFLAG_RD, &swtch_optim_stats, 0, "");
132SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
133 CTLFLAG_RD, &tlb_flush_count, 0, "");
134#endif
135
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136static int
137sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
138{
71152ac6 139 int error = sysctl_handle_int(oidp, 0, ctob((int)Maxmem), req);
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140 return (error);
141}
142
143SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
144 0, 0, sysctl_hw_physmem, "IU", "");
145
146static int
147sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
148{
149 int error = sysctl_handle_int(oidp, 0,
71152ac6 150 ctob((int)Maxmem - vmstats.v_wire_count), req);
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151 return (error);
152}
153
154SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
155 0, 0, sysctl_hw_usermem, "IU", "");
156
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157SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, NULL, "");
158
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159#if 0
160
161static int
162sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
163{
164 int error;
165
166 /* Unwind the buffer, so that it's linear (possibly starting with
167 * some initial nulls).
168 */
169 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
170 msgbufp->msg_size-msgbufp->msg_bufr,req);
171 if(error) return(error);
172 if(msgbufp->msg_bufr>0) {
173 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
174 msgbufp->msg_bufr,req);
175 }
176 return(error);
177}
178
179SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
180 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
181
182static int msgbuf_clear;
183
184static int
185sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
186{
187 int error;
188 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
189 req);
190 if (!error && req->newptr) {
191 /* Clear the buffer and reset write pointer */
192 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
193 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
194 msgbuf_clear=0;
195 }
196 return (error);
197}
198
199SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
200 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
201 "Clear kernel message buffer");
202
203#endif
204
205/*
206 * Send an interrupt to process.
207 *
208 * Stack is set up to allow sigcode stored
209 * at top to call routine, followed by kcall
210 * to sigreturn routine below. After sigreturn
211 * resets the signal mask, the stack, and the
212 * frame pointer, it returns to the user
213 * specified pc, psl.
214 */
215void
216sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
217{
218 struct lwp *lp = curthread->td_lwp;
219 struct proc *p = lp->lwp_proc;
220 struct trapframe *regs;
221 struct sigacts *psp = p->p_sigacts;
222 struct sigframe sf, *sfp;
223 int oonstack;
224
225 regs = lp->lwp_md.md_regs;
226 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
227
228 /* save user context */
229 bzero(&sf, sizeof(struct sigframe));
230 sf.sf_uc.uc_sigmask = *mask;
231 sf.sf_uc.uc_stack = lp->lwp_sigstk;
232 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
4e7c41c5 233 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
6f7b98e0 234
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235 /* make the size of the saved context visible to userland */
236 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
237
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238 /* save mailbox pending state for syscall interlock semantics */
239 if (p->p_flag & P_MAILBOX)
240 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
241
242
6f7b98e0 243 /* Allocate and validate space for the signal handler context. */
08f2f1bb 244 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
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245 SIGISMEMBER(psp->ps_sigonstack, sig)) {
246 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
247 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
248 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
249 }
250 else
251 sfp = (struct sigframe *)regs->tf_esp - 1;
252
253 /* Translate the signal is appropriate */
254 if (p->p_sysent->sv_sigtbl) {
255 if (sig <= p->p_sysent->sv_sigsize)
256 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
257 }
258
259 /* Build the argument list for the signal handler. */
260 sf.sf_signum = sig;
261 sf.sf_ucontext = (register_t)&sfp->sf_uc;
262 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
263 /* Signal handler installed with SA_SIGINFO. */
264 sf.sf_siginfo = (register_t)&sfp->sf_si;
265 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
266
267 /* fill siginfo structure */
268 sf.sf_si.si_signo = sig;
269 sf.sf_si.si_code = code;
270 sf.sf_si.si_addr = (void*)regs->tf_err;
271 }
272 else {
273 /* Old FreeBSD-style arguments. */
274 sf.sf_siginfo = code;
275 sf.sf_addr = regs->tf_err;
276 sf.sf_ahu.sf_handler = catcher;
277 }
278
279#if 0
280 /*
281 * If we're a vm86 process, we want to save the segment registers.
282 * We also change eflags to be our emulated eflags, not the actual
283 * eflags.
284 */
285 if (regs->tf_eflags & PSL_VM) {
286 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
287 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
288
289 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
290 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
291 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
292 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
293
294 if (vm86->vm86_has_vme == 0)
295 sf.sf_uc.uc_mcontext.mc_eflags =
296 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
297 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
298
299 /*
300 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
301 * syscalls made by the signal handler. This just avoids
302 * wasting time for our lazy fixup of such faults. PSL_NT
303 * does nothing in vm86 mode, but vm86 programs can set it
304 * almost legitimately in probes for old cpu types.
305 */
306 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
307 }
308#endif
309
310 /*
311 * Copy the sigframe out to the user's stack.
312 */
313 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
314 /*
315 * Something is wrong with the stack pointer.
316 * ...Kill the process.
317 */
318 sigexit(p, SIGILL);
319 }
320
321 regs->tf_esp = (int)sfp;
322 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
323 regs->tf_eflags &= ~PSL_T;
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324 regs->tf_cs = _ucodesel;
325 regs->tf_ds = _udatasel;
326 regs->tf_es = _udatasel;
327 if (regs->tf_trapno == T_PROTFLT) {
328 regs->tf_fs = _udatasel;
329 regs->tf_gs = _udatasel;
330 }
331 regs->tf_ss = _udatasel;
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332}
333
334/*
335 * Sanitize the trapframe for a virtual kernel passing control to a custom
336 * VM context.
337 *
338 * Allow userland to set or maintain PSL_RF, the resume flag. This flag
339 * basically controls whether the return PC should skip the first instruction
340 * (as in an explicit system call) or re-execute it (as in an exception).
341 */
342int
343cpu_sanitize_frame(struct trapframe *frame)
344{
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345 frame->tf_cs = _ucodesel;
346 frame->tf_ds = _udatasel;
347 frame->tf_es = _udatasel;
348#if 0
349 frame->tf_fs = _udatasel;
350 frame->tf_gs = _udatasel;
351#endif
352 frame->tf_ss = _udatasel;
353 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
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354 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
355 return(0);
356}
357
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358int
359cpu_sanitize_tls(struct savetls *tls)
360{
361 struct segment_descriptor *desc;
362 int i;
363
364 for (i = 0; i < NGTLS; ++i) {
365 desc = &tls->tls[i];
366 if (desc->sd_dpl == 0 && desc->sd_type == 0)
367 continue;
368 if (desc->sd_def32 == 0)
369 return(ENXIO);
370 if (desc->sd_type != SDT_MEMRWA)
371 return(ENXIO);
372 if (desc->sd_dpl != SEL_UPL)
373 return(ENXIO);
374 if (desc->sd_xx != 0 || desc->sd_p != 1)
375 return(ENXIO);
376 }
377 return(0);
378}
379
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380/*
381 * sigreturn(ucontext_t *sigcntxp)
382 *
383 * System call to cleanup state after a signal
384 * has been taken. Reset signal mask and
385 * stack state from context left by sendsig (above).
386 * Return to previous pc and psl as specified by
387 * context left by sendsig. Check carefully to
388 * make sure that the user has not modified the
389 * state to gain improper privileges.
390 */
391#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
392#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
393
394int
395sys_sigreturn(struct sigreturn_args *uap)
396{
397 struct lwp *lp = curthread->td_lwp;
4b486183 398 struct proc *p = lp->lwp_proc;
6f7b98e0 399 struct trapframe *regs;
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400 ucontext_t ucp;
401 int cs;
402 int eflags;
403 int error;
6f7b98e0 404
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405 error = copyin(uap->sigcntxp, &ucp, sizeof(ucp));
406 if (error)
407 return (error);
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408
409 regs = lp->lwp_md.md_regs;
aaf8b91f 410 eflags = ucp.uc_mcontext.mc_eflags;
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411
412#if 0
413 if (eflags & PSL_VM) {
414 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
415 struct vm86_kernel *vm86;
416
417 /*
418 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
419 * set up the vm86 area, and we can't enter vm86 mode.
420 */
421 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
422 return (EINVAL);
423 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
424 if (vm86->vm86_inited == 0)
425 return (EINVAL);
426
427 /* go back to user mode if both flags are set */
428 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
429 trapsignal(lp->lwp_proc, SIGBUS, 0);
430
431 if (vm86->vm86_has_vme) {
432 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
433 (eflags & VME_USERCHANGE) | PSL_VM;
434 } else {
435 vm86->vm86_eflags = eflags; /* save VIF, VIP */
436 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
437 }
aaf8b91f 438 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
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439 tf->tf_eflags = eflags;
440 tf->tf_vm86_ds = tf->tf_ds;
441 tf->tf_vm86_es = tf->tf_es;
442 tf->tf_vm86_fs = tf->tf_fs;
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443 tf->tf_vm86_gs = tf->tf_gs;
444 tf->tf_ds = _udatasel;
445 tf->tf_es = _udatasel;
446#if 0
447 tf->tf_fs = _udatasel;
448 tf->tf_gs = _udatasel;
449#endif
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450 } else
451#endif
452 {
453 /*
454 * Don't allow users to change privileged or reserved flags.
455 */
456 /*
457 * XXX do allow users to change the privileged flag PSL_RF.
458 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
459 * should sometimes set it there too. tf_eflags is kept in
460 * the signal context during signal handling and there is no
461 * other place to remember it, so the PSL_RF bit may be
462 * corrupted by the signal handler without us knowing.
463 * Corruption of the PSL_RF bit at worst causes one more or
464 * one less debugger trap, so allowing it is fairly harmless.
465 */
466 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
467 kprintf("sigreturn: eflags = 0x%x\n", eflags);
468 return(EINVAL);
469 }
470
471 /*
472 * Don't allow users to load a valid privileged %cs. Let the
473 * hardware check for invalid selectors, excess privilege in
474 * other selectors, invalid %eip's and invalid %esp's.
475 */
aaf8b91f 476 cs = ucp.uc_mcontext.mc_cs;
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477 if (!CS_SECURE(cs)) {
478 kprintf("sigreturn: cs = 0x%x\n", cs);
08f2f1bb 479 trapsignal(lp, SIGBUS, T_PROTFLT);
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480 return(EINVAL);
481 }
aaf8b91f 482 bcopy(&ucp.uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
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483 }
484
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485 /*
486 * Merge saved signal mailbox pending flag to maintain interlock
487 * semantics against system calls.
488 */
489 if (ucp.uc_mcontext.mc_xflags & PGEX_MAILBOX)
490 p->p_flag |= P_MAILBOX;
491
aaf8b91f 492 if (ucp.uc_mcontext.mc_onstack & 1)
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493 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
494 else
495 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
496
aaf8b91f 497 lp->lwp_sigmask = ucp.uc_sigmask;
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498 SIG_CANTMASK(lp->lwp_sigmask);
499 return(EJUSTRETURN);
500}
501
502/*
503 * Stack frame on entry to function. %eax will contain the function vector,
504 * %ecx will contain the function data. flags, ecx, and eax will have
505 * already been pushed on the stack.
506 */
507struct upc_frame {
508 register_t eax;
509 register_t ecx;
510 register_t edx;
511 register_t flags;
512 register_t oldip;
513};
514
515void
516sendupcall(struct vmupcall *vu, int morepending)
517{
518 struct lwp *lp = curthread->td_lwp;
519 struct trapframe *regs;
520 struct upcall upcall;
521 struct upc_frame upc_frame;
522 int crit_count = 0;
523
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524 /*
525 * If we are a virtual kernel running an emulated user process
526 * context, switch back to the virtual kernel context before
527 * trying to post the signal.
528 */
39005e16 529 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
1fdc022f 530 lp->lwp_md.md_regs->tf_trapno = 0;
287ebb09 531 vkernel_trap(lp, lp->lwp_md.md_regs);
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532 }
533
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534 /*
535 * Get the upcall data structure
536 */
537 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
538 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
539 ) {
540 vu->vu_pending = 0;
541 kprintf("bad upcall address\n");
542 return;
543 }
544
545 /*
546 * If the data structure is already marked pending or has a critical
547 * section count, mark the data structure as pending and return
548 * without doing an upcall. vu_pending is left set.
549 */
550 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
551 if (upcall.upc_pending < vu->vu_pending) {
552 upcall.upc_pending = vu->vu_pending;
553 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
554 sizeof(upcall.upc_pending));
555 }
556 return;
557 }
558
559 /*
560 * We can run this upcall now, clear vu_pending.
561 *
562 * Bump our critical section count and set or clear the
563 * user pending flag depending on whether more upcalls are
564 * pending. The user will be responsible for calling
565 * upc_dispatch(-1) to process remaining upcalls.
566 */
567 vu->vu_pending = 0;
568 upcall.upc_pending = morepending;
569 crit_count += TDPRI_CRIT;
570 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
571 sizeof(upcall.upc_pending));
572 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
573 sizeof(int));
574
575 /*
576 * Construct a stack frame and issue the upcall
577 */
578 regs = lp->lwp_md.md_regs;
579 upc_frame.eax = regs->tf_eax;
580 upc_frame.ecx = regs->tf_ecx;
581 upc_frame.edx = regs->tf_edx;
582 upc_frame.flags = regs->tf_eflags;
583 upc_frame.oldip = regs->tf_eip;
584 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
585 sizeof(upc_frame)) != 0) {
586 kprintf("bad stack on upcall\n");
587 } else {
588 regs->tf_eax = (register_t)vu->vu_func;
589 regs->tf_ecx = (register_t)vu->vu_data;
590 regs->tf_edx = (register_t)lp->lwp_upcall;
591 regs->tf_eip = (register_t)vu->vu_ctx;
592 regs->tf_esp -= sizeof(upc_frame);
593 }
594}
595
596/*
597 * fetchupcall occurs in the context of a system call, which means that
598 * we have to return EJUSTRETURN in order to prevent eax and edx from
599 * being overwritten by the syscall return value.
600 *
601 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
602 * and the function pointer in %eax.
603 */
604int
605fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
606{
607 struct upc_frame upc_frame;
608 struct lwp *lp = curthread->td_lwp;
609 struct trapframe *regs;
610 int error;
611 struct upcall upcall;
612 int crit_count;
613
614 regs = lp->lwp_md.md_regs;
615
616 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
617 if (error == 0) {
618 if (vu) {
619 /*
620 * This jumps us to the next ready context.
621 */
622 vu->vu_pending = 0;
623 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
624 crit_count = 0;
625 if (error == 0)
626 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
627 crit_count += TDPRI_CRIT;
628 if (error == 0)
629 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
630 regs->tf_eax = (register_t)vu->vu_func;
631 regs->tf_ecx = (register_t)vu->vu_data;
632 regs->tf_edx = (register_t)lp->lwp_upcall;
633 regs->tf_eip = (register_t)vu->vu_ctx;
634 regs->tf_esp = (register_t)rsp;
635 } else {
636 /*
637 * This returns us to the originally interrupted code.
638 */
639 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
640 regs->tf_eax = upc_frame.eax;
641 regs->tf_ecx = upc_frame.ecx;
642 regs->tf_edx = upc_frame.edx;
643 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
644 (upc_frame.flags & PSL_USERCHANGE);
645 regs->tf_eip = upc_frame.oldip;
646 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
647 }
648 }
649 if (error == 0)
650 error = EJUSTRETURN;
651 return(error);
652}
653
654/*
655 * cpu_idle() represents the idle LWKT. You cannot return from this function
656 * (unless you want to blow things up!). Instead we look for runnable threads
657 * and loop or halt as appropriate. Giant is not held on entry to the thread.
658 *
659 * The main loop is entered with a critical section held, we must release
660 * the critical section before doing anything else. lwkt_switch() will
661 * check for pending interrupts due to entering and exiting its own
662 * critical section.
663 *
664 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
665 * to wake a HLTed cpu up. However, there are cases where the idlethread
666 * will be entered with the possibility that no IPI will occur and in such
667 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
668 */
669static int cpu_idle_hlt = 1;
670static int cpu_idle_hltcnt;
671static int cpu_idle_spincnt;
672SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
673 &cpu_idle_hlt, 0, "Idle loop HLT enable");
674SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
675 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
676SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
677 &cpu_idle_spincnt, 0, "Idle loop entry spins");
678
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679void
680cpu_idle(void)
681{
682 struct thread *td = curthread;
b402c633 683 struct mdglobaldata *gd = mdcpu;
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684
685 crit_exit();
686 KKASSERT(td->td_pri < TDPRI_CRIT);
687 for (;;) {
688 /*
689 * See if there are any LWKTs ready to go.
690 */
691 lwkt_switch();
692
693 /*
b402c633
MD
694 * The idle loop halts only if no threads are scheduleable
695 * and no signals have occured.
6f7b98e0
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696 */
697 if (cpu_idle_hlt && !lwkt_runnable() &&
698 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
6f7b98e0 699 splz();
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MD
700 if (!lwkt_runnable())
701 umtx_sleep(&gd->mi.gd_runqmask, 0, 0);
6f7b98e0 702#ifdef SMP
4e7c41c5 703 else {
6f7b98e0 704 __asm __volatile("pause");
4e7c41c5 705 }
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MD
706#endif
707 ++cpu_idle_hltcnt;
708 } else {
709 td->td_flags &= ~TDF_IDLE_NOHLT;
710 splz();
711#ifdef SMP
712 /*__asm __volatile("sti; pause");*/
713 __asm __volatile("pause");
714#else
715 /*__asm __volatile("sti");*/
716#endif
717 ++cpu_idle_spincnt;
718 }
719 }
720}
721
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722#ifdef SMP
723
724/*
725 * Called by the LWKT switch core with a critical section held if the only
726 * schedulable thread needs the MP lock and we couldn't get it. On
727 * a real cpu we just spin in the scheduler. In the virtual kernel
728 * we sleep for a bit.
729 */
730void
731cpu_mplock_contested(void)
732{
733 usleep(1000);
734}
735
736#endif
737
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738/*
739 * Clear registers on exec
740 */
741void
08f2f1bb 742exec_setregs(u_long entry, u_long stack, u_long ps_strings)
6f7b98e0 743{
08f2f1bb
SS
744 struct thread *td = curthread;
745 struct lwp *lp = td->td_lwp;
6f7b98e0
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746 struct trapframe *regs = lp->lwp_md.md_regs;
747 struct pcb *pcb = lp->lwp_thread->td_pcb;
748
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749 /* was i386_user_cleanup() in NetBSD */
750 user_ldt_free(pcb);
751
752 bzero((char *)regs, sizeof(struct trapframe));
753 regs->tf_eip = entry;
754 regs->tf_esp = stack;
755 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
756 regs->tf_ss = 0;
757 regs->tf_ds = 0;
758 regs->tf_es = 0;
759 regs->tf_fs = 0;
4e7c41c5 760 regs->tf_gs = 0;
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761 regs->tf_cs = 0;
762
763 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
764 regs->tf_ebx = ps_strings;
765
766 /*
767 * Reset the hardware debug registers if they were in use.
768 * They won't have any meaning for the newly exec'd process.
769 */
770 if (pcb->pcb_flags & PCB_DBREGS) {
771 pcb->pcb_dr0 = 0;
772 pcb->pcb_dr1 = 0;
773 pcb->pcb_dr2 = 0;
774 pcb->pcb_dr3 = 0;
775 pcb->pcb_dr6 = 0;
776 pcb->pcb_dr7 = 0;
08f2f1bb 777 if (pcb == td->td_pcb) {
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778 /*
779 * Clear the debug registers on the running
780 * CPU, otherwise they will end up affecting
781 * the next process we switch to.
782 */
783 reset_dbregs();
784 }
785 pcb->pcb_flags &= ~PCB_DBREGS;
786 }
787
788 /*
789 * Initialize the math emulator (if any) for the current process.
790 * Actually, just clear the bit that says that the emulator has
791 * been initialized. Initialization is delayed until the process
792 * traps to the emulator (if it is done at all) mainly because
793 * emulators don't provide an entry point for initialization.
794 */
08f2f1bb 795 pcb->pcb_flags &= ~FP_SOFTFP;
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796
797 /*
798 * note: do not set CR0_TS here. npxinit() must do it after clearing
799 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
800 * in npxdna().
801 */
802 crit_enter();
803#if 0
804 load_cr0(rcr0() | CR0_MP);
805#endif
806
807#if NNPX > 0
808 /* Initialize the npx (if any) for the current process. */
809 npxinit(__INITIAL_NPXCW__);
810#endif
811 crit_exit();
812
813 /*
814 * note: linux emulator needs edx to be 0x0 on entry, which is
815 * handled in execve simply by setting the 64 bit syscall
816 * return value to 0.
817 */
818}
819
820void
821cpu_setregs(void)
822{
823#if 0
824 unsigned int cr0;
825
826 cr0 = rcr0();
827 cr0 |= CR0_NE; /* Done by npxinit() */
828 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
829#ifdef I386_CPU
830 if (cpu_class != CPUCLASS_386)
831#endif
832 cr0 |= CR0_WP | CR0_AM;
833 load_cr0(cr0);
834 load_gs(_udatasel);
835#endif
836}
837
838static int
839sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
840{
841 int error;
842 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
843 req);
844 if (!error && req->newptr)
845 resettodr();
846 return (error);
847}
848
849SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
850 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
851
852extern u_long bootdev; /* not a cdev_t - encoding is different */
853SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
854 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
855
856/*
857 * Initialize 386 and configure to run kernel
858 */
859
860/*
861 * Initialize segments & interrupt table
862 */
863
864extern struct user *proc0paddr;
865
866#if 0
867
868extern inthand_t
869 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
870 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
871 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
872 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
873 IDTVEC(xmm), IDTVEC(syscall),
874 IDTVEC(rsvd0);
875extern inthand_t
876 IDTVEC(int0x80_syscall);
877
878#endif
879
880#ifdef DEBUG_INTERRUPTS
881extern inthand_t *Xrsvdary[256];
882#endif
883
884int
08f2f1bb 885ptrace_set_pc(struct lwp *lp, unsigned long addr)
6f7b98e0 886{
08f2f1bb 887 lp->lwp_md.md_regs->tf_eip = addr;
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888 return (0);
889}
890
891int
892ptrace_single_step(struct lwp *lp)
893{
894 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
895 return (0);
896}
897
898int
899fill_regs(struct lwp *lp, struct reg *regs)
900{
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901 struct trapframe *tp;
902
903 tp = lp->lwp_md.md_regs;
4e7c41c5 904 regs->r_gs = tp->tf_gs;
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905 regs->r_fs = tp->tf_fs;
906 regs->r_es = tp->tf_es;
907 regs->r_ds = tp->tf_ds;
908 regs->r_edi = tp->tf_edi;
909 regs->r_esi = tp->tf_esi;
910 regs->r_ebp = tp->tf_ebp;
911 regs->r_ebx = tp->tf_ebx;
912 regs->r_edx = tp->tf_edx;
913 regs->r_ecx = tp->tf_ecx;
914 regs->r_eax = tp->tf_eax;
915 regs->r_eip = tp->tf_eip;
916 regs->r_cs = tp->tf_cs;
917 regs->r_eflags = tp->tf_eflags;
918 regs->r_esp = tp->tf_esp;
919 regs->r_ss = tp->tf_ss;
6f7b98e0
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920 return (0);
921}
922
923int
924set_regs(struct lwp *lp, struct reg *regs)
925{
6f7b98e0
MD
926 struct trapframe *tp;
927
928 tp = lp->lwp_md.md_regs;
929 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
930 !CS_SECURE(regs->r_cs))
931 return (EINVAL);
4e7c41c5 932 tp->tf_gs = regs->r_gs;
6f7b98e0
MD
933 tp->tf_fs = regs->r_fs;
934 tp->tf_es = regs->r_es;
935 tp->tf_ds = regs->r_ds;
936 tp->tf_edi = regs->r_edi;
937 tp->tf_esi = regs->r_esi;
938 tp->tf_ebp = regs->r_ebp;
939 tp->tf_ebx = regs->r_ebx;
940 tp->tf_edx = regs->r_edx;
941 tp->tf_ecx = regs->r_ecx;
942 tp->tf_eax = regs->r_eax;
943 tp->tf_eip = regs->r_eip;
944 tp->tf_cs = regs->r_cs;
945 tp->tf_eflags = regs->r_eflags;
946 tp->tf_esp = regs->r_esp;
947 tp->tf_ss = regs->r_ss;
6f7b98e0
MD
948 return (0);
949}
950
951#ifndef CPU_DISABLE_SSE
952static void
953fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
954{
955 struct env87 *penv_87 = &sv_87->sv_env;
956 struct envxmm *penv_xmm = &sv_xmm->sv_env;
957 int i;
958
959 /* FPU control/status */
960 penv_87->en_cw = penv_xmm->en_cw;
961 penv_87->en_sw = penv_xmm->en_sw;
962 penv_87->en_tw = penv_xmm->en_tw;
963 penv_87->en_fip = penv_xmm->en_fip;
964 penv_87->en_fcs = penv_xmm->en_fcs;
965 penv_87->en_opcode = penv_xmm->en_opcode;
966 penv_87->en_foo = penv_xmm->en_foo;
967 penv_87->en_fos = penv_xmm->en_fos;
968
969 /* FPU registers */
970 for (i = 0; i < 8; ++i)
971 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
972
973 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
974}
975
976static void
977set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
978{
979 struct env87 *penv_87 = &sv_87->sv_env;
980 struct envxmm *penv_xmm = &sv_xmm->sv_env;
981 int i;
982
983 /* FPU control/status */
984 penv_xmm->en_cw = penv_87->en_cw;
985 penv_xmm->en_sw = penv_87->en_sw;
986 penv_xmm->en_tw = penv_87->en_tw;
987 penv_xmm->en_fip = penv_87->en_fip;
988 penv_xmm->en_fcs = penv_87->en_fcs;
989 penv_xmm->en_opcode = penv_87->en_opcode;
990 penv_xmm->en_foo = penv_87->en_foo;
991 penv_xmm->en_fos = penv_87->en_fos;
992
993 /* FPU registers */
994 for (i = 0; i < 8; ++i)
995 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
996
997 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
998}
999#endif /* CPU_DISABLE_SSE */
1000
1001int
1002fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
1003{
1004#ifndef CPU_DISABLE_SSE
1005 if (cpu_fxsr) {
1006 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
1007 (struct save87 *)fpregs);
1008 return (0);
1009 }
1010#endif /* CPU_DISABLE_SSE */
1011 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
1012 return (0);
1013}
1014
1015int
1016set_fpregs(struct lwp *lp, struct fpreg *fpregs)
1017{
1018#ifndef CPU_DISABLE_SSE
1019 if (cpu_fxsr) {
1020 set_fpregs_xmm((struct save87 *)fpregs,
1021 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
1022 return (0);
1023 }
1024#endif /* CPU_DISABLE_SSE */
1025 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
1026 return (0);
1027}
1028
1029int
1030fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
1031{
1032 if (lp == NULL) {
1033 dbregs->dr0 = rdr0();
1034 dbregs->dr1 = rdr1();
1035 dbregs->dr2 = rdr2();
1036 dbregs->dr3 = rdr3();
1037 dbregs->dr4 = rdr4();
1038 dbregs->dr5 = rdr5();
1039 dbregs->dr6 = rdr6();
1040 dbregs->dr7 = rdr7();
1041 } else {
1042 struct pcb *pcb;
1043
1044 pcb = lp->lwp_thread->td_pcb;
1045 dbregs->dr0 = pcb->pcb_dr0;
1046 dbregs->dr1 = pcb->pcb_dr1;
1047 dbregs->dr2 = pcb->pcb_dr2;
1048 dbregs->dr3 = pcb->pcb_dr3;
1049 dbregs->dr4 = 0;
1050 dbregs->dr5 = 0;
1051 dbregs->dr6 = pcb->pcb_dr6;
1052 dbregs->dr7 = pcb->pcb_dr7;
1053 }
1054 return (0);
1055}
1056
1057int
1058set_dbregs(struct lwp *lp, struct dbreg *dbregs)
1059{
1060 if (lp == NULL) {
1061 load_dr0(dbregs->dr0);
1062 load_dr1(dbregs->dr1);
1063 load_dr2(dbregs->dr2);
1064 load_dr3(dbregs->dr3);
1065 load_dr4(dbregs->dr4);
1066 load_dr5(dbregs->dr5);
1067 load_dr6(dbregs->dr6);
1068 load_dr7(dbregs->dr7);
1069 } else {
1070 struct pcb *pcb;
1071 struct ucred *ucred;
1072 int i;
1073 uint32_t mask1, mask2;
1074
1075 /*
1076 * Don't let an illegal value for dr7 get set. Specifically,
1077 * check for undefined settings. Setting these bit patterns
1078 * result in undefined behaviour and can lead to an unexpected
1079 * TRCTRAP.
1080 */
1081 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
1082 i++, mask1 <<= 2, mask2 <<= 2)
1083 if ((dbregs->dr7 & mask1) == mask2)
1084 return (EINVAL);
1085
1086 pcb = lp->lwp_thread->td_pcb;
1087 ucred = lp->lwp_proc->p_ucred;
1088
1089 /*
1090 * Don't let a process set a breakpoint that is not within the
1091 * process's address space. If a process could do this, it
1092 * could halt the system by setting a breakpoint in the kernel
1093 * (if ddb was enabled). Thus, we need to check to make sure
1094 * that no breakpoints are being enabled for addresses outside
1095 * process's address space, unless, perhaps, we were called by
1096 * uid 0.
1097 *
1098 * XXX - what about when the watched area of the user's
1099 * address space is written into from within the kernel
1100 * ... wouldn't that still cause a breakpoint to be generated
1101 * from within kernel mode?
1102 */
1103
1104 if (suser_cred(ucred, 0) != 0) {
1105 if (dbregs->dr7 & 0x3) {
1106 /* dr0 is enabled */
1107 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
1108 return (EINVAL);
1109 }
1110
1111 if (dbregs->dr7 & (0x3<<2)) {
1112 /* dr1 is enabled */
1113 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
1114 return (EINVAL);
1115 }
1116
1117 if (dbregs->dr7 & (0x3<<4)) {
1118 /* dr2 is enabled */
1119 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
1120 return (EINVAL);
1121 }
1122
1123 if (dbregs->dr7 & (0x3<<6)) {
1124 /* dr3 is enabled */
1125 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
1126 return (EINVAL);
1127 }
1128 }
1129
1130 pcb->pcb_dr0 = dbregs->dr0;
1131 pcb->pcb_dr1 = dbregs->dr1;
1132 pcb->pcb_dr2 = dbregs->dr2;
1133 pcb->pcb_dr3 = dbregs->dr3;
1134 pcb->pcb_dr6 = dbregs->dr6;
1135 pcb->pcb_dr7 = dbregs->dr7;
1136
1137 pcb->pcb_flags |= PCB_DBREGS;
1138 }
1139
1140 return (0);
1141}
1142
1143#if 0
1144/*
1145 * Return > 0 if a hardware breakpoint has been hit, and the
1146 * breakpoint was in user space. Return 0, otherwise.
1147 */
1148int
1149user_dbreg_trap(void)
1150{
1151 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
1152 u_int32_t bp; /* breakpoint bits extracted from dr6 */
1153 int nbp; /* number of breakpoints that triggered */
1154 caddr_t addr[4]; /* breakpoint addresses */
1155 int i;
1156
1157 dr7 = rdr7();
1158 if ((dr7 & 0x000000ff) == 0) {
1159 /*
1160 * all GE and LE bits in the dr7 register are zero,
1161 * thus the trap couldn't have been caused by the
1162 * hardware debug registers
1163 */
1164 return 0;
1165 }
1166
1167 nbp = 0;
1168 dr6 = rdr6();
1169 bp = dr6 & 0x0000000f;
1170
1171 if (!bp) {
1172 /*
1173 * None of the breakpoint bits are set meaning this
1174 * trap was not caused by any of the debug registers
1175 */
1176 return 0;
1177 }
1178
1179 /*
1180 * at least one of the breakpoints were hit, check to see
1181 * which ones and if any of them are user space addresses
1182 */
1183
1184 if (bp & 0x01) {
1185 addr[nbp++] = (caddr_t)rdr0();
1186 }
1187 if (bp & 0x02) {
1188 addr[nbp++] = (caddr_t)rdr1();
1189 }
1190 if (bp & 0x04) {
1191 addr[nbp++] = (caddr_t)rdr2();
1192 }
1193 if (bp & 0x08) {
1194 addr[nbp++] = (caddr_t)rdr3();
1195 }
1196
1197 for (i=0; i<nbp; i++) {
1198 if (addr[i] <
1199 (caddr_t)VM_MAX_USER_ADDRESS) {
1200 /*
1201 * addr[i] is in user space
1202 */
1203 return nbp;
1204 }
1205 }
1206
1207 /*
1208 * None of the breakpoints are in user space.
1209 */
1210 return 0;
1211}
1212
1213#endif
1214
1215
1216#ifndef DDB
1217void
1218Debugger(const char *msg)
1219{
1220 kprintf("Debugger(\"%s\") called.\n", msg);
1221}
1222#endif /* no DDB */
1223