Let the system deal with device shutdown, don't do it yourself.
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
17ffebb4 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.24 2005/06/06 16:16:13 joerg Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
103#include <machine/clock.h> /* for DELAY */
104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
317 struct an_ltv_ssidlist ssid;
318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
323 if (error != 0)
324 return (0);
325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
328 return(0);
329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
342 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
343 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
344
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345 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
346 device_get_unit(dev));
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347 an_reset(sc);
348 /* No need for an_init_mpi350_desc since it will be done in attach */
349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
351 return(0);
352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
354 return(0);
355
356 /* See if the ssid matches what we expect ... but doesn't have to */
357 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
358 return(0);
359
360 return(AN_IOSIZ);
361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
c45c9d6a 472 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
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473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 477 BUS_DMA_WAITOK, &dma->an_dma_map);
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478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
c45c9d6a 485 mapflags);
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486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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591 if_printf(&sc->arpcom.ac_if,
592 "failed to allocate RX descriptor\n");
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593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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620 if_printf(&sc->arpcom.ac_if,
621 "failed to allocate TX descriptor\n");
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622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
650 if_printf(&sc->arpcom.ac_if,
651 "failed to allocate host descriptor\n");
984263bc
MD
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
1c70eebf 669an_attach(sc, dev, flags)
984263bc 670 struct an_softc *sc;
1c70eebf 671 device_t dev;
984263bc
MD
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
984263bc
MD
678 sc->an_associated = 0;
679 sc->an_monitor = 0;
680 sc->an_was_monitor = 0;
681 sc->an_flash_buffer = NULL;
682
1c70eebf
JS
683 ifp->if_softc = sc;
684 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
685
984263bc
MD
686 /* Reset the NIC. */
687 an_reset(sc);
688 if (sc->mpi350) {
689 error = an_init_mpi350_desc(sc);
690 if (error)
691 return(error);
692 }
693
694 /* Load factory config */
695 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 696 device_printf(dev, "failed to load config data\n");
984263bc
MD
697 return(EIO);
698 }
699
700 /* Read the current configuration */
701 sc->an_config.an_type = AN_RID_GENCONFIG;
702 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
703 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 704 device_printf(dev, "read record failed\n");
984263bc
MD
705 return(EIO);
706 }
707
708 /* Read the card capabilities */
709 sc->an_caps.an_type = AN_RID_CAPABILITIES;
710 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
711 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 712 device_printf(dev, "read record failed\n");
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MD
713 return(EIO);
714 }
715
716 /* Read ssid list */
717 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
718 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
719 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 720 device_printf(dev, "read record failed\n");
984263bc
MD
721 return(EIO);
722 }
723
724 /* Read AP list */
725 sc->an_aplist.an_type = AN_RID_APLIST;
726 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
727 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 728 device_printf(dev, "read record failed\n");
984263bc
MD
729 return(EIO);
730 }
731
732#ifdef ANCACHE
733 /* Read the RSSI <-> dBm map */
734 sc->an_have_rssimap = 0;
735 if (sc->an_caps.an_softcaps & 8) {
736 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
737 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
738 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 739 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 740 } else {
1c70eebf 741 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
742 sc->an_have_rssimap = 1;
743 }
744 } else {
1c70eebf 745 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
746 }
747#endif
748
984263bc
MD
749 ifp->if_mtu = ETHERMTU;
750 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
751 ifp->if_ioctl = an_ioctl;
984263bc
MD
752 ifp->if_start = an_start;
753 ifp->if_watchdog = an_watchdog;
754 ifp->if_init = an_init;
755 ifp->if_baudrate = 10000000;
38de8487
JS
756 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
757 ifq_set_ready(&ifp->if_snd);
984263bc
MD
758
759 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
760 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
761 sizeof(AN_DEFAULT_NODENAME) - 1);
762
763 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
764 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
765 sizeof(AN_DEFAULT_NETNAME) - 1);
766 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
767
768 sc->an_config.an_opmode =
769 AN_OPMODE_INFRASTRUCTURE_STATION;
770
771 sc->an_tx_rate = 0;
772 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
773
774 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
775#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
776 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
777 IFM_IEEE80211_ADHOC, 0), 0);
778 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
780 IFM_IEEE80211_ADHOC, 0), 0);
781 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
782 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
784 IFM_IEEE80211_ADHOC, 0), 0);
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
786 }
787 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
788 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
789 IFM_IEEE80211_ADHOC, 0), 0);
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
791 }
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
793 IFM_IEEE80211_ADHOC, 0), 0);
794 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
795#undef ADD
796 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
797 0, 0));
798
799 /*
800 * Call MI attach routine.
801 */
0a8b5977 802 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
MD
803
804 return(0);
805}
806
807static void
808an_rxeof(sc)
809 struct an_softc *sc;
810{
811 struct ifnet *ifp;
812 struct ether_header *eh;
813 struct ieee80211_frame *ih;
814 struct an_rxframe rx_frame;
815 struct an_rxframe_802_3 rx_frame_802_3;
816 struct mbuf *m;
817 int len, id, error = 0, i, count = 0;
818 int ieee80211_header_len;
819 u_char *bpf_buf;
820 u_short fc1;
821 struct an_card_rx_desc an_rx_desc;
822 u_int8_t *buf;
823
824 ifp = &sc->arpcom.ac_if;
825
826 if (!sc->mpi350) {
827 id = CSR_READ_2(sc, AN_RX_FID);
828
829 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
830 /* read raw 802.11 packet */
831 bpf_buf = sc->buf_802_11;
832
833 /* read header */
834 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
835 sizeof(rx_frame))) {
836 ifp->if_ierrors++;
837 return;
838 }
839
840 /*
841 * skip beacon by default since this increases the
842 * system load a lot
843 */
844
845 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
846 (rx_frame.an_frame_ctl &
847 IEEE80211_FC0_SUBTYPE_BEACON)) {
848 return;
849 }
850
851 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
852 len = rx_frame.an_rx_payload_len
853 + sizeof(rx_frame);
854 /* Check for insane frame length */
855 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
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856 if_printf(ifp,
857 "oversized packet received "
858 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
859 ifp->if_ierrors++;
860 return;
861 }
862
863 bcopy((char *)&rx_frame,
864 bpf_buf, sizeof(rx_frame));
865
866 error = an_read_data(sc, id, sizeof(rx_frame),
867 (caddr_t)bpf_buf+sizeof(rx_frame),
868 rx_frame.an_rx_payload_len);
869 } else {
870 fc1=rx_frame.an_frame_ctl >> 8;
871 ieee80211_header_len =
872 sizeof(struct ieee80211_frame);
873 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
874 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
875 ieee80211_header_len += ETHER_ADDR_LEN;
876 }
877
878 len = rx_frame.an_rx_payload_len
879 + ieee80211_header_len;
880 /* Check for insane frame length */
881 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
882 if_printf(ifp,
883 "oversized packet received "
884 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
885 ifp->if_ierrors++;
886 return;
887 }
888
889 ih = (struct ieee80211_frame *)bpf_buf;
890
891 bcopy((char *)&rx_frame.an_frame_ctl,
892 (char *)ih, ieee80211_header_len);
893
894 error = an_read_data(sc, id, sizeof(rx_frame) +
895 rx_frame.an_gaplen,
896 (caddr_t)ih +ieee80211_header_len,
897 rx_frame.an_rx_payload_len);
898 }
7600679e 899 BPF_TAP(ifp, bpf_buf, len);
984263bc
MD
900 } else {
901 MGETHDR(m, M_NOWAIT, MT_DATA);
902 if (m == NULL) {
903 ifp->if_ierrors++;
904 return;
905 }
906 MCLGET(m, M_NOWAIT);
907 if (!(m->m_flags & M_EXT)) {
908 m_freem(m);
909 ifp->if_ierrors++;
910 return;
911 }
912 m->m_pkthdr.rcvif = ifp;
913 /* Read Ethernet encapsulated packet */
914
915#ifdef ANCACHE
916 /* Read NIC frame header */
917 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
918 sizeof(rx_frame))) {
919 ifp->if_ierrors++;
920 return;
921 }
922#endif
923 /* Read in the 802_3 frame header */
924 if (an_read_data(sc, id, 0x34,
925 (caddr_t)&rx_frame_802_3,
926 sizeof(rx_frame_802_3))) {
927 ifp->if_ierrors++;
928 return;
929 }
930 if (rx_frame_802_3.an_rx_802_3_status != 0) {
931 ifp->if_ierrors++;
932 return;
933 }
934 /* Check for insane frame length */
935 len = rx_frame_802_3.an_rx_802_3_payload_len;
936 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
937 if_printf(ifp,
938 "oversized packet received (%d, %d)\n",
939 len, MCLBYTES);
984263bc
MD
940 ifp->if_ierrors++;
941 return;
942 }
943 m->m_pkthdr.len = m->m_len =
944 rx_frame_802_3.an_rx_802_3_payload_len + 12;
945
946 eh = mtod(m, struct ether_header *);
947
948 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
949 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
950 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
951 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
952
953 /* in mbuf header type is just before payload */
954 error = an_read_data(sc, id, 0x44,
955 (caddr_t)&(eh->ether_type),
956 rx_frame_802_3.an_rx_802_3_payload_len);
957
958 if (error) {
959 m_freem(m);
960 ifp->if_ierrors++;
961 return;
962 }
963 ifp->if_ipackets++;
964
984263bc 965#ifdef ANCACHE
3013ac0e 966 an_cache_store(sc, m,
984263bc
MD
967 rx_frame.an_rx_signal_strength,
968 rx_frame.an_rsvd0);
969#endif
3013ac0e 970 (*ifp->if_input)(ifp, m);
984263bc
MD
971 }
972
973 } else { /* MPI-350 */
974 for (count = 0; count < AN_MAX_RX_DESC; count++){
975 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
976 ((u_int32_t*)&an_rx_desc)[i]
977 = CSR_MEM_AUX_READ_4(sc,
978 AN_RX_DESC_OFFSET
979 + (count * sizeof(an_rx_desc))
980 + (i * 4));
981
982 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
983 buf = sc->an_rx_buffer[count].an_dma_vaddr;
984
985 MGETHDR(m, M_NOWAIT, MT_DATA);
986 if (m == NULL) {
987 ifp->if_ierrors++;
988 return;
989 }
990 MCLGET(m, M_NOWAIT);
991 if (!(m->m_flags & M_EXT)) {
992 m_freem(m);
993 ifp->if_ierrors++;
994 return;
995 }
996 m->m_pkthdr.rcvif = ifp;
997 /* Read Ethernet encapsulated packet */
998
999 /*
1000 * No ANCACHE support since we just get back
1001 * an Ethernet packet no 802.11 info
1002 */
1003#if 0
1004#ifdef ANCACHE
1005 /* Read NIC frame header */
1006 bcopy(buf, (caddr_t)&rx_frame,
1007 sizeof(rx_frame));
1008#endif
1009#endif
1010 /* Check for insane frame length */
1011 len = an_rx_desc.an_len + 12;
1012 if (len > MCLBYTES) {
1c70eebf
JS
1013 if_printf(ifp,
1014 "oversized packet received "
1015 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1016 ifp->if_ierrors++;
1017 return;
1018 }
1019
1020 m->m_pkthdr.len = m->m_len =
1021 an_rx_desc.an_len + 12;
1022
1023 eh = mtod(m, struct ether_header *);
1024
1025 bcopy(buf, (char *)eh,
1026 m->m_pkthdr.len);
1027
1028 ifp->if_ipackets++;
1029
984263bc
MD
1030#if 0
1031#ifdef ANCACHE
3013ac0e 1032 an_cache_store(sc, m,
984263bc
MD
1033 rx_frame.an_rx_signal_strength,
1034 rx_frame.an_rsvd0);
1035#endif
1036#endif
3013ac0e 1037 (*ifp->if_input)(ifp, m);
984263bc
MD
1038
1039 an_rx_desc.an_valid = 1;
1040 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1041 an_rx_desc.an_done = 0;
1042 an_rx_desc.an_phys =
1043 sc->an_rx_buffer[count].an_dma_paddr;
1044
1045 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1046 CSR_MEM_AUX_WRITE_4(sc,
1047 AN_RX_DESC_OFFSET
1048 + (count * sizeof(an_rx_desc))
1049 + (i * 4),
1050 ((u_int32_t*)&an_rx_desc)[i]);
1051
1052 } else {
1c70eebf
JS
1053 if_printf(ifp, "Didn't get valid RX packet "
1054 "%x %x %d\n",
1055 an_rx_desc.an_done,
1056 an_rx_desc.an_valid,
1057 an_rx_desc.an_len);
984263bc
MD
1058 }
1059 }
1060 }
1061}
1062
1063static void
1064an_txeof(sc, status)
1065 struct an_softc *sc;
1066 int status;
1067{
1068 struct ifnet *ifp;
1069 int id, i;
1070
1071 ifp = &sc->arpcom.ac_if;
1072
1073 ifp->if_timer = 0;
1074 ifp->if_flags &= ~IFF_OACTIVE;
1075
1076 if (!sc->mpi350) {
1077 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1078
1079 if (status & AN_EV_TX_EXC) {
1080 ifp->if_oerrors++;
1081 } else
1082 ifp->if_opackets++;
1083
1084 for (i = 0; i < AN_TX_RING_CNT; i++) {
1085 if (id == sc->an_rdata.an_tx_ring[i]) {
1086 sc->an_rdata.an_tx_ring[i] = 0;
1087 break;
1088 }
1089 }
1090
1091 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1092 } else { /* MPI 350 */
1093 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1094 if (sc->an_rdata.an_tx_prod ==
1095 sc->an_rdata.an_tx_cons)
1096 sc->an_rdata.an_tx_empty = 1;
1097 }
1098
1099 return;
1100}
1101
1102/*
1103 * We abuse the stats updater to check the current NIC status. This
1104 * is important because we don't want to allow transmissions until
1105 * the NIC has synchronized to the current cell (either as the master
1106 * in an ad-hoc group, or as a station connected to an access point).
1107 */
1108static void
1109an_stats_update(xsc)
1110 void *xsc;
1111{
1112 struct an_softc *sc;
1113 struct ifnet *ifp;
1114 int s;
1115
1116 s = splimp();
1117
1118 sc = xsc;
1119 ifp = &sc->arpcom.ac_if;
1120
1121 sc->an_status.an_type = AN_RID_STATUS;
1122 sc->an_status.an_len = sizeof(struct an_ltv_status);
1123 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1124
1125 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1126 sc->an_associated = 1;
1127 else
1128 sc->an_associated = 0;
1129
1130 /* Don't do this while we're transmitting */
1131 if (ifp->if_flags & IFF_OACTIVE) {
89c0f216 1132 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1133 splx(s);
1134 return;
1135 }
1136
1137 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1138 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1139 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
1140
89c0f216 1141 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1142 splx(s);
1143
1144 return;
1145}
1146
1147void
1148an_intr(xsc)
1149 void *xsc;
1150{
1151 struct an_softc *sc;
1152 struct ifnet *ifp;
1153 u_int16_t status;
1154
1155 sc = (struct an_softc*)xsc;
1156
984263bc
MD
1157 ifp = &sc->arpcom.ac_if;
1158
1159 /* Disable interrupts. */
1160 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1161
1162 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1163 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1164
1165 if (status & AN_EV_AWAKE) {
1166 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1167 }
1168
1169 if (status & AN_EV_LINKSTAT) {
1170 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1171 == AN_LINKSTAT_ASSOCIATED)
1172 sc->an_associated = 1;
1173 else
1174 sc->an_associated = 0;
1175 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1176 }
1177
1178 if (status & AN_EV_RX) {
1179 an_rxeof(sc);
1180 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1181 }
1182
1183 if (status & AN_EV_TX) {
1184 an_txeof(sc, status);
1185 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1186 }
1187
1188 if (status & AN_EV_TX_EXC) {
1189 an_txeof(sc, status);
1190 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1191 }
1192
1193 if (status & AN_EV_ALLOC)
1194 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1195
1196 /* Re-enable interrupts. */
1197 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1198
38de8487 1199 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1200 an_start(ifp);
1201
1202 return;
1203}
1204
1205static int
1206an_cmd_struct(sc, cmd, reply)
1207 struct an_softc *sc;
1208 struct an_command *cmd;
1209 struct an_reply *reply;
1210{
1211 int i;
1212
1213 for (i = 0; i != AN_TIMEOUT; i++) {
1214 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1215 DELAY(1000);
1216 } else
1217 break;
1218 }
1219 if( i == AN_TIMEOUT) {
1220 printf("BUSY\n");
1221 return(ETIMEDOUT);
1222 }
1223
1224 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1225 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1226 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1227 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1228
1229 for (i = 0; i < AN_TIMEOUT; i++) {
1230 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1231 break;
1232 DELAY(1000);
1233 }
1234
1235 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1236 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1237 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1238 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1239
1240 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1241 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1242
1243 /* Ack the command */
1244 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1245
1246 if (i == AN_TIMEOUT)
1247 return(ETIMEDOUT);
1248
1249 return(0);
1250}
1251
1252static int
1253an_cmd(sc, cmd, val)
1254 struct an_softc *sc;
1255 int cmd;
1256 int val;
1257{
1258 int i, s = 0;
1259
1260 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1261 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1262 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1263 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1264
1265 for (i = 0; i < AN_TIMEOUT; i++) {
1266 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1267 break;
1268 else {
1269 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1270 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1271 }
1272 }
1273
1274 for (i = 0; i < AN_TIMEOUT; i++) {
1275 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1276 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1277 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1278 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1279 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1280 break;
1281 }
1282
1283 /* Ack the command */
1284 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1285
1286 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1287 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1288
1289 if (i == AN_TIMEOUT)
1290 return(ETIMEDOUT);
1291
1292 return(0);
1293}
1294
1295/*
1296 * This reset sequence may look a little strange, but this is the
1297 * most reliable method I've found to really kick the NIC in the
1298 * head and force it to reboot correctly.
1299 */
1300static void
1301an_reset(sc)
1302 struct an_softc *sc;
1303{
984263bc
MD
1304 an_cmd(sc, AN_CMD_ENABLE, 0);
1305 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1306 an_cmd(sc, AN_CMD_NOOP2, 0);
1307
1308 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1309 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1310
1311 an_cmd(sc, AN_CMD_DISABLE, 0);
1312
1313 return;
1314}
1315
1316/*
1317 * Read an LTV record from the NIC.
1318 */
1319static int
1320an_read_record(sc, ltv)
1321 struct an_softc *sc;
1322 struct an_ltv_gen *ltv;
1323{
1324 struct an_ltv_gen *an_ltv;
1325 struct an_card_rid_desc an_rid_desc;
1326 struct an_command cmd;
1327 struct an_reply reply;
1328 u_int16_t *ptr;
1329 u_int8_t *ptr2;
1330 int i, len;
1331
1332 if (ltv->an_len < 4 || ltv->an_type == 0)
1333 return(EINVAL);
1334
1335 if (!sc->mpi350){
1336 /* Tell the NIC to enter record read mode. */
1337 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1338 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1339 return(EIO);
1340 }
1341
1342 /* Seek to the record. */
1343 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1344 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1345 return(EIO);
1346 }
1347
1348 /*
1349 * Read the length and record type and make sure they
1350 * match what we expect (this verifies that we have enough
1351 * room to hold all of the returned data).
1352 * Length includes type but not length.
1353 */
1354 len = CSR_READ_2(sc, AN_DATA1);
1355 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1356 if_printf(&sc->arpcom.ac_if,
1357 "record length mismatch -- expected %d, "
1358 "got %d for Rid %x\n",
1359 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1360 len = ltv->an_len - 2;
1361 } else {
1362 ltv->an_len = len + 2;
1363 }
1364
1365 /* Now read the data. */
1366 len -= 2; /* skip the type */
1367 ptr = &ltv->an_val;
1368 for (i = len; i > 1; i -= 2)
1369 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1370 if (i) {
1371 ptr2 = (u_int8_t *)ptr;
1372 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1373 }
1374 } else { /* MPI-350 */
1375 an_rid_desc.an_valid = 1;
1376 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1377 an_rid_desc.an_rid = 0;
1378 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1379 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1380
1381 bzero(&cmd, sizeof(cmd));
1382 bzero(&reply, sizeof(reply));
1383 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1384 cmd.an_parm0 = ltv->an_type;
1385
1386 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1387 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1388 ((u_int32_t*)&an_rid_desc)[i]);
1389
1390 if (an_cmd_struct(sc, &cmd, &reply)
1391 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1392 if_printf(&sc->arpcom.ac_if,
1393 "failed to read RID %x %x %x %x %x, %d\n",
1394 ltv->an_type,
1395 reply.an_status,
1396 reply.an_resp0,
1397 reply.an_resp1,
1398 reply.an_resp2,
1399 i);
984263bc
MD
1400 return(EIO);
1401 }
1402
1403 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1404 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1405 an_rid_desc.an_len = an_ltv->an_len;
1406 }
1407
1408 if (an_rid_desc.an_len > 2)
1409 bcopy(&an_ltv->an_type,
1410 &ltv->an_val,
1411 an_rid_desc.an_len - 2);
1412 ltv->an_len = an_rid_desc.an_len + 2;
1413 }
1414
1415 if (an_dump)
1416 an_dump_record(sc, ltv, "Read");
1417
1418 return(0);
1419}
1420
1421/*
1422 * Same as read, except we inject data instead of reading it.
1423 */
1424static int
1425an_write_record(sc, ltv)
1426 struct an_softc *sc;
1427 struct an_ltv_gen *ltv;
1428{
1429 struct an_card_rid_desc an_rid_desc;
1430 struct an_command cmd;
1431 struct an_reply reply;
1432 char *buf;
1433 u_int16_t *ptr;
1434 u_int8_t *ptr2;
1435 int i, len;
1436
1437 if (an_dump)
1438 an_dump_record(sc, ltv, "Write");
1439
1440 if (!sc->mpi350){
1441 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1442 return(EIO);
1443
1444 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1445 return(EIO);
1446
1447 /*
1448 * Length includes type but not length.
1449 */
1450 len = ltv->an_len - 2;
1451 CSR_WRITE_2(sc, AN_DATA1, len);
1452
1453 len -= 2; /* skip the type */
1454 ptr = &ltv->an_val;
1455 for (i = len; i > 1; i -= 2)
1456 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1457 if (i) {
1458 ptr2 = (u_int8_t *)ptr;
1459 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1460 }
1461
1462 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1463 return(EIO);
1464 } else {
1465 /* MPI-350 */
1466
1467 for (i = 0; i != AN_TIMEOUT; i++) {
1468 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1469 & AN_CMD_BUSY) {
1470 DELAY(10);
1471 } else
1472 break;
1473 }
1474 if (i == AN_TIMEOUT) {
1475 printf("BUSY\n");
1476 }
1477
1478 an_rid_desc.an_valid = 1;
1479 an_rid_desc.an_len = ltv->an_len - 2;
1480 an_rid_desc.an_rid = ltv->an_type;
1481 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1482
1483 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1484 an_rid_desc.an_len);
1485
1486 bzero(&cmd,sizeof(cmd));
1487 bzero(&reply,sizeof(reply));
1488 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1489 cmd.an_parm0 = ltv->an_type;
1490
1491 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1492 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1493 ((u_int32_t*)&an_rid_desc)[i]);
1494
1495 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1496 if_printf(&sc->arpcom.ac_if,
1497 "failed to write RID 1 %x %x %x %x %x, %d\n",
1498 ltv->an_type,
984263bc
MD
1499 reply.an_status,
1500 reply.an_resp0,
1501 reply.an_resp1,
1502 reply.an_resp2,
1503 i);
1504 return(EIO);
1505 }
1506
1507 ptr = (u_int16_t *)buf;
1508
1509 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1510 if_printf(&sc->arpcom.ac_if,
1511 "failed to write RID 2 %x %x %x %x %x, %d\n",
1512 ltv->an_type,
984263bc
MD
1513 reply.an_status,
1514 reply.an_resp0,
1515 reply.an_resp1,
1516 reply.an_resp2,
1517 i);
1518 return(EIO);
1519 }
1520 }
1521
1522 return(0);
1523}
1524
1525static void
1526an_dump_record(sc, ltv, string)
1527 struct an_softc *sc;
1528 struct an_ltv_gen *ltv;
1529 char *string;
1530{
1531 u_int8_t *ptr2;
1532 int len;
1533 int i;
1534 int count = 0;
1535 char buf[17], temp;
1536
1537 len = ltv->an_len - 4;
1c70eebf
JS
1538 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1539 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1540
1541 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1542 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1543 bzero(buf,sizeof(buf));
1544
1545 ptr2 = (u_int8_t *)&ltv->an_val;
1546 for (i = len; i > 0; i--) {
1547 printf("%02x ", *ptr2);
1548
1549 temp = *ptr2++;
1550 if (temp >= ' ' && temp <= '~')
1551 buf[count] = temp;
1552 else if (temp >= 'A' && temp <= 'Z')
1553 buf[count] = temp;
1554 else
1555 buf[count] = '.';
1556 if (++count == 16) {
1557 count = 0;
1558 printf("%s\n",buf);
1c70eebf 1559 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1560 bzero(buf,sizeof(buf));
1561 }
1562 }
1563 for (; count != 16; count++) {
1564 printf(" ");
1565 }
1566 printf(" %s\n",buf);
1567 }
1568}
1569
1570static int
1571an_seek(sc, id, off, chan)
1572 struct an_softc *sc;
1573 int id, off, chan;
1574{
1575 int i;
1576 int selreg, offreg;
1577
1578 switch (chan) {
1579 case AN_BAP0:
1580 selreg = AN_SEL0;
1581 offreg = AN_OFF0;
1582 break;
1583 case AN_BAP1:
1584 selreg = AN_SEL1;
1585 offreg = AN_OFF1;
1586 break;
1587 default:
1c70eebf 1588 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1589 return(EIO);
1590 }
1591
1592 CSR_WRITE_2(sc, selreg, id);
1593 CSR_WRITE_2(sc, offreg, off);
1594
1595 for (i = 0; i < AN_TIMEOUT; i++) {
1596 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1597 break;
1598 }
1599
1600 if (i == AN_TIMEOUT)
1601 return(ETIMEDOUT);
1602
1603 return(0);
1604}
1605
1606static int
1607an_read_data(sc, id, off, buf, len)
1608 struct an_softc *sc;
1609 int id, off;
1610 caddr_t buf;
1611 int len;
1612{
1613 int i;
1614 u_int16_t *ptr;
1615 u_int8_t *ptr2;
1616
1617 if (off != -1) {
1618 if (an_seek(sc, id, off, AN_BAP1))
1619 return(EIO);
1620 }
1621
1622 ptr = (u_int16_t *)buf;
1623 for (i = len; i > 1; i -= 2)
1624 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1625 if (i) {
1626 ptr2 = (u_int8_t *)ptr;
1627 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1628 }
1629
1630 return(0);
1631}
1632
1633static int
1634an_write_data(sc, id, off, buf, len)
1635 struct an_softc *sc;
1636 int id, off;
1637 caddr_t buf;
1638 int len;
1639{
1640 int i;
1641 u_int16_t *ptr;
1642 u_int8_t *ptr2;
1643
1644 if (off != -1) {
1645 if (an_seek(sc, id, off, AN_BAP0))
1646 return(EIO);
1647 }
1648
1649 ptr = (u_int16_t *)buf;
1650 for (i = len; i > 1; i -= 2)
1651 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1652 if (i) {
1653 ptr2 = (u_int8_t *)ptr;
1654 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1655 }
1656
1657 return(0);
1658}
1659
1660/*
1661 * Allocate a region of memory inside the NIC and zero
1662 * it out.
1663 */
1664static int
1665an_alloc_nicmem(sc, len, id)
1666 struct an_softc *sc;
1667 int len;
1668 int *id;
1669{
1670 int i;
1671
1672 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1673 if_printf(&sc->arpcom.ac_if,
1674 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1675 return(ENOMEM);
1676 }
1677
1678 for (i = 0; i < AN_TIMEOUT; i++) {
1679 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1680 break;
1681 }
1682
1683 if (i == AN_TIMEOUT)
1684 return(ETIMEDOUT);
1685
1686 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1687 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1688
1689 if (an_seek(sc, *id, 0, AN_BAP0))
1690 return(EIO);
1691
1692 for (i = 0; i < len / 2; i++)
1693 CSR_WRITE_2(sc, AN_DATA0, 0);
1694
1695 return(0);
1696}
1697
1698static void
1699an_setdef(sc, areq)
1700 struct an_softc *sc;
1701 struct an_req *areq;
1702{
984263bc
MD
1703 struct ifnet *ifp;
1704 struct an_ltv_genconfig *cfg;
1705 struct an_ltv_ssidlist *ssid;
1706 struct an_ltv_aplist *ap;
1707 struct an_ltv_gen *sp;
1708
1709 ifp = &sc->arpcom.ac_if;
1710
1711 switch (areq->an_type) {
1712 case AN_RID_GENCONFIG:
1713 cfg = (struct an_ltv_genconfig *)areq;
1714
984263bc
MD
1715 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1716 ETHER_ADDR_LEN);
f2682cb9 1717 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1718
1719 bcopy((char *)cfg, (char *)&sc->an_config,
1720 sizeof(struct an_ltv_genconfig));
1721 break;
1722 case AN_RID_SSIDLIST:
1723 ssid = (struct an_ltv_ssidlist *)areq;
1724 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1725 sizeof(struct an_ltv_ssidlist));
1726 break;
1727 case AN_RID_APLIST:
1728 ap = (struct an_ltv_aplist *)areq;
1729 bcopy((char *)ap, (char *)&sc->an_aplist,
1730 sizeof(struct an_ltv_aplist));
1731 break;
1732 case AN_RID_TX_SPEED:
1733 sp = (struct an_ltv_gen *)areq;
1734 sc->an_tx_rate = sp->an_val;
1735
1736 /* Read the current configuration */
1737 sc->an_config.an_type = AN_RID_GENCONFIG;
1738 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1739 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1740 cfg = &sc->an_config;
1741
1742 /* clear other rates and set the only one we want */
1743 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1744 cfg->an_rates[0] = sc->an_tx_rate;
1745
1746 /* Save the new rate */
1747 sc->an_config.an_type = AN_RID_GENCONFIG;
1748 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1749 break;
1750 case AN_RID_WEP_TEMP:
1751 /* Cache the temp keys */
1752 bcopy(areq,
1753 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1754 sizeof(struct an_ltv_key));
1755 case AN_RID_WEP_PERM:
1756 case AN_RID_LEAPUSERNAME:
1757 case AN_RID_LEAPPASSWORD:
1758 /* Disable the MAC. */
1759 an_cmd(sc, AN_CMD_DISABLE, 0);
1760
1761 /* Write the key */
1762 an_write_record(sc, (struct an_ltv_gen *)areq);
1763
1764 /* Turn the MAC back on. */
1765 an_cmd(sc, AN_CMD_ENABLE, 0);
1766
1767 break;
1768 case AN_RID_MONITOR_MODE:
1769 cfg = (struct an_ltv_genconfig *)areq;
1770 bpfdetach(ifp);
1771 if (ng_ether_detach_p != NULL)
1772 (*ng_ether_detach_p) (ifp);
1773 sc->an_monitor = cfg->an_len;
1774
1775 if (sc->an_monitor & AN_MONITOR) {
1776 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1777 bpfattach(ifp, DLT_AIRONET_HEADER,
1778 sizeof(struct ether_header));
1779 } else {
1780 bpfattach(ifp, DLT_IEEE802_11,
1781 sizeof(struct ether_header));
1782 }
1783 } else {
1784 bpfattach(ifp, DLT_EN10MB,
1785 sizeof(struct ether_header));
1786 if (ng_ether_attach_p != NULL)
1787 (*ng_ether_attach_p) (ifp);
1788 }
1789 break;
1790 default:
1c70eebf 1791 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc
MD
1792 return;
1793 break;
1794 }
1795
1796
1797 /* Reinitialize the card. */
1798 if (ifp->if_flags)
1799 an_init(sc);
1800
1801 return;
1802}
1803
1804/*
1805 * Derived from Linux driver to enable promiscious mode.
1806 */
1807
1808static void
1809an_promisc(sc, promisc)
1810 struct an_softc *sc;
1811 int promisc;
1812{
1813 if (sc->an_was_monitor)
1814 an_reset(sc);
1c70eebf
JS
1815 if (sc->mpi350)
1816 an_init_mpi350_desc(sc);
984263bc
MD
1817 if (sc->an_monitor || sc->an_was_monitor)
1818 an_init(sc);
1819
1820 sc->an_was_monitor = sc->an_monitor;
1821 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1822
1823 return;
1824}
1825
1826static int
bd4539cc 1827an_ioctl(ifp, command, data, cr)
984263bc
MD
1828 struct ifnet *ifp;
1829 u_long command;
1830 caddr_t data;
bd4539cc 1831 struct ucred *cr;
984263bc
MD
1832{
1833 int s, error = 0;
1834 int len;
1835 int i;
1836 struct an_softc *sc;
1837 struct ifreq *ifr;
984263bc
MD
1838 struct ieee80211req *ireq;
1839 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1840 u_int8_t *tmpptr;
1841 struct an_ltv_genconfig *config;
1842 struct an_ltv_key *key;
1843 struct an_ltv_status *status;
1844 struct an_ltv_ssidlist *ssids;
1845 int mode;
1846 struct aironet_ioctl l_ioctl;
1847
1848 sc = ifp->if_softc;
1849 s = splimp();
1850 ifr = (struct ifreq *)data;
1851 ireq = (struct ieee80211req *)data;
1852
1853 config = (struct an_ltv_genconfig *)&sc->areq;
1854 key = (struct an_ltv_key *)&sc->areq;
1855 status = (struct an_ltv_status *)&sc->areq;
1856 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1857
984263bc 1858 switch (command) {
984263bc
MD
1859 case SIOCSIFFLAGS:
1860 if (ifp->if_flags & IFF_UP) {
1861 if (ifp->if_flags & IFF_RUNNING &&
1862 ifp->if_flags & IFF_PROMISC &&
1863 !(sc->an_if_flags & IFF_PROMISC)) {
1864 an_promisc(sc, 1);
1865 } else if (ifp->if_flags & IFF_RUNNING &&
1866 !(ifp->if_flags & IFF_PROMISC) &&
1867 sc->an_if_flags & IFF_PROMISC) {
1868 an_promisc(sc, 0);
1869 } else
1870 an_init(sc);
1871 } else {
1872 if (ifp->if_flags & IFF_RUNNING)
1873 an_stop(sc);
1874 }
1875 sc->an_if_flags = ifp->if_flags;
1876 error = 0;
1877 break;
1878 case SIOCSIFMEDIA:
1879 case SIOCGIFMEDIA:
1880 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1881 break;
1882 case SIOCADDMULTI:
1883 case SIOCDELMULTI:
1884 /* The Aironet has no multicast filter. */
1885 error = 0;
1886 break;
1887 case SIOCGAIRONET:
1888 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1889 if (error != 0)
1890 break;
1891#ifdef ANCACHE
1892 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1893 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1894 if (error)
1895 break;
1896 sc->an_sigitems = sc->an_nextitem = 0;
1897 break;
1898 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1899 char *pt = (char *)&sc->areq.an_val;
1900 bcopy((char *)&sc->an_sigitems, (char *)pt,
1901 sizeof(int));
1902 pt += sizeof(int);
1903 sc->areq.an_len = sizeof(int) / 2;
1904 bcopy((char *)&sc->an_sigcache, (char *)pt,
1905 sizeof(struct an_sigcache) * sc->an_sigitems);
1906 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1907 sc->an_sigitems) / 2) + 1;
1908 } else
1909#endif
1910 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1911 error = EINVAL;
1912 break;
1913 }
1914 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1915 break;
1916 case SIOCSAIRONET:
bd4539cc 1917 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1918 goto out;
1919 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1920 if (error != 0)
1921 break;
1922 an_setdef(sc, &sc->areq);
1923 break;
1924 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1925 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1926 goto out;
1927 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1928 mode = l_ioctl.command;
1929
1930 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1931 error = readrids(ifp, &l_ioctl);
1932 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1933 error = writerids(ifp, &l_ioctl);
1934 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1935 error = flashcard(ifp, &l_ioctl);
1936 } else {
1937 error =-1;
1938 }
1939
1940 /* copy out the updated command info */
1941 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1942
1943 break;
1944 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1945 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1946 goto out;
1947 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1948 l_ioctl.command = 0;
1949 error = AIROMAGIC;
1950 copyout(&error, l_ioctl.data, sizeof(error));
1951 error = 0;
1952 break;
1953 case SIOCG80211:
1954 sc->areq.an_len = sizeof(sc->areq);
1955 /* was that a good idea DJA we are doing a short-cut */
1956 switch (ireq->i_type) {
1957 case IEEE80211_IOC_SSID:
1958 if (ireq->i_val == -1) {
1959 sc->areq.an_type = AN_RID_STATUS;
1960 if (an_read_record(sc,
1961 (struct an_ltv_gen *)&sc->areq)) {
1962 error = EINVAL;
1963 break;
1964 }
1965 len = status->an_ssidlen;
1966 tmpptr = status->an_ssid;
1967 } else if (ireq->i_val >= 0) {
1968 sc->areq.an_type = AN_RID_SSIDLIST;
1969 if (an_read_record(sc,
1970 (struct an_ltv_gen *)&sc->areq)) {
1971 error = EINVAL;
1972 break;
1973 }
1974 if (ireq->i_val == 0) {
1975 len = ssids->an_ssid1_len;
1976 tmpptr = ssids->an_ssid1;
1977 } else if (ireq->i_val == 1) {
1978 len = ssids->an_ssid2_len;
1979 tmpptr = ssids->an_ssid2;
1980 } else if (ireq->i_val == 2) {
1981 len = ssids->an_ssid3_len;
1982 tmpptr = ssids->an_ssid3;
1983 } else {
1984 error = EINVAL;
1985 break;
1986 }
1987 } else {
1988 error = EINVAL;
1989 break;
1990 }
1991 if (len > IEEE80211_NWID_LEN) {
1992 error = EINVAL;
1993 break;
1994 }
1995 ireq->i_len = len;
1996 bzero(tmpstr, IEEE80211_NWID_LEN);
1997 bcopy(tmpptr, tmpstr, len);
1998 error = copyout(tmpstr, ireq->i_data,
1999 IEEE80211_NWID_LEN);
2000 break;
2001 case IEEE80211_IOC_NUMSSIDS:
2002 ireq->i_val = 3;
2003 break;
2004 case IEEE80211_IOC_WEP:
2005 sc->areq.an_type = AN_RID_ACTUALCFG;
2006 if (an_read_record(sc,
2007 (struct an_ltv_gen *)&sc->areq)) {
2008 error = EINVAL;
2009 break;
2010 }
2011 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2012 if (config->an_authtype &
2013 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2014 ireq->i_val = IEEE80211_WEP_MIXED;
2015 else
2016 ireq->i_val = IEEE80211_WEP_ON;
2017 } else {
2018 ireq->i_val = IEEE80211_WEP_OFF;
2019 }
2020 break;
2021 case IEEE80211_IOC_WEPKEY:
2022 /*
2023 * XXX: I'm not entierly convinced this is
2024 * correct, but it's what is implemented in
2025 * ancontrol so it will have to do until we get
2026 * access to actual Cisco code.
2027 */
2028 if (ireq->i_val < 0 || ireq->i_val > 8) {
2029 error = EINVAL;
2030 break;
2031 }
2032 len = 0;
2033 if (ireq->i_val < 5) {
2034 sc->areq.an_type = AN_RID_WEP_TEMP;
2035 for (i = 0; i < 5; i++) {
2036 if (an_read_record(sc,
2037 (struct an_ltv_gen *)&sc->areq)) {
2038 error = EINVAL;
2039 break;
2040 }
2041 if (key->kindex == 0xffff)
2042 break;
2043 if (key->kindex == ireq->i_val)
2044 len = key->klen;
2045 /* Required to get next entry */
2046 sc->areq.an_type = AN_RID_WEP_PERM;
2047 }
2048 if (error != 0)
2049 break;
2050 }
2051 /* We aren't allowed to read the value of the
2052 * key from the card so we just output zeros
2053 * like we would if we could read the card, but
2054 * denied the user access.
2055 */
2056 bzero(tmpstr, len);
2057 ireq->i_len = len;
2058 error = copyout(tmpstr, ireq->i_data, len);
2059 break;
2060 case IEEE80211_IOC_NUMWEPKEYS:
2061 ireq->i_val = 9; /* include home key */
2062 break;
2063 case IEEE80211_IOC_WEPTXKEY:
2064 /*
2065 * For some strange reason, you have to read all
2066 * keys before you can read the txkey.
2067 */
2068 sc->areq.an_type = AN_RID_WEP_TEMP;
2069 for (i = 0; i < 5; i++) {
2070 if (an_read_record(sc,
2071 (struct an_ltv_gen *) &sc->areq)) {
2072 error = EINVAL;
2073 break;
2074 }
2075 if (key->kindex == 0xffff)
2076 break;
2077 /* Required to get next entry */
2078 sc->areq.an_type = AN_RID_WEP_PERM;
2079 }
2080 if (error != 0)
2081 break;
2082
2083 sc->areq.an_type = AN_RID_WEP_PERM;
2084 key->kindex = 0xffff;
2085 if (an_read_record(sc,
2086 (struct an_ltv_gen *)&sc->areq)) {
2087 error = EINVAL;
2088 break;
2089 }
2090 ireq->i_val = key->mac[0];
2091 /*
2092 * Check for home mode. Map home mode into
2093 * 5th key since that is how it is stored on
2094 * the card
2095 */
2096 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2097 sc->areq.an_type = AN_RID_GENCONFIG;
2098 if (an_read_record(sc,
2099 (struct an_ltv_gen *)&sc->areq)) {
2100 error = EINVAL;
2101 break;
2102 }
2103 if (config->an_home_product & AN_HOME_NETWORK)
2104 ireq->i_val = 4;
2105 break;
2106 case IEEE80211_IOC_AUTHMODE:
2107 sc->areq.an_type = AN_RID_ACTUALCFG;
2108 if (an_read_record(sc,
2109 (struct an_ltv_gen *)&sc->areq)) {
2110 error = EINVAL;
2111 break;
2112 }
2113 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2114 AN_AUTHTYPE_NONE) {
2115 ireq->i_val = IEEE80211_AUTH_NONE;
2116 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2117 AN_AUTHTYPE_OPEN) {
2118 ireq->i_val = IEEE80211_AUTH_OPEN;
2119 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2120 AN_AUTHTYPE_SHAREDKEY) {
2121 ireq->i_val = IEEE80211_AUTH_SHARED;
2122 } else
2123 error = EINVAL;
2124 break;
2125 case IEEE80211_IOC_STATIONNAME:
2126 sc->areq.an_type = AN_RID_ACTUALCFG;
2127 if (an_read_record(sc,
2128 (struct an_ltv_gen *)&sc->areq)) {
2129 error = EINVAL;
2130 break;
2131 }
2132 ireq->i_len = sizeof(config->an_nodename);
2133 tmpptr = config->an_nodename;
2134 bzero(tmpstr, IEEE80211_NWID_LEN);
2135 bcopy(tmpptr, tmpstr, ireq->i_len);
2136 error = copyout(tmpstr, ireq->i_data,
2137 IEEE80211_NWID_LEN);
2138 break;
2139 case IEEE80211_IOC_CHANNEL:
2140 sc->areq.an_type = AN_RID_STATUS;
2141 if (an_read_record(sc,
2142 (struct an_ltv_gen *)&sc->areq)) {
2143 error = EINVAL;
2144 break;
2145 }
2146 ireq->i_val = status->an_cur_channel;
2147 break;
2148 case IEEE80211_IOC_POWERSAVE:
2149 sc->areq.an_type = AN_RID_ACTUALCFG;
2150 if (an_read_record(sc,
2151 (struct an_ltv_gen *)&sc->areq)) {
2152 error = EINVAL;
2153 break;
2154 }
2155 if (config->an_psave_mode == AN_PSAVE_NONE) {
2156 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2157 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2158 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2159 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2160 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2161 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2162 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2163 } else
2164 error = EINVAL;
2165 break;
2166 case IEEE80211_IOC_POWERSAVESLEEP:
2167 sc->areq.an_type = AN_RID_ACTUALCFG;
2168 if (an_read_record(sc,
2169 (struct an_ltv_gen *)&sc->areq)) {
2170 error = EINVAL;
2171 break;
2172 }
2173 ireq->i_val = config->an_listen_interval;
2174 break;
2175 }
2176 break;
2177 case SIOCS80211:
bd4539cc 2178 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
2179 goto out;
2180 sc->areq.an_len = sizeof(sc->areq);
2181 /*
2182 * We need a config structure for everything but the WEP
2183 * key management and SSIDs so we get it now so avoid
2184 * duplicating this code every time.
2185 */
2186 if (ireq->i_type != IEEE80211_IOC_SSID &&
2187 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2188 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2189 sc->areq.an_type = AN_RID_GENCONFIG;
2190 if (an_read_record(sc,
2191 (struct an_ltv_gen *)&sc->areq)) {
2192 error = EINVAL;
2193 break;
2194 }
2195 }
2196 switch (ireq->i_type) {
2197 case IEEE80211_IOC_SSID:
2198 sc->areq.an_type = AN_RID_SSIDLIST;
2199 if (an_read_record(sc,
2200 (struct an_ltv_gen *)&sc->areq)) {
2201 error = EINVAL;
2202 break;
2203 }
2204 if (ireq->i_len > IEEE80211_NWID_LEN) {
2205 error = EINVAL;
2206 break;
2207 }
2208 switch (ireq->i_val) {
2209 case 0:
2210 error = copyin(ireq->i_data,
2211 ssids->an_ssid1, ireq->i_len);
2212 ssids->an_ssid1_len = ireq->i_len;
2213 break;
2214 case 1:
2215 error = copyin(ireq->i_data,
2216 ssids->an_ssid2, ireq->i_len);
2217 ssids->an_ssid2_len = ireq->i_len;
2218 break;
2219 case 2:
2220 error = copyin(ireq->i_data,
2221 ssids->an_ssid3, ireq->i_len);
2222 ssids->an_ssid3_len = ireq->i_len;
2223 break;
2224 default:
2225 error = EINVAL;
2226 break;
2227 }
2228 break;
2229 case IEEE80211_IOC_WEP:
2230 switch (ireq->i_val) {
2231 case IEEE80211_WEP_OFF:
2232 config->an_authtype &=
2233 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2234 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2235 break;
2236 case IEEE80211_WEP_ON:
2237 config->an_authtype |=
2238 AN_AUTHTYPE_PRIVACY_IN_USE;
2239 config->an_authtype &=
2240 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2241 break;
2242 case IEEE80211_WEP_MIXED:
2243 config->an_authtype |=
2244 AN_AUTHTYPE_PRIVACY_IN_USE |
2245 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2246 break;
2247 default:
2248 error = EINVAL;
2249 break;
2250 }
2251 break;
2252 case IEEE80211_IOC_WEPKEY:
2253 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2254 ireq->i_len > 13) {
2255 error = EINVAL;
2256 break;
2257 }
2258 error = copyin(ireq->i_data, tmpstr, 13);
2259 if (error != 0)
2260 break;
2261 /*
2262 * Map the 9th key into the home mode
2263 * since that is how it is stored on
2264 * the card
2265 */
2266 bzero(&sc->areq, sizeof(struct an_ltv_key));
2267 sc->areq.an_len = sizeof(struct an_ltv_key);
2268 key->mac[0] = 1; /* The others are 0. */
2269 if (ireq->i_val < 4) {
2270 sc->areq.an_type = AN_RID_WEP_TEMP;
2271 key->kindex = ireq->i_val;
2272 } else {
2273 sc->areq.an_type = AN_RID_WEP_PERM;
2274 key->kindex = ireq->i_val - 4;
2275 }
2276 key->klen = ireq->i_len;
2277 bcopy(tmpstr, key->key, key->klen);
2278 break;
2279 case IEEE80211_IOC_WEPTXKEY:
2280 if (ireq->i_val < 0 || ireq->i_val > 4) {
2281 error = EINVAL;
2282 break;
2283 }
2284
2285 /*
2286 * Map the 5th key into the home mode
2287 * since that is how it is stored on
2288 * the card
2289 */
2290 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2291 sc->areq.an_type = AN_RID_ACTUALCFG;
2292 if (an_read_record(sc,
2293 (struct an_ltv_gen *)&sc->areq)) {
2294 error = EINVAL;
2295 break;
2296 }
2297 if (ireq->i_val == 4) {
2298 config->an_home_product |= AN_HOME_NETWORK;
2299 ireq->i_val = 0;
2300 } else {
2301 config->an_home_product &= ~AN_HOME_NETWORK;
2302 }
2303
2304 sc->an_config.an_home_product
2305 = config->an_home_product;
2306
2307 /* update configuration */
2308 an_init(sc);
2309
2310 bzero(&sc->areq, sizeof(struct an_ltv_key));
2311 sc->areq.an_len = sizeof(struct an_ltv_key);
2312 sc->areq.an_type = AN_RID_WEP_PERM;
2313 key->kindex = 0xffff;
2314 key->mac[0] = ireq->i_val;
2315 break;
2316 case IEEE80211_IOC_AUTHMODE:
2317 switch (ireq->i_val) {
2318 case IEEE80211_AUTH_NONE:
2319 config->an_authtype = AN_AUTHTYPE_NONE |
2320 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2321 break;
2322 case IEEE80211_AUTH_OPEN:
2323 config->an_authtype = AN_AUTHTYPE_OPEN |
2324 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2325 break;
2326 case IEEE80211_AUTH_SHARED:
2327 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2328 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2329 break;
2330 default:
2331 error = EINVAL;
2332 }
2333 break;
2334 case IEEE80211_IOC_STATIONNAME:
2335 if (ireq->i_len > 16) {
2336 error = EINVAL;
2337 break;
2338 }
2339 bzero(config->an_nodename, 16);
2340 error = copyin(ireq->i_data,
2341 config->an_nodename, ireq->i_len);
2342 break;
2343 case IEEE80211_IOC_CHANNEL:
2344 /*
2345 * The actual range is 1-14, but if you set it
2346 * to 0 you get the default so we let that work
2347 * too.
2348 */
2349 if (ireq->i_val < 0 || ireq->i_val >14) {
2350 error = EINVAL;
2351 break;
2352 }
2353 config->an_ds_channel = ireq->i_val;
2354 break;
2355 case IEEE80211_IOC_POWERSAVE:
2356 switch (ireq->i_val) {
2357 case IEEE80211_POWERSAVE_OFF:
2358 config->an_psave_mode = AN_PSAVE_NONE;
2359 break;
2360 case IEEE80211_POWERSAVE_CAM:
2361 config->an_psave_mode = AN_PSAVE_CAM;
2362 break;
2363 case IEEE80211_POWERSAVE_PSP:
2364 config->an_psave_mode = AN_PSAVE_PSP;
2365 break;
2366 case IEEE80211_POWERSAVE_PSP_CAM:
2367 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2368 break;
2369 default:
2370 error = EINVAL;
2371 break;
2372 }
2373 break;
2374 case IEEE80211_IOC_POWERSAVESLEEP:
2375 config->an_listen_interval = ireq->i_val;
2376 break;
2377 }
2378
2379 if (!error)
2380 an_setdef(sc, &sc->areq);
2381 break;
2382 default:
4cde4dd5 2383 error = ether_ioctl(ifp, command, data);
984263bc
MD
2384 break;
2385 }
2386out:
2387 splx(s);
2388
2389 return(error != 0);
2390}
2391
2392static int
2393an_init_tx_ring(sc)
2394 struct an_softc *sc;
2395{
2396 int i;
2397 int id;
2398
984263bc
MD
2399 if (!sc->mpi350) {
2400 for (i = 0; i < AN_TX_RING_CNT; i++) {
2401 if (an_alloc_nicmem(sc, 1518 +
2402 0x44, &id))
2403 return(ENOMEM);
2404 sc->an_rdata.an_tx_fids[i] = id;
2405 sc->an_rdata.an_tx_ring[i] = 0;
2406 }
2407 }
2408
2409 sc->an_rdata.an_tx_prod = 0;
2410 sc->an_rdata.an_tx_cons = 0;
2411 sc->an_rdata.an_tx_empty = 1;
2412
2413 return(0);
2414}
2415
2416static void
2417an_init(xsc)
2418 void *xsc;
2419{
2420 struct an_softc *sc = xsc;
2421 struct ifnet *ifp = &sc->arpcom.ac_if;
2422 int s;
2423
2424 s = splimp();
2425
984263bc
MD
2426 if (ifp->if_flags & IFF_RUNNING)
2427 an_stop(sc);
2428
2429 sc->an_associated = 0;
2430
2431 /* Allocate the TX buffers */
2432 if (an_init_tx_ring(sc)) {
2433 an_reset(sc);
2434 if (sc->mpi350)
2435 an_init_mpi350_desc(sc);
2436 if (an_init_tx_ring(sc)) {
1c70eebf 2437 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2438 splx(s);
2439 return;
2440 }
2441 }
2442
2443 /* Set our MAC address. */
2444 bcopy((char *)&sc->arpcom.ac_enaddr,
2445 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2446
2447 if (ifp->if_flags & IFF_BROADCAST)
2448 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2449 else
2450 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2451
2452 if (ifp->if_flags & IFF_MULTICAST)
2453 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2454
2455 if (ifp->if_flags & IFF_PROMISC) {
2456 if (sc->an_monitor & AN_MONITOR) {
2457 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2458 sc->an_config.an_rxmode |=
2459 AN_RXMODE_80211_MONITOR_ANYBSS |
2460 AN_RXMODE_NO_8023_HEADER;
2461 } else {
2462 sc->an_config.an_rxmode |=
2463 AN_RXMODE_80211_MONITOR_CURBSS |
2464 AN_RXMODE_NO_8023_HEADER;
2465 }
2466 }
2467 }
2468
2469 if (sc->an_have_rssimap)
2470 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2471
2472 /* Set the ssid list */
2473 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2474 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2475 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 2476 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2477 splx(s);
2478 return;
2479 }
2480
2481 /* Set the AP list */
2482 sc->an_aplist.an_type = AN_RID_APLIST;
2483 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2484 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 2485 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2486 splx(s);
2487 return;
2488 }
2489
2490 /* Set the configuration in the NIC */
2491 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2492 sc->an_config.an_type = AN_RID_GENCONFIG;
2493 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 2494 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2495 splx(s);
2496 return;
2497 }
2498
2499 /* Enable the MAC */
2500 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
1c70eebf 2501 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2502 splx(s);
2503 return;
2504 }
2505
2506 if (ifp->if_flags & IFF_PROMISC)
2507 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2508
2509 /* enable interrupts */
2510 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2511
2512 ifp->if_flags |= IFF_RUNNING;
2513 ifp->if_flags &= ~IFF_OACTIVE;
2514
89c0f216 2515 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2516 splx(s);
2517
2518 return;
2519}
2520
2521static void
2522an_start(ifp)
2523 struct ifnet *ifp;
2524{
2525 struct an_softc *sc;
2526 struct mbuf *m0 = NULL;
2527 struct an_txframe_802_3 tx_frame_802_3;
2528 struct ether_header *eh;
2529 int id, idx, i;
2530 unsigned char txcontrol;
2531 struct an_card_tx_desc an_tx_desc;
2532 u_int8_t *ptr;
2533 u_int8_t *buf;
2534
2535 sc = ifp->if_softc;
2536
984263bc
MD
2537 if (ifp->if_flags & IFF_OACTIVE)
2538 return;
2539
2540 if (!sc->an_associated)
2541 return;
2542
2543 /* We can't send in monitor mode so toss any attempts. */
2544 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2545 ifq_purge(&ifp->if_snd);
984263bc
MD
2546 return;
2547 }
2548
2549 idx = sc->an_rdata.an_tx_prod;
2550
2551 if (!sc->mpi350) {
2552 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2553
2554 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2555 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2556 if (m0 == NULL)
2557 break;
2558
2559 id = sc->an_rdata.an_tx_fids[idx];
2560 eh = mtod(m0, struct ether_header *);
2561
2562 bcopy((char *)&eh->ether_dhost,
2563 (char *)&tx_frame_802_3.an_tx_dst_addr,
2564 ETHER_ADDR_LEN);
2565 bcopy((char *)&eh->ether_shost,
2566 (char *)&tx_frame_802_3.an_tx_src_addr,
2567 ETHER_ADDR_LEN);
2568
2569 /* minus src/dest mac & type */
2570 tx_frame_802_3.an_tx_802_3_payload_len =
2571 m0->m_pkthdr.len - 12;
2572
2573 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2574 tx_frame_802_3.an_tx_802_3_payload_len,
2575 (caddr_t)&sc->an_txbuf);
2576
2577 txcontrol = AN_TXCTL_8023;
2578 /* write the txcontrol only */
2579 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2580 sizeof(txcontrol));
2581
2582 /* 802_3 header */
2583 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2584 sizeof(struct an_txframe_802_3));
2585
2586 /* in mbuf header type is just before payload */
2587 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2588 tx_frame_802_3.an_tx_802_3_payload_len);
2589
7600679e 2590 BPF_MTAP(ifp, m0);
984263bc
MD
2591
2592 m_freem(m0);
2593 m0 = NULL;
2594
2595 sc->an_rdata.an_tx_ring[idx] = id;
2596 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2597 if_printf(ifp, "xmit failed\n");
984263bc
MD
2598
2599 AN_INC(idx, AN_TX_RING_CNT);
2600 }
2601 } else { /* MPI-350 */
2602 while (sc->an_rdata.an_tx_empty ||
2603 idx != sc->an_rdata.an_tx_cons) {
38de8487 2604 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2605 if (m0 == NULL) {
2606 break;
2607 }
2608 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2609
2610 eh = mtod(m0, struct ether_header *);
2611
2612 /* DJA optimize this to limit bcopy */
2613 bcopy((char *)&eh->ether_dhost,
2614 (char *)&tx_frame_802_3.an_tx_dst_addr,
2615 ETHER_ADDR_LEN);
2616 bcopy((char *)&eh->ether_shost,
2617 (char *)&tx_frame_802_3.an_tx_src_addr,
2618 ETHER_ADDR_LEN);
2619
2620 /* minus src/dest mac & type */
2621 tx_frame_802_3.an_tx_802_3_payload_len =
2622 m0->m_pkthdr.len - 12;
2623
2624 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2625 tx_frame_802_3.an_tx_802_3_payload_len,
2626 (caddr_t)&sc->an_txbuf);
2627
2628 txcontrol = AN_TXCTL_8023;
2629 /* write the txcontrol only */
2630 bcopy((caddr_t)&txcontrol, &buf[0x08],
2631 sizeof(txcontrol));
2632
2633 /* 802_3 header */
2634 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2635 sizeof(struct an_txframe_802_3));
2636
2637 /* in mbuf header type is just before payload */
2638 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2639 tx_frame_802_3.an_tx_802_3_payload_len);
2640
2641
2642 bzero(&an_tx_desc, sizeof(an_tx_desc));
2643 an_tx_desc.an_offset = 0;
2644 an_tx_desc.an_eoc = 1;
2645 an_tx_desc.an_valid = 1;
2646 an_tx_desc.an_len = 0x44 +
2647 tx_frame_802_3.an_tx_802_3_payload_len;
2648 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2649 ptr = (u_int8_t*)&an_tx_desc;
2650 for (i = 0; i < sizeof(an_tx_desc); i++) {
2651 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2652 ptr[i]);
2653 }
2654
7600679e 2655 BPF_MTAP(ifp, m0);
984263bc
MD
2656
2657 m_freem(m0);
2658 m0 = NULL;
2659
2660 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2661
2662 AN_INC(idx, AN_MAX_TX_DESC);
2663 sc->an_rdata.an_tx_empty = 0;
2664 }
2665 }
2666
2667 if (m0 != NULL)
2668 ifp->if_flags |= IFF_OACTIVE;
2669
2670 sc->an_rdata.an_tx_prod = idx;
2671
2672 /*
2673 * Set a timeout in case the chip goes out to lunch.
2674 */
2675 ifp->if_timer = 5;
2676
2677 return;
2678}
2679
2680void
2681an_stop(sc)
2682 struct an_softc *sc;
2683{
2684 struct ifnet *ifp;
2685 int i;
2686 int s;
2687
2688 s = splimp();
2689
984263bc
MD
2690 ifp = &sc->arpcom.ac_if;
2691
2692 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2693 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2694 an_cmd(sc, AN_CMD_DISABLE, 0);
2695
2696 for (i = 0; i < AN_TX_RING_CNT; i++)
2697 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2698
89c0f216 2699 callout_stop(&sc->an_stat_timer);
984263bc
MD
2700
2701 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2702
2703 if (sc->an_flash_buffer) {
2704 free(sc->an_flash_buffer, M_DEVBUF);
2705 sc->an_flash_buffer = NULL;
2706 }
2707
2708 splx(s);
2709
2710 return;
2711}
2712
2713static void
2714an_watchdog(ifp)
2715 struct ifnet *ifp;
2716{
2717 struct an_softc *sc;
2718 int s;
2719
2720 sc = ifp->if_softc;
2721 s = splimp();
2722
1c70eebf 2723 if_printf(ifp, "device timeout\n");
984263bc
MD
2724
2725 an_reset(sc);
2726 if (sc->mpi350)
2727 an_init_mpi350_desc(sc);
2728 an_init(sc);
2729
2730 ifp->if_oerrors++;
2731 splx(s);
2732
2733 return;
2734}
2735
2736void
2737an_shutdown(dev)
2738 device_t dev;
2739{
2740 struct an_softc *sc;
2741
2742 sc = device_get_softc(dev);
2743 an_stop(sc);
2744
2745 return;
2746}
2747
2748void
2749an_resume(dev)
2750 device_t dev;
2751{
2752 struct an_softc *sc;
2753 struct ifnet *ifp;
2754 int i;
2755
2756 sc = device_get_softc(dev);
2757 ifp = &sc->arpcom.ac_if;
2758
2759 an_reset(sc);
2760 if (sc->mpi350)
2761 an_init_mpi350_desc(sc);
2762 an_init(sc);
2763
2764 /* Recovery temporary keys */
2765 for (i = 0; i < 4; i++) {
2766 sc->areq.an_type = AN_RID_WEP_TEMP;
2767 sc->areq.an_len = sizeof(struct an_ltv_key);
2768 bcopy(&sc->an_temp_keys[i],
2769 &sc->areq, sizeof(struct an_ltv_key));
2770 an_setdef(sc, &sc->areq);
2771 }
2772
2773 if (ifp->if_flags & IFF_UP)
2774 an_start(ifp);
2775
2776 return;
2777}
2778
2779#ifdef ANCACHE
2780/* Aironet signal strength cache code.
2781 * store signal/noise/quality on per MAC src basis in
2782 * a small fixed cache. The cache wraps if > MAX slots
2783 * used. The cache may be zeroed out to start over.
2784 * Two simple filters exist to reduce computation:
2785 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2786 * to ignore some packets. It defaults to ip only.
2787 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2788 * 2. multicast/broadcast only. This may be used to
2789 * ignore unicast packets and only cache signal strength
2790 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2791 * beacons and not unicast traffic.
2792 *
2793 * The cache stores (MAC src(index), IP src (major clue), signal,
2794 * quality, noise)
2795 *
2796 * No apologies for storing IP src here. It's easy and saves much
2797 * trouble elsewhere. The cache is assumed to be INET dependent,
2798 * although it need not be.
2799 *
2800 * Note: the Aironet only has a single byte of signal strength value
2801 * in the rx frame header, and it's not scaled to anything sensible.
2802 * This is kind of lame, but it's all we've got.
2803 */
2804
2805#ifdef documentation
2806
2807int an_sigitems; /* number of cached entries */
2808struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2809int an_nextitem; /* index/# of entries */
2810
2811
2812#endif
2813
2814/* control variables for cache filtering. Basic idea is
2815 * to reduce cost (e.g., to only Mobile-IP agent beacons
2816 * which are broadcast or multicast). Still you might
2817 * want to measure signal strength anth unicast ping packets
2818 * on a pt. to pt. ant. setup.
2819 */
2820/* set true if you want to limit cache items to broadcast/mcast
2821 * only packets (not unicast). Useful for mobile-ip beacons which
2822 * are broadcast/multicast at network layer. Default is all packets
2823 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2824 */
2825static int an_cache_mcastonly = 0;
2826SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2827 &an_cache_mcastonly, 0, "");
2828
2829/* set true if you want to limit cache items to IP packets only
2830*/
2831static int an_cache_iponly = 1;
2832SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2833 &an_cache_iponly, 0, "");
2834
2835/*
2836 * an_cache_store, per rx packet store signal
2837 * strength in MAC (src) indexed cache.
2838 */
2839static void
3013ac0e 2840an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2841 struct an_softc *sc;
984263bc
MD
2842 struct mbuf *m;
2843 u_int8_t rx_rssi;
2844 u_int8_t rx_quality;
2845{
3013ac0e
JS
2846 struct ether_header *eh = mtod(m, struct ether_header *);
2847 struct ip *ip = NULL;
984263bc
MD
2848 int i;
2849 static int cache_slot = 0; /* use this cache entry */
2850 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2851
2852 /* filters:
2853 * 1. ip only
2854 * 2. configurable filter to throw out unicast packets,
2855 * keep multicast only.
2856 */
2857
3013ac0e
JS
2858 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2859 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2860 else if (an_cache_iponly)
984263bc 2861 return;
984263bc
MD
2862
2863 /* filter for broadcast/multicast only
2864 */
2865 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2866 return;
2867 }
2868
2869#ifdef SIGDEBUG
1c70eebf
JS
2870 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2871 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2872#endif
2873
984263bc
MD
2874 /* do a linear search for a matching MAC address
2875 * in the cache table
2876 * . MAC address is 6 bytes,
2877 * . var w_nextitem holds total number of entries already cached
2878 */
2879 for (i = 0; i < sc->an_nextitem; i++) {
2880 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2881 /* Match!,
2882 * so we already have this entry,
2883 * update the data
2884 */
2885 break;
2886 }
2887 }
2888
2889 /* did we find a matching mac address?
2890 * if yes, then overwrite a previously existing cache entry
2891 */
2892 if (i < sc->an_nextitem ) {
2893 cache_slot = i;
2894 }
2895 /* else, have a new address entry,so
2896 * add this new entry,
2897 * if table full, then we need to replace LRU entry
2898 */
2899 else {
2900
2901 /* check for space in cache table
2902 * note: an_nextitem also holds number of entries
2903 * added in the cache table
2904 */
2905 if ( sc->an_nextitem < MAXANCACHE ) {
2906 cache_slot = sc->an_nextitem;
2907 sc->an_nextitem++;
2908 sc->an_sigitems = sc->an_nextitem;
2909 }
2910 /* no space found, so simply wrap anth wrap index
2911 * and "zap" the next entry
2912 */
2913 else {
2914 if (wrapindex == MAXANCACHE) {
2915 wrapindex = 0;
2916 }
2917 cache_slot = wrapindex++;
2918 }
2919 }
2920
2921 /* invariant: cache_slot now points at some slot
2922 * in cache.
2923 */
2924 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2925 log(LOG_ERR, "an_cache_store, bad index: %d of "
2926 "[0..%d], gross cache error\n",
2927 cache_slot, MAXANCACHE);
2928 return;
2929 }
2930
2931 /* store items in cache
2932 * .ip source address
2933 * .mac src
2934 * .signal, etc.
2935 */
3013ac0e 2936 if (ip != NULL) {
984263bc
MD
2937 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2938 }
2939 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2940
2941
2942 switch (an_cache_mode) {
2943 case DBM:
2944 if (sc->an_have_rssimap) {
2945 sc->an_sigcache[cache_slot].signal =
2946 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2947 sc->an_sigcache[cache_slot].quality =
2948 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2949 } else {
2950 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2951 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2952 }
2953 break;
2954 case PERCENT:
2955 if (sc->an_have_rssimap) {
2956 sc->an_sigcache[cache_slot].signal =
2957 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2958 sc->an_sigcache[cache_slot].quality =
2959 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2960 } else {
2961 if (rx_rssi > 100)
2962 rx_rssi = 100;
2963 if (rx_quality > 100)
2964 rx_quality = 100;
2965 sc->an_sigcache[cache_slot].signal = rx_rssi;
2966 sc->an_sigcache[cache_slot].quality = rx_quality;
2967 }
2968 break;
2969 case RAW:
2970 sc->an_sigcache[cache_slot].signal = rx_rssi;
2971 sc->an_sigcache[cache_slot].quality = rx_quality;
2972 break;
2973 }
2974
2975 sc->an_sigcache[cache_slot].noise = 0;
2976
2977 return;
2978}
2979#endif
2980
2981static int
2982an_media_change(ifp)
2983 struct ifnet *ifp;
2984{
2985 struct an_softc *sc = ifp->if_softc;
2986 struct an_ltv_genconfig *cfg;
2987 int otype = sc->an_config.an_opmode;
2988 int orate = sc->an_tx_rate;
2989
2990 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
2991 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
2992 else
2993 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
2994
2995 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
2996 case IFM_IEEE80211_DS1:
2997 sc->an_tx_rate = AN_RATE_1MBPS;
2998 break;
2999 case IFM_IEEE80211_DS2:
3000 sc->an_tx_rate = AN_RATE_2MBPS;
3001 break;
3002 case IFM_IEEE80211_DS5:
3003 sc->an_tx_rate = AN_RATE_5_5MBPS;
3004 break;
3005 case IFM_IEEE80211_DS11:
3006 sc->an_tx_rate = AN_RATE_11MBPS;
3007 break;
3008 case IFM_AUTO:
3009 sc->an_tx_rate = 0;
3010 break;
3011 }
3012
3013 if (orate != sc->an_tx_rate) {
3014 /* Read the current configuration */
3015 sc->an_config.an_type = AN_RID_GENCONFIG;
3016 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3017 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3018 cfg = &sc->an_config;
3019
3020 /* clear other rates and set the only one we want */
3021 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3022 cfg->an_rates[0] = sc->an_tx_rate;
3023
3024 /* Save the new rate */
3025 sc->an_config.an_type = AN_RID_GENCONFIG;
3026 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3027 }
3028
3029 if (otype != sc->an_config.an_opmode ||
3030 orate != sc->an_tx_rate)
3031 an_init(sc);
3032
3033 return(0);
3034}
3035
3036static void
3037an_media_status(ifp, imr)
3038 struct ifnet *ifp;
3039 struct ifmediareq *imr;
3040{
3041 struct an_ltv_status status;
3042 struct an_softc *sc = ifp->if_softc;
3043
3044 status.an_len = sizeof(status);
3045 status.an_type = AN_RID_STATUS;
3046 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3047 /* If the status read fails, just lie. */
3048 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3049 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3050 }
3051
3052 if (sc->an_tx_rate == 0) {
3053 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3054 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3055 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3056 switch (status.an_current_tx_rate) {
3057 case AN_RATE_1MBPS:
3058 imr->ifm_active |= IFM_IEEE80211_DS1;
3059 break;
3060 case AN_RATE_2MBPS:
3061 imr->ifm_active |= IFM_IEEE80211_DS2;
3062 break;
3063 case AN_RATE_5_5MBPS:
3064 imr->ifm_active |= IFM_IEEE80211_DS5;
3065 break;
3066 case AN_RATE_11MBPS:
3067 imr->ifm_active |= IFM_IEEE80211_DS11;
3068 break;
3069 }
3070 } else {
3071 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3072 }
3073
3074 imr->ifm_status = IFM_AVALID;
3075 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3076 imr->ifm_status |= IFM_ACTIVE;
3077}
3078
3079/********************** Cisco utility support routines *************/
3080
3081/*
3082 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3083 * Linux driver
3084 */
3085
3086static int
3087readrids(ifp, l_ioctl)
3088 struct ifnet *ifp;
3089 struct aironet_ioctl *l_ioctl;
3090{
3091 unsigned short rid;
3092 struct an_softc *sc;
3093
3094 switch (l_ioctl->command) {
3095 case AIROGCAP:
3096 rid = AN_RID_CAPABILITIES;
3097 break;
3098 case AIROGCFG:
3099 rid = AN_RID_GENCONFIG;
3100 break;
3101 case AIROGSLIST:
3102 rid = AN_RID_SSIDLIST;
3103 break;
3104 case AIROGVLIST:
3105 rid = AN_RID_APLIST;
3106 break;
3107 case AIROGDRVNAM:
3108 rid = AN_RID_DRVNAME;
3109 break;
3110 case AIROGEHTENC:
3111 rid = AN_RID_ENCAPPROTO;
3112 break;
3113 case AIROGWEPKTMP:
3114 rid = AN_RID_WEP_TEMP;
3115 break;
3116 case AIROGWEPKNV:
3117 rid = AN_RID_WEP_PERM;
3118 break;
3119 case AIROGSTAT:
3120 rid = AN_RID_STATUS;
3121 break;
3122 case AIROGSTATSD32:
3123 rid = AN_RID_32BITS_DELTA;
3124 break;
3125 case AIROGSTATSC32:
3126 rid = AN_RID_32BITS_CUM;
3127 break;
3128 default:
3129 rid = 999;
3130 break;
3131 }
3132
3133 if (rid == 999) /* Is bad command */
3134 return -EINVAL;
3135
3136 sc = ifp->if_softc;
3137 sc->areq.an_len = AN_MAX_DATALEN;
3138 sc->areq.an_type = rid;
3139
3140 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3141
3142 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3143
3144 /* the data contains the length at first */
3145 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3146 sizeof(sc->areq.an_len))) {
3147 return -EFAULT;
3148 }
3149 /* Just copy the data back */
3150 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3151 l_ioctl->len)) {
3152 return -EFAULT;
3153 }
3154 return 0;
3155}
3156
3157static int
3158writerids(ifp, l_ioctl)
3159 struct ifnet *ifp;
3160 struct aironet_ioctl *l_ioctl;
3161{
3162 struct an_softc *sc;
3163 int rid, command;
3164
3165 sc = ifp->if_softc;
3166 rid = 0;
3167 command = l_ioctl->command;
3168
3169 switch (command) {
3170 case AIROPSIDS:
3171 rid = AN_RID_SSIDLIST;
3172 break;
3173 case AIROPCAP:
3174 rid = AN_RID_CAPABILITIES;
3175 break;
3176 case AIROPAPLIST:
3177 rid = AN_RID_APLIST;
3178 break;
3179 case AIROPCFG:
3180 rid = AN_RID_GENCONFIG;
3181 break;
3182 case AIROPMACON:
3183 an_cmd(sc, AN_CMD_ENABLE, 0);
3184 return 0;
3185 break;
3186 case AIROPMACOFF:
3187 an_cmd(sc, AN_CMD_DISABLE, 0);
3188 return 0;
3189 break;
3190 case AIROPSTCLR:
3191 /*
3192 * This command merely clears the counts does not actually
3193 * store any data only reads rid. But as it changes the cards
3194 * state, I put it in the writerid routines.
3195 */
3196
3197 rid = AN_RID_32BITS_DELTACLR;
3198 sc = ifp->if_softc;
3199 sc->areq.an_len = AN_MAX_DATALEN;
3200 sc->areq.an_type = rid;
3201
3202 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3203 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3204
3205 /* the data contains the length at first */
3206 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3207 sizeof(sc->areq.an_len))) {
3208 return -EFAULT;
3209 }
3210 /* Just copy the data */
3211 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3212 l_ioctl->len)) {
3213 return -EFAULT;
3214 }
3215 return 0;
3216 break;
3217 case AIROPWEPKEY:
3218 rid = AN_RID_WEP_TEMP;
3219 break;
3220 case AIROPWEPKEYNV:
3221 rid = AN_RID_WEP_PERM;
3222 break;
3223 case AIROPLEAPUSR:
3224 rid = AN_RID_LEAPUSERNAME;
3225 break;
3226 case AIROPLEAPPWD:
3227 rid = AN_RID_LEAPPASSWORD;
3228 break;
3229 default:
3230 return -EOPNOTSUPP;
3231 }
3232
3233 if (rid) {
3234 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3235 return -EINVAL;
3236 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3237 sc->areq.an_type = rid;
3238
3239 /* Just copy the data back */
3240 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3241 l_ioctl->len);
3242
3243 an_cmd(sc, AN_CMD_DISABLE, 0);
3244 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3245 an_cmd(sc, AN_CMD_ENABLE, 0);
3246 return 0;
3247 }
3248 return -EOPNOTSUPP;
3249}
3250
3251/*
3252 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3253 * Linux driver
3254 */
3255
377d4740 3256#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3257#define FLASH_COMMAND 0x7e7e
3258#define FLASH_SIZE 32 * 1024
3259
3260static int
3261unstickbusy(ifp)
3262 struct ifnet *ifp;
3263{
3264 struct an_softc *sc = ifp->if_softc;
3265
3266 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3267 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3268 AN_EV_CLR_STUCK_BUSY);
3269 return 1;
3270 }
3271 return 0;
3272}
3273
3274/*
3275 * Wait for busy completion from card wait for delay uSec's Return true for
3276 * success meaning command reg is clear
3277 */
3278
3279static int
3280WaitBusy(ifp, uSec)
3281 struct ifnet *ifp;
3282 int uSec;
3283{
3284 int statword = 0xffff;
3285 int delay = 0;
3286 struct an_softc *sc = ifp->if_softc;
3287
3288 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3289 FLASH_DELAY(10);
3290 delay += 10;
3291 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3292
3293 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3294 unstickbusy(ifp);
3295 }
3296 }
3297
3298 return 0 == (AN_CMD_BUSY & statword);
3299}
3300
3301/*
3302 * STEP 1) Disable MAC and do soft reset on card.
3303 */
3304
3305static int
3306cmdreset(ifp)
3307 struct ifnet *ifp;
3308{
3309 int status;
3310 struct an_softc *sc = ifp->if_softc;
3311
3312 an_stop(sc);
3313
3314 an_cmd(sc, AN_CMD_DISABLE, 0);
3315
3316 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3317 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3318 return -EBUSY;
3319 }
3320 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3321
3322 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3323
3324
3325 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3326 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3327 return -EBUSY;
3328 }
3329 return 0;
3330}
3331
3332/*
3333 * STEP 2) Put the card in legendary flash mode
3334 */
3335
3336static int
3337setflashmode(ifp)
3338 struct ifnet *ifp;
3339{
3340 int status;
3341 struct an_softc *sc = ifp->if_softc;
3342
3343 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3344 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3345 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3346 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3347
3348 /*
3349 * mdelay(500); // 500ms delay
3350 */
3351
3352 FLASH_DELAY(500);
3353
3354 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3355 printf("Waitbusy hang after setflash mode\n");
3356 return -EIO;
3357 }
3358 return 0;
3359}
3360
3361/*
3362 * Get a character from the card matching matchbyte Step 3)
3363 */
3364
3365static int
3366flashgchar(ifp, matchbyte, dwelltime)
3367 struct ifnet *ifp;
3368 int matchbyte;
3369 int dwelltime;
3370{
3371 int rchar;
3372 unsigned char rbyte = 0;
3373 int success = -1;
3374 struct an_softc *sc = ifp->if_softc;
3375
3376
3377 do {
3378 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3379
3380 if (dwelltime && !(0x8000 & rchar)) {
3381 dwelltime -= 10;
3382 FLASH_DELAY(10);
3383 continue;
3384 }
3385 rbyte = 0xff & rchar;
3386
3387 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3388 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3389 success = 1;
3390 break;
3391 }
3392 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3393 break;
3394 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3395
3396 } while (dwelltime > 0);
3397 return success;
3398}
3399
3400/*
3401 * Put character to SWS0 wait for dwelltime x 50us for echo .
3402 */
3403
3404static int
3405flashpchar(ifp, byte, dwelltime)
3406 struct ifnet *ifp;
3407 int byte;
3408 int dwelltime;
3409{
3410 int echo;
3411 int pollbusy, waittime;
3412 struct an_softc *sc = ifp->if_softc;
3413
3414 byte |= 0x8000;
3415
3416 if (dwelltime == 0)
3417 dwelltime = 200;
3418
3419 waittime = dwelltime;
3420
3421 /*
3422 * Wait for busy bit d15 to go false indicating buffer empty
3423 */
3424 do {
3425 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3426
3427 if (pollbusy & 0x8000) {
3428 FLASH_DELAY(50);
3429 waittime -= 50;
3430 continue;
3431 } else
3432 break;
3433 }
3434 while (waittime >= 0);
3435
3436 /* timeout for busy clear wait */
3437
3438 if (waittime <= 0) {
1c70eebf 3439 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3440 return -1;
3441 }
3442 /*
3443 * Port is clear now write byte and wait for it to echo back
3444 */
3445 do {
3446 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3447 FLASH_DELAY(50);
3448 dwelltime -= 50;
3449 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3450 } while (dwelltime >= 0 && echo != byte);
3451
3452
3453 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3454
3455 return echo == byte;
3456}
3457
3458/*
3459 * Transfer 32k of firmware data from user buffer to our buffer and send to
3460 * the card
3461 */
3462
3463static int
3464flashputbuf(ifp)
3465 struct ifnet *ifp;
3466{
3467 unsigned short *bufp;
3468 int nwords;
3469 struct an_softc *sc = ifp->if_softc;
3470
3471 /* Write stuff */
3472
3473 bufp = sc->an_flash_buffer;
3474
3475 if (!sc->mpi350) {
3476 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3477 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3478
3479 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3480 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3481 }
3482 } else {
3483 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3484 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3485 ((u_int32_t *)bufp)[nwords] & 0xffff);
3486 }
3487 }
3488
3489 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3490
3491 return 0;
3492}
3493
3494/*
3495 * After flashing restart the card.
3496 */
3497
3498static int
3499flashrestart(ifp)
3500 struct ifnet *ifp;
3501{
3502 int status = 0;
3503 struct an_softc *sc = ifp->if_softc;
3504
3505 FLASH_DELAY(1024); /* Added 12/7/00 */
3506
3507 an_init(sc);
3508
3509 FLASH_DELAY(1024); /* Added 12/7/00 */
3510 return status;
3511}
3512
3513/*
3514 * Entry point for flash ioclt.
3515 */
3516
3517static int
3518flashcard(ifp, l_ioctl)
3519 struct ifnet *ifp;
3520 struct aironet_ioctl *l_ioctl;
3521{
3522 int z = 0, status;
3523 struct an_softc *sc;
3524
3525 sc = ifp->if_softc;
3526 if (sc->mpi350) {
1c70eebf 3527 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3528 return(-1);
3529 }
3530 status = l_ioctl->command;
3531
3532 switch (l_ioctl->command) {
3533 case AIROFLSHRST:
3534 return cmdreset(ifp);
3535 break;
3536 case AIROFLSHSTFL:
3537 if (sc->an_flash_buffer) {
3538 free(sc->an_flash_buffer, M_DEVBUF);
3539 sc->an_flash_buffer = NULL;
3540 }
3541 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3542 if (sc->an_flash_buffer)
3543 return setflashmode(ifp);
3544 else
3545 return ENOBUFS;
3546 break;
3547 case AIROFLSHGCHR: /* Get char from aux */
3548 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3549 z = *(int *)&sc->areq;
3550 if ((status = flashgchar(ifp, z, 8000)) == 1)
3551 return 0;
3552 else
3553 return -1;
3554 break;
3555 case AIROFLSHPCHR: /* Send char to card. */
3556 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3557 z = *(int *)&sc->areq;
3558 if ((status = flashpchar(ifp, z, 8000)) == -1)
3559 return -EIO;
3560 else
3561 return 0;
3562 break;
3563 case AIROFLPUTBUF: /* Send 32k to card */
3564 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3565 if_printf(ifp, "Buffer to big, %x %x\n",
3566 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3567 return -EINVAL;
3568 }
3569 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3570
3571 if ((status = flashputbuf(ifp)) != 0)
3572 return -EIO;
3573 else
3574 return 0;
3575 break;
3576 case AIRORESTART:
3577 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3578 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3579 return -EIO;
3580 } else
3581 return 0;
3582
3583 break;
3584 default:
3585 return -EINVAL;
3586 }
3587
3588 return -EINVAL;
3589}