kernel: Make SMP support default (and non-optional).
[dragonfly.git] / sys / bus / pci / fixup_pci.c
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1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
83c1faaa
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29 *
30 * $FreeBSD: src/sys/dev/pci/fixup_pci.c,v 1.7.8.1 2009/04/15 03:14:26 kensmith Exp $
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31 */
32
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33#include <sys/param.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37#include <sys/systm.h>
38#include <sys/bus.h>
39#include <sys/types.h>
40
41#include <bus/pci/pcivar.h>
42#include <bus/pci/pcireg.h>
43
44/*
45 * Chipset fixups.
46 *
47 * These routines are invoked during the probe phase for devices which
48 * typically don't have specific device drivers, but which require
49 * some cleaning up.
50 */
51
52static int fixup_pci_probe(device_t dev);
53static void fixwsc_natoma(device_t dev);
54static void fixc1_nforce2(device_t dev);
55
56static device_method_t fixup_pci_methods[] = {
57 /* Device interface */
58 DEVMETHOD(device_probe, fixup_pci_probe),
59 DEVMETHOD(device_attach, bus_generic_attach),
60 { 0, 0 }
61};
62
63static driver_t fixup_pci_driver = {
64 "fixup_pci",
65 fixup_pci_methods,
66 0,
67};
68
69static devclass_t fixup_pci_devclass;
70
aa2b9d05 71DRIVER_MODULE(fixup_pci, pci, fixup_pci_driver, fixup_pci_devclass, NULL, NULL);
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72
73static int
74fixup_pci_probe(device_t dev)
75{
76 switch (pci_get_devid(dev)) {
77 case 0x12378086: /* Intel 82440FX (Natoma) */
78 fixwsc_natoma(dev);
79 break;
80 case 0x01e010de: /* nVidia nForce2 */
81 fixc1_nforce2(dev);
82 break;
83 }
84 return(ENXIO);
85}
86
87static void
88fixwsc_natoma(device_t dev)
89{
90 int pmccfg;
91
92 pmccfg = pci_read_config(dev, 0x50, 2);
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93 if (pmccfg & 0x8000) {
94 kprintf("Correcting Natoma config for SMP\n");
95 pmccfg &= ~0x8000;
96 pci_write_config(dev, 0x50, pmccfg, 2);
97 }
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98}
99
100/*
101 * Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work
102 * around a hang that is triggered when the CPU generates a very fast
103 * CONNECT/HALT cycle sequence. Specifically, the hang can result in
104 * the lapic timer being stopped.
105 *
106 * This requires changing the value for config register at offset 0x6c
107 * for the Host-PCI bridge at bus/dev/function 0/0/0:
108 *
109 * Chip Current Value New Value
110 * ---- ---------- ----------
111 * C17 0x1F0FFF01 0x1F01FF01
112 * C18D 0x9F0FFF01 0x9F01FF01
113 *
114 * We do this by always clearing the bits in 0x000e0000.
115 *
116 * See also: http://lkml.org/lkml/2004/5/3/157
117 */
118static void
119fixc1_nforce2(device_t dev)
120{
121 uint32_t val;
122
123 if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 &&
124 pci_get_function(dev) == 0) {
125 val = pci_read_config(dev, 0x6c, 4);
126 if (val & 0x000e0000) {
127 kprintf("Correcting nForce2 C1 CPU disconnect hangs\n");
128 val &= ~0x000e0000;
129 pci_write_config(dev, 0x6c, val, 4);
130 }
131 }
132}