kernel: Make SMP support default (and non-optional).
[dragonfly.git] / sys / kern / kern_intr.c
CommitLineData
984263bc 1/*
033a4603 2 * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved.
ef0fdad1 3 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved.
984263bc
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4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
27 *
28 */
29
984263bc
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30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/malloc.h>
33#include <sys/kernel.h>
34#include <sys/sysctl.h>
ef0fdad1
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35#include <sys/thread.h>
36#include <sys/proc.h>
7e071e7a 37#include <sys/random.h>
477d3c1c 38#include <sys/serialize.h>
a7231bde 39#include <sys/interrupt.h>
477d3c1c 40#include <sys/bus.h>
37e7efec 41#include <sys/machintr.h>
984263bc 42
477d3c1c 43#include <machine/frame.h>
984263bc 44
684a93c4
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45#include <sys/thread2.h>
46#include <sys/mplock2.h>
47
c83c147e 48struct intr_info;
9d522d14 49
ef0fdad1
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50typedef struct intrec {
51 struct intrec *next;
9d522d14 52 struct intr_info *info;
ef0fdad1
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53 inthand2_t *handler;
54 void *argument;
477d3c1c 55 char *name;
ef0fdad1 56 int intr;
477d3c1c
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57 int intr_flags;
58 struct lwkt_serialize *serializer;
59} *intrec_t;
60
61struct intr_info {
62 intrec_t i_reclist;
63 struct thread i_thread;
64 struct random_softc i_random;
65 int i_running;
862f2618
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66 long i_count; /* interrupts dispatched */
67 int i_mplock_required;
477d3c1c
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68 int i_fast;
69 int i_slow;
f33e9c1c 70 int i_state;
b560de96
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71 int i_errorticks;
72 unsigned long i_straycount;
c83c147e
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73 int i_cpuid;
74 int i_intr;
75};
76
77static struct intr_info intr_info_ary[MAXCPU][MAX_INTS];
78static struct intr_info *swi_info_ary[MAX_SOFTINTS];
5f456c40 79
ff52cb5b 80static int max_installed_hard_intr[MAXCPU];
477d3c1c 81
a9d00ec1
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82#define EMERGENCY_INTR_POLLING_FREQ_MAX 20000
83
250ce837
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84/*
85 * Assert that callers into interrupt handlers don't return with
86 * dangling tokens, spinlocks, or mp locks.
87 */
3933a3ab 88#ifdef INVARIANTS
149a3d9e
VS
89
90#define TD_INVARIANTS_DECLARE \
149a3d9e
VS
91 int spincount; \
92 lwkt_tokref_t curstop
93
94#define TD_INVARIANTS_GET(td) \
95 do { \
0846e4ce 96 spincount = (td)->td_gd->gd_spinlocks; \
149a3d9e
VS
97 curstop = (td)->td_toks_stop; \
98 } while(0)
99
100#define TD_INVARIANTS_TEST(td, name) \
101 do { \
0846e4ce 102 KASSERT(spincount == (td)->td_gd->gd_spinlocks, \
149a3d9e
VS
103 ("spincount mismatch after interrupt handler %s", \
104 name)); \
105 KASSERT(curstop == (td)->td_toks_stop, \
106 ("token count mismatch after interrupt handler %s", \
107 name)); \
149a3d9e 108 } while(0)
250ce837
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109
110#else
111
b5d16701 112/* !INVARIANTS */
3933a3ab
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113
114#define TD_INVARIANTS_DECLARE
115#define TD_INVARIANTS_GET(td)
149a3d9e 116#define TD_INVARIANTS_TEST(td, name)
3933a3ab 117
149a3d9e 118#endif /* ndef INVARIANTS */
3933a3ab 119
a9d00ec1
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120static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS);
121static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS);
96d52ac8 122static void emergency_intr_timer_callback(systimer_t, int, struct intrframe *);
a9d00ec1
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123static void ithread_handler(void *arg);
124static void ithread_emergency(void *arg);
c83c147e 125static void report_stray_interrupt(struct intr_info *info, const char *func);
6355d931 126static void int_moveto_destcpu(int *, int);
4c846371 127static void int_moveto_origcpu(int, int);
c83c147e 128static void sched_ithd_intern(struct intr_info *info);
37d44089 129
ff52cb5b
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130static struct systimer emergency_intr_timer[MAXCPU];
131static struct thread emergency_intr_thread[MAXCPU];
a9d00ec1 132
f33e9c1c
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133#define ISTATE_NOTHREAD 0
134#define ISTATE_NORMAL 1
135#define ISTATE_LIVELOCKED 2
37d44089 136
b560de96 137static int livelock_limit = 40000;
0e6beaa3 138static int livelock_lowater = 20000;
b560de96 139static int livelock_debug = -1;
37d44089
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140SYSCTL_INT(_kern, OID_AUTO, livelock_limit,
141 CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit");
f33e9c1c
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142SYSCTL_INT(_kern, OID_AUTO, livelock_lowater,
143 CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore");
b560de96
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144SYSCTL_INT(_kern, OID_AUTO, livelock_debug,
145 CTLFLAG_RW, &livelock_debug, 0, "Livelock debug intr#");
984263bc 146
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147static int emergency_intr_enable = 0; /* emergency interrupt polling */
148TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable);
149SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW,
150 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable");
151
152static int emergency_intr_freq = 10; /* emergency polling frequency */
153TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq);
154SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW,
155 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency");
156
157/*
158 * Sysctl support routines
159 */
160static int
161sysctl_emergency_enable(SYSCTL_HANDLER_ARGS)
162{
ff52cb5b 163 int error, enabled, cpuid, freq;
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164
165 enabled = emergency_intr_enable;
166 error = sysctl_handle_int(oidp, &enabled, 0, req);
167 if (error || req->newptr == NULL)
168 return error;
169 emergency_intr_enable = enabled;
ff52cb5b
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170 if (emergency_intr_enable)
171 freq = emergency_intr_freq;
172 else
173 freq = 1;
174
175 for (cpuid = 0; cpuid < ncpus; ++cpuid)
176 systimer_adjust_periodic(&emergency_intr_timer[cpuid], freq);
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177 return 0;
178}
179
180static int
181sysctl_emergency_freq(SYSCTL_HANDLER_ARGS)
182{
ff52cb5b 183 int error, phz, cpuid, freq;
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184
185 phz = emergency_intr_freq;
186 error = sysctl_handle_int(oidp, &phz, 0, req);
187 if (error || req->newptr == NULL)
188 return error;
189 if (phz <= 0)
190 return EINVAL;
191 else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX)
192 phz = EMERGENCY_INTR_POLLING_FREQ_MAX;
193
194 emergency_intr_freq = phz;
ff52cb5b
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195 if (emergency_intr_enable)
196 freq = emergency_intr_freq;
197 else
198 freq = 1;
199
200 for (cpuid = 0; cpuid < ncpus; ++cpuid)
201 systimer_adjust_periodic(&emergency_intr_timer[cpuid], freq);
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202 return 0;
203}
984263bc 204
45d76888
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205/*
206 * Register an SWI or INTerrupt handler.
45d76888 207 */
477d3c1c
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208void *
209register_swi(int intr, inthand2_t *handler, void *arg, const char *name,
1da8d52f 210 struct lwkt_serialize *serializer, int cpuid)
984263bc 211{
5f456c40 212 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
ef0fdad1 213 panic("register_swi: bad intr %d", intr);
1da8d52f
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214
215 if (cpuid < 0)
216 cpuid = intr % ncpus;
217 return(register_int(intr, handler, arg, name, serializer, 0, cpuid));
984263bc
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218}
219
8619d09d
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220void *
221register_swi_mp(int intr, inthand2_t *handler, void *arg, const char *name,
1da8d52f 222 struct lwkt_serialize *serializer, int cpuid)
8619d09d
AH
223{
224 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
225 panic("register_swi: bad intr %d", intr);
1da8d52f
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226
227 if (cpuid < 0)
228 cpuid = intr % ncpus;
229 return(register_int(intr, handler, arg, name, serializer,
230 INTR_MPSAFE, cpuid));
8619d09d
AH
231}
232
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233void *
234register_int(int intr, inthand2_t *handler, void *arg, const char *name,
6355d931 235 struct lwkt_serialize *serializer, int intr_flags, int cpuid)
984263bc 236{
477d3c1c
MD
237 struct intr_info *info;
238 struct intrec **list;
239 intrec_t rec;
6355d931
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240 int orig_cpuid;
241
242 KKASSERT(cpuid >= 0 && cpuid < ncpus);
ef0fdad1 243
5f456c40 244 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 245 panic("register_int: bad intr %d", intr);
477d3c1c
MD
246 if (name == NULL)
247 name = "???";
c83c147e 248 info = &intr_info_ary[cpuid][intr];
477d3c1c 249
9d522d14
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250 /*
251 * Construct an interrupt handler record
252 */
efda3bd0
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253 rec = kmalloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT);
254 rec->name = kmalloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT);
477d3c1c 255 strcpy(rec->name, name);
ef0fdad1 256
9d522d14 257 rec->info = info;
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MD
258 rec->handler = handler;
259 rec->argument = arg;
ef0fdad1 260 rec->intr = intr;
477d3c1c 261 rec->intr_flags = intr_flags;
ef0fdad1 262 rec->next = NULL;
477d3c1c 263 rec->serializer = serializer;
ef0fdad1 264
ff52cb5b
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265 int_moveto_destcpu(&orig_cpuid, cpuid);
266
a9d00ec1
MD
267 /*
268 * Create an emergency polling thread and set up a systimer to wake
269 * it up.
270 */
ff52cb5b
SZ
271 if (emergency_intr_thread[cpuid].td_kstack == NULL) {
272 lwkt_create(ithread_emergency, NULL, NULL,
273 &emergency_intr_thread[cpuid],
c83c147e 274 TDF_NOSTART | TDF_INTTHREAD, cpuid, "ithreadE %d",
ff52cb5b
SZ
275 cpuid);
276 systimer_init_periodic_nq(&emergency_intr_timer[cpuid],
277 emergency_intr_timer_callback,
278 &emergency_intr_thread[cpuid],
a9d00ec1
MD
279 (emergency_intr_enable ? emergency_intr_freq : 1));
280 }
281
ef0fdad1
MD
282 /*
283 * Create an interrupt thread if necessary, leave it in an unscheduled
45d76888 284 * state.
ef0fdad1 285 */
f33e9c1c
MD
286 if (info->i_state == ISTATE_NOTHREAD) {
287 info->i_state = ISTATE_NORMAL;
fdce8919 288 lwkt_create(ithread_handler, (void *)(intptr_t)intr, NULL,
4643740a 289 &info->i_thread, TDF_NOSTART | TDF_INTTHREAD, cpuid,
c83c147e 290 "ithread%d %d", intr, cpuid);
5f456c40 291 if (intr >= FIRST_SOFTINT)
477d3c1c 292 lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM);
4b5f931b 293 else
477d3c1c
MD
294 lwkt_setpri(&info->i_thread, TDPRI_INT_MED);
295 info->i_thread.td_preemptable = lwkt_preempt;
ef0fdad1
MD
296 }
297
9d522d14
MD
298 list = &info->i_reclist;
299
ef0fdad1 300 /*
9d522d14 301 * Keep track of how many fast and slow interrupts we have.
862f2618
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302 * Set i_mplock_required if any handler in the chain requires
303 * the MP lock to operate.
ef0fdad1 304 */
862f2618
MD
305 if ((intr_flags & INTR_MPSAFE) == 0)
306 info->i_mplock_required = 1;
f8a09be1 307 if (intr_flags & INTR_CLOCK)
9d522d14
MD
308 ++info->i_fast;
309 else
310 ++info->i_slow;
311
8b3ec75a
MD
312 /*
313 * Enable random number generation keying off of this interrupt.
314 */
315 if ((intr_flags & INTR_NOENTROPY) == 0 && info->i_random.sc_enabled == 0) {
316 info->i_random.sc_enabled = 1;
317 info->i_random.sc_intr = intr;
318 }
319
9d522d14
MD
320 /*
321 * Add the record to the interrupt list.
322 */
323 crit_enter();
ef0fdad1
MD
324 while (*list != NULL)
325 list = &(*list)->next;
326 *list = rec;
327 crit_exit();
5f456c40
MD
328
329 /*
330 * Update max_installed_hard_intr to make the emergency intr poll
331 * a bit more efficient.
332 */
333 if (intr < FIRST_SOFTINT) {
ff52cb5b
SZ
334 if (max_installed_hard_intr[cpuid] <= intr)
335 max_installed_hard_intr[cpuid] = intr + 1;
5f456c40 336 }
9d522d14 337
c83c147e
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338 if (intr >= FIRST_SOFTINT)
339 swi_info_ary[intr - FIRST_SOFTINT] = info;
340
9d522d14
MD
341 /*
342 * Setup the machine level interrupt vector
343 */
f416026e
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344 if (intr < FIRST_SOFTINT && info->i_slow + info->i_fast == 1)
345 machintr_intr_setup(intr, intr_flags);
9d522d14 346
4c846371 347 int_moveto_origcpu(orig_cpuid, cpuid);
db958607 348
477d3c1c 349 return(rec);
ef0fdad1 350}
984263bc 351
9d522d14 352void
1da8d52f 353unregister_swi(void *id, int intr, int cpuid)
ef0fdad1 354{
1da8d52f
SZ
355 if (cpuid < 0)
356 cpuid = intr % ncpus;
357
358 unregister_int(id, cpuid);
984263bc
MD
359}
360
9d522d14 361void
6355d931 362unregister_int(void *id, int cpuid)
984263bc 363{
477d3c1c
MD
364 struct intr_info *info;
365 struct intrec **list;
366 intrec_t rec;
6355d931
SZ
367 int intr, orig_cpuid;
368
369 KKASSERT(cpuid >= 0 && cpuid < ncpus);
477d3c1c
MD
370
371 intr = ((intrec_t)id)->intr;
ef0fdad1 372
5f456c40 373 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 374 panic("register_int: bad intr %d", intr);
477d3c1c 375
c83c147e 376 info = &intr_info_ary[cpuid][intr];
477d3c1c 377
6355d931 378 int_moveto_destcpu(&orig_cpuid, cpuid);
4c846371 379
477d3c1c 380 /*
9d522d14
MD
381 * Remove the interrupt descriptor, adjust the descriptor count,
382 * and teardown the machine level vector if this was the last interrupt.
477d3c1c 383 */
ef0fdad1 384 crit_enter();
477d3c1c 385 list = &info->i_reclist;
ef0fdad1 386 while ((rec = *list) != NULL) {
9d522d14 387 if (rec == id)
ef0fdad1 388 break;
ef0fdad1
MD
389 list = &rec->next;
390 }
9d522d14 391 if (rec) {
acf7409e
SZ
392 intrec_t rec0;
393
9d522d14 394 *list = rec->next;
f8a09be1 395 if (rec->intr_flags & INTR_CLOCK)
9d522d14
MD
396 --info->i_fast;
397 else
398 --info->i_slow;
e8727dce 399 if (intr < FIRST_SOFTINT && info->i_fast + info->i_slow == 0)
f416026e 400 machintr_intr_teardown(intr);
862f2618 401
acf7409e
SZ
402 /*
403 * Clear i_mplock_required if no handlers in the chain require the
404 * MP lock.
405 */
406 for (rec0 = info->i_reclist; rec0; rec0 = rec0->next) {
407 if ((rec0->intr_flags & INTR_MPSAFE) == 0)
408 break;
409 }
410 if (rec0 == NULL)
862f2618 411 info->i_mplock_required = 0;
acf7409e 412 }
862f2618 413
c83c147e
SZ
414 if (intr >= FIRST_SOFTINT && info->i_reclist == NULL)
415 swi_info_ary[intr - FIRST_SOFTINT] = NULL;
416
ef0fdad1 417 crit_exit();
477d3c1c 418
4c846371
SZ
419 int_moveto_origcpu(orig_cpuid, cpuid);
420
477d3c1c 421 /*
9d522d14 422 * Free the record.
477d3c1c 423 */
ef0fdad1 424 if (rec != NULL) {
efda3bd0
MD
425 kfree(rec->name, M_DEVBUF);
426 kfree(rec, M_DEVBUF);
ef0fdad1 427 } else {
6ea70f76 428 kprintf("warning: unregister_int: int %d handler for %s not found\n",
477d3c1c 429 intr, ((intrec_t)id)->name);
ef0fdad1 430 }
477d3c1c
MD
431}
432
477d3c1c 433long
c83c147e 434get_interrupt_counter(int intr, int cpuid)
477d3c1c
MD
435{
436 struct intr_info *info;
437
c83c147e
SZ
438 KKASSERT(cpuid >= 0 && cpuid < ncpus);
439
5f456c40 440 if (intr < 0 || intr >= MAX_INTS)
477d3c1c 441 panic("register_int: bad intr %d", intr);
c83c147e 442 info = &intr_info_ary[cpuid][intr];
477d3c1c
MD
443 return(info->i_count);
444}
445
7e071e7a
MD
446void
447register_randintr(int intr)
448{
477d3c1c 449 struct intr_info *info;
c83c147e 450 int cpuid;
477d3c1c 451
5f456c40 452 if (intr < 0 || intr >= MAX_INTS)
417c990a 453 panic("register_randintr: bad intr %d", intr);
c83c147e
SZ
454
455 for (cpuid = 0; cpuid < ncpus; ++cpuid) {
456 info = &intr_info_ary[cpuid][intr];
457 info->i_random.sc_intr = intr;
458 info->i_random.sc_enabled = 1;
459 }
7e071e7a
MD
460}
461
462void
463unregister_randintr(int intr)
464{
477d3c1c 465 struct intr_info *info;
c83c147e 466 int cpuid;
477d3c1c 467
5f456c40 468 if (intr < 0 || intr >= MAX_INTS)
477d3c1c 469 panic("register_swi: bad intr %d", intr);
c83c147e
SZ
470
471 for (cpuid = 0; cpuid < ncpus; ++cpuid) {
472 info = &intr_info_ary[cpuid][intr];
473 info->i_random.sc_enabled = -1;
474 }
7e071e7a
MD
475}
476
5f456c40
MD
477int
478next_registered_randintr(int intr)
479{
480 struct intr_info *info;
481
482 if (intr < 0 || intr >= MAX_INTS)
483 panic("register_swi: bad intr %d", intr);
c83c147e 484
5f456c40 485 while (intr < MAX_INTS) {
c83c147e
SZ
486 int cpuid;
487
488 for (cpuid = 0; cpuid < ncpus; ++cpuid) {
489 info = &intr_info_ary[cpuid][intr];
490 if (info->i_random.sc_enabled > 0)
491 return intr;
492 }
5f456c40
MD
493 ++intr;
494 }
c83c147e 495 return intr;
5f456c40
MD
496}
497
ef0fdad1 498/*
b68b7282
MD
499 * Dispatch an interrupt. If there's nothing to do we have a stray
500 * interrupt and can just return, leaving the interrupt masked.
96728c05 501 *
477d3c1c 502 * We need to schedule the interrupt and set its i_running bit. If
96728c05
MD
503 * we are not on the interrupt thread's cpu we have to send a message
504 * to the correct cpu that will issue the desired action (interlocking
f33e9c1c
MD
505 * with the interrupt thread's critical section). We do NOT attempt to
506 * reschedule interrupts whos i_running bit is already set because
507 * this would prematurely wakeup a livelock-limited interrupt thread.
508 *
509 * i_running is only tested/set on the same cpu as the interrupt thread.
96728c05
MD
510 *
511 * We are NOT in a critical section, which will allow the scheduled
71ef2f5c 512 * interrupt to preempt us. The MP lock might *NOT* be held here.
ef0fdad1 513 */
96728c05
MD
514static void
515sched_ithd_remote(void *arg)
516{
c83c147e 517 sched_ithd_intern(arg);
96728c05
MD
518}
519
c83c147e
SZ
520static void
521sched_ithd_intern(struct intr_info *info)
ef0fdad1 522{
477d3c1c 523 ++info->i_count;
f33e9c1c 524 if (info->i_state != ISTATE_NOTHREAD) {
477d3c1c 525 if (info->i_reclist == NULL) {
c83c147e 526 report_stray_interrupt(info, "sched_ithd");
b68b7282 527 } else {
477d3c1c 528 if (info->i_thread.td_gd == mycpu) {
f33e9c1c
MD
529 if (info->i_running == 0) {
530 info->i_running = 1;
531 if (info->i_state != ISTATE_LIVELOCKED)
532 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
533 }
96728c05 534 } else {
c83c147e 535 lwkt_send_ipiq(info->i_thread.td_gd, sched_ithd_remote, info);
96728c05 536 }
b68b7282 537 }
ef0fdad1 538 } else {
c83c147e 539 report_stray_interrupt(info, "sched_ithd");
ef0fdad1
MD
540 }
541}
542
c83c147e
SZ
543void
544sched_ithd_soft(int intr)
545{
546 struct intr_info *info;
547
548 KKASSERT(intr >= FIRST_SOFTINT && intr < MAX_INTS);
549
550 info = swi_info_ary[intr - FIRST_SOFTINT];
551 if (info != NULL) {
552 sched_ithd_intern(info);
553 } else {
554 kprintf("unregistered softint %d got scheduled on cpu%d\n",
555 intr, mycpuid);
556 }
557}
558
559void
560sched_ithd_hard(int intr)
561{
562 KKASSERT(intr >= 0 && intr < MAX_HARDINTS);
563 sched_ithd_intern(&intr_info_ary[mycpuid][intr]);
564}
565
bae88a6f
SZ
566#ifdef _KERNEL_VIRTUAL
567
568void
569sched_ithd_hard_virtual(int intr)
570{
571 KKASSERT(intr >= 0 && intr < MAX_HARDINTS);
572 sched_ithd_intern(&intr_info_ary[0][intr]);
573}
574
575void *
576register_int_virtual(int intr, inthand2_t *handler, void *arg, const char *name,
577 struct lwkt_serialize *serializer, int intr_flags)
578{
579 return register_int(intr, handler, arg, name, serializer, intr_flags, 0);
580}
581
582void
583unregister_int_virtual(void *id)
584{
585 unregister_int(id, 0);
586}
587
588#endif /* _KERN_VIRTUAL */
589
b560de96 590static void
c83c147e 591report_stray_interrupt(struct intr_info *info, const char *func)
b560de96
MD
592{
593 ++info->i_straycount;
594 if (info->i_straycount < 10) {
595 if (info->i_errorticks == ticks)
596 return;
597 info->i_errorticks = ticks;
c83c147e
SZ
598 kprintf("%s: stray interrupt %d on cpu%d\n",
599 func, info->i_intr, mycpuid);
7e88c0e6 600 } else if (info->i_straycount == 10) {
c83c147e
SZ
601 kprintf("%s: %ld stray interrupts %d on cpu%d - "
602 "there will be no further reports\n", func,
603 info->i_straycount, info->i_intr, mycpuid);
b560de96
MD
604 }
605}
606
37d44089
MD
607/*
608 * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL
609 * might not be held).
610 */
611static void
96d52ac8
SZ
612ithread_livelock_wakeup(systimer_t st, int in_ipi __unused,
613 struct intrframe *frame __unused)
37d44089 614{
477d3c1c 615 struct intr_info *info;
37d44089 616
c83c147e 617 info = &intr_info_ary[mycpuid][(int)(intptr_t)st->data];
f33e9c1c 618 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 619 lwkt_schedule(&info->i_thread);
37d44089
MD
620}
621
729e15a8
SZ
622/*
623 * Schedule ithread within fast intr handler
624 *
c83c147e 625 * XXX Protect sched_ithd_hard() call with gd_intr_nesting_level?
729e15a8
SZ
626 * Interrupts aren't enabled, but still...
627 */
628static __inline void
629ithread_fast_sched(int intr, thread_t td)
630{
631 ++td->td_nest_count;
632
633 /*
634 * We are already in critical section, exit it now to
635 * allow preemption.
636 */
637 crit_exit_quick(td);
c83c147e 638 sched_ithd_hard(intr);
729e15a8
SZ
639 crit_enter_quick(td);
640
641 --td->td_nest_count;
642}
643
67b9bb39 644/*
7bd34050 645 * This function is called directly from the ICU or APIC vector code assembly
477d3c1c
MD
646 * to process an interrupt. The critical section and interrupt deferral
647 * checks have already been done but the function is entered WITHOUT
648 * a critical section held. The BGL may or may not be held.
649 *
650 * Must return non-zero if we do not want the vector code to re-enable
651 * the interrupt (which we don't if we have to schedule the interrupt)
67b9bb39 652 */
c7eb0589 653int ithread_fast_handler(struct intrframe *frame);
477d3c1c
MD
654
655int
c7eb0589 656ithread_fast_handler(struct intrframe *frame)
477d3c1c
MD
657{
658 int intr;
659 struct intr_info *info;
660 struct intrec **list;
661 int must_schedule;
477d3c1c 662 int got_mplock;
3933a3ab 663 TD_INVARIANTS_DECLARE;
c24c20c0 664 intrec_t rec, nrec;
477d3c1c 665 globaldata_t gd;
729e15a8 666 thread_t td;
477d3c1c 667
c7eb0589 668 intr = frame->if_vec;
477d3c1c 669 gd = mycpu;
729e15a8
SZ
670 td = curthread;
671
672 /* We must be in critical section. */
f9235b6d 673 KKASSERT(td->td_critcount);
477d3c1c 674
c83c147e 675 info = &intr_info_ary[mycpuid][intr];
477d3c1c
MD
676
677 /*
678 * If we are not processing any FAST interrupts, just schedule the thing.
477d3c1c
MD
679 */
680 if (info->i_fast == 0) {
3848f1c7 681 ++gd->gd_cnt.v_intr;
729e15a8 682 ithread_fast_sched(intr, td);
477d3c1c
MD
683 return(1);
684 }
685
686 /*
687 * This should not normally occur since interrupts ought to be
688 * masked if the ithread has been scheduled or is running.
689 */
690 if (info->i_running)
691 return(1);
692
693 /*
694 * Bump the interrupt nesting level to process any FAST interrupts.
695 * Obtain the MP lock as necessary. If the MP lock cannot be obtained,
696 * schedule the interrupt thread to deal with the issue instead.
697 *
698 * To reduce overhead, just leave the MP lock held once it has been
699 * obtained.
700 */
477d3c1c
MD
701 ++gd->gd_intr_nesting_level;
702 ++gd->gd_cnt.v_intr;
703 must_schedule = info->i_slow;
477d3c1c 704 got_mplock = 0;
477d3c1c 705
3933a3ab 706 TD_INVARIANTS_GET(td);
477d3c1c 707 list = &info->i_reclist;
3933a3ab 708
c24c20c0
MD
709 for (rec = *list; rec; rec = nrec) {
710 /* rec may be invalid after call */
711 nrec = rec->next;
477d3c1c 712
f8a09be1 713 if (rec->intr_flags & INTR_CLOCK) {
477d3c1c
MD
714 if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) {
715 if (try_mplock() == 0) {
f5c2d910
SZ
716 /* Couldn't get the MP lock; just schedule it. */
717 must_schedule = 1;
477d3c1c
MD
718 break;
719 }
720 got_mplock = 1;
721 }
477d3c1c
MD
722 if (rec->serializer) {
723 must_schedule += lwkt_serialize_handler_try(
724 rec->serializer, rec->handler,
c7eb0589 725 rec->argument, frame);
477d3c1c 726 } else {
c7eb0589 727 rec->handler(rec->argument, frame);
477d3c1c 728 }
3933a3ab 729 TD_INVARIANTS_TEST(td, rec->name);
477d3c1c
MD
730 }
731 }
732
733 /*
734 * Cleanup
735 */
736 --gd->gd_intr_nesting_level;
477d3c1c
MD
737 if (got_mplock)
738 rel_mplock();
477d3c1c
MD
739
740 /*
729e15a8
SZ
741 * If we had a problem, or mixed fast and slow interrupt handlers are
742 * registered, schedule the ithread to catch the missed records (it
743 * will just re-run all of them). A return value of 0 indicates that
744 * all handlers have been run and the interrupt can be re-enabled, and
745 * a non-zero return indicates that the interrupt thread controls
746 * re-enablement.
477d3c1c 747 */
afd7b1c0 748 if (must_schedule > 0)
729e15a8 749 ithread_fast_sched(intr, td);
afd7b1c0 750 else if (must_schedule == 0)
477d3c1c
MD
751 ++info->i_count;
752 return(must_schedule);
753}
754
b68b7282 755/*
45d76888
MD
756 * Interrupt threads run this as their main loop.
757 *
68b3ccd4 758 * The handler begins execution outside a critical section and no MP lock.
37d44089 759 *
477d3c1c 760 * The i_running state starts at 0. When an interrupt occurs, the hardware
c83c147e
SZ
761 * interrupt is disabled and sched_ithd_hard() The HW interrupt remains
762 * disabled until all routines have run. We then call ithread_done() to
763 * reenable the HW interrupt and deschedule us until the next interrupt.
45d76888 764 *
477d3c1c 765 * We are responsible for atomically checking i_running and ithread_done()
45d76888 766 * is responsible for atomically checking for platform-specific delayed
477d3c1c 767 * interrupts. i_running for our irq is only set in the context of our cpu,
45d76888 768 * so a critical section is a sufficient interlock.
b68b7282 769 */
93781523
MD
770#define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */
771
ef0fdad1
MD
772static void
773ithread_handler(void *arg)
774{
477d3c1c 775 struct intr_info *info;
f33e9c1c 776 int use_limit;
b560de96 777 __uint32_t lseconds;
c83c147e 778 int intr, cpuid = mycpuid;
9d522d14 779 int mpheld;
477d3c1c
MD
780 struct intrec **list;
781 intrec_t rec, nrec;
f33e9c1c 782 globaldata_t gd;
67b9bb39 783 struct systimer ill_timer; /* enforced freq. timer */
f33e9c1c 784 u_int ill_count; /* interrupt livelock counter */
3933a3ab 785 TD_INVARIANTS_DECLARE;
45d76888 786
f33e9c1c 787 ill_count = 0;
973c11b9 788 intr = (int)(intptr_t)arg;
c83c147e 789 info = &intr_info_ary[cpuid][intr];
477d3c1c 790 list = &info->i_reclist;
477d3c1c 791
45d76888 792 /*
862f2618 793 * The loop must be entered with one critical section held. The thread
fdce8919 794 * does not hold the mplock on startup.
45d76888 795 */
e381e77c
MD
796 gd = mycpu;
797 lseconds = gd->gd_time_seconds;
45d76888 798 crit_enter_gd(gd);
862f2618 799 mpheld = 0;
ef0fdad1 800
ef0fdad1 801 for (;;) {
862f2618
MD
802 /*
803 * The chain is only considered MPSAFE if all its interrupt handlers
804 * are MPSAFE. However, if intr_mpsafe has been turned off we
805 * always operate with the BGL.
806 */
c9e9fb21 807 if (info->i_mplock_required != mpheld) {
862f2618
MD
808 if (info->i_mplock_required) {
809 KKASSERT(mpheld == 0);
c9e9fb21 810 get_mplock();
862f2618
MD
811 mpheld = 1;
812 } else {
813 KKASSERT(mpheld != 0);
814 rel_mplock();
815 mpheld = 0;
816 }
817 }
818
3933a3ab
MD
819 TD_INVARIANTS_GET(gd->gd_curthread);
820
93781523 821 /*
f33e9c1c
MD
822 * If an interrupt is pending, clear i_running and execute the
823 * handlers. Note that certain types of interrupts can re-trigger
824 * and set i_running again.
45d76888 825 *
f33e9c1c 826 * Each handler is run in a critical section. Note that we run both
862f2618 827 * FAST and SLOW designated service routines.
93781523 828 */
f33e9c1c
MD
829 if (info->i_running) {
830 ++ill_count;
831 info->i_running = 0;
9d522d14 832
b560de96 833 if (*list == NULL)
c83c147e 834 report_stray_interrupt(info, "ithread_handler");
b560de96 835
f33e9c1c 836 for (rec = *list; rec; rec = nrec) {
c24c20c0 837 /* rec may be invalid after call */
f33e9c1c
MD
838 nrec = rec->next;
839 if (rec->serializer) {
840 lwkt_serialize_handler_call(rec->serializer, rec->handler,
841 rec->argument, NULL);
842 } else {
843 rec->handler(rec->argument, NULL);
844 }
3933a3ab 845 TD_INVARIANTS_TEST(gd->gd_curthread, rec->name);
477d3c1c 846 }
ef0fdad1 847 }
37d44089
MD
848
849 /*
850 * This is our interrupt hook to add rate randomness to the random
851 * number generator.
852 */
8b3ec75a 853 if (info->i_random.sc_enabled > 0)
96728c05 854 add_interrupt_randomness(intr);
37d44089
MD
855
856 /*
f33e9c1c
MD
857 * Unmask the interrupt to allow it to trigger again. This only
858 * applies to certain types of interrupts (typ level interrupts).
859 * This can result in the interrupt retriggering, but the retrigger
860 * will not be processed until we cycle our critical section.
363d922a
MD
861 *
862 * Only unmask interrupts while handlers are installed. It is
863 * possible to hit a situation where no handlers are installed
864 * due to a device driver livelocking and then tearing down its
865 * interrupt on close (the parallel bus being a good example).
37d44089 866 */
6d164b20 867 if (intr < FIRST_SOFTINT && *list)
35b2edcb 868 machintr_intr_enable(intr);
f33e9c1c
MD
869
870 /*
871 * Do a quick exit/enter to catch any higher-priority interrupt
872 * sources, such as the statclock, so thread time accounting
873 * will still work. This may also cause an interrupt to re-trigger.
874 */
875 crit_exit_gd(gd);
876 crit_enter_gd(gd);
877
878 /*
879 * LIVELOCK STATE MACHINE
880 */
881 switch(info->i_state) {
882 case ISTATE_NORMAL:
883 /*
b560de96 884 * Reset the count each second.
f33e9c1c 885 */
b560de96
MD
886 if (lseconds != gd->gd_time_seconds) {
887 lseconds = gd->gd_time_seconds;
888 ill_count = 0;
f33e9c1c
MD
889 }
890
891 /*
892 * If we did not exceed the frequency limit, we are done.
893 * If the interrupt has not retriggered we deschedule ourselves.
894 */
895 if (ill_count <= livelock_limit) {
896 if (info->i_running == 0) {
897 lwkt_deschedule_self(gd->gd_curthread);
898 lwkt_switch();
899 }
37d44089 900 break;
f33e9c1c
MD
901 }
902
903 /*
904 * Otherwise we are livelocked. Set up a periodic systimer
905 * to wake the thread up at the limit frequency.
906 */
c83c147e
SZ
907 kprintf("intr %d on cpu%d at %d/%d hz, livelocked limit engaged!\n",
908 intr, cpuid, ill_count, livelock_limit);
f33e9c1c
MD
909 info->i_state = ISTATE_LIVELOCKED;
910 if ((use_limit = livelock_limit) < 100)
911 use_limit = 100;
912 else if (use_limit > 500000)
913 use_limit = 500000;
79b38af2 914 systimer_init_periodic_nq(&ill_timer, ithread_livelock_wakeup,
973c11b9 915 (void *)(intptr_t)intr, use_limit);
37d44089 916 /* fall through */
f33e9c1c 917 case ISTATE_LIVELOCKED:
37d44089 918 /*
f33e9c1c
MD
919 * Wait for our periodic timer to go off. Since the interrupt
920 * has re-armed it can still set i_running, but it will not
921 * reschedule us while we are in a livelocked state.
37d44089 922 */
f33e9c1c 923 lwkt_deschedule_self(gd->gd_curthread);
37d44089 924 lwkt_switch();
93781523 925
37d44089 926 /*
b560de96
MD
927 * Check once a second to see if the livelock condition no
928 * longer applies.
37d44089 929 */
b560de96
MD
930 if (lseconds != gd->gd_time_seconds) {
931 lseconds = gd->gd_time_seconds;
f33e9c1c 932 if (ill_count < livelock_lowater) {
b560de96
MD
933 info->i_state = ISTATE_NORMAL;
934 systimer_del(&ill_timer);
c83c147e
SZ
935 kprintf("intr %d on cpu%d at %d/%d hz, livelock removed\n",
936 intr, cpuid, ill_count, livelock_lowater);
b560de96
MD
937 } else if (livelock_debug == intr ||
938 (bootverbose && cold)) {
c83c147e
SZ
939 kprintf("intr %d on cpu%d at %d/%d hz, in livelock\n",
940 intr, cpuid, ill_count, livelock_lowater);
f33e9c1c 941 }
b560de96 942 ill_count = 0;
37d44089
MD
943 }
944 break;
945 }
ef0fdad1 946 }
eccb255f 947 /* NOT REACHED */
ef0fdad1
MD
948}
949
a9d00ec1
MD
950/*
951 * Emergency interrupt polling thread. The thread begins execution
952 * outside a critical section with the BGL held.
953 *
954 * If emergency interrupt polling is enabled, this thread will
955 * execute all system interrupts not marked INTR_NOPOLL at the
956 * specified polling frequency.
957 *
958 * WARNING! This thread runs *ALL* interrupt service routines that
959 * are not marked INTR_NOPOLL, which basically means everything except
960 * the 8254 clock interrupt and the ATA interrupt. It has very high
961 * overhead and should only be used in situations where the machine
962 * cannot otherwise be made to work. Due to the severe performance
963 * degredation, it should not be enabled on production machines.
964 */
965static void
966ithread_emergency(void *arg __unused)
967{
eccb255f 968 globaldata_t gd = mycpu;
a9d00ec1
MD
969 struct intr_info *info;
970 intrec_t rec, nrec;
ff52cb5b 971 int intr, cpuid = mycpuid;
3933a3ab 972 TD_INVARIANTS_DECLARE;
a9d00ec1 973
c9e9fb21 974 get_mplock();
eccb255f
MD
975 crit_enter_gd(gd);
976 TD_INVARIANTS_GET(gd->gd_curthread);
c9e9fb21 977
a9d00ec1 978 for (;;) {
ff52cb5b 979 for (intr = 0; intr < max_installed_hard_intr[cpuid]; ++intr) {
c83c147e 980 info = &intr_info_ary[cpuid][intr];
a9d00ec1 981 for (rec = info->i_reclist; rec; rec = nrec) {
c24c20c0
MD
982 /* rec may be invalid after call */
983 nrec = rec->next;
a9d00ec1
MD
984 if ((rec->intr_flags & INTR_NOPOLL) == 0) {
985 if (rec->serializer) {
c24c20c0 986 lwkt_serialize_handler_try(rec->serializer,
a9d00ec1
MD
987 rec->handler, rec->argument, NULL);
988 } else {
989 rec->handler(rec->argument, NULL);
990 }
eccb255f 991 TD_INVARIANTS_TEST(gd->gd_curthread, rec->name);
a9d00ec1 992 }
a9d00ec1
MD
993 }
994 }
eccb255f 995 lwkt_deschedule_self(gd->gd_curthread);
a9d00ec1
MD
996 lwkt_switch();
997 }
eccb255f 998 /* NOT REACHED */
a9d00ec1
MD
999}
1000
1001/*
1002 * Systimer callback - schedule the emergency interrupt poll thread
1003 * if emergency polling is enabled.
1004 */
1005static
1006void
96d52ac8
SZ
1007emergency_intr_timer_callback(systimer_t info, int in_ipi __unused,
1008 struct intrframe *frame __unused)
a9d00ec1
MD
1009{
1010 if (emergency_intr_enable)
1011 lwkt_schedule(info->data);
1012}
1013
984263bc
MD
1014/*
1015 * Sysctls used by systat and others: hw.intrnames and hw.intrcnt.
1016 * The data for this machine dependent, and the declarations are in machine
1017 * dependent code. The layout of intrnames and intrcnt however is machine
1018 * independent.
1019 *
1020 * We do not know the length of intrcnt and intrnames at compile time, so
1021 * calculate things at run time.
1022 */
477d3c1c 1023
984263bc
MD
1024static int
1025sysctl_intrnames(SYSCTL_HANDLER_ARGS)
1026{
477d3c1c
MD
1027 struct intr_info *info;
1028 intrec_t rec;
1029 int error = 0;
1030 int len;
c83c147e 1031 int intr, cpuid;
477d3c1c
MD
1032 char buf[64];
1033
c83c147e
SZ
1034 for (cpuid = 0; cpuid < ncpus; ++cpuid) {
1035 for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) {
1036 info = &intr_info_ary[cpuid][intr];
477d3c1c 1037
c83c147e
SZ
1038 len = 0;
1039 buf[0] = 0;
1040 for (rec = info->i_reclist; rec; rec = rec->next) {
1041 ksnprintf(buf + len, sizeof(buf) - len, "%s%s",
1042 (len ? "/" : ""), rec->name);
1043 len += strlen(buf + len);
1044 }
1045 if (len == 0) {
1046 ksnprintf(buf, sizeof(buf), "irq%d", intr);
1047 len = strlen(buf);
1048 }
1049 error = SYSCTL_OUT(req, buf, len + 1);
477d3c1c 1050 }
477d3c1c
MD
1051 }
1052 return (error);
984263bc
MD
1053}
1054
1055SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD,
1056 NULL, 0, sysctl_intrnames, "", "Interrupt Names");
1057
3242c748
SZ
1058static int
1059sysctl_intrcnt_all(SYSCTL_HANDLER_ARGS)
1060{
1061 struct intr_info *info;
1062 int error = 0;
c83c147e 1063 int intr, cpuid;
3242c748 1064
c83c147e
SZ
1065 for (cpuid = 0; cpuid < ncpus; ++cpuid) {
1066 for (intr = 0; intr < MAX_INTS; ++intr) {
1067 info = &intr_info_ary[cpuid][intr];
3242c748 1068
c83c147e
SZ
1069 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
1070 if (error)
3242c748 1071 goto failed;
c83c147e 1072 }
3242c748
SZ
1073 }
1074failed:
1075 return(error);
1076}
1077
1078SYSCTL_PROC(_hw, OID_AUTO, intrcnt_all, CTLTYPE_OPAQUE | CTLFLAG_RD,
1079 NULL, 0, sysctl_intrcnt_all, "", "Interrupt Counts");
1080
c24bcdf9
SZ
1081SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD,
1082 NULL, 0, sysctl_intrcnt_all, "", "Interrupt Counts");
1083
4c846371 1084static void
6355d931 1085int_moveto_destcpu(int *orig_cpuid0, int cpuid)
4c846371 1086{
6355d931 1087 int orig_cpuid = mycpuid;
4c846371
SZ
1088
1089 if (cpuid != orig_cpuid)
1090 lwkt_migratecpu(cpuid);
1091
1092 *orig_cpuid0 = orig_cpuid;
4c846371
SZ
1093}
1094
1095static void
1096int_moveto_origcpu(int orig_cpuid, int cpuid)
1097{
1098 if (cpuid != orig_cpuid)
1099 lwkt_migratecpu(orig_cpuid);
1100}
c83c147e
SZ
1101
1102static void
1103intr_init(void *dummy __unused)
1104{
1105 int cpuid;
1106
1107 kprintf("Initialize MI interrupts\n");
1108
1109 for (cpuid = 0; cpuid < ncpus; ++cpuid) {
1110 int intr;
1111
1112 for (intr = 0; intr < MAX_INTS; ++intr) {
1113 struct intr_info *info = &intr_info_ary[cpuid][intr];
1114
1115 info->i_cpuid = cpuid;
1116 info->i_intr = intr;
1117 }
1118 }
1119}
1120SYSINIT(intr_init, SI_BOOT2_FINISH_PIC, SI_ORDER_ANY, intr_init, NULL);