kernel: Make SMP support default (and non-optional).
[dragonfly.git] / sys / platform / pc32 / i386 / perfmon.c
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1/*
2 * Copyright 1996 Massachusetts Institute of Technology
3 *
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
14 * warranty.
15 *
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: src/sys/i386/i386/perfmon.c,v 1.21 1999/09/25 18:24:04 phk Exp $
30 */
31
32#include <sys/param.h>
33#include <sys/systm.h>
9a5bae71 34#include <sys/kernel.h>
984263bc 35#include <sys/conf.h>
fef8985e 36#include <sys/device.h>
984263bc 37#include <sys/fcntl.h>
545a1cd3 38#include <sys/lock.h>
984263bc 39
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40#include <machine/clock.h>
41#include <machine/perfmon.h>
42
43static int perfmon_inuse;
44static int perfmon_cpuok;
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45static int msr_pmc[NPMC];
46static unsigned int ctl_shadow[NPMC];
47static quad_t pmc_shadow[NPMC]; /* used when ctr is stopped on P5 */
48static int (*writectl)(int);
984263bc 49
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50static d_close_t perfmon_close;
51static d_open_t perfmon_open;
52static d_ioctl_t perfmon_ioctl;
984263bc 53
fef8985e 54static struct dev_ops perfmon_ops = {
88abd8b5 55 { "perfmon", 0, 0 },
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56 .d_open = perfmon_open,
57 .d_close = perfmon_close,
58 .d_ioctl = perfmon_ioctl,
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59};
60
61/*
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62 * Initialize the device ops for user access to the perfmon. This must
63 * be done late in the boot sequence.
64 *
65 * NOTE: The perfmon is really a minor of the mem major. Perfmon
66 * gets 32-47.
67 */
68static void
69perfmon_driver_init(void *unused __unused)
70{
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71 make_dev(&perfmon_ops, 32, UID_ROOT, GID_KMEM, 0640, "perfmon");
72}
73
74SYSINIT(perfmondrv, SI_SUB_DRIVERS, SI_ORDER_ANY, perfmon_driver_init, NULL)
75
76/*
77 * This is called in early boot, after cpu_class has been set up.
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78 */
79void
80perfmon_init(void)
81{
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82}
83
84int
85perfmon_avail(void)
86{
87 return perfmon_cpuok;
88}
89
90int
91perfmon_setup(int pmc, unsigned int control)
92{
93 if (pmc < 0 || pmc >= NPMC)
94 return EINVAL;
95
96 perfmon_inuse |= (1 << pmc);
97 control &= ~(PMCF_SYS_FLAGS << 16);
8a8d5d85 98 mpintr_lock(); /* doesn't have to be mpintr_lock YYY */
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99 ctl_shadow[pmc] = control;
100 writectl(pmc);
101 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
8a8d5d85 102 mpintr_unlock();
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103 return 0;
104}
105
106int
107perfmon_get(int pmc, unsigned int *control)
108{
109 if (pmc < 0 || pmc >= NPMC)
110 return EINVAL;
111
112 if (perfmon_inuse & (1 << pmc)) {
113 *control = ctl_shadow[pmc];
114 return 0;
115 }
116 return EBUSY; /* XXX reversed sense */
117}
118
119int
120perfmon_fini(int pmc)
121{
122 if (pmc < 0 || pmc >= NPMC)
123 return EINVAL;
124
125 if (perfmon_inuse & (1 << pmc)) {
126 perfmon_stop(pmc);
127 ctl_shadow[pmc] = 0;
128 perfmon_inuse &= ~(1 << pmc);
129 return 0;
130 }
131 return EBUSY; /* XXX reversed sense */
132}
133
134int
135perfmon_start(int pmc)
136{
137 if (pmc < 0 || pmc >= NPMC)
138 return EINVAL;
139
140 if (perfmon_inuse & (1 << pmc)) {
8a8d5d85 141 mpintr_lock(); /* doesn't have to be mpintr YYY */
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142 ctl_shadow[pmc] |= (PMCF_EN << 16);
143 wrmsr(msr_pmc[pmc], pmc_shadow[pmc]);
144 writectl(pmc);
8a8d5d85 145 mpintr_unlock();
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146 return 0;
147 }
148 return EBUSY;
149}
150
151int
152perfmon_stop(int pmc)
153{
154 if (pmc < 0 || pmc >= NPMC)
155 return EINVAL;
156
157 if (perfmon_inuse & (1 << pmc)) {
8a8d5d85 158 mpintr_lock();
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159 pmc_shadow[pmc] = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
160 ctl_shadow[pmc] &= ~(PMCF_EN << 16);
161 writectl(pmc);
8a8d5d85 162 mpintr_unlock();
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163 return 0;
164 }
165 return EBUSY;
166}
167
168int
169perfmon_read(int pmc, quad_t *val)
170{
171 if (pmc < 0 || pmc >= NPMC)
172 return EINVAL;
173
174 if (perfmon_inuse & (1 << pmc)) {
175 if (ctl_shadow[pmc] & (PMCF_EN << 16))
176 *val = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
177 else
178 *val = pmc_shadow[pmc];
179 return 0;
180 }
181
182 return EBUSY;
183}
184
185int
186perfmon_reset(int pmc)
187{
188 if (pmc < 0 || pmc >= NPMC)
189 return EINVAL;
190
191 if (perfmon_inuse & (1 << pmc)) {
192 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
193 return 0;
194 }
195 return EBUSY;
196}
197
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198/*
199 * Now the user-mode interface, called from a subdevice of mem.c.
200 */
201static int writer;
202static int writerpmc;
203
204static int
fef8985e 205perfmon_open(struct dev_open_args *ap)
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206{
207 if (!perfmon_cpuok)
208 return ENXIO;
209
fef8985e 210 if (ap->a_oflags & FWRITE) {
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211 if (writer) {
212 return EBUSY;
213 } else {
214 writer = 1;
215 writerpmc = 0;
216 }
217 }
218 return 0;
219}
220
221static int
fef8985e 222perfmon_close(struct dev_close_args *ap)
984263bc 223{
fef8985e 224 if (ap->a_fflag & FWRITE) {
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225 int i;
226
227 for (i = 0; i < NPMC; i++) {
228 if (writerpmc & (1 << i))
229 perfmon_fini(i);
230 }
231 writer = 0;
232 }
233 return 0;
234}
235
236static int
fef8985e 237perfmon_ioctl(struct dev_ioctl_args *ap)
984263bc 238{
fef8985e 239 caddr_t param = ap->a_data;
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240 struct pmc *pmc;
241 struct pmc_data *pmcd;
242 struct pmc_tstamp *pmct;
243 int *ip;
244 int rv;
245
fef8985e 246 switch(ap->a_cmd) {
984263bc 247 case PMIOSETUP:
fef8985e 248 if (!(ap->a_fflag & FWRITE))
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249 return EPERM;
250 pmc = (struct pmc *)param;
251
252 rv = perfmon_setup(pmc->pmc_num, pmc->pmc_val);
253 if (!rv) {
254 writerpmc |= (1 << pmc->pmc_num);
255 }
256 break;
257
258 case PMIOGET:
259 pmc = (struct pmc *)param;
260 rv = perfmon_get(pmc->pmc_num, &pmc->pmc_val);
261 break;
262
263 case PMIOSTART:
fef8985e 264 if (!(ap->a_fflag & FWRITE))
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265 return EPERM;
266
267 ip = (int *)param;
268 rv = perfmon_start(*ip);
269 break;
270
271 case PMIOSTOP:
fef8985e 272 if (!(ap->a_fflag & FWRITE))
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273 return EPERM;
274
275 ip = (int *)param;
276 rv = perfmon_stop(*ip);
277 break;
278
279 case PMIORESET:
fef8985e 280 if (!(ap->a_fflag & FWRITE))
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281 return EPERM;
282
283 ip = (int *)param;
284 rv = perfmon_reset(*ip);
285 break;
286
287 case PMIOREAD:
288 pmcd = (struct pmc_data *)param;
289 rv = perfmon_read(pmcd->pmcd_num, &pmcd->pmcd_value);
290 break;
291
292 case PMIOTSTAMP:
870b0161 293 if (tsc_frequency == 0) {
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294 rv = ENOTTY;
295 break;
296 }
297 pmct = (struct pmc_tstamp *)param;
298 /* XXX interface loses precision. */
870b0161 299 pmct->pmct_rate = (int)(tsc_frequency / 1000000);
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300 pmct->pmct_value = rdtsc();
301 rv = 0;
302 break;
303 default:
304 rv = ENOTTY;
305 }
306
307 return rv;
308}