M_PREPEND() can fail, meaning the returned mbuf
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
03aa8d99 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.34 2003/08/25 19:50:28 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
57#include "opt_user_ldt.h"
58#include "opt_userconfig.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/sysproto.h>
63#include <sys/signalvar.h>
64#include <sys/kernel.h>
65#include <sys/linker.h>
66#include <sys/malloc.h>
67#include <sys/proc.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/mbuf.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
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105#ifdef SMP
106#include <machine/smp.h>
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107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
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115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
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118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
123extern void init386 __P((int first));
124extern void dblfault_handler __P((void));
125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
131static void cpu_startup __P((void *));
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
134static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
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181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
240int bootverbose = 0, Maxmem = 0;
241long dumplo;
242
243vm_offset_t phys_avail[10];
244
245/* must be 2 less so 0 0 can signal end of chunks */
246#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
247
248static vm_offset_t buffer_sva, buffer_eva;
249vm_offset_t clean_sva, clean_eva;
250static vm_offset_t pager_sva, pager_eva;
251static struct trapframe proc0_tf;
252
253static void
254cpu_startup(dummy)
255 void *dummy;
256{
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257 unsigned i;
258 caddr_t v;
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259 vm_offset_t maxaddr;
260 vm_size_t size = 0;
261 int firstaddr;
262 vm_offset_t minaddr;
263
264 if (boothowto & RB_VERBOSE)
265 bootverbose++;
266
267 /*
268 * Good {morning,afternoon,evening,night}.
269 */
270 printf("%s", version);
271 startrtclock();
272 printcpuinfo();
273 panicifcpuunsupported();
274#ifdef PERFMON
275 perfmon_init();
276#endif
277 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
278 /*
279 * Display any holes after the first chunk of extended memory.
280 */
281 if (bootverbose) {
282 int indx;
283
284 printf("Physical memory chunk(s):\n");
285 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
286 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
287
288 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
289 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
290 size1 / PAGE_SIZE);
291 }
292 }
293
294 /*
295 * Calculate callout wheel size
296 */
297 for (callwheelsize = 1, callwheelbits = 0;
298 callwheelsize < ncallout;
299 callwheelsize <<= 1, ++callwheelbits)
300 ;
301 callwheelmask = callwheelsize - 1;
302
303 /*
304 * Allocate space for system data structures.
305 * The first available kernel virtual address is in "v".
306 * As pages of kernel virtual memory are allocated, "v" is incremented.
307 * As pages of memory are allocated and cleared,
308 * "firstaddr" is incremented.
309 * An index into the kernel page table corresponding to the
310 * virtual memory address maintained in "v" is kept in "mapaddr".
311 */
312
313 /*
314 * Make two passes. The first pass calculates how much memory is
315 * needed and allocates it. The second pass assigns virtual
316 * addresses to the various data structures.
317 */
318 firstaddr = 0;
319again:
320 v = (caddr_t)firstaddr;
321
322#define valloc(name, type, num) \
323 (name) = (type *)v; v = (caddr_t)((name)+(num))
324#define valloclim(name, type, num, lim) \
325 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
326
327 valloc(callout, struct callout, ncallout);
328 valloc(callwheel, struct callout_tailq, callwheelsize);
329
330 /*
331 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
332 * For the first 64MB of ram nominally allocate sufficient buffers to
333 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
334 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
335 * the buffer cache we limit the eventual kva reservation to
336 * maxbcache bytes.
337 *
338 * factor represents the 1/4 x ram conversion.
339 */
340 if (nbuf == 0) {
341 int factor = 4 * BKVASIZE / 1024;
342 int kbytes = physmem * (PAGE_SIZE / 1024);
343
344 nbuf = 50;
345 if (kbytes > 4096)
346 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
347 if (kbytes > 65536)
348 nbuf += (kbytes - 65536) * 2 / (factor * 5);
349 if (maxbcache && nbuf > maxbcache / BKVASIZE)
350 nbuf = maxbcache / BKVASIZE;
351 }
352
353 /*
354 * Do not allow the buffer_map to be more then 1/2 the size of the
355 * kernel_map.
356 */
357 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
358 (BKVASIZE * 2)) {
359 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
360 (BKVASIZE * 2);
361 printf("Warning: nbufs capped at %d\n", nbuf);
362 }
363
364 nswbuf = max(min(nbuf/4, 256), 16);
365#ifdef NSWBUF_MIN
366 if (nswbuf < NSWBUF_MIN)
367 nswbuf = NSWBUF_MIN;
368#endif
369#ifdef DIRECTIO
370 ffs_rawread_setup();
371#endif
372
373 valloc(swbuf, struct buf, nswbuf);
374 valloc(buf, struct buf, nbuf);
375 v = bufhashinit(v);
376
377 /*
378 * End of first pass, size has been calculated so allocate memory
379 */
380 if (firstaddr == 0) {
381 size = (vm_size_t)(v - firstaddr);
382 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
383 if (firstaddr == 0)
384 panic("startup: no room for tables");
385 goto again;
386 }
387
388 /*
389 * End of second pass, addresses have been assigned
390 */
391 if ((vm_size_t)(v - firstaddr) != size)
392 panic("startup: table size inconsistency");
393
394 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
395 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
396 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
397 (nbuf*BKVASIZE));
398 buffer_map->system_map = 1;
399 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
400 (nswbuf*MAXPHYS) + pager_map_size);
401 pager_map->system_map = 1;
402 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
403 (16*(ARG_MAX+(PAGE_SIZE*3))));
404
405 /*
406 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
407 * we use the more space efficient malloc in place of kmem_alloc.
408 */
409 {
410 vm_offset_t mb_map_size;
411
412 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
413 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
414 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
415 bzero(mclrefcnt, mb_map_size / MCLBYTES);
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416#if defined(NO_KMEM_MAP)
417 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
418 &maxaddr, mb_map_size);
419#else
420 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl,
421 &maxaddr, mb_map_size);
422#endif
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423 mb_map->system_map = 1;
424 }
425
426 /*
427 * Initialize callouts
428 */
429 SLIST_INIT(&callfree);
430 for (i = 0; i < ncallout; i++) {
431 callout_init(&callout[i]);
432 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
433 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
434 }
435
436 for (i = 0; i < callwheelsize; i++) {
437 TAILQ_INIT(&callwheel[i]);
438 }
439
440#if defined(USERCONFIG)
441 userconfig();
442 cninit(); /* the preferred console may have changed */
443#endif
444
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445 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
446 ptoa(vmstats.v_free_count) / 1024);
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447
448 /*
449 * Set up buffers, so they can be used to read disk labels.
450 */
451 bufinit();
452 vm_pager_bufferinit();
453
454#ifdef SMP
455 /*
456 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
457 */
458 mp_start(); /* fire up the APs and APICs */
459 mp_announce();
460#endif /* SMP */
461 cpu_setregs();
462}
463
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464/*
465 * Send an interrupt to process.
466 *
467 * Stack is set up to allow sigcode stored
468 * at top to call routine, followed by kcall
469 * to sigreturn routine below. After sigreturn
470 * resets the signal mask, the stack, and the
471 * frame pointer, it returns to the user
472 * specified pc, psl.
473 */
474static void
475osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
476{
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477 struct proc *p = curproc;
478 struct trapframe *regs;
479 struct osigframe *fp;
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480 struct osigframe sf;
481 struct sigacts *psp = p->p_sigacts;
482 int oonstack;
483
484 regs = p->p_md.md_regs;
485 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
486
487 /* Allocate and validate space for the signal handler context. */
488 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
489 SIGISMEMBER(psp->ps_sigonstack, sig)) {
490 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
491 p->p_sigstk.ss_size - sizeof(struct osigframe));
492 p->p_sigstk.ss_flags |= SS_ONSTACK;
493 }
494 else
495 fp = (struct osigframe *)regs->tf_esp - 1;
496
497 /* Translate the signal if appropriate */
498 if (p->p_sysent->sv_sigtbl) {
499 if (sig <= p->p_sysent->sv_sigsize)
500 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
501 }
502
503 /* Build the argument list for the signal handler. */
504 sf.sf_signum = sig;
505 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
506 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
507 /* Signal handler installed with SA_SIGINFO. */
508 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
509 sf.sf_siginfo.si_signo = sig;
510 sf.sf_siginfo.si_code = code;
511 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
512 }
513 else {
514 /* Old FreeBSD-style arguments. */
515 sf.sf_arg2 = code;
516 sf.sf_addr = regs->tf_err;
517 sf.sf_ahu.sf_handler = catcher;
518 }
519
520 /* save scratch registers */
521 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
522 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
523 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
524 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
525 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
526 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
527 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
528 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
529 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
530 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
531 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
532 sf.sf_siginfo.si_sc.sc_gs = rgs();
533 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
534
535 /* Build the signal context to be used by sigreturn. */
536 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
537 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
538 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
539 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
540 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
541 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
542 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
543 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
544
545 /*
546 * If we're a vm86 process, we want to save the segment registers.
547 * We also change eflags to be our emulated eflags, not the actual
548 * eflags.
549 */
550 if (regs->tf_eflags & PSL_VM) {
551 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 552 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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553
554 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
555 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
556 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
557 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
558
559 if (vm86->vm86_has_vme == 0)
560 sf.sf_siginfo.si_sc.sc_ps =
561 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
562 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
563 /* see sendsig for comment */
564 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
565 }
566
567 /* Copy the sigframe out to the user's stack. */
568 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
569 /*
570 * Something is wrong with the stack pointer.
571 * ...Kill the process.
572 */
573 sigexit(p, SIGILL);
574 }
575
576 regs->tf_esp = (int)fp;
577 regs->tf_eip = PS_STRINGS - szosigcode;
578 regs->tf_eflags &= ~PSL_T;
579 regs->tf_cs = _ucodesel;
580 regs->tf_ds = _udatasel;
581 regs->tf_es = _udatasel;
582 regs->tf_fs = _udatasel;
583 load_gs(_udatasel);
584 regs->tf_ss = _udatasel;
585}
586
587void
588sendsig(catcher, sig, mask, code)
589 sig_t catcher;
590 int sig;
591 sigset_t *mask;
592 u_long code;
593{
594 struct proc *p = curproc;
595 struct trapframe *regs;
596 struct sigacts *psp = p->p_sigacts;
597 struct sigframe sf, *sfp;
598 int oonstack;
599
600 if (SIGISMEMBER(psp->ps_osigset, sig)) {
601 osendsig(catcher, sig, mask, code);
602 return;
603 }
604
605 regs = p->p_md.md_regs;
606 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
607
608 /* save user context */
609 bzero(&sf, sizeof(struct sigframe));
610 sf.sf_uc.uc_sigmask = *mask;
611 sf.sf_uc.uc_stack = p->p_sigstk;
612 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
613 sf.sf_uc.uc_mcontext.mc_gs = rgs();
614 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
615
616 /* Allocate and validate space for the signal handler context. */
617 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
618 SIGISMEMBER(psp->ps_sigonstack, sig)) {
619 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
620 p->p_sigstk.ss_size - sizeof(struct sigframe));
621 p->p_sigstk.ss_flags |= SS_ONSTACK;
622 }
623 else
624 sfp = (struct sigframe *)regs->tf_esp - 1;
625
626 /* Translate the signal is appropriate */
627 if (p->p_sysent->sv_sigtbl) {
628 if (sig <= p->p_sysent->sv_sigsize)
629 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
630 }
631
632 /* Build the argument list for the signal handler. */
633 sf.sf_signum = sig;
634 sf.sf_ucontext = (register_t)&sfp->sf_uc;
635 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
636 /* Signal handler installed with SA_SIGINFO. */
637 sf.sf_siginfo = (register_t)&sfp->sf_si;
638 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
639
640 /* fill siginfo structure */
641 sf.sf_si.si_signo = sig;
642 sf.sf_si.si_code = code;
643 sf.sf_si.si_addr = (void*)regs->tf_err;
644 }
645 else {
646 /* Old FreeBSD-style arguments. */
647 sf.sf_siginfo = code;
648 sf.sf_addr = regs->tf_err;
649 sf.sf_ahu.sf_handler = catcher;
650 }
651
652 /*
653 * If we're a vm86 process, we want to save the segment registers.
654 * We also change eflags to be our emulated eflags, not the actual
655 * eflags.
656 */
657 if (regs->tf_eflags & PSL_VM) {
658 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 659 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
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660
661 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
662 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
663 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
664 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
665
666 if (vm86->vm86_has_vme == 0)
667 sf.sf_uc.uc_mcontext.mc_eflags =
668 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
669 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
670
671 /*
672 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
673 * syscalls made by the signal handler. This just avoids
674 * wasting time for our lazy fixup of such faults. PSL_NT
675 * does nothing in vm86 mode, but vm86 programs can set it
676 * almost legitimately in probes for old cpu types.
677 */
678 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
679 }
680
681 /*
682 * Copy the sigframe out to the user's stack.
683 */
684 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
685 /*
686 * Something is wrong with the stack pointer.
687 * ...Kill the process.
688 */
689 sigexit(p, SIGILL);
690 }
691
692 regs->tf_esp = (int)sfp;
693 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
694 regs->tf_eflags &= ~PSL_T;
695 regs->tf_cs = _ucodesel;
696 regs->tf_ds = _udatasel;
697 regs->tf_es = _udatasel;
698 regs->tf_fs = _udatasel;
699 load_gs(_udatasel);
700 regs->tf_ss = _udatasel;
701}
702
703/*
41c20dac
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704 * osigreturn_args(struct osigcontext *sigcntxp)
705 *
984263bc
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706 * System call to cleanup state after a signal
707 * has been taken. Reset signal mask and
708 * stack state from context left by sendsig (above).
709 * Return to previous pc and psl as specified by
710 * context left by sendsig. Check carefully to
711 * make sure that the user has not modified the
712 * state to gain improper privileges.
713 */
714#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
715#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
716
717int
41c20dac 718osigreturn(struct osigreturn_args *uap)
984263bc 719{
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720 struct proc *p = curproc;
721 struct osigcontext *scp;
722 struct trapframe *regs = p->p_md.md_regs;
984263bc
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723 int eflags;
724
725 scp = uap->sigcntxp;
726
727 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
728 return(EFAULT);
729
730 eflags = scp->sc_ps;
731 if (eflags & PSL_VM) {
732 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
733 struct vm86_kernel *vm86;
734
735 /*
736 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
737 * set up the vm86 area, and we can't enter vm86 mode.
738 */
b7c628e4 739 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 740 return (EINVAL);
b7c628e4 741 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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742 if (vm86->vm86_inited == 0)
743 return (EINVAL);
744
745 /* go back to user mode if both flags are set */
746 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
747 trapsignal(p, SIGBUS, 0);
748
749 if (vm86->vm86_has_vme) {
750 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
751 (eflags & VME_USERCHANGE) | PSL_VM;
752 } else {
753 vm86->vm86_eflags = eflags; /* save VIF, VIP */
754 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
755 }
756 tf->tf_vm86_ds = scp->sc_ds;
757 tf->tf_vm86_es = scp->sc_es;
758 tf->tf_vm86_fs = scp->sc_fs;
759 tf->tf_vm86_gs = scp->sc_gs;
760 tf->tf_ds = _udatasel;
761 tf->tf_es = _udatasel;
762 tf->tf_fs = _udatasel;
763 } else {
764 /*
765 * Don't allow users to change privileged or reserved flags.
766 */
767 /*
768 * XXX do allow users to change the privileged flag PSL_RF.
769 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
770 * should sometimes set it there too. tf_eflags is kept in
771 * the signal context during signal handling and there is no
772 * other place to remember it, so the PSL_RF bit may be
773 * corrupted by the signal handler without us knowing.
774 * Corruption of the PSL_RF bit at worst causes one more or
775 * one less debugger trap, so allowing it is fairly harmless.
776 */
777 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
778 return(EINVAL);
779 }
780
781 /*
782 * Don't allow users to load a valid privileged %cs. Let the
783 * hardware check for invalid selectors, excess privilege in
784 * other selectors, invalid %eip's and invalid %esp's.
785 */
786 if (!CS_SECURE(scp->sc_cs)) {
787 trapsignal(p, SIGBUS, T_PROTFLT);
788 return(EINVAL);
789 }
790 regs->tf_ds = scp->sc_ds;
791 regs->tf_es = scp->sc_es;
792 regs->tf_fs = scp->sc_fs;
793 }
794
795 /* restore scratch registers */
796 regs->tf_eax = scp->sc_eax;
797 regs->tf_ebx = scp->sc_ebx;
798 regs->tf_ecx = scp->sc_ecx;
799 regs->tf_edx = scp->sc_edx;
800 regs->tf_esi = scp->sc_esi;
801 regs->tf_edi = scp->sc_edi;
802 regs->tf_cs = scp->sc_cs;
803 regs->tf_ss = scp->sc_ss;
804 regs->tf_isp = scp->sc_isp;
805
806 if (scp->sc_onstack & 01)
807 p->p_sigstk.ss_flags |= SS_ONSTACK;
808 else
809 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
810
811 SIGSETOLD(p->p_sigmask, scp->sc_mask);
812 SIG_CANTMASK(p->p_sigmask);
813 regs->tf_ebp = scp->sc_fp;
814 regs->tf_esp = scp->sc_sp;
815 regs->tf_eip = scp->sc_pc;
816 regs->tf_eflags = eflags;
817 return(EJUSTRETURN);
818}
819
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820/*
821 * sigreturn(ucontext_t *sigcntxp)
822 */
984263bc 823int
41c20dac 824sigreturn(struct sigreturn_args *uap)
984263bc 825{
41c20dac 826 struct proc *p = curproc;
984263bc
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827 struct trapframe *regs;
828 ucontext_t *ucp;
829 int cs, eflags;
830
831 ucp = uap->sigcntxp;
832
833 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
834 return (EFAULT);
835 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
41c20dac 836 return (osigreturn((struct osigreturn_args *)uap));
984263bc
MD
837
838 /*
839 * Since ucp is not an osigcontext but a ucontext_t, we have to
840 * check again if all of it is accessible. A ucontext_t is
841 * much larger, so instead of just checking for the pointer
842 * being valid for the size of an osigcontext, now check for
843 * it being valid for a whole, new-style ucontext_t.
844 */
845 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
846 return (EFAULT);
847
848 regs = p->p_md.md_regs;
849 eflags = ucp->uc_mcontext.mc_eflags;
850
851 if (eflags & PSL_VM) {
852 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
853 struct vm86_kernel *vm86;
854
855 /*
856 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
857 * set up the vm86 area, and we can't enter vm86 mode.
858 */
b7c628e4 859 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 860 return (EINVAL);
b7c628e4 861 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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MD
862 if (vm86->vm86_inited == 0)
863 return (EINVAL);
864
865 /* go back to user mode if both flags are set */
866 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
867 trapsignal(p, SIGBUS, 0);
868
869 if (vm86->vm86_has_vme) {
870 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
871 (eflags & VME_USERCHANGE) | PSL_VM;
872 } else {
873 vm86->vm86_eflags = eflags; /* save VIF, VIP */
874 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
875 }
876 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
877 tf->tf_eflags = eflags;
878 tf->tf_vm86_ds = tf->tf_ds;
879 tf->tf_vm86_es = tf->tf_es;
880 tf->tf_vm86_fs = tf->tf_fs;
881 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
882 tf->tf_ds = _udatasel;
883 tf->tf_es = _udatasel;
884 tf->tf_fs = _udatasel;
885 } else {
886 /*
887 * Don't allow users to change privileged or reserved flags.
888 */
889 /*
890 * XXX do allow users to change the privileged flag PSL_RF.
891 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
892 * should sometimes set it there too. tf_eflags is kept in
893 * the signal context during signal handling and there is no
894 * other place to remember it, so the PSL_RF bit may be
895 * corrupted by the signal handler without us knowing.
896 * Corruption of the PSL_RF bit at worst causes one more or
897 * one less debugger trap, so allowing it is fairly harmless.
898 */
899 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
900 printf("sigreturn: eflags = 0x%x\n", eflags);
901 return(EINVAL);
902 }
903
904 /*
905 * Don't allow users to load a valid privileged %cs. Let the
906 * hardware check for invalid selectors, excess privilege in
907 * other selectors, invalid %eip's and invalid %esp's.
908 */
909 cs = ucp->uc_mcontext.mc_cs;
910 if (!CS_SECURE(cs)) {
911 printf("sigreturn: cs = 0x%x\n", cs);
912 trapsignal(p, SIGBUS, T_PROTFLT);
913 return(EINVAL);
914 }
915 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
916 }
917
918 if (ucp->uc_mcontext.mc_onstack & 1)
919 p->p_sigstk.ss_flags |= SS_ONSTACK;
920 else
921 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
922
923 p->p_sigmask = ucp->uc_sigmask;
924 SIG_CANTMASK(p->p_sigmask);
925 return(EJUSTRETURN);
926}
927
928/*
929 * Machine dependent boot() routine
930 *
931 * I haven't seen anything to put here yet
932 * Possibly some stuff might be grafted back here from boot()
933 */
934void
935cpu_boot(int howto)
936{
937}
938
939/*
940 * Shutdown the CPU as much as possible
941 */
942void
943cpu_halt(void)
944{
945 for (;;)
946 __asm__ ("hlt");
947}
948
949/*
8ad65e08
MD
950 * cpu_idle() represents the idle LWKT. You cannot return from this function
951 * (unless you want to blow things up!). Instead we look for runnable threads
952 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 953 *
26a0694b 954 * The main loop is entered with a critical section held, we must release
a2a5ad0d
MD
955 * the critical section before doing anything else. lwkt_switch() will
956 * check for pending interrupts due to entering and exiting its own
957 * critical section.
26a0694b 958 *
a2a5ad0d
MD
959 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
960 * to wake a HLTed cpu up. However, there are cases where the idlethread
961 * will be entered with the possibility that no IPI will occur and in such
962 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 963 */
96728c05 964static int cpu_idle_hlt = 1;
984263bc
MD
965SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
966 &cpu_idle_hlt, 0, "Idle loop HLT enable");
967
968void
969cpu_idle(void)
970{
a2a5ad0d
MD
971 struct thread *td = curthread;
972
26a0694b 973 crit_exit();
a2a5ad0d 974 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 975 for (;;) {
a2a5ad0d
MD
976 /*
977 * See if there are any LWKTs ready to go.
978 */
8ad65e08 979 lwkt_switch();
a2a5ad0d
MD
980
981 /*
982 * If we are going to halt call splz unconditionally after
983 * CLIing to catch any interrupt races. Note that we are
984 * at SPL0 and interrupts are enabled.
985 */
986 if (cpu_idle_hlt && !lwkt_runnable() &&
987 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
8ad65e08
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988 /*
989 * We must guarentee that hlt is exactly the instruction
990 * following the sti.
991 */
a2a5ad0d
MD
992 __asm __volatile("cli");
993 splz();
8ad65e08
MD
994 __asm __volatile("sti; hlt");
995 } else {
a2a5ad0d 996 td->td_flags &= ~TDF_IDLE_NOHLT;
8ad65e08
MD
997 __asm __volatile("sti");
998 }
984263bc
MD
999 }
1000}
1001
1002/*
1003 * Clear registers on exec
1004 */
1005void
1006setregs(p, entry, stack, ps_strings)
1007 struct proc *p;
1008 u_long entry;
1009 u_long stack;
1010 u_long ps_strings;
1011{
1012 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 1013 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
MD
1014
1015 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1016 pcb->pcb_gs = _udatasel;
1017 load_gs(_udatasel);
1018
1019#ifdef USER_LDT
1020 /* was i386_user_cleanup() in NetBSD */
1021 user_ldt_free(pcb);
1022#endif
1023
1024 bzero((char *)regs, sizeof(struct trapframe));
1025 regs->tf_eip = entry;
1026 regs->tf_esp = stack;
1027 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1028 regs->tf_ss = _udatasel;
1029 regs->tf_ds = _udatasel;
1030 regs->tf_es = _udatasel;
1031 regs->tf_fs = _udatasel;
1032 regs->tf_cs = _ucodesel;
1033
1034 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1035 regs->tf_ebx = ps_strings;
1036
1037 /*
1038 * Reset the hardware debug registers if they were in use.
1039 * They won't have any meaning for the newly exec'd process.
1040 */
1041 if (pcb->pcb_flags & PCB_DBREGS) {
1042 pcb->pcb_dr0 = 0;
1043 pcb->pcb_dr1 = 0;
1044 pcb->pcb_dr2 = 0;
1045 pcb->pcb_dr3 = 0;
1046 pcb->pcb_dr6 = 0;
1047 pcb->pcb_dr7 = 0;
b7c628e4 1048 if (pcb == curthread->td_pcb) {
984263bc
MD
1049 /*
1050 * Clear the debug registers on the running
1051 * CPU, otherwise they will end up affecting
1052 * the next process we switch to.
1053 */
1054 reset_dbregs();
1055 }
1056 pcb->pcb_flags &= ~PCB_DBREGS;
1057 }
1058
1059 /*
1060 * Initialize the math emulator (if any) for the current process.
1061 * Actually, just clear the bit that says that the emulator has
1062 * been initialized. Initialization is delayed until the process
1063 * traps to the emulator (if it is done at all) mainly because
1064 * emulators don't provide an entry point for initialization.
1065 */
b7c628e4 1066 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
1067
1068 /*
1069 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1070 * for why fwait must be trapped at least if there is an npx or an
1071 * emulator). This is mainly to handle the case where npx0 is not
1072 * configured, since the npx routines normally set up the trap
1073 * otherwise. It should be done only at boot time, but doing it
1074 * here allows modifying `npx_exists' for testing the emulator on
1075 * systems with an npx.
1076 */
1077 load_cr0(rcr0() | CR0_MP | CR0_TS);
1078
1079#if NNPX > 0
1080 /* Initialize the npx (if any) for the current process. */
1081 npxinit(__INITIAL_NPXCW__);
1082#endif
1083
90b9818c
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1084 /*
1085 * note: linux emulator needs edx to be 0x0 on entry, which is
c0510e9a
MD
1086 * handled in execve simply by setting the 64 bit syscall
1087 * return value to 0.
90b9818c 1088 */
984263bc
MD
1089}
1090
1091void
1092cpu_setregs(void)
1093{
1094 unsigned int cr0;
1095
1096 cr0 = rcr0();
1097 cr0 |= CR0_NE; /* Done by npxinit() */
1098 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1099#ifdef I386_CPU
1100 if (cpu_class != CPUCLASS_386)
1101#endif
1102 cr0 |= CR0_WP | CR0_AM;
1103 load_cr0(cr0);
1104 load_gs(_udatasel);
1105}
1106
1107static int
1108sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1109{
1110 int error;
1111 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1112 req);
1113 if (!error && req->newptr)
1114 resettodr();
1115 return (error);
1116}
1117
1118SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1119 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1120
1121SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1122 CTLFLAG_RW, &disable_rtc_set, 0, "");
1123
1124SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1125 CTLFLAG_RD, &bootinfo, bootinfo, "");
1126
1127SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1128 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1129
1130extern u_long bootdev; /* not a dev_t - encoding is different */
1131SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1132 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1133
1134/*
1135 * Initialize 386 and configure to run kernel
1136 */
1137
1138/*
1139 * Initialize segments & interrupt table
1140 */
1141
1142int _default_ldt;
1143union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1144static struct gate_descriptor idt0[NIDT];
1145struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1146union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1147
1148/* table descriptors - used to load tables by cpu */
984263bc 1149struct region_descriptor r_gdt, r_idt;
984263bc 1150
984263bc
MD
1151#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1152extern int has_f00f_bug;
1153#endif
1154
1155static struct i386tss dblfault_tss;
1156static char dblfault_stack[PAGE_SIZE];
1157
1158extern struct user *proc0paddr;
1159
1160
1161/* software prototypes -- in more palatable form */
1162struct soft_segment_descriptor gdt_segs[] = {
1163/* GNULL_SEL 0 Null Descriptor */
1164{ 0x0, /* segment base address */
1165 0x0, /* length */
1166 0, /* segment type */
1167 0, /* segment descriptor priority level */
1168 0, /* segment descriptor present */
1169 0, 0,
1170 0, /* default 32 vs 16 bit size */
1171 0 /* limit granularity (byte/page units)*/ },
1172/* GCODE_SEL 1 Code Descriptor for kernel */
1173{ 0x0, /* segment base address */
1174 0xfffff, /* length - all address space */
1175 SDT_MEMERA, /* segment type */
1176 0, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1178 0, 0,
1179 1, /* default 32 vs 16 bit size */
1180 1 /* limit granularity (byte/page units)*/ },
1181/* GDATA_SEL 2 Data Descriptor for kernel */
1182{ 0x0, /* segment base address */
1183 0xfffff, /* length - all address space */
1184 SDT_MEMRWA, /* segment type */
1185 0, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1187 0, 0,
1188 1, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1191{ 0x0, /* segment base address */
1192 0xfffff, /* length - all address space */
1193 SDT_MEMRWA, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1196 0, 0,
1197 1, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1200{
1201 0x0, /* segment base address */
1202 sizeof(struct i386tss)-1,/* length - all address space */
1203 SDT_SYS386TSS, /* segment type */
1204 0, /* segment descriptor priority level */
1205 1, /* segment descriptor present */
1206 0, 0,
1207 0, /* unused - default 32 vs 16 bit size */
1208 0 /* limit granularity (byte/page units)*/ },
1209/* GLDT_SEL 5 LDT Descriptor */
1210{ (int) ldt, /* segment base address */
1211 sizeof(ldt)-1, /* length - all address space */
1212 SDT_SYSLDT, /* segment type */
1213 SEL_UPL, /* segment descriptor priority level */
1214 1, /* segment descriptor present */
1215 0, 0,
1216 0, /* unused - default 32 vs 16 bit size */
1217 0 /* limit granularity (byte/page units)*/ },
1218/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1219{ (int) ldt, /* segment base address */
1220 (512 * sizeof(union descriptor)-1), /* length */
1221 SDT_SYSLDT, /* segment type */
1222 0, /* segment descriptor priority level */
1223 1, /* segment descriptor present */
1224 0, 0,
1225 0, /* unused - default 32 vs 16 bit size */
1226 0 /* limit granularity (byte/page units)*/ },
1227/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1228{ 0x0, /* segment base address */
1229 0x0, /* length - all address space */
1230 0, /* segment type */
1231 0, /* segment descriptor priority level */
1232 0, /* segment descriptor present */
1233 0, 0,
1234 0, /* default 32 vs 16 bit size */
1235 0 /* limit granularity (byte/page units)*/ },
1236/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1237{ 0x400, /* segment base address */
1238 0xfffff, /* length */
1239 SDT_MEMRWA, /* segment type */
1240 0, /* segment descriptor priority level */
1241 1, /* segment descriptor present */
1242 0, 0,
1243 1, /* default 32 vs 16 bit size */
1244 1 /* limit granularity (byte/page units)*/ },
1245/* GPANIC_SEL 9 Panic Tss Descriptor */
1246{ (int) &dblfault_tss, /* segment base address */
1247 sizeof(struct i386tss)-1,/* length - all address space */
1248 SDT_SYS386TSS, /* segment type */
1249 0, /* segment descriptor priority level */
1250 1, /* segment descriptor present */
1251 0, 0,
1252 0, /* unused - default 32 vs 16 bit size */
1253 0 /* limit granularity (byte/page units)*/ },
1254/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1255{ 0, /* segment base address (overwritten) */
1256 0xfffff, /* length */
1257 SDT_MEMERA, /* segment type */
1258 0, /* segment descriptor priority level */
1259 1, /* segment descriptor present */
1260 0, 0,
1261 0, /* default 32 vs 16 bit size */
1262 1 /* limit granularity (byte/page units)*/ },
1263/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1264{ 0, /* segment base address (overwritten) */
1265 0xfffff, /* length */
1266 SDT_MEMERA, /* segment type */
1267 0, /* segment descriptor priority level */
1268 1, /* segment descriptor present */
1269 0, 0,
1270 0, /* default 32 vs 16 bit size */
1271 1 /* limit granularity (byte/page units)*/ },
1272/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1273{ 0, /* segment base address (overwritten) */
1274 0xfffff, /* length */
1275 SDT_MEMRWA, /* segment type */
1276 0, /* segment descriptor priority level */
1277 1, /* segment descriptor present */
1278 0, 0,
1279 1, /* default 32 vs 16 bit size */
1280 1 /* limit granularity (byte/page units)*/ },
1281/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1282{ 0, /* segment base address (overwritten) */
1283 0xfffff, /* length */
1284 SDT_MEMRWA, /* segment type */
1285 0, /* segment descriptor priority level */
1286 1, /* segment descriptor present */
1287 0, 0,
1288 0, /* default 32 vs 16 bit size */
1289 1 /* limit granularity (byte/page units)*/ },
1290/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1291{ 0, /* segment base address (overwritten) */
1292 0xfffff, /* length */
1293 SDT_MEMRWA, /* segment type */
1294 0, /* segment descriptor priority level */
1295 1, /* segment descriptor present */
1296 0, 0,
1297 0, /* default 32 vs 16 bit size */
1298 1 /* limit granularity (byte/page units)*/ },
1299};
1300
1301static struct soft_segment_descriptor ldt_segs[] = {
1302 /* Null Descriptor - overwritten by call gate */
1303{ 0x0, /* segment base address */
1304 0x0, /* length - all address space */
1305 0, /* segment type */
1306 0, /* segment descriptor priority level */
1307 0, /* segment descriptor present */
1308 0, 0,
1309 0, /* default 32 vs 16 bit size */
1310 0 /* limit granularity (byte/page units)*/ },
1311 /* Null Descriptor - overwritten by call gate */
1312{ 0x0, /* segment base address */
1313 0x0, /* length - all address space */
1314 0, /* segment type */
1315 0, /* segment descriptor priority level */
1316 0, /* segment descriptor present */
1317 0, 0,
1318 0, /* default 32 vs 16 bit size */
1319 0 /* limit granularity (byte/page units)*/ },
1320 /* Null Descriptor - overwritten by call gate */
1321{ 0x0, /* segment base address */
1322 0x0, /* length - all address space */
1323 0, /* segment type */
1324 0, /* segment descriptor priority level */
1325 0, /* segment descriptor present */
1326 0, 0,
1327 0, /* default 32 vs 16 bit size */
1328 0 /* limit granularity (byte/page units)*/ },
1329 /* Code Descriptor for user */
1330{ 0x0, /* segment base address */
1331 0xfffff, /* length - all address space */
1332 SDT_MEMERA, /* segment type */
1333 SEL_UPL, /* segment descriptor priority level */
1334 1, /* segment descriptor present */
1335 0, 0,
1336 1, /* default 32 vs 16 bit size */
1337 1 /* limit granularity (byte/page units)*/ },
1338 /* Null Descriptor - overwritten by call gate */
1339{ 0x0, /* segment base address */
1340 0x0, /* length - all address space */
1341 0, /* segment type */
1342 0, /* segment descriptor priority level */
1343 0, /* segment descriptor present */
1344 0, 0,
1345 0, /* default 32 vs 16 bit size */
1346 0 /* limit granularity (byte/page units)*/ },
1347 /* Data Descriptor for user */
1348{ 0x0, /* segment base address */
1349 0xfffff, /* length - all address space */
1350 SDT_MEMRWA, /* segment type */
1351 SEL_UPL, /* segment descriptor priority level */
1352 1, /* segment descriptor present */
1353 0, 0,
1354 1, /* default 32 vs 16 bit size */
1355 1 /* limit granularity (byte/page units)*/ },
1356};
1357
1358void
1359setidt(idx, func, typ, dpl, selec)
1360 int idx;
1361 inthand_t *func;
1362 int typ;
1363 int dpl;
1364 int selec;
1365{
1366 struct gate_descriptor *ip;
1367
1368 ip = idt + idx;
1369 ip->gd_looffset = (int)func;
1370 ip->gd_selector = selec;
1371 ip->gd_stkcpy = 0;
1372 ip->gd_xx = 0;
1373 ip->gd_type = typ;
1374 ip->gd_dpl = dpl;
1375 ip->gd_p = 1;
1376 ip->gd_hioffset = ((int)func)>>16 ;
1377}
1378
1379#define IDTVEC(name) __CONCAT(X,name)
1380
1381extern inthand_t
1382 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1383 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1384 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1385 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
a64ba182
MD
1386 IDTVEC(xmm), IDTVEC(syscall);
1387extern inthand_t
1388 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc
MD
1389
1390void
1391sdtossd(sd, ssd)
1392 struct segment_descriptor *sd;
1393 struct soft_segment_descriptor *ssd;
1394{
1395 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1396 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1397 ssd->ssd_type = sd->sd_type;
1398 ssd->ssd_dpl = sd->sd_dpl;
1399 ssd->ssd_p = sd->sd_p;
1400 ssd->ssd_def32 = sd->sd_def32;
1401 ssd->ssd_gran = sd->sd_gran;
1402}
1403
1404#define PHYSMAP_SIZE (2 * 8)
1405
1406/*
1407 * Populate the (physmap) array with base/bound pairs describing the
1408 * available physical memory in the system, then test this memory and
1409 * build the phys_avail array describing the actually-available memory.
1410 *
1411 * If we cannot accurately determine the physical memory map, then use
1412 * value from the 0xE801 call, and failing that, the RTC.
1413 *
1414 * Total memory size may be set by the kernel environment variable
1415 * hw.physmem or the compile-time define MAXMEM.
1416 */
1417static void
1418getmemsize(int first)
1419{
1420 int i, physmap_idx, pa_indx;
1421 int hasbrokenint12;
1422 u_int basemem, extmem;
1423 struct vm86frame vmf;
1424 struct vm86context vmc;
1425 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1426 pt_entry_t pte;
1427 const char *cp;
1428 struct {
1429 u_int64_t base;
1430 u_int64_t length;
1431 u_int32_t type;
1432 } *smap;
1433
1434 hasbrokenint12 = 0;
1435 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1436 bzero(&vmf, sizeof(struct vm86frame));
1437 bzero(physmap, sizeof(physmap));
1438 basemem = 0;
1439
1440 /*
1441 * Some newer BIOSes has broken INT 12H implementation which cause
1442 * kernel panic immediately. In this case, we need to scan SMAP
1443 * with INT 15:E820 first, then determine base memory size.
1444 */
1445 if (hasbrokenint12) {
1446 goto int15e820;
1447 }
1448
1449 /*
1450 * Perform "base memory" related probes & setup
1451 */
1452 vm86_intcall(0x12, &vmf);
1453 basemem = vmf.vmf_ax;
1454 if (basemem > 640) {
1455 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1456 basemem);
1457 basemem = 640;
1458 }
1459
1460 /*
1461 * XXX if biosbasemem is now < 640, there is a `hole'
1462 * between the end of base memory and the start of
1463 * ISA memory. The hole may be empty or it may
1464 * contain BIOS code or data. Map it read/write so
1465 * that the BIOS can write to it. (Memory from 0 to
1466 * the physical end of the kernel is mapped read-only
1467 * to begin with and then parts of it are remapped.
1468 * The parts that aren't remapped form holes that
1469 * remain read-only and are unused by the kernel.
1470 * The base memory area is below the physical end of
1471 * the kernel and right now forms a read-only hole.
1472 * The part of it from PAGE_SIZE to
1473 * (trunc_page(biosbasemem * 1024) - 1) will be
1474 * remapped and used by the kernel later.)
1475 *
1476 * This code is similar to the code used in
1477 * pmap_mapdev, but since no memory needs to be
1478 * allocated we simply change the mapping.
1479 */
1480 for (pa = trunc_page(basemem * 1024);
1481 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1482 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1483 *pte = pa | PG_RW | PG_V;
1484 }
1485
1486 /*
1487 * if basemem != 640, map pages r/w into vm86 page table so
1488 * that the bios can scribble on it.
1489 */
1490 pte = (pt_entry_t)vm86paddr;
1491 for (i = basemem / 4; i < 160; i++)
1492 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1493
1494int15e820:
1495 /*
1496 * map page 1 R/W into the kernel page table so we can use it
1497 * as a buffer. The kernel will unmap this page later.
1498 */
1499 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1500 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1501
1502 /*
1503 * get memory map with INT 15:E820
1504 */
1505#define SMAPSIZ sizeof(*smap)
1506#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1507
1508 vmc.npages = 0;
1509 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1510 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1511
1512 physmap_idx = 0;
1513 vmf.vmf_ebx = 0;
1514 do {
1515 vmf.vmf_eax = 0xE820;
1516 vmf.vmf_edx = SMAP_SIG;
1517 vmf.vmf_ecx = SMAPSIZ;
1518 i = vm86_datacall(0x15, &vmf, &vmc);
1519 if (i || vmf.vmf_eax != SMAP_SIG)
1520 break;
1521 if (boothowto & RB_VERBOSE)
1522 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1523 smap->type,
1524 *(u_int32_t *)((char *)&smap->base + 4),
1525 (u_int32_t)smap->base,
1526 *(u_int32_t *)((char *)&smap->length + 4),
1527 (u_int32_t)smap->length);
1528
1529 if (smap->type != 0x01)
1530 goto next_run;
1531
1532 if (smap->length == 0)
1533 goto next_run;
1534
1535 if (smap->base >= 0xffffffff) {
1536 printf("%uK of memory above 4GB ignored\n",
1537 (u_int)(smap->length / 1024));
1538 goto next_run;
1539 }
1540
1541 for (i = 0; i <= physmap_idx; i += 2) {
1542 if (smap->base < physmap[i + 1]) {
1543 if (boothowto & RB_VERBOSE)
1544 printf(
1545 "Overlapping or non-montonic memory region, ignoring second region\n");
1546 goto next_run;
1547 }
1548 }
1549
1550 if (smap->base == physmap[physmap_idx + 1]) {
1551 physmap[physmap_idx + 1] += smap->length;
1552 goto next_run;
1553 }
1554
1555 physmap_idx += 2;
1556 if (physmap_idx == PHYSMAP_SIZE) {
1557 printf(
1558 "Too many segments in the physical address map, giving up\n");
1559 break;
1560 }
1561 physmap[physmap_idx] = smap->base;
1562 physmap[physmap_idx + 1] = smap->base + smap->length;
1563next_run:
1564 } while (vmf.vmf_ebx != 0);
1565
1566 /*
1567 * Perform "base memory" related probes & setup based on SMAP
1568 */
1569 if (basemem == 0) {
1570 for (i = 0; i <= physmap_idx; i += 2) {
1571 if (physmap[i] == 0x00000000) {
1572 basemem = physmap[i + 1] / 1024;
1573 break;
1574 }
1575 }
1576
1577 if (basemem == 0) {
1578 basemem = 640;
1579 }
1580
1581 if (basemem > 640) {
1582 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1583 basemem);
1584 basemem = 640;
1585 }
1586
1587 for (pa = trunc_page(basemem * 1024);
1588 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1589 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1590 *pte = pa | PG_RW | PG_V;
1591 }
1592
1593 pte = (pt_entry_t)vm86paddr;
1594 for (i = basemem / 4; i < 160; i++)
1595 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1596 }
1597
1598 if (physmap[1] != 0)
1599 goto physmap_done;
1600
1601 /*
1602 * If we failed above, try memory map with INT 15:E801
1603 */
1604 vmf.vmf_ax = 0xE801;
1605 if (vm86_intcall(0x15, &vmf) == 0) {
1606 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1607 } else {
1608#if 0
1609 vmf.vmf_ah = 0x88;
1610 vm86_intcall(0x15, &vmf);
1611 extmem = vmf.vmf_ax;
1612#else
1613 /*
1614 * Prefer the RTC value for extended memory.
1615 */
1616 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1617#endif
1618 }
1619
1620 /*
1621 * Special hack for chipsets that still remap the 384k hole when
1622 * there's 16MB of memory - this really confuses people that
1623 * are trying to use bus mastering ISA controllers with the
1624 * "16MB limit"; they only have 16MB, but the remapping puts
1625 * them beyond the limit.
1626 *
1627 * If extended memory is between 15-16MB (16-17MB phys address range),
1628 * chop it to 15MB.
1629 */
1630 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1631 extmem = 15 * 1024;
1632
1633 physmap[0] = 0;
1634 physmap[1] = basemem * 1024;
1635 physmap_idx = 2;
1636 physmap[physmap_idx] = 0x100000;
1637 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1638
1639physmap_done:
1640 /*
1641 * Now, physmap contains a map of physical memory.
1642 */
1643
1644#ifdef SMP
17a9f566 1645 /* make hole for AP bootstrap code YYY */
984263bc
MD
1646 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1647
1648 /* look for the MP hardware - needed for apic addresses */
1649 mp_probe();
1650#endif
1651
1652 /*
1653 * Maxmem isn't the "maximum memory", it's one larger than the
1654 * highest page of the physical address space. It should be
1655 * called something like "Maxphyspage". We may adjust this
1656 * based on ``hw.physmem'' and the results of the memory test.
1657 */
1658 Maxmem = atop(physmap[physmap_idx + 1]);
1659
1660#ifdef MAXMEM
1661 Maxmem = MAXMEM / 4;
1662#endif
1663
1664 /*
1665 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1666 * for the appropriate modifiers. This overrides MAXMEM.
1667 */
1668 if ((cp = getenv("hw.physmem")) != NULL) {
1669 u_int64_t AllowMem, sanity;
1670 char *ep;
1671
1672 sanity = AllowMem = strtouq(cp, &ep, 0);
1673 if ((ep != cp) && (*ep != 0)) {
1674 switch(*ep) {
1675 case 'g':
1676 case 'G':
1677 AllowMem <<= 10;
1678 case 'm':
1679 case 'M':
1680 AllowMem <<= 10;
1681 case 'k':
1682 case 'K':
1683 AllowMem <<= 10;
1684 break;
1685 default:
1686 AllowMem = sanity = 0;
1687 }
1688 if (AllowMem < sanity)
1689 AllowMem = 0;
1690 }
1691 if (AllowMem == 0)
1692 printf("Ignoring invalid memory size of '%s'\n", cp);
1693 else
1694 Maxmem = atop(AllowMem);
1695 }
1696
1697 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1698 (boothowto & RB_VERBOSE))
1699 printf("Physical memory use set to %uK\n", Maxmem * 4);
1700
1701 /*
1702 * If Maxmem has been increased beyond what the system has detected,
1703 * extend the last memory segment to the new limit.
1704 */
1705 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1706 physmap[physmap_idx + 1] = ptoa(Maxmem);
1707
1708 /* call pmap initialization to make new kernel address space */
1709 pmap_bootstrap(first, 0);
1710
1711 /*
1712 * Size up each available chunk of physical memory.
1713 */
1714 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1715 pa_indx = 0;
1716 phys_avail[pa_indx++] = physmap[0];
1717 phys_avail[pa_indx] = physmap[0];
1718#if 0
1719 pte = (pt_entry_t)vtopte(KERNBASE);
1720#else
1721 pte = (pt_entry_t)CMAP1;
1722#endif
1723
1724 /*
1725 * physmap is in bytes, so when converting to page boundaries,
1726 * round up the start address and round down the end address.
1727 */
1728 for (i = 0; i <= physmap_idx; i += 2) {
1729 vm_offset_t end;
1730
1731 end = ptoa(Maxmem);
1732 if (physmap[i + 1] < end)
1733 end = trunc_page(physmap[i + 1]);
1734 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1735 int tmp, page_bad;
1736#if 0
1737 int *ptr = 0;
1738#else
1739 int *ptr = (int *)CADDR1;
1740#endif
1741
1742 /*
1743 * block out kernel memory as not available.
1744 */
1745 if (pa >= 0x100000 && pa < first)
1746 continue;
1747
1748 page_bad = FALSE;
1749
1750 /*
1751 * map page into kernel: valid, read/write,non-cacheable
1752 */
1753 *pte = pa | PG_V | PG_RW | PG_N;
1754 invltlb();
1755
1756 tmp = *(int *)ptr;
1757 /*
1758 * Test for alternating 1's and 0's
1759 */
1760 *(volatile int *)ptr = 0xaaaaaaaa;
1761 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1762 page_bad = TRUE;
1763 }
1764 /*
1765 * Test for alternating 0's and 1's
1766 */
1767 *(volatile int *)ptr = 0x55555555;
1768 if (*(volatile int *)ptr != 0x55555555) {
1769 page_bad = TRUE;
1770 }
1771 /*
1772 * Test for all 1's
1773 */
1774 *(volatile int *)ptr = 0xffffffff;
1775 if (*(volatile int *)ptr != 0xffffffff) {
1776 page_bad = TRUE;
1777 }
1778 /*
1779 * Test for all 0's
1780 */
1781 *(volatile int *)ptr = 0x0;
1782 if (*(volatile int *)ptr != 0x0) {
1783 page_bad = TRUE;
1784 }
1785 /*
1786 * Restore original value.
1787 */
1788 *(int *)ptr = tmp;
1789
1790 /*
1791 * Adjust array of valid/good pages.
1792 */
1793 if (page_bad == TRUE) {
1794 continue;
1795 }
1796 /*
1797 * If this good page is a continuation of the
1798 * previous set of good pages, then just increase
1799 * the end pointer. Otherwise start a new chunk.
1800 * Note that "end" points one higher than end,
1801 * making the range >= start and < end.
1802 * If we're also doing a speculative memory
1803 * test and we at or past the end, bump up Maxmem
1804 * so that we keep going. The first bad page
1805 * will terminate the loop.
1806 */
1807 if (phys_avail[pa_indx] == pa) {
1808 phys_avail[pa_indx] += PAGE_SIZE;
1809 } else {
1810 pa_indx++;
1811 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1812 printf("Too many holes in the physical address space, giving up\n");
1813 pa_indx--;
1814 break;
1815 }
1816 phys_avail[pa_indx++] = pa; /* start */
1817 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1818 }
1819 physmem++;
1820 }
1821 }
1822 *pte = 0;
1823 invltlb();
1824
1825 /*
1826 * XXX
1827 * The last chunk must contain at least one page plus the message
1828 * buffer to avoid complicating other code (message buffer address
1829 * calculation, etc.).
1830 */
1831 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1832 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1833 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1834 phys_avail[pa_indx--] = 0;
1835 phys_avail[pa_indx--] = 0;
1836 }
1837
1838 Maxmem = atop(phys_avail[pa_indx]);
1839
1840 /* Trim off space for the message buffer. */
1841 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1842
1843 avail_end = phys_avail[pa_indx];
1844}
1845
1846void
17a9f566 1847init386(int first)
984263bc
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1848{
1849 struct gate_descriptor *gdp;
1850 int gsel_tss, metadata_missing, off, x;
85100692 1851 struct mdglobaldata *gd;
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1852
1853 /*
1854 * Prevent lowering of the ipl if we call tsleep() early.
1855 */
85100692 1856 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1857 bzero(gd, sizeof(*gd));
984263bc 1858
85100692 1859 gd->mi.gd_curthread = &thread0;
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1860
1861 atdevbase = ISA_HOLE_START + KERNBASE;
1862
1863 metadata_missing = 0;
1864 if (bootinfo.bi_modulep) {
1865 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1866 preload_bootstrap_relocate(KERNBASE);
1867 } else {
1868 metadata_missing = 1;
1869 }
1870 if (bootinfo.bi_envp)
1871 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1872
4e8e646b
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1873 /* start with one cpu */
1874 ncpus = 1;
984263bc
MD
1875 /* Init basic tunables, hz etc */
1876 init_param1();
1877
1878 /*
1879 * make gdt memory segments, the code segment goes up to end of the
1880 * page with etext in it, the data segment goes to the end of
1881 * the address space
1882 */
1883 /*
1884 * XXX text protection is temporarily (?) disabled. The limit was
1885 * i386_btop(round_page(etext)) - 1.
1886 */
1887 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1888 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1889
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1890 gdt_segs[GPRIV_SEL].ssd_limit =
1891 atop(sizeof(struct privatespace) - 1);
8ad65e08 1892 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1893 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1894 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1895
85100692 1896 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1897
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MD
1898 /*
1899 * Note: on both UP and SMP curthread must be set non-NULL
1900 * early in the boot sequence because the system assumes
1901 * that 'curthread' is never NULL.
1902 */
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MD
1903
1904 for (x = 0; x < NGDT; x++) {
1905#ifdef BDE_DEBUGGER
1906 /* avoid overwriting db entries with APM ones */
1907 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1908 continue;
1909#endif
1910 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1911 }
1912
1913 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1914 r_gdt.rd_base = (int) gdt;
1915 lgdt(&r_gdt);
1916
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1917 mi_gdinit(&gd->mi, 0);
1918 cpu_gdinit(gd, 0);
1919 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1920 lwkt_set_comm(&thread0, "thread0");
1921 proc0.p_addr = (void *)thread0.td_kstack;
1922 proc0.p_thread = &thread0;
a2a5ad0d 1923 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
d9eea1a5 1924 thread0.td_flags |= TDF_RUNNING;
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MD
1925 thread0.td_proc = &proc0;
1926 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1927 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1928
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1929 /* make ldt memory segments */
1930 /*
1931 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1932 * should be spelled ...MAX_USER...
1933 */
1934 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1935 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1936 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1937 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1938
1939 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1940 lldt(_default_ldt);
1941#ifdef USER_LDT
17a9f566 1942 gd->gd_currentldt = _default_ldt;
984263bc 1943#endif
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MD
1944 /* spinlocks and the BGL */
1945 init_locks();
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1946
1947 /* exceptions */
1948 for (x = 0; x < NIDT; x++)
1949 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1952 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1953 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1959 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1965 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1966 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1967 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1968 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1969 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1970 setidt(0x80, &IDTVEC(int0x80_syscall),
1971 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
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MD
1972 setidt(0x81, &IDTVEC(int0x81_syscall),
1973 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
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MD
1974
1975 r_idt.rd_limit = sizeof(idt0) - 1;
1976 r_idt.rd_base = (int) idt;
1977 lidt(&r_idt);
1978
1979 /*
1980 * Initialize the console before we print anything out.
1981 */
1982 cninit();
1983
1984 if (metadata_missing)
1985 printf("WARNING: loader(8) metadata is missing!\n");
1986
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1987#if NISA >0
1988 isa_defaultirq();
1989#endif
1990 rand_initialize();
1991
1992#ifdef DDB
1993 kdb_init();
1994 if (boothowto & RB_KDB)
1995 Debugger("Boot flags requested debugger");
1996#endif
1997
1998 finishidentcpu(); /* Final stage of CPU initialization */
1999 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2000 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2001 initializecpu(); /* Initialize CPU registers */
2002
b7c628e4
MD
2003 /*
2004 * make an initial tss so cpu can get interrupt stack on syscall!
2005 * The 16 bytes is to save room for a VM86 context.
2006 */
17a9f566
MD
2007 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2008 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 2009 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
2010 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2011 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 2012 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
2013 ltr(gsel_tss);
2014
2015 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2016 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2017 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2018 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2019 dblfault_tss.tss_cr3 = (int)IdlePTD;
2020 dblfault_tss.tss_eip = (int) dblfault_handler;
2021 dblfault_tss.tss_eflags = PSL_KERNEL;
2022 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2023 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2024 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2025 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2026 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2027
2028 vm86_initialize();
2029 getmemsize(first);
2030 init_param2(physmem);
2031
2032 /* now running on new page tables, configured,and u/iom is accessible */
2033
2034 /* Map the message buffer. */
2035 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2036 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2037
2038 msgbufinit(msgbufp, MSGBUF_SIZE);
2039
2040 /* make a call gate to reenter kernel with */
2041 gdp = &ldt[LSYS5CALLS_SEL].gd;
2042
2043 x = (int) &IDTVEC(syscall);
2044 gdp->gd_looffset = x++;
2045 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2046 gdp->gd_stkcpy = 1;
2047 gdp->gd_type = SDT_SYS386CGT;
2048 gdp->gd_dpl = SEL_UPL;
2049 gdp->gd_p = 1;
2050 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2051
2052 /* XXX does this work? */
2053 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2054 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2055
2056 /* transfer to user mode */
2057
2058 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2059 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2060
2061 /* setup proc 0's pcb */
b7c628e4
MD
2062 thread0.td_pcb->pcb_flags = 0;
2063 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2064 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2065 proc0.p_md.md_regs = &proc0_tf;
2066}
2067
8ad65e08 2068/*
17a9f566
MD
2069 * Initialize machine-dependant portions of the global data structure.
2070 * Note that the global data area and cpu0's idlestack in the private
2071 * data space were allocated in locore.
ef0fdad1
MD
2072 *
2073 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2074 *
2075 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2076 */
2077void
85100692 2078cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2079{
2080 char *sp;
8ad65e08 2081
7d0bac62 2082 if (cpu)
a2a5ad0d 2083 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2084
85100692 2085 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2086 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2087 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2088 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2089 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2090 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2091}
2092
12e4aaff
MD
2093struct globaldata *
2094globaldata_find(int cpu)
2095{
2096 KKASSERT(cpu >= 0 && cpu < ncpus);
2097 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2098}
2099
984263bc
MD
2100#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2101static void f00f_hack(void *unused);
2102SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2103
2104static void
17a9f566
MD
2105f00f_hack(void *unused)
2106{
984263bc 2107 struct gate_descriptor *new_idt;
984263bc
MD
2108 vm_offset_t tmp;
2109
2110 if (!has_f00f_bug)
2111 return;
2112
2113 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2114
2115 r_idt.rd_limit = sizeof(idt0) - 1;
2116
2117 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2118 if (tmp == 0)
2119 panic("kmem_alloc returned 0");
2120 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2121 panic("kmem_alloc returned non-page-aligned memory");
2122 /* Put the first seven entries in the lower page */
2123 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2124 bcopy(idt, new_idt, sizeof(idt0));
2125 r_idt.rd_base = (int)new_idt;
2126 lidt(&r_idt);
2127 idt = new_idt;
2128 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2129 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2130 panic("vm_map_protect failed");
2131 return;
2132}
2133#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2134
2135int
2136ptrace_set_pc(p, addr)
2137 struct proc *p;
2138 unsigned long addr;
2139{
2140 p->p_md.md_regs->tf_eip = addr;
2141 return (0);
2142}
2143
2144int
2145ptrace_single_step(p)
2146 struct proc *p;
2147{
2148 p->p_md.md_regs->tf_eflags |= PSL_T;
2149 return (0);
2150}
2151
2152int ptrace_read_u_check(p, addr, len)
2153 struct proc *p;
2154 vm_offset_t addr;
2155 size_t len;
2156{
2157 vm_offset_t gap;
2158
2159 if ((vm_offset_t) (addr + len) < addr)
2160 return EPERM;
2161 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2162 return 0;
2163
2164 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2165
2166 if ((vm_offset_t) addr < gap)
2167 return EPERM;
2168 if ((vm_offset_t) (addr + len) <=
2169 (vm_offset_t) (gap + sizeof(struct trapframe)))
2170 return 0;
2171 return EPERM;
2172}
2173
2174int ptrace_write_u(p, off, data)
2175 struct proc *p;
2176 vm_offset_t off;
2177 long data;
2178{
2179 struct trapframe frame_copy;
2180 vm_offset_t min;
2181 struct trapframe *tp;
2182
2183 /*
2184 * Privileged kernel state is scattered all over the user area.
2185 * Only allow write access to parts of regs and to fpregs.
2186 */
2187 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2188 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2189 tp = p->p_md.md_regs;
2190 frame_copy = *tp;
2191 *(int *)((char *)&frame_copy + (off - min)) = data;
2192 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2193 !CS_SECURE(frame_copy.tf_cs))
2194 return (EINVAL);
2195 *(int*)((char *)p->p_addr + off) = data;
2196 return (0);
2197 }
b7c628e4
MD
2198
2199 /*
2200 * The PCB is at the end of the user area YYY
2201 */
2202 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2203 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2204 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2205 *(int*)((char *)p->p_addr + off) = data;
2206 return (0);
2207 }
2208 return (EFAULT);
2209}
2210
2211int
2212fill_regs(p, regs)
2213 struct proc *p;
2214 struct reg *regs;
2215{
2216 struct pcb *pcb;
2217 struct trapframe *tp;
2218
2219 tp = p->p_md.md_regs;
2220 regs->r_fs = tp->tf_fs;
2221 regs->r_es = tp->tf_es;
2222 regs->r_ds = tp->tf_ds;
2223 regs->r_edi = tp->tf_edi;
2224 regs->r_esi = tp->tf_esi;
2225 regs->r_ebp = tp->tf_ebp;
2226 regs->r_ebx = tp->tf_ebx;
2227 regs->r_edx = tp->tf_edx;
2228 regs->r_ecx = tp->tf_ecx;
2229 regs->r_eax = tp->tf_eax;
2230 regs->r_eip = tp->tf_eip;
2231 regs->r_cs = tp->tf_cs;
2232 regs->r_eflags = tp->tf_eflags;
2233 regs->r_esp = tp->tf_esp;
2234 regs->r_ss = tp->tf_ss;
b7c628e4 2235 pcb = p->p_thread->td_pcb;
984263bc
MD
2236 regs->r_gs = pcb->pcb_gs;
2237 return (0);
2238}
2239
2240int
2241set_regs(p, regs)
2242 struct proc *p;
2243 struct reg *regs;
2244{
2245 struct pcb *pcb;
2246 struct trapframe *tp;
2247
2248 tp = p->p_md.md_regs;
2249 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2250 !CS_SECURE(regs->r_cs))
2251 return (EINVAL);
2252 tp->tf_fs = regs->r_fs;
2253 tp->tf_es = regs->r_es;
2254 tp->tf_ds = regs->r_ds;
2255 tp->tf_edi = regs->r_edi;
2256 tp->tf_esi = regs->r_esi;
2257 tp->tf_ebp = regs->r_ebp;
2258 tp->tf_ebx = regs->r_ebx;
2259 tp->tf_edx = regs->r_edx;
2260 tp->tf_ecx = regs->r_ecx;
2261 tp->tf_eax = regs->r_eax;
2262 tp->tf_eip = regs->r_eip;
2263 tp->tf_cs = regs->r_cs;
2264 tp->tf_eflags = regs->r_eflags;
2265 tp->tf_esp = regs->r_esp;
2266 tp->tf_ss = regs->r_ss;
b7c628e4 2267 pcb = p->p_thread->td_pcb;
984263bc
MD
2268 pcb->pcb_gs = regs->r_gs;
2269 return (0);
2270}
2271
642a6e88 2272#ifndef CPU_DISABLE_SSE
984263bc
MD
2273static void
2274fill_fpregs_xmm(sv_xmm, sv_87)
2275 struct savexmm *sv_xmm;
2276 struct save87 *sv_87;
2277{
c9faf524
RG
2278 struct env87 *penv_87 = &sv_87->sv_env;
2279 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2280 int i;
2281
2282 /* FPU control/status */
2283 penv_87->en_cw = penv_xmm->en_cw;
2284 penv_87->en_sw = penv_xmm->en_sw;
2285 penv_87->en_tw = penv_xmm->en_tw;
2286 penv_87->en_fip = penv_xmm->en_fip;
2287 penv_87->en_fcs = penv_xmm->en_fcs;
2288 penv_87->en_opcode = penv_xmm->en_opcode;
2289 penv_87->en_foo = penv_xmm->en_foo;
2290 penv_87->en_fos = penv_xmm->en_fos;
2291
2292 /* FPU registers */
2293 for (i = 0; i < 8; ++i)
2294 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2295
2296 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2297}
2298
2299static void
2300set_fpregs_xmm(sv_87, sv_xmm)
2301 struct save87 *sv_87;
2302 struct savexmm *sv_xmm;
2303{
c9faf524
RG
2304 struct env87 *penv_87 = &sv_87->sv_env;
2305 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2306 int i;
2307
2308 /* FPU control/status */
2309 penv_xmm->en_cw = penv_87->en_cw;
2310 penv_xmm->en_sw = penv_87->en_sw;
2311 penv_xmm->en_tw = penv_87->en_tw;
2312 penv_xmm->en_fip = penv_87->en_fip;
2313 penv_xmm->en_fcs = penv_87->en_fcs;
2314 penv_xmm->en_opcode = penv_87->en_opcode;
2315 penv_xmm->en_foo = penv_87->en_foo;
2316 penv_xmm->en_fos = penv_87->en_fos;
2317
2318 /* FPU registers */
2319 for (i = 0; i < 8; ++i)
2320 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2321
2322 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2323}
642a6e88 2324#endif /* CPU_DISABLE_SSE */
984263bc
MD
2325
2326int
2327fill_fpregs(p, fpregs)
2328 struct proc *p;
2329 struct fpreg *fpregs;
2330{
642a6e88 2331#ifndef CPU_DISABLE_SSE
984263bc 2332 if (cpu_fxsr) {
b7c628e4 2333 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2334 (struct save87 *)fpregs);
2335 return (0);
2336 }
642a6e88 2337#endif /* CPU_DISABLE_SSE */
b7c628e4 2338 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2339 return (0);
2340}
2341
2342int
2343set_fpregs(p, fpregs)
2344 struct proc *p;
2345 struct fpreg *fpregs;
2346{
642a6e88 2347#ifndef CPU_DISABLE_SSE
984263bc
MD
2348 if (cpu_fxsr) {
2349 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2350 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2351 return (0);
2352 }
642a6e88 2353#endif /* CPU_DISABLE_SSE */
b7c628e4 2354 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2355 return (0);
2356}
2357
2358int
2359fill_dbregs(p, dbregs)
2360 struct proc *p;
2361 struct dbreg *dbregs;
2362{
2363 struct pcb *pcb;
2364
2365 if (p == NULL) {
2366 dbregs->dr0 = rdr0();
2367 dbregs->dr1 = rdr1();
2368 dbregs->dr2 = rdr2();
2369 dbregs->dr3 = rdr3();
2370 dbregs->dr4 = rdr4();
2371 dbregs->dr5 = rdr5();
2372 dbregs->dr6 = rdr6();
2373 dbregs->dr7 = rdr7();
2374 }
2375 else {
b7c628e4 2376 pcb = p->p_thread->td_pcb;
984263bc
MD
2377 dbregs->dr0 = pcb->pcb_dr0;
2378 dbregs->dr1 = pcb->pcb_dr1;
2379 dbregs->dr2 = pcb->pcb_dr2;
2380 dbregs->dr3 = pcb->pcb_dr3;
2381 dbregs->dr4 = 0;
2382 dbregs->dr5 = 0;
2383 dbregs->dr6 = pcb->pcb_dr6;
2384 dbregs->dr7 = pcb->pcb_dr7;
2385 }
2386 return (0);
2387}
2388
2389int
2390set_dbregs(p, dbregs)
2391 struct proc *p;
2392 struct dbreg *dbregs;
2393{
2394 struct pcb *pcb;
2395 int i;
2396 u_int32_t mask1, mask2;
2397
2398 if (p == NULL) {
2399 load_dr0(dbregs->dr0);
2400 load_dr1(dbregs->dr1);
2401 load_dr2(dbregs->dr2);
2402 load_dr3(dbregs->dr3);
2403 load_dr4(dbregs->dr4);
2404 load_dr5(dbregs->dr5);
2405 load_dr6(dbregs->dr6);
2406 load_dr7(dbregs->dr7);
2407 }
2408 else {
2409 /*
2410 * Don't let an illegal value for dr7 get set. Specifically,
2411 * check for undefined settings. Setting these bit patterns
2412 * result in undefined behaviour and can lead to an unexpected
2413 * TRCTRAP.
2414 */
2415 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2416 i++, mask1 <<= 2, mask2 <<= 2)
2417 if ((dbregs->dr7 & mask1) == mask2)
2418 return (EINVAL);
2419
b7c628e4 2420 pcb = p->p_thread->td_pcb;
984263bc
MD
2421
2422 /*
2423 * Don't let a process set a breakpoint that is not within the
2424 * process's address space. If a process could do this, it
2425 * could halt the system by setting a breakpoint in the kernel
2426 * (if ddb was enabled). Thus, we need to check to make sure
2427 * that no breakpoints are being enabled for addresses outside
2428 * process's address space, unless, perhaps, we were called by
2429 * uid 0.
2430 *
2431 * XXX - what about when the watched area of the user's
2432 * address space is written into from within the kernel
2433 * ... wouldn't that still cause a breakpoint to be generated
2434 * from within kernel mode?
2435 */
2436
dadab5e9 2437 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2438 if (dbregs->dr7 & 0x3) {
2439 /* dr0 is enabled */
2440 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2441 return (EINVAL);
2442 }
2443
2444 if (dbregs->dr7 & (0x3<<2)) {
2445 /* dr1 is enabled */
2446 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2447 return (EINVAL);
2448 }
2449
2450 if (dbregs->dr7 & (0x3<<4)) {
2451 /* dr2 is enabled */
2452 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2453 return (EINVAL);
2454 }
2455
2456 if (dbregs->dr7 & (0x3<<6)) {
2457 /* dr3 is enabled */
2458 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2459 return (EINVAL);
2460 }
2461 }
2462
2463 pcb->pcb_dr0 = dbregs->dr0;
2464 pcb->pcb_dr1 = dbregs->dr1;
2465 pcb->pcb_dr2 = dbregs->dr2;
2466 pcb->pcb_dr3 = dbregs->dr3;
2467 pcb->pcb_dr6 = dbregs->dr6;
2468 pcb->pcb_dr7 = dbregs->dr7;
2469
2470 pcb->pcb_flags |= PCB_DBREGS;
2471 }
2472
2473 return (0);
2474}
2475
2476/*
2477 * Return > 0 if a hardware breakpoint has been hit, and the
2478 * breakpoint was in user space. Return 0, otherwise.
2479 */
2480int
2481user_dbreg_trap(void)
2482{
2483 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2484 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2485 int nbp; /* number of breakpoints that triggered */
2486 caddr_t addr[4]; /* breakpoint addresses */
2487 int i;
2488
2489 dr7 = rdr7();
2490 if ((dr7 & 0x000000ff) == 0) {
2491 /*
2492 * all GE and LE bits in the dr7 register are zero,
2493 * thus the trap couldn't have been caused by the
2494 * hardware debug registers
2495 */
2496 return 0;
2497 }
2498
2499 nbp = 0;
2500 dr6 = rdr6();
2501 bp = dr6 & 0x0000000f;
2502
2503 if (!bp) {
2504 /*
2505 * None of the breakpoint bits are set meaning this
2506 * trap was not caused by any of the debug registers
2507 */
2508 return 0;
2509 }
2510
2511 /*
2512 * at least one of the breakpoints were hit, check to see
2513 * which ones and if any of them are user space addresses
2514 */
2515
2516 if (bp & 0x01) {
2517 addr[nbp++] = (caddr_t)rdr0();
2518 }
2519 if (bp & 0x02) {
2520 addr[nbp++] = (caddr_t)rdr1();
2521 }
2522 if (bp & 0x04) {
2523 addr[nbp++] = (caddr_t)rdr2();
2524 }
2525 if (bp & 0x08) {
2526 addr[nbp++] = (caddr_t)rdr3();
2527 }
2528
2529 for (i=0; i<nbp; i++) {
2530 if (addr[i] <
2531 (caddr_t)VM_MAXUSER_ADDRESS) {
2532 /*
2533 * addr[i] is in user space
2534 */
2535 return nbp;
2536 }
2537 }
2538
2539 /*
2540 * None of the breakpoints are in user space.
2541 */
2542 return 0;
2543}
2544
2545
2546#ifndef DDB
2547void
2548Debugger(const char *msg)
2549{
2550 printf("Debugger(\"%s\") called.\n", msg);
2551}
2552#endif /* no DDB */
2553
2554#include <sys/disklabel.h>
2555
2556/*
2557 * Determine the size of the transfer, and make sure it is
2558 * within the boundaries of the partition. Adjust transfer
2559 * if needed, and signal errors or early completion.
2560 */
2561int
2562bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2563{
2564 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2565 int labelsect = lp->d_partitions[0].p_offset;
2566 int maxsz = p->p_size,
2567 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2568
2569 /* overwriting disk label ? */
2570 /* XXX should also protect bootstrap in first 8K */
2571 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2572#if LABELSECTOR != 0
2573 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2574#endif
2575 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2576 bp->b_error = EROFS;
2577 goto bad;
2578 }
2579
2580#if defined(DOSBBSECTOR) && defined(notyet)
2581 /* overwriting master boot record? */
2582 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2583 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2584 bp->b_error = EROFS;
2585 goto bad;
2586 }
2587#endif
2588
2589 /* beyond partition? */
2590 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2591 /* if exactly at end of disk, return an EOF */
2592 if (bp->b_blkno == maxsz) {
2593 bp->b_resid = bp->b_bcount;
2594 return(0);
2595 }
2596 /* or truncate if part of it fits */
2597 sz = maxsz - bp->b_blkno;
2598 if (sz <= 0) {
2599 bp->b_error = EINVAL;
2600 goto bad;
2601 }
2602 bp->b_bcount = sz << DEV_BSHIFT;
2603 }
2604
2605 bp->b_pblkno = bp->b_blkno + p->p_offset;
2606 return(1);
2607
2608bad:
2609 bp->b_flags |= B_ERROR;
2610 return(-1);
2611}
2612
2613#ifdef DDB
2614
2615/*
2616 * Provide inb() and outb() as functions. They are normally only
2617 * available as macros calling inlined functions, thus cannot be
2618 * called inside DDB.
2619 *
2620 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2621 */
2622
2623#undef inb
2624#undef outb
2625
2626/* silence compiler warnings */
2627u_char inb(u_int);
2628void outb(u_int, u_char);
2629
2630u_char
2631inb(u_int port)
2632{
2633 u_char data;
2634 /*
2635 * We use %%dx and not %1 here because i/o is done at %dx and not at
2636 * %edx, while gcc generates inferior code (movw instead of movl)
2637 * if we tell it to load (u_short) port.
2638 */
2639 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2640 return (data);
2641}
2642
2643void
2644outb(u_int port, u_char data)
2645{
2646 u_char al;
2647 /*
2648 * Use an unnecessary assignment to help gcc's register allocator.
2649 * This make a large difference for gcc-1.40 and a tiny difference
2650 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2651 * best results. gcc-2.6.0 can't handle this.
2652 */
2653 al = data;
2654 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2655}
2656
2657#endif /* DDB */
8a8d5d85
MD
2658
2659
2660
2661#include "opt_cpu.h"
2662#include "opt_htt.h"
2663#include "opt_user_ldt.h"
2664
2665
2666/*
2667 * initialize all the SMP locks
2668 */
2669
2670/* critical region around IO APIC, apic_imen */
2671struct spinlock imen_spinlock;
2672
2673/* Make FAST_INTR() routines sequential */
2674struct spinlock fast_intr_spinlock;
2675
2676/* critical region for old style disable_intr/enable_intr */
2677struct spinlock mpintr_spinlock;
2678
2679/* critical region around INTR() routines */
2680struct spinlock intr_spinlock;
2681
2682/* lock region used by kernel profiling */
2683struct spinlock mcount_spinlock;
2684
2685/* locks com (tty) data/hardware accesses: a FASTINTR() */
2686struct spinlock com_spinlock;
2687
2688/* locks kernel printfs */
2689struct spinlock cons_spinlock;
2690
2691/* lock regions around the clock hardware */
2692struct spinlock clock_spinlock;
2693
2694/* lock around the MP rendezvous */
2695struct spinlock smp_rv_spinlock;
2696
2697static void
2698init_locks(void)
2699{
2700 /*
2701 * mp_lock = 0; BSP already owns the MP lock
2702 */
2703 /*
2704 * Get the initial mp_lock with a count of 1 for the BSP.
2705 * This uses a LOGICAL cpu ID, ie BSP == 0.
2706 */
2707#ifdef SMP
2708 cpu_get_initial_mplock();
2709#endif
2710 spin_lock_init(&mcount_spinlock);
2711 spin_lock_init(&fast_intr_spinlock);
2712 spin_lock_init(&intr_spinlock);
2713 spin_lock_init(&mpintr_spinlock);
2714 spin_lock_init(&imen_spinlock);
2715 spin_lock_init(&smp_rv_spinlock);
2716 spin_lock_init(&com_spinlock);
2717 spin_lock_init(&clock_spinlock);
2718 spin_lock_init(&cons_spinlock);
2719}
2720