kernel - simplify vm pager ops, add pre-faulting for zero-fill pages.
[dragonfly.git] / sys / platform / pc64 / x86_64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
48ffc236
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
d7f50089 9 * All rights reserved.
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10 *
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
14 *
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15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
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18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
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21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 41 * SUCH DAMAGE.
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42 *
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
d7f50089 44 * $FreeBSD: src/sys/i386/i386/pmap.c,v 1.250.2.18 2002/03/06 22:48:53 silby Exp $
d7f50089 45 */
c8fe38ae 46
d7f50089 47/*
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48 * Manages physical address maps.
49 *
50 * In addition to hardware address maps, this
51 * module is called upon to provide software-use-only
52 * maps which may or may not be stored in the same
53 * form as hardware maps. These pseudo-maps are
54 * used to store intermediate results from copy
55 * operations to and from address spaces.
56 *
57 * Since the information managed by this module is
58 * also stored by the logical address mapping module,
59 * this module may throw away valid virtual-to-physical
60 * mappings at almost any time. However, invalidations
61 * of virtual-to-physical mappings must be done as
62 * requested.
63 *
64 * In order to cope with hardware architectures which
65 * make virtual-to-physical map invalidates expensive,
66 * this module may delay invalidate or reduced protection
67 * operations until such time as they are actually
68 * necessary. This module is given full information as
69 * to which processors are currently using which maps,
70 * and to when physical maps must be made correct.
71 */
72
73#if JG
74#include "opt_disable_pse.h"
75#include "opt_pmap.h"
76#endif
77#include "opt_msgbuf.h"
d7f50089 78
c8fe38ae 79#include <sys/param.h>
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80#include <sys/systm.h>
81#include <sys/kernel.h>
d7f50089 82#include <sys/proc.h>
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83#include <sys/msgbuf.h>
84#include <sys/vmmeter.h>
85#include <sys/mman.h>
d7f50089 86
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87#include <vm/vm.h>
88#include <vm/vm_param.h>
89#include <sys/sysctl.h>
90#include <sys/lock.h>
d7f50089 91#include <vm/vm_kern.h>
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92#include <vm/vm_page.h>
93#include <vm/vm_map.h>
d7f50089 94#include <vm/vm_object.h>
c8fe38ae 95#include <vm/vm_extern.h>
d7f50089 96#include <vm/vm_pageout.h>
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97#include <vm/vm_pager.h>
98#include <vm/vm_zone.h>
99
100#include <sys/user.h>
101#include <sys/thread2.h>
102#include <sys/sysref2.h>
d7f50089 103
c8fe38ae 104#include <machine/cputypes.h>
d7f50089 105#include <machine/md_var.h>
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106#include <machine/specialreg.h>
107#include <machine/smp.h>
108#include <machine_base/apic/apicreg.h>
d7f50089 109#include <machine/globaldata.h>
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110#include <machine/pmap.h>
111#include <machine/pmap_inval.h>
112
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113#include <ddb/ddb.h>
114
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115#define PMAP_KEEP_PDIRS
116#ifndef PMAP_SHPGPERPROC
117#define PMAP_SHPGPERPROC 200
118#endif
119
120#if defined(DIAGNOSTIC)
121#define PMAP_DIAGNOSTIC
122#endif
123
124#define MINPV 2048
125
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126/*
127 * Get PDEs and PTEs for user/kernel address space
128 */
48ffc236 129static pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va);
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130#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
131
132#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
133#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
134#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
135#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
136#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
137
138
139/*
140 * Given a map and a machine independent protection code,
141 * convert to a vax protection code.
142 */
143#define pte_prot(m, p) \
144 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
145static int protection_codes[8];
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146
147struct pmap kernel_pmap;
c8fe38ae 148static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 149
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150vm_paddr_t avail_start; /* PA of first available physical page */
151vm_paddr_t avail_end; /* PA of last available physical page */
152vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
153vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
154vm_offset_t KvaStart; /* VA start of KVA space */
155vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
156vm_offset_t KvaSize; /* max size of kernel virtual address space */
157static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
158static int pgeflag; /* PG_G or-in */
159static int pseflag; /* PG_PS or-in */
d7f50089 160
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161static vm_object_t kptobj;
162
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163static int ndmpdp;
164static vm_paddr_t dmaplimit;
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165static int nkpt;
166vm_offset_t kernel_vm_end;
d7f50089 167
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168static uint64_t KPDphys; /* phys addr of kernel level 2 */
169uint64_t KPDPphys; /* phys addr of kernel level 3 */
170uint64_t KPML4phys; /* phys addr of kernel level 4 */
171
172static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
173static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
174
d7f50089 175/*
c8fe38ae 176 * Data for the pv entry allocation mechanism
d7f50089 177 */
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178static vm_zone_t pvzone;
179static struct vm_zone pvzone_store;
180static struct vm_object pvzone_obj;
181static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0;
182static int pmap_pagedaemon_waken = 0;
183static struct pv_entry *pvinit;
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184
185/*
c8fe38ae 186 * All those kernel PT submaps that BSD is so fond of
d7f50089 187 */
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188pt_entry_t *CMAP1 = 0, *ptmmap;
189caddr_t CADDR1 = 0, ptvmmap = 0;
190static pt_entry_t *msgbufmap;
191struct msgbuf *msgbufp=0;
d7f50089 192
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193/*
194 * Crashdump maps.
d7f50089 195 */
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196static pt_entry_t *pt_crashdumpmap;
197static caddr_t crashdumpmap;
198
199extern uint64_t KPTphys;
200extern pt_entry_t *SMPpt;
201extern uint64_t SMPptpa;
202
203#define DISABLE_PSE
204
c8fe38ae 205static pv_entry_t get_pv_entry (void);
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206static void i386_protection_init (void);
207static void create_pagetables(vm_paddr_t *firstaddr);
208static void pmap_remove_all (vm_page_t m);
bfc09ba0 209static int pmap_remove_pte (struct pmap *pmap, pt_entry_t *ptq,
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210 vm_offset_t sva, pmap_inval_info_t info);
211static void pmap_remove_page (struct pmap *pmap,
212 vm_offset_t va, pmap_inval_info_t info);
bfc09ba0 213static int pmap_remove_entry (struct pmap *pmap, vm_page_t m,
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214 vm_offset_t va, pmap_inval_info_t info);
215static boolean_t pmap_testbit (vm_page_t m, int bit);
216static void pmap_insert_entry (pmap_t pmap, vm_offset_t va,
bfc09ba0 217 vm_page_t mpte, vm_page_t m);
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218
219static vm_page_t pmap_allocpte (pmap_t pmap, vm_offset_t va);
220
221static int pmap_release_free_page (pmap_t pmap, vm_page_t p);
222static vm_page_t _pmap_allocpte (pmap_t pmap, vm_pindex_t ptepindex);
223static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
224static vm_page_t pmap_page_lookup (vm_object_t object, vm_pindex_t pindex);
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225static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
226 pmap_inval_info_t info);
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227static int pmap_unuse_pt (pmap_t, vm_offset_t, vm_page_t, pmap_inval_info_t);
228static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
229
230static unsigned pdir4mb;
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231
232/*
c8fe38ae 233 * Move the kernel virtual free pointer to the next
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234 * 2MB. This is used to help improve performance
235 * by using a large (2MB) page for much of the kernel
c8fe38ae 236 * (.text, .data, .bss)
d7f50089 237 */
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238static
239vm_offset_t
c8fe38ae 240pmap_kmem_choose(vm_offset_t addr)
d7f50089 241{
c8fe38ae 242 vm_offset_t newaddr = addr;
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243
244 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 245 return newaddr;
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246}
247
d7f50089 248/*
c8fe38ae 249 * pmap_pte_quick:
d7f50089 250 *
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251 * Super fast pmap_pte routine best used when scanning the pv lists.
252 * This eliminates many course-grained invltlb calls. Note that many of
253 * the pv list scans are across different pmaps and it is very wasteful
254 * to do an entire invltlb when checking a single mapping.
255 *
256 * Should only be called while in a critical section.
257 */
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258static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
259
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260static
261pt_entry_t *
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262pmap_pte_quick(pmap_t pmap, vm_offset_t va)
263{
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264 return pmap_pte(pmap, va);
265}
266
267/* Return a non-clipped PD index for a given VA */
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268static __inline
269vm_pindex_t
48ffc236 270pmap_pde_pindex(vm_offset_t va)
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271{
272 return va >> PDRSHIFT;
273}
274
275/* Return various clipped indexes for a given VA */
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276static __inline
277vm_pindex_t
48ffc236 278pmap_pte_index(vm_offset_t va)
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279{
280
281 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
282}
283
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284static __inline
285vm_pindex_t
48ffc236 286pmap_pde_index(vm_offset_t va)
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287{
288
289 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
290}
291
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292static __inline
293vm_pindex_t
48ffc236 294pmap_pdpe_index(vm_offset_t va)
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295{
296
297 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
298}
299
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300static __inline
301vm_pindex_t
48ffc236 302pmap_pml4e_index(vm_offset_t va)
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303{
304
305 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
306}
307
308/* Return a pointer to the PML4 slot that corresponds to a VA */
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309static __inline
310pml4_entry_t *
48ffc236 311pmap_pml4e(pmap_t pmap, vm_offset_t va)
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312{
313
314 return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
315}
316
317/* Return a pointer to the PDP slot that corresponds to a VA */
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318static __inline
319pdp_entry_t *
48ffc236 320pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
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321{
322 pdp_entry_t *pdpe;
323
324 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
325 return (&pdpe[pmap_pdpe_index(va)]);
326}
327
328/* Return a pointer to the PDP slot that corresponds to a VA */
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329static __inline
330pdp_entry_t *
48ffc236 331pmap_pdpe(pmap_t pmap, vm_offset_t va)
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332{
333 pml4_entry_t *pml4e;
334
335 pml4e = pmap_pml4e(pmap, va);
336 if ((*pml4e & PG_V) == 0)
337 return NULL;
338 return (pmap_pml4e_to_pdpe(pml4e, va));
339}
340
341/* Return a pointer to the PD slot that corresponds to a VA */
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342static __inline
343pd_entry_t *
48ffc236 344pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
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345{
346 pd_entry_t *pde;
347
348 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
349 return (&pde[pmap_pde_index(va)]);
350}
351
352/* Return a pointer to the PD slot that corresponds to a VA */
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353static __inline
354pd_entry_t *
48ffc236 355pmap_pde(pmap_t pmap, vm_offset_t va)
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356{
357 pdp_entry_t *pdpe;
358
359 pdpe = pmap_pdpe(pmap, va);
360 if (pdpe == NULL || (*pdpe & PG_V) == 0)
361 return NULL;
362 return (pmap_pdpe_to_pde(pdpe, va));
363}
364
365/* Return a pointer to the PT slot that corresponds to a VA */
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366static __inline
367pt_entry_t *
48ffc236 368pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
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369{
370 pt_entry_t *pte;
371
372 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
373 return (&pte[pmap_pte_index(va)]);
374}
375
376/* Return a pointer to the PT slot that corresponds to a VA */
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377static __inline
378pt_entry_t *
48ffc236 379pmap_pte(pmap_t pmap, vm_offset_t va)
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380{
381 pd_entry_t *pde;
382
383 pde = pmap_pde(pmap, va);
384 if (pde == NULL || (*pde & PG_V) == 0)
385 return NULL;
386 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
387 return ((pt_entry_t *)pde);
388 return (pmap_pde_to_pte(pde, va));
389}
390
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391static __inline
392pt_entry_t *
48ffc236 393vtopte(vm_offset_t va)
48ffc236
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394{
395 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
396
397 return (PTmap + ((va >> PAGE_SHIFT) & mask));
c8fe38ae 398}
d7f50089 399
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400static __inline
401pd_entry_t *
48ffc236 402vtopde(vm_offset_t va)
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403{
404 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
405
406 return (PDmap + ((va >> PDRSHIFT) & mask));
407}
c8fe38ae 408
48ffc236 409static uint64_t
c8fe38ae 410allocpages(vm_paddr_t *firstaddr, int n)
d7f50089 411{
48ffc236 412 uint64_t ret;
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413
414 ret = *firstaddr;
415 bzero((void *)ret, n * PAGE_SIZE);
416 *firstaddr += n * PAGE_SIZE;
417 return (ret);
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418}
419
bfc09ba0 420static
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421void
422create_pagetables(vm_paddr_t *firstaddr)
423{
424 int i;
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425
426 /* we are running (mostly) V=P at this point */
427
48ffc236
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428 /* Allocate pages */
429 KPTphys = allocpages(firstaddr, NKPT);
430 KPML4phys = allocpages(firstaddr, 1);
431 KPDPphys = allocpages(firstaddr, NKPML4E);
432 KPDphys = allocpages(firstaddr, NKPDPE);
433
434 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
435 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
436 ndmpdp = 4;
437 DMPDPphys = allocpages(firstaddr, NDMPML4E);
438 if ((amd_feature & AMDID_PAGE1GB) == 0)
439 DMPDphys = allocpages(firstaddr, ndmpdp);
440 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
441
442 /* Fill in the underlying page table pages */
443 /* Read-only from zero to physfree */
444 /* XXX not fully used, underneath 2M pages */
445 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
446 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
447 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
448 }
449
450 /* Now map the page tables at their location within PTmap */
451 for (i = 0; i < NKPT; i++) {
452 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
453 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
454 }
455
456 /* Map from zero to end of allocations under 2M pages */
457 /* This replaces some of the KPTphys entries above */
458 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
459 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
460 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
461 }
462
463 /* And connect up the PD to the PDP */
464 for (i = 0; i < NKPDPE; i++) {
465 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys +
466 (i << PAGE_SHIFT);
467 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
468 }
469
470 /* Now set up the direct map space using either 2MB or 1GB pages */
471 /* Preset PG_M and PG_A because demotion expects it */
472 if ((amd_feature & AMDID_PAGE1GB) == 0) {
473 for (i = 0; i < NPDEPG * ndmpdp; i++) {
474 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
475 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
476 PG_G | PG_M | PG_A;
477 }
478 /* And the direct map space's PDP */
479 for (i = 0; i < ndmpdp; i++) {
480 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
481 (i << PAGE_SHIFT);
482 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
483 }
484 } else {
485 for (i = 0; i < ndmpdp; i++) {
486 ((pdp_entry_t *)DMPDPphys)[i] =
487 (vm_paddr_t)i << PDPSHIFT;
488 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
489 PG_G | PG_M | PG_A;
490 }
491 }
492
493 /* And recursively map PML4 to itself in order to get PTmap */
494 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
495 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
496
497 /* Connect the Direct Map slot up to the PML4 */
498 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
499 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
500
501 /* Connect the KVA slot up to the PML4 */
502 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
503 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
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504}
505
506void
f81851b8
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507init_paging(vm_paddr_t *firstaddr)
508{
c8fe38ae 509 create_pagetables(firstaddr);
d7f50089
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510}
511
512/*
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513 * Bootstrap the system enough to run with virtual memory.
514 *
515 * On the i386 this is called after mapping has already been enabled
516 * and just syncs the pmap module with what has already been done.
517 * [We can't call it easily with mapping off since the kernel is not
518 * mapped with PA == VA, hence we would have to relocate every address
519 * from the linked base (virtual) address "KERNBASE" to the actual
520 * (physical) address starting relative to 0]
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521 */
522void
48ffc236 523pmap_bootstrap(vm_paddr_t *firstaddr)
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524{
525 vm_offset_t va;
526 pt_entry_t *pte;
527 struct mdglobaldata *gd;
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528 int pg;
529
48ffc236
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530 KvaStart = VM_MIN_KERNEL_ADDRESS;
531 KvaEnd = VM_MAX_KERNEL_ADDRESS;
532 KvaSize = KvaEnd - KvaStart;
533
c8fe38ae
MD
534 avail_start = *firstaddr;
535
536 /*
48ffc236 537 * Create an initial set of page tables to run the kernel in.
c8fe38ae 538 */
48ffc236
JG
539 create_pagetables(firstaddr);
540
c8fe38ae
MD
541 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
542 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
543
544 virtual_end = VM_MAX_KERNEL_ADDRESS;
545
546 /* XXX do %cr0 as well */
547 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
548 load_cr3(KPML4phys);
c8fe38ae
MD
549
550 /*
551 * Initialize protection array.
552 */
553 i386_protection_init();
554
555 /*
556 * The kernel's pmap is statically allocated so we don't have to use
557 * pmap_create, which is unlikely to work correctly at this part of
558 * the boot sequence (XXX and which no longer exists).
559 */
48ffc236 560 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
561 kernel_pmap.pm_count = 1;
562 kernel_pmap.pm_active = (cpumask_t)-1; /* don't allow deactivation */
563 TAILQ_INIT(&kernel_pmap.pm_pvlist);
564 nkpt = NKPT;
565
566 /*
567 * Reserve some special page table entries/VA space for temporary
568 * mapping of pages.
569 */
570#define SYSMAP(c, p, v, n) \
571 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
572
573 va = virtual_start;
48ffc236 574#ifdef JG
c8fe38ae 575 pte = (pt_entry_t *) pmap_pte(&kernel_pmap, va);
48ffc236
JG
576#else
577 pte = vtopte(va);
578#endif
c8fe38ae
MD
579
580 /*
581 * CMAP1/CMAP2 are used for zeroing and copying pages.
582 */
583 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
584
585 /*
586 * Crashdump maps.
587 */
588 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
589
590 /*
591 * ptvmmap is used for reading arbitrary physical pages via
592 * /dev/mem.
593 */
594 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
595
596 /*
597 * msgbufp is used to map the system message buffer.
598 * XXX msgbufmap is not used.
599 */
600 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
601 atop(round_page(MSGBUF_SIZE)))
602
603 virtual_start = va;
604
605 *CMAP1 = 0;
c8fe38ae
MD
606
607 /*
608 * PG_G is terribly broken on SMP because we IPI invltlb's in some
609 * cases rather then invl1pg. Actually, I don't even know why it
610 * works under UP because self-referential page table mappings
611 */
612#ifdef SMP
613 pgeflag = 0;
614#else
615 if (cpu_feature & CPUID_PGE)
616 pgeflag = PG_G;
617#endif
618
619/*
620 * Initialize the 4MB page size flag
621 */
622 pseflag = 0;
623/*
624 * The 4MB page version of the initial
625 * kernel page mapping.
626 */
627 pdir4mb = 0;
628
629#if !defined(DISABLE_PSE)
630 if (cpu_feature & CPUID_PSE) {
631 pt_entry_t ptditmp;
632 /*
633 * Note that we have enabled PSE mode
634 */
635 pseflag = PG_PS;
b2b3ffcd 636 ptditmp = *(PTmap + x86_64_btop(KERNBASE));
c8fe38ae
MD
637 ptditmp &= ~(NBPDR - 1);
638 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
639 pdir4mb = ptditmp;
640
641#ifndef SMP
642 /*
643 * Enable the PSE mode. If we are SMP we can't do this
644 * now because the APs will not be able to use it when
645 * they boot up.
646 */
647 load_cr4(rcr4() | CR4_PSE);
648
649 /*
650 * We can do the mapping here for the single processor
651 * case. We simply ignore the old page table page from
652 * now on.
653 */
654 /*
655 * For SMP, we still need 4K pages to bootstrap APs,
656 * PSE will be enabled as soon as all APs are up.
657 */
658 PTD[KPTDI] = (pd_entry_t)ptditmp;
c8fe38ae
MD
659 cpu_invltlb();
660#endif
661 }
662#endif
663#ifdef SMP
664 if (cpu_apic_address == 0)
665 panic("pmap_bootstrap: no local apic!");
c8fe38ae
MD
666#endif
667
668 /*
669 * We need to finish setting up the globaldata page for the BSP.
670 * locore has already populated the page table for the mdglobaldata
671 * portion.
672 */
673 pg = MDGLOBALDATA_BASEALLOC_PAGES;
674 gd = &CPU_prvspace[0].mdglobaldata;
675 gd->gd_CMAP1 = &SMPpt[pg + 0];
676 gd->gd_CMAP2 = &SMPpt[pg + 1];
677 gd->gd_CMAP3 = &SMPpt[pg + 2];
678 gd->gd_PMAP1 = &SMPpt[pg + 3];
679 gd->gd_CADDR1 = CPU_prvspace[0].CPAGE1;
680 gd->gd_CADDR2 = CPU_prvspace[0].CPAGE2;
681 gd->gd_CADDR3 = CPU_prvspace[0].CPAGE3;
682 gd->gd_PADDR1 = (pt_entry_t *)CPU_prvspace[0].PPAGE1;
683
684 cpu_invltlb();
d7f50089
YY
685}
686
c8fe38ae 687#ifdef SMP
d7f50089 688/*
c8fe38ae 689 * Set 4mb pdir for mp startup
d7f50089
YY
690 */
691void
c8fe38ae
MD
692pmap_set_opt(void)
693{
694 if (pseflag && (cpu_feature & CPUID_PSE)) {
695 load_cr4(rcr4() | CR4_PSE);
696 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
c8fe38ae
MD
697 cpu_invltlb();
698 }
699 }
d7f50089 700}
c8fe38ae 701#endif
d7f50089 702
c8fe38ae
MD
703/*
704 * Initialize the pmap module.
705 * Called by vm_init, to initialize any structures that the pmap
706 * system needs to map virtual memory.
707 * pmap_init has been enhanced to support in a fairly consistant
708 * way, discontiguous physical memory.
d7f50089
YY
709 */
710void
c8fe38ae 711pmap_init(void)
d7f50089 712{
c8fe38ae
MD
713 int i;
714 int initial_pvs;
715
716 /*
717 * object for kernel page table pages
718 */
48ffc236
JG
719 /* JG I think the number can be arbitrary */
720 kptobj = vm_object_allocate(OBJT_DEFAULT, 5);
c8fe38ae
MD
721
722 /*
723 * Allocate memory for random pmap data structures. Includes the
724 * pv_head_table.
725 */
726
727 for(i = 0; i < vm_page_array_size; i++) {
728 vm_page_t m;
729
730 m = &vm_page_array[i];
731 TAILQ_INIT(&m->md.pv_list);
732 m->md.pv_list_count = 0;
733 }
734
735 /*
736 * init the pv free list
737 */
738 initial_pvs = vm_page_array_size;
739 if (initial_pvs < MINPV)
740 initial_pvs = MINPV;
741 pvzone = &pvzone_store;
742 pvinit = (struct pv_entry *) kmem_alloc(&kernel_map,
743 initial_pvs * sizeof (struct pv_entry));
744 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry), pvinit,
745 initial_pvs);
746
747 /*
748 * Now it is safe to enable pv_table recording.
749 */
750 pmap_initialized = TRUE;
d887674b 751#ifdef SMP
057877ac 752 lapic = pmap_mapdev_uncacheable(cpu_apic_address, sizeof(struct LAPIC));
d887674b 753#endif
d7f50089
YY
754}
755
c8fe38ae
MD
756/*
757 * Initialize the address space (zone) for the pv_entries. Set a
758 * high water mark so that the system can recover from excessive
759 * numbers of pv entries.
760 */
d7f50089 761void
c8fe38ae 762pmap_init2(void)
d7f50089 763{
c8fe38ae
MD
764 int shpgperproc = PMAP_SHPGPERPROC;
765
766 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
767 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
768 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
769 pv_entry_high_water = 9 * (pv_entry_max / 10);
770 zinitna(pvzone, &pvzone_obj, NULL, 0, pv_entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
771}
772
c8fe38ae
MD
773
774/***************************************************
775 * Low level helper routines.....
776 ***************************************************/
777
778#if defined(PMAP_DIAGNOSTIC)
d7f50089
YY
779
780/*
c8fe38ae
MD
781 * This code checks for non-writeable/modified pages.
782 * This should be an invalid condition.
d7f50089 783 */
bfc09ba0
MD
784static
785int
48ffc236 786pmap_nw_modified(pt_entry_t pte)
d7f50089 787{
c8fe38ae
MD
788 if ((pte & (PG_M|PG_RW)) == PG_M)
789 return 1;
790 else
791 return 0;
d7f50089 792}
c8fe38ae
MD
793#endif
794
d7f50089 795
c8fe38ae
MD
796/*
797 * this routine defines the region(s) of memory that should
798 * not be tested for the modified bit.
799 */
bfc09ba0
MD
800static __inline
801int
c8fe38ae 802pmap_track_modified(vm_offset_t va)
d7f50089 803{
c8fe38ae
MD
804 if ((va < clean_sva) || (va >= clean_eva))
805 return 1;
806 else
807 return 0;
d7f50089
YY
808}
809
d7f50089 810/*
c8fe38ae
MD
811 * pmap_extract:
812 *
813 * Extract the physical page address associated with the map/VA pair.
814 *
815 * This function may not be called from an interrupt if the pmap is
816 * not kernel_pmap.
d7f50089 817 */
c8fe38ae
MD
818vm_paddr_t
819pmap_extract(pmap_t pmap, vm_offset_t va)
d7f50089 820{
48ffc236
JG
821 vm_paddr_t rtval;
822 pt_entry_t *pte;
823 pd_entry_t pde, *pdep;
c8fe38ae 824
48ffc236
JG
825 rtval = 0;
826 pdep = pmap_pde(pmap, va);
827 if (pdep != NULL) {
828 pde = *pdep;
829 if (pde) {
830 if ((pde & PG_PS) != 0) {
831 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
832 } else {
833 pte = pmap_pde_to_pte(pdep, va);
834 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
835 }
c8fe38ae 836 }
c8fe38ae 837 }
48ffc236
JG
838 return rtval;
839}
840
841/*
842 * Routine: pmap_kextract
843 * Function:
844 * Extract the physical page address associated
845 * kernel virtual address.
846 */
847vm_paddr_t
848pmap_kextract(vm_offset_t va)
48ffc236
JG
849{
850 pd_entry_t pde;
851 vm_paddr_t pa;
852
853 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
854 pa = DMAP_TO_PHYS(va);
855 } else {
856 pde = *vtopde(va);
857 if (pde & PG_PS) {
858 pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
859 } else {
860 /*
861 * Beware of a concurrent promotion that changes the
862 * PDE at this point! For example, vtopte() must not
863 * be used to access the PTE because it would use the
864 * new PDE. It is, however, safe to use the old PDE
865 * because the page table page is preserved by the
866 * promotion.
867 */
868 pa = *pmap_pde_to_pte(&pde, va);
869 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
870 }
871 }
872 return pa;
d7f50089
YY
873}
874
c8fe38ae
MD
875/***************************************************
876 * Low level mapping routines.....
877 ***************************************************/
878
d7f50089 879/*
c8fe38ae
MD
880 * Routine: pmap_kenter
881 * Function:
882 * Add a wired page to the KVA
883 * NOTE! note that in order for the mapping to take effect -- you
884 * should do an invltlb after doing the pmap_kenter().
d7f50089 885 */
c8fe38ae 886void
d7f50089
YY
887pmap_kenter(vm_offset_t va, vm_paddr_t pa)
888{
c8fe38ae
MD
889 pt_entry_t *pte;
890 pt_entry_t npte;
891 pmap_inval_info info;
892
893 pmap_inval_init(&info);
894 npte = pa | PG_RW | PG_V | pgeflag;
895 pte = vtopte(va);
896 pmap_inval_add(&info, &kernel_pmap, va);
897 *pte = npte;
898 pmap_inval_flush(&info);
d7f50089
YY
899}
900
901/*
c8fe38ae
MD
902 * Routine: pmap_kenter_quick
903 * Function:
904 * Similar to pmap_kenter(), except we only invalidate the
905 * mapping on the current CPU.
d7f50089 906 */
c8fe38ae
MD
907void
908pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
909{
910 pt_entry_t *pte;
911 pt_entry_t npte;
912
913 npte = pa | PG_RW | PG_V | pgeflag;
914 pte = vtopte(va);
915 *pte = npte;
916 cpu_invlpg((void *)va);
917}
918
d7f50089
YY
919void
920pmap_kenter_sync(vm_offset_t va)
921{
c8fe38ae
MD
922 pmap_inval_info info;
923
924 pmap_inval_init(&info);
925 pmap_inval_add(&info, &kernel_pmap, va);
926 pmap_inval_flush(&info);
d7f50089
YY
927}
928
d7f50089
YY
929void
930pmap_kenter_sync_quick(vm_offset_t va)
931{
c8fe38ae 932 cpu_invlpg((void *)va);
d7f50089
YY
933}
934
d7f50089 935/*
c8fe38ae 936 * remove a page from the kernel pagetables
d7f50089
YY
937 */
938void
c8fe38ae 939pmap_kremove(vm_offset_t va)
d7f50089 940{
c8fe38ae
MD
941 pt_entry_t *pte;
942 pmap_inval_info info;
943
944 pmap_inval_init(&info);
945 pte = vtopte(va);
946 pmap_inval_add(&info, &kernel_pmap, va);
947 *pte = 0;
948 pmap_inval_flush(&info);
949}
950
951void
952pmap_kremove_quick(vm_offset_t va)
953{
954 pt_entry_t *pte;
955 pte = vtopte(va);
956 *pte = 0;
957 cpu_invlpg((void *)va);
d7f50089
YY
958}
959
960/*
c8fe38ae 961 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
962 */
963void
c8fe38ae 964pmap_kmodify_rw(vm_offset_t va)
d7f50089 965{
c8fe38ae
MD
966 *vtopte(va) |= PG_RW;
967 cpu_invlpg((void *)va);
d7f50089
YY
968}
969
c8fe38ae
MD
970void
971pmap_kmodify_nc(vm_offset_t va)
972{
973 *vtopte(va) |= PG_N;
974 cpu_invlpg((void *)va);
975}
d7f50089
YY
976
977/*
c8fe38ae
MD
978 * Used to map a range of physical addresses into kernel
979 * virtual address space.
980 *
981 * For now, VM is already on, we only need to map the
982 * specified memory.
d7f50089
YY
983 */
984vm_offset_t
8e5e6f1b 985pmap_map(vm_offset_t *virtp, vm_paddr_t start, vm_paddr_t end, int prot)
d7f50089 986{
8fdd3267 987 return PHYS_TO_DMAP(start);
d7f50089
YY
988}
989
c8fe38ae 990
d7f50089 991/*
c8fe38ae
MD
992 * Add a list of wired pages to the kva
993 * this routine is only used for temporary
994 * kernel mappings that do not need to have
995 * page modification or references recorded.
996 * Note that old mappings are simply written
997 * over. The page *must* be wired.
d7f50089
YY
998 */
999void
c8fe38ae 1000pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
d7f50089 1001{
c8fe38ae
MD
1002 vm_offset_t end_va;
1003
1004 end_va = va + count * PAGE_SIZE;
1005
1006 while (va < end_va) {
1007 pt_entry_t *pte;
1008
1009 pte = vtopte(va);
1010 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1011 cpu_invlpg((void *)va);
1012 va += PAGE_SIZE;
1013 m++;
1014 }
1015#ifdef SMP
1016 smp_invltlb(); /* XXX */
1017#endif
1018}
1019
1020void
1021pmap_qenter2(vm_offset_t va, vm_page_t *m, int count, cpumask_t *mask)
1022{
1023 vm_offset_t end_va;
1024 cpumask_t cmask = mycpu->gd_cpumask;
1025
1026 end_va = va + count * PAGE_SIZE;
1027
1028 while (va < end_va) {
1029 pt_entry_t *pte;
1030 pt_entry_t pteval;
1031
1032 /*
1033 * Install the new PTE. If the pte changed from the prior
1034 * mapping we must reset the cpu mask and invalidate the page.
1035 * If the pte is the same but we have not seen it on the
1036 * current cpu, invlpg the existing mapping. Otherwise the
1037 * entry is optimal and no invalidation is required.
1038 */
1039 pte = vtopte(va);
1040 pteval = VM_PAGE_TO_PHYS(*m) | PG_A | PG_RW | PG_V | pgeflag;
1041 if (*pte != pteval) {
1042 *mask = 0;
1043 *pte = pteval;
1044 cpu_invlpg((void *)va);
1045 } else if ((*mask & cmask) == 0) {
1046 cpu_invlpg((void *)va);
1047 }
1048 va += PAGE_SIZE;
1049 m++;
1050 }
1051 *mask |= cmask;
d7f50089
YY
1052}
1053
1054/*
7155fc7d 1055 * This routine jerks page mappings from the
c8fe38ae 1056 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1057 *
1058 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1059 */
c8fe38ae
MD
1060void
1061pmap_qremove(vm_offset_t va, int count)
d7f50089 1062{
c8fe38ae
MD
1063 vm_offset_t end_va;
1064
48ffc236 1065 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1066
1067 while (va < end_va) {
1068 pt_entry_t *pte;
1069
1070 pte = vtopte(va);
1071 *pte = 0;
1072 cpu_invlpg((void *)va);
1073 va += PAGE_SIZE;
1074 }
1075#ifdef SMP
1076 smp_invltlb();
1077#endif
d7f50089
YY
1078}
1079
1080/*
c8fe38ae
MD
1081 * This routine works like vm_page_lookup() but also blocks as long as the
1082 * page is busy. This routine does not busy the page it returns.
1083 *
1084 * Unless the caller is managing objects whos pages are in a known state,
1085 * the call should be made with a critical section held so the page's object
1086 * association remains valid on return.
d7f50089 1087 */
bfc09ba0
MD
1088static
1089vm_page_t
c8fe38ae 1090pmap_page_lookup(vm_object_t object, vm_pindex_t pindex)
d7f50089 1091{
c8fe38ae
MD
1092 vm_page_t m;
1093
1094 do {
1095 m = vm_page_lookup(object, pindex);
1096 } while (m && vm_page_sleep_busy(m, FALSE, "pplookp"));
1097
1098 return(m);
d7f50089
YY
1099}
1100
1101/*
c8fe38ae
MD
1102 * Create a new thread and optionally associate it with a (new) process.
1103 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1104 */
1105void
c8fe38ae 1106pmap_init_thread(thread_t td)
d7f50089 1107{
c8fe38ae
MD
1108 /* enforce pcb placement */
1109 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
1110 td->td_savefpu = &td->td_pcb->pcb_save;
b2b3ffcd 1111 td->td_sp = (char *)td->td_pcb - 16; /* JG is -16 needed on x86_64? */
d7f50089
YY
1112}
1113
1114/*
c8fe38ae 1115 * This routine directly affects the fork perf for a process.
d7f50089
YY
1116 */
1117void
c8fe38ae 1118pmap_init_proc(struct proc *p)
d7f50089
YY
1119{
1120}
1121
1122/*
c8fe38ae
MD
1123 * Dispose the UPAGES for a process that has exited.
1124 * This routine directly impacts the exit perf of a process.
d7f50089
YY
1125 */
1126void
c8fe38ae 1127pmap_dispose_proc(struct proc *p)
d7f50089 1128{
c8fe38ae 1129 KASSERT(p->p_lock == 0, ("attempt to dispose referenced proc! %p", p));
d7f50089
YY
1130}
1131
c8fe38ae
MD
1132/***************************************************
1133 * Page table page management routines.....
1134 ***************************************************/
1135
d7f50089 1136/*
c8fe38ae
MD
1137 * This routine unholds page table pages, and if the hold count
1138 * drops to zero, then it decrements the wire count.
d7f50089 1139 */
bfc09ba0
MD
1140static __inline
1141int
1142pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
1143 pmap_inval_info_t info)
1144{
1145 KKASSERT(m->hold_count > 0);
1146 if (m->hold_count > 1) {
1147 vm_page_unhold(m);
1148 return 0;
1149 } else {
1150 return _pmap_unwire_pte_hold(pmap, va, m, info);
1151 }
1152}
1153
1154static
1155int
1156_pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
1157 pmap_inval_info_t info)
c8fe38ae
MD
1158{
1159 /*
1160 * Wait until we can busy the page ourselves. We cannot have
700e22f7
MD
1161 * any active flushes if we block. We own one hold count on the
1162 * page so it cannot be freed out from under us.
c8fe38ae
MD
1163 */
1164 if (m->flags & PG_BUSY) {
1165 pmap_inval_flush(info);
1166 while (vm_page_sleep_busy(m, FALSE, "pmuwpt"))
1167 ;
1168 }
1169 KASSERT(m->queue == PQ_NONE,
1170 ("_pmap_unwire_pte_hold: %p->queue != PQ_NONE", m));
1171
700e22f7
MD
1172 /*
1173 * This case can occur if new references were acquired while
1174 * we were blocked.
1175 */
1176 if (m->hold_count > 1) {
1177 KKASSERT(m->hold_count > 1);
1178 vm_page_unhold(m);
1179 return 0;
1180 }
c8fe38ae 1181
700e22f7
MD
1182 /*
1183 * Unmap the page table page
1184 */
1185 KKASSERT(m->hold_count == 1);
1186 vm_page_busy(m);
1187 pmap_inval_add(info, pmap, -1);
c8fe38ae 1188
700e22f7
MD
1189 if (m->pindex >= (NUPDE + NUPDPE)) {
1190 /* PDP page */
1191 pml4_entry_t *pml4;
1192 pml4 = pmap_pml4e(pmap, va);
1193 *pml4 = 0;
1194 } else if (m->pindex >= NUPDE) {
1195 /* PD page */
1196 pdp_entry_t *pdp;
1197 pdp = pmap_pdpe(pmap, va);
1198 *pdp = 0;
1199 } else {
1200 /* PT page */
1201 pd_entry_t *pd;
1202 pd = pmap_pde(pmap, va);
1203 *pd = 0;
1204 }
c8fe38ae 1205
700e22f7
MD
1206 KKASSERT(pmap->pm_stats.resident_count > 0);
1207 --pmap->pm_stats.resident_count;
48ffc236 1208
700e22f7
MD
1209 if (pmap->pm_ptphint == m)
1210 pmap->pm_ptphint = NULL;
1211
1212 if (m->pindex < NUPDE) {
1213 /* We just released a PT, unhold the matching PD */
1214 vm_page_t pdpg;
1215
1216 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
1217 pmap_unwire_pte_hold(pmap, va, pdpg, info);
1218 }
1219 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
1220 /* We just released a PD, unhold the matching PDP */
1221 vm_page_t pdppg;
1222
1223 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
1224 pmap_unwire_pte_hold(pmap, va, pdppg, info);
c8fe38ae 1225 }
700e22f7
MD
1226
1227 /*
1228 * This was our last hold, the page had better be unwired
1229 * after we decrement wire_count.
1230 *
1231 * FUTURE NOTE: shared page directory page could result in
1232 * multiple wire counts.
1233 */
1234 vm_page_unhold(m);
1235 --m->wire_count;
1236 KKASSERT(m->wire_count == 0);
1237 --vmstats.v_wire_count;
1238 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1239 vm_page_flash(m);
1240 vm_page_free_zero(m);
1241
1242 return 1;
c8fe38ae
MD
1243}
1244
c8fe38ae
MD
1245/*
1246 * After removing a page table entry, this routine is used to
1247 * conditionally free the page, and manage the hold/wire counts.
d7f50089 1248 */
bfc09ba0
MD
1249static
1250int
c8fe38ae
MD
1251pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte,
1252 pmap_inval_info_t info)
1253{
1254 vm_pindex_t ptepindex;
700e22f7 1255
48ffc236 1256 if (va >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
1257 return 0;
1258
1259 if (mpte == NULL) {
48ffc236
JG
1260 ptepindex = pmap_pde_pindex(va);
1261#if JGHINT
c8fe38ae
MD
1262 if (pmap->pm_ptphint &&
1263 (pmap->pm_ptphint->pindex == ptepindex)) {
1264 mpte = pmap->pm_ptphint;
1265 } else {
48ffc236 1266#endif
c8fe38ae 1267 pmap_inval_flush(info);
48ffc236 1268 mpte = pmap_page_lookup(pmap->pm_pteobj, ptepindex);
c8fe38ae 1269 pmap->pm_ptphint = mpte;
48ffc236 1270#if JGHINT
c8fe38ae 1271 }
48ffc236 1272#endif
c8fe38ae 1273 }
48ffc236 1274 return pmap_unwire_pte_hold(pmap, va, mpte, info);
c8fe38ae 1275}
d7f50089
YY
1276
1277/*
c8fe38ae
MD
1278 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1279 * it, and IdlePTD, represents the template used to update all other pmaps.
1280 *
1281 * On architectures where the kernel pmap is not integrated into the user
1282 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1283 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1284 */
1285void
c8fe38ae 1286pmap_pinit0(struct pmap *pmap)
d7f50089 1287{
48ffc236 1288 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1289 pmap->pm_count = 1;
1290 pmap->pm_active = 0;
1291 pmap->pm_ptphint = NULL;
1292 TAILQ_INIT(&pmap->pm_pvlist);
1293 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1294}
1295
1296/*
c8fe38ae
MD
1297 * Initialize a preallocated and zeroed pmap structure,
1298 * such as one in a vmspace structure.
d7f50089
YY
1299 */
1300void
c8fe38ae 1301pmap_pinit(struct pmap *pmap)
d7f50089 1302{
c8fe38ae
MD
1303 vm_page_t ptdpg;
1304
1305 /*
1306 * No need to allocate page table space yet but we do need a valid
1307 * page directory table.
1308 */
48ffc236
JG
1309 if (pmap->pm_pml4 == NULL) {
1310 pmap->pm_pml4 =
1311 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1312 }
1313
1314 /*
1315 * Allocate an object for the ptes
1316 */
1317 if (pmap->pm_pteobj == NULL)
0a5c555b 1318 pmap->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, NUPDE + NUPDPE + PML4PML4I + 1);
c8fe38ae
MD
1319
1320 /*
1321 * Allocate the page directory page, unless we already have
1322 * one cached. If we used the cached page the wire_count will
1323 * already be set appropriately.
1324 */
1325 if ((ptdpg = pmap->pm_pdirm) == NULL) {
0a5c555b 1326 ptdpg = vm_page_grab(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I,
c8fe38ae
MD
1327 VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1328 pmap->pm_pdirm = ptdpg;
1329 vm_page_flag_clear(ptdpg, PG_MAPPED | PG_BUSY);
1330 ptdpg->valid = VM_PAGE_BITS_ALL;
700e22f7
MD
1331 if (ptdpg->wire_count == 0)
1332 ++vmstats.v_wire_count;
c8fe38ae 1333 ptdpg->wire_count = 1;
48ffc236 1334 pmap_kenter((vm_offset_t)pmap->pm_pml4, VM_PAGE_TO_PHYS(ptdpg));
c8fe38ae
MD
1335 }
1336 if ((ptdpg->flags & PG_ZERO) == 0)
48ffc236 1337 bzero(pmap->pm_pml4, PAGE_SIZE);
c8fe38ae 1338
48ffc236
JG
1339 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
1340 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
c8fe38ae
MD
1341
1342 /* install self-referential address mapping entry */
48ffc236 1343 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(ptdpg) | PG_V | PG_RW | PG_A | PG_M;
c8fe38ae
MD
1344
1345 pmap->pm_count = 1;
1346 pmap->pm_active = 0;
1347 pmap->pm_ptphint = NULL;
1348 TAILQ_INIT(&pmap->pm_pvlist);
1349 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1350 pmap->pm_stats.resident_count = 1;
d7f50089
YY
1351}
1352
1353/*
c8fe38ae
MD
1354 * Clean up a pmap structure so it can be physically freed. This routine
1355 * is called by the vmspace dtor function. A great deal of pmap data is
1356 * left passively mapped to improve vmspace management so we have a bit
1357 * of cleanup work to do here.
d7f50089
YY
1358 */
1359void
c8fe38ae 1360pmap_puninit(pmap_t pmap)
d7f50089 1361{
c8fe38ae
MD
1362 vm_page_t p;
1363
1364 KKASSERT(pmap->pm_active == 0);
1365 if ((p = pmap->pm_pdirm) != NULL) {
48ffc236 1366 KKASSERT(pmap->pm_pml4 != NULL);
bfc09ba0 1367 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236 1368 pmap_kremove((vm_offset_t)pmap->pm_pml4);
c8fe38ae
MD
1369 p->wire_count--;
1370 vmstats.v_wire_count--;
1371 KKASSERT((p->flags & PG_BUSY) == 0);
1372 vm_page_busy(p);
1373 vm_page_free_zero(p);
1374 pmap->pm_pdirm = NULL;
1375 }
48ffc236 1376 if (pmap->pm_pml4) {
bfc09ba0 1377 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236
JG
1378 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1379 pmap->pm_pml4 = NULL;
c8fe38ae
MD
1380 }
1381 if (pmap->pm_pteobj) {
1382 vm_object_deallocate(pmap->pm_pteobj);
1383 pmap->pm_pteobj = NULL;
1384 }
d7f50089
YY
1385}
1386
1387/*
c8fe38ae
MD
1388 * Wire in kernel global address entries. To avoid a race condition
1389 * between pmap initialization and pmap_growkernel, this procedure
1390 * adds the pmap to the master list (which growkernel scans to update),
1391 * then copies the template.
d7f50089
YY
1392 */
1393void
c8fe38ae 1394pmap_pinit2(struct pmap *pmap)
d7f50089 1395{
c8fe38ae
MD
1396 crit_enter();
1397 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
1398 /* XXX copies current process, does not fill in MPPTDI */
c8fe38ae 1399 crit_exit();
d7f50089
YY
1400}
1401
1402/*
c8fe38ae
MD
1403 * Attempt to release and free a vm_page in a pmap. Returns 1 on success,
1404 * 0 on failure (if the procedure had to sleep).
d7f50089 1405 *
c8fe38ae
MD
1406 * When asked to remove the page directory page itself, we actually just
1407 * leave it cached so we do not have to incur the SMP inval overhead of
1408 * removing the kernel mapping. pmap_puninit() will take care of it.
d7f50089 1409 */
bfc09ba0
MD
1410static
1411int
c8fe38ae 1412pmap_release_free_page(struct pmap *pmap, vm_page_t p)
d7f50089 1413{
c8fe38ae
MD
1414 /*
1415 * This code optimizes the case of freeing non-busy
1416 * page-table pages. Those pages are zero now, and
1417 * might as well be placed directly into the zero queue.
1418 */
1419 if (vm_page_sleep_busy(p, FALSE, "pmaprl"))
d7f50089 1420 return 0;
d7f50089 1421
c8fe38ae
MD
1422 vm_page_busy(p);
1423
1424 /*
1425 * Remove the page table page from the processes address space.
1426 */
4a4ea614
MD
1427 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1428 /*
1429 * We are the pml4 table itself.
1430 */
1431 /* XXX anything to do here? */
1432 } else if (p->pindex >= (NUPDE + NUPDPE)) {
1b2e0b92 1433 /*
700e22f7
MD
1434 * Remove a PDP page from the PML4. We do not maintain
1435 * hold counts on the PML4 page.
1b2e0b92 1436 */
700e22f7
MD
1437 pml4_entry_t *pml4;
1438 vm_page_t m4;
1439 int idx;
1440
1441 m4 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I);
1b2e0b92 1442 KKASSERT(m4 != NULL);
700e22f7
MD
1443 pml4 = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m4));
1444 idx = (p->pindex - (NUPDE + NUPDPE)) % NPML4EPG;
1b2e0b92
JG
1445 KKASSERT(pml4[idx] != 0);
1446 pml4[idx] = 0;
1b2e0b92
JG
1447 } else if (p->pindex >= NUPDE) {
1448 /*
700e22f7
MD
1449 * Remove a PD page from the PDP and drop the hold count
1450 * on the PDP. The PDP is left cached in the pmap if
1451 * the hold count drops to 0 so the wire count remains
1452 * intact.
1b2e0b92 1453 */
700e22f7
MD
1454 vm_page_t m3;
1455 pdp_entry_t *pdp;
1456 int idx;
1457
1458 m3 = vm_page_lookup(pmap->pm_pteobj,
1459 NUPDE + NUPDPE + (p->pindex - NUPDE) / NPDPEPG);
1b2e0b92 1460 KKASSERT(m3 != NULL);
700e22f7
MD
1461 pdp = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m3));
1462 idx = (p->pindex - NUPDE) % NPDPEPG;
1b2e0b92
JG
1463 KKASSERT(pdp[idx] != 0);
1464 pdp[idx] = 0;
1465 m3->hold_count--;
1b2e0b92 1466 } else {
700e22f7
MD
1467 /*
1468 * Remove a PT page from the PD and drop the hold count
1469 * on the PD. The PD is left cached in the pmap if
1470 * the hold count drops to 0 so the wire count remains
1471 * intact.
1b2e0b92 1472 */
700e22f7
MD
1473 vm_page_t m2;
1474 pd_entry_t *pd;
1475 int idx;
1476
1477 m2 = vm_page_lookup(pmap->pm_pteobj,
1478 NUPDE + p->pindex / NPDEPG);
1b2e0b92 1479 KKASSERT(m2 != NULL);
700e22f7
MD
1480 pd = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m2));
1481 idx = p->pindex % NPDEPG;
1b2e0b92
JG
1482 pd[idx] = 0;
1483 m2->hold_count--;
1b2e0b92 1484 }
700e22f7
MD
1485
1486 /*
1487 * One fewer mappings in the pmap. p's hold count had better
1488 * be zero.
1489 */
c8fe38ae
MD
1490 KKASSERT(pmap->pm_stats.resident_count > 0);
1491 --pmap->pm_stats.resident_count;
700e22f7 1492 if (p->hold_count)
c8fe38ae 1493 panic("pmap_release: freeing held page table page");
c8fe38ae
MD
1494 if (pmap->pm_ptphint && (pmap->pm_ptphint->pindex == p->pindex))
1495 pmap->pm_ptphint = NULL;
1496
1b2e0b92
JG
1497 /*
1498 * We leave the top-level page table page cached, wired, and mapped in
1499 * the pmap until the dtor function (pmap_puninit()) gets called.
1500 * However, still clean it up so we can set PG_ZERO.
1501 */
1502 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1503 bzero(pmap->pm_pml4, PAGE_SIZE);
1504 vm_page_flag_set(p, PG_ZERO);
1505 vm_page_wakeup(p);
1506 } else {
1507 p->wire_count--;
700e22f7 1508 KKASSERT(p->wire_count == 0);
1b2e0b92
JG
1509 vmstats.v_wire_count--;
1510 /* JG eventually revert to using vm_page_free_zero() */
1511 vm_page_free(p);
1512 }
c8fe38ae
MD
1513 return 1;
1514}
d7f50089
YY
1515
1516/*
e8510e54
MD
1517 * This routine is called when various levels in the page table need to
1518 * be populated. This routine cannot fail.
d7f50089 1519 */
bfc09ba0
MD
1520static
1521vm_page_t
c8fe38ae
MD
1522_pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex)
1523{
e8510e54 1524 vm_page_t m;
c8fe38ae
MD
1525
1526 /*
e8510e54 1527 * Find or fabricate a new pagetable page. This will busy the page.
c8fe38ae
MD
1528 */
1529 m = vm_page_grab(pmap->pm_pteobj, ptepindex,
700e22f7 1530 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
48ffc236
JG
1531 if ((m->flags & PG_ZERO) == 0) {
1532 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1533 }
1534
c8fe38ae
MD
1535 KASSERT(m->queue == PQ_NONE,
1536 ("_pmap_allocpte: %p->queue != PQ_NONE", m));
1537
1538 /*
1539 * Increment the hold count for the page we will be returning to
1540 * the caller.
1541 */
1542 m->hold_count++;
700e22f7 1543 if (m->wire_count++ == 0)
c8fe38ae 1544 vmstats.v_wire_count++;
c8fe38ae 1545
c8fe38ae
MD
1546 /*
1547 * Map the pagetable page into the process address space, if
1548 * it isn't already there.
e8510e54
MD
1549 *
1550 * It is possible that someone else got in and mapped the page
1551 * directory page while we were blocked, if so just unbusy and
1552 * return the held page.
c8fe38ae 1553 */
48ffc236 1554 if (ptepindex >= (NUPDE + NUPDPE)) {
e8510e54
MD
1555 /*
1556 * Wire up a new PDP page in the PML4
1557 */
48ffc236 1558 vm_pindex_t pml4index;
700e22f7 1559 pml4_entry_t *pml4;
48ffc236 1560
48ffc236
JG
1561 pml4index = ptepindex - (NUPDE + NUPDPE);
1562 pml4 = &pmap->pm_pml4[pml4index];
e8510e54 1563 if (*pml4 & PG_V) {
700e22f7
MD
1564 if (--m->wire_count == 0)
1565 --vmstats.v_wire_count;
e8510e54
MD
1566 vm_page_wakeup(m);
1567 return(m);
1568 }
48ffc236 1569 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
48ffc236 1570 } else if (ptepindex >= NUPDE) {
e8510e54
MD
1571 /*
1572 * Wire up a new PD page in the PDP
1573 */
48ffc236
JG
1574 vm_pindex_t pml4index;
1575 vm_pindex_t pdpindex;
e8510e54 1576 vm_page_t pdppg;
48ffc236
JG
1577 pml4_entry_t *pml4;
1578 pdp_entry_t *pdp;
1579
48ffc236
JG
1580 pdpindex = ptepindex - NUPDE;
1581 pml4index = pdpindex >> NPML4EPGSHIFT;
1582
1583 pml4 = &pmap->pm_pml4[pml4index];
1584 if ((*pml4 & PG_V) == 0) {
e8510e54
MD
1585 /*
1586 * Have to allocate a new PDP page, recurse.
1587 * This always succeeds. Returned page will
1588 * be held.
1589 */
1590 pdppg = _pmap_allocpte(pmap,
1591 NUPDE + NUPDPE + pml4index);
48ffc236 1592 } else {
e8510e54
MD
1593 /*
1594 * Add a held reference to the PDP page.
1595 */
48ffc236 1596 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
1b2e0b92 1597 pdppg->hold_count++;
48ffc236 1598 }
c8fe38ae 1599
e8510e54
MD
1600 /*
1601 * Now find the pdp_entry and map the PDP. If the PDP
1602 * has already been mapped unwind and return the
1603 * already-mapped PDP held.
700e22f7
MD
1604 *
1605 * pdppg is left held (hold_count is incremented for
1606 * each PD in the PDP).
e8510e54
MD
1607 */
1608 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
48ffc236 1609 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
e8510e54
MD
1610 if (*pdp & PG_V) {
1611 vm_page_unhold(pdppg);
700e22f7
MD
1612 if (--m->wire_count == 0)
1613 --vmstats.v_wire_count;
e8510e54
MD
1614 vm_page_wakeup(m);
1615 return(m);
1616 }
48ffc236 1617 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
48ffc236 1618 } else {
e8510e54
MD
1619 /*
1620 * Wire up the new PT page in the PD
1621 */
48ffc236
JG
1622 vm_pindex_t pml4index;
1623 vm_pindex_t pdpindex;
1624 pml4_entry_t *pml4;
1625 pdp_entry_t *pdp;
1626 pd_entry_t *pd;
e8510e54 1627 vm_page_t pdpg;
48ffc236 1628
48ffc236
JG
1629 pdpindex = ptepindex >> NPDPEPGSHIFT;
1630 pml4index = pdpindex >> NPML4EPGSHIFT;
1631
e8510e54
MD
1632 /*
1633 * Locate the PDP page in the PML4, then the PD page in
1634 * the PDP. If either does not exist we simply recurse
1635 * to allocate them.
1636 *
1637 * We can just recurse on the PD page as it will recurse
1638 * on the PDP if necessary.
1639 */
48ffc236
JG
1640 pml4 = &pmap->pm_pml4[pml4index];
1641 if ((*pml4 & PG_V) == 0) {
e8510e54 1642 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex);
48ffc236
JG
1643 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1644 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
c8fe38ae 1645 } else {
48ffc236
JG
1646 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1647 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1648 if ((*pdp & PG_V) == 0) {
e8510e54 1649 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex);
48ffc236 1650 } else {
48ffc236 1651 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1b2e0b92 1652 pdpg->hold_count++;
48ffc236 1653 }
c8fe38ae 1654 }
48ffc236 1655
e8510e54
MD
1656 /*
1657 * Now fill in the pte in the PD. If the pte already exists
1658 * (again, if we raced the grab), unhold pdpg and unwire
1659 * m, returning a held m.
700e22f7
MD
1660 *
1661 * pdpg is left held (hold_count is incremented for
1662 * each PT in the PD).
e8510e54
MD
1663 */
1664 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
48ffc236 1665 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
700e22f7 1666 if (*pd != 0) {
e8510e54 1667 vm_page_unhold(pdpg);
700e22f7
MD
1668 if (--m->wire_count == 0)
1669 --vmstats.v_wire_count;
e8510e54
MD
1670 vm_page_wakeup(m);
1671 return(m);
1672 }
700e22f7 1673 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
c8fe38ae
MD
1674 }
1675
48ffc236 1676 /*
e8510e54
MD
1677 * We successfully loaded a PDP, PD, or PTE. Set the page table hint,
1678 * valid bits, mapped flag, unbusy, and we're done.
48ffc236
JG
1679 */
1680 pmap->pm_ptphint = m;
700e22f7 1681 ++pmap->pm_stats.resident_count;
48ffc236 1682
c8fe38ae
MD
1683 m->valid = VM_PAGE_BITS_ALL;
1684 vm_page_flag_clear(m, PG_ZERO);
1685 vm_page_flag_set(m, PG_MAPPED);
1686 vm_page_wakeup(m);
1687
e8510e54 1688 return (m);
c8fe38ae
MD
1689}
1690
bfc09ba0
MD
1691static
1692vm_page_t
c8fe38ae 1693pmap_allocpte(pmap_t pmap, vm_offset_t va)
d7f50089 1694{
c8fe38ae 1695 vm_pindex_t ptepindex;
48ffc236 1696 pd_entry_t *pd;
c8fe38ae
MD
1697 vm_page_t m;
1698
1699 /*
1700 * Calculate pagetable page index
1701 */
48ffc236 1702 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
1703
1704 /*
1705 * Get the page directory entry
1706 */
48ffc236 1707 pd = pmap_pde(pmap, va);
c8fe38ae
MD
1708
1709 /*
48ffc236 1710 * This supports switching from a 2MB page to a
c8fe38ae
MD
1711 * normal 4K page.
1712 */
48ffc236 1713 if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
1b2e0b92 1714 panic("no promotion/demotion yet");
48ffc236
JG
1715 *pd = 0;
1716 pd = NULL;
c8fe38ae
MD
1717 cpu_invltlb();
1718 smp_invltlb();
1719 }
1720
1721 /*
1722 * If the page table page is mapped, we just increment the
1723 * hold count, and activate it.
1724 */
48ffc236
JG
1725 if (pd != NULL && (*pd & PG_V) != 0) {
1726 /* YYY hint is used here on i386 */
1727 m = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
1728 pmap->pm_ptphint = m;
c8fe38ae
MD
1729 m->hold_count++;
1730 return m;
1731 }
1732 /*
1733 * Here if the pte page isn't mapped, or if it has been deallocated.
1734 */
1735 return _pmap_allocpte(pmap, ptepindex);
d7f50089
YY
1736}
1737
c8fe38ae
MD
1738
1739/***************************************************
1740 * Pmap allocation/deallocation routines.
1741 ***************************************************/
1742
d7f50089 1743/*
c8fe38ae
MD
1744 * Release any resources held by the given physical map.
1745 * Called when a pmap initialized by pmap_pinit is being released.
1746 * Should only be called if the map contains no valid mappings.
d7f50089 1747 */
c8fe38ae 1748static int pmap_release_callback(struct vm_page *p, void *data);
d7f50089 1749
c8fe38ae
MD
1750void
1751pmap_release(struct pmap *pmap)
d7f50089 1752{
c8fe38ae
MD
1753 vm_object_t object = pmap->pm_pteobj;
1754 struct rb_vm_page_scan_info info;
1755
1756 KASSERT(pmap->pm_active == 0, ("pmap still active! %08x", pmap->pm_active));
1757#if defined(DIAGNOSTIC)
1758 if (object->ref_count != 1)
1759 panic("pmap_release: pteobj reference count != 1");
1760#endif
1761
1762 info.pmap = pmap;
1763 info.object = object;
1764 crit_enter();
1765 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1766 crit_exit();
1767
1768 do {
1769 crit_enter();
1770 info.error = 0;
1771 info.mpte = NULL;
1772 info.limit = object->generation;
1773
1774 vm_page_rb_tree_RB_SCAN(&object->rb_memq, NULL,
1775 pmap_release_callback, &info);
1776 if (info.error == 0 && info.mpte) {
1777 if (!pmap_release_free_page(pmap, info.mpte))
1778 info.error = 1;
1779 }
1780 crit_exit();
1781 } while (info.error);
d7f50089
YY
1782}
1783
bfc09ba0
MD
1784static
1785int
c8fe38ae 1786pmap_release_callback(struct vm_page *p, void *data)
d7f50089 1787{
c8fe38ae
MD
1788 struct rb_vm_page_scan_info *info = data;
1789
0a5c555b 1790 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
c8fe38ae
MD
1791 info->mpte = p;
1792 return(0);
1793 }
1794 if (!pmap_release_free_page(info->pmap, p)) {
1795 info->error = 1;
1796 return(-1);
1797 }
1798 if (info->object->generation != info->limit) {
1799 info->error = 1;
1800 return(-1);
1801 }
1802 return(0);
d7f50089
YY
1803}
1804
1805/*
c8fe38ae 1806 * Grow the number of kernel page table entries, if needed.
d7f50089 1807 */
c8fe38ae
MD
1808void
1809pmap_growkernel(vm_offset_t addr)
d7f50089 1810{
48ffc236 1811 vm_paddr_t paddr;
c8fe38ae
MD
1812 vm_offset_t ptppaddr;
1813 vm_page_t nkpg;
48ffc236
JG
1814 pd_entry_t *pde, newpdir;
1815 pdp_entry_t newpdp;
c8fe38ae
MD
1816
1817 crit_enter();
1818 if (kernel_vm_end == 0) {
1819 kernel_vm_end = KERNBASE;
1820 nkpt = 0;
48ffc236 1821 while ((*pmap_pde(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
c8fe38ae
MD
1822 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1823 nkpt++;
48ffc236
JG
1824 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1825 kernel_vm_end = kernel_map.max_offset;
1826 break;
1827 }
c8fe38ae
MD
1828 }
1829 }
48ffc236
JG
1830 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1831 if (addr - 1 >= kernel_map.max_offset)
1832 addr = kernel_map.max_offset;
c8fe38ae 1833 while (kernel_vm_end < addr) {
48ffc236
JG
1834 pde = pmap_pde(&kernel_pmap, kernel_vm_end);
1835 if (pde == NULL) {
1836 /* We need a new PDP entry */
1837 nkpg = vm_page_alloc(kptobj, nkpt,
1838 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM
1839 | VM_ALLOC_INTERRUPT);
1840 if (nkpg == NULL)
1841 panic("pmap_growkernel: no memory to grow kernel");
48ffc236 1842 paddr = VM_PAGE_TO_PHYS(nkpg);
7f2a2740
MD
1843 if ((nkpg->flags & PG_ZERO) == 0)
1844 pmap_zero_page(paddr);
1845 vm_page_flag_clear(nkpg, PG_ZERO);
48ffc236
JG
1846 newpdp = (pdp_entry_t)
1847 (paddr | PG_V | PG_RW | PG_A | PG_M);
1848 *pmap_pdpe(&kernel_pmap, kernel_vm_end) = newpdp;
7f2a2740 1849 nkpt++;
48ffc236
JG
1850 continue; /* try again */
1851 }
1852 if ((*pde & PG_V) != 0) {
c8fe38ae 1853 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
48ffc236
JG
1854 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1855 kernel_vm_end = kernel_map.max_offset;
1856 break;
1857 }
c8fe38ae
MD
1858 continue;
1859 }
1860
1861 /*
1862 * This index is bogus, but out of the way
1863 */
48ffc236 1864 nkpg = vm_page_alloc(kptobj, nkpt,
c8fe38ae
MD
1865 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM | VM_ALLOC_INTERRUPT);
1866 if (nkpg == NULL)
1867 panic("pmap_growkernel: no memory to grow kernel");
1868
1869 vm_page_wire(nkpg);
1870 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1871 pmap_zero_page(ptppaddr);
7f2a2740 1872 vm_page_flag_clear(nkpg, PG_ZERO);
c8fe38ae 1873 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
c8fe38ae
MD
1874 *pmap_pde(&kernel_pmap, kernel_vm_end) = newpdir;
1875 nkpt++;
1876
48ffc236
JG
1877 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1878 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1879 kernel_vm_end = kernel_map.max_offset;
1880 break;
c8fe38ae 1881 }
c8fe38ae
MD
1882 }
1883 crit_exit();
d7f50089
YY
1884}
1885
1886/*
c8fe38ae
MD
1887 * Retire the given physical map from service.
1888 * Should only be called if the map contains
1889 * no valid mappings.
d7f50089 1890 */
c8fe38ae
MD
1891void
1892pmap_destroy(pmap_t pmap)
d7f50089 1893{
c8fe38ae
MD
1894 int count;
1895
1896 if (pmap == NULL)
1897 return;
1898
1899 count = --pmap->pm_count;
1900 if (count == 0) {
1901 pmap_release(pmap);
1902 panic("destroying a pmap is not yet implemented");
1903 }
d7f50089
YY
1904}
1905
1906/*
c8fe38ae 1907 * Add a reference to the specified pmap.
d7f50089 1908 */
c8fe38ae
MD
1909void
1910pmap_reference(pmap_t pmap)
d7f50089 1911{
c8fe38ae
MD
1912 if (pmap != NULL) {
1913 pmap->pm_count++;
1914 }
d7f50089
YY
1915}
1916
c8fe38ae
MD
1917/***************************************************
1918* page management routines.
1919 ***************************************************/
d7f50089
YY
1920
1921/*
1922 * free the pv_entry back to the free list. This function may be
1923 * called from an interrupt.
1924 */
bfc09ba0
MD
1925static __inline
1926void
d7f50089
YY
1927free_pv_entry(pv_entry_t pv)
1928{
c8fe38ae 1929 pv_entry_count--;
48ffc236 1930 KKASSERT(pv_entry_count >= 0);
c8fe38ae 1931 zfree(pvzone, pv);
d7f50089
YY
1932}
1933
1934/*
1935 * get a new pv_entry, allocating a block from the system
1936 * when needed. This function may be called from an interrupt.
1937 */
bfc09ba0
MD
1938static
1939pv_entry_t
d7f50089
YY
1940get_pv_entry(void)
1941{
c8fe38ae
MD
1942 pv_entry_count++;
1943 if (pv_entry_high_water &&
48ffc236
JG
1944 (pv_entry_count > pv_entry_high_water) &&
1945 (pmap_pagedaemon_waken == 0)) {
c8fe38ae 1946 pmap_pagedaemon_waken = 1;
48ffc236 1947 wakeup(&vm_pages_needed);
c8fe38ae
MD
1948 }
1949 return zalloc(pvzone);
d7f50089
YY
1950}
1951
1952/*
1953 * This routine is very drastic, but can save the system
1954 * in a pinch.
1955 */
1956void
1957pmap_collect(void)
1958{
c8fe38ae
MD
1959 int i;
1960 vm_page_t m;
1961 static int warningdone=0;
1962
1963 if (pmap_pagedaemon_waken == 0)
1964 return;
1965
1966 if (warningdone < 5) {
1967 kprintf("pmap_collect: collecting pv entries -- suggest increasing PMAP_SHPGPERPROC\n");
1968 warningdone++;
1969 }
1970
1971 for(i = 0; i < vm_page_array_size; i++) {
1972 m = &vm_page_array[i];
1973 if (m->wire_count || m->hold_count || m->busy ||
1974 (m->flags & PG_BUSY))
1975 continue;
1976 pmap_remove_all(m);
1977 }
48ffc236 1978 pmap_pagedaemon_waken = 0;
d7f50089
YY
1979}
1980
c8fe38ae 1981
d7f50089
YY
1982/*
1983 * If it is the first entry on the list, it is actually
1984 * in the header and we must copy the following entry up
1985 * to the header. Otherwise we must search the list for
1986 * the entry. In either case we free the now unused entry.
1987 */
bfc09ba0
MD
1988static
1989int
c8fe38ae
MD
1990pmap_remove_entry(struct pmap *pmap, vm_page_t m,
1991 vm_offset_t va, pmap_inval_info_t info)
1992{
1993 pv_entry_t pv;
1994 int rtval;
1995
1996 crit_enter();
1997 if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
1998 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1999 if (pmap == pv->pv_pmap && va == pv->pv_va)
2000 break;
2001 }
2002 } else {
2003 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
2004 if (va == pv->pv_va)
2005 break;
2006 }
2007 }
2008
2009 rtval = 0;
5926987a
MD
2010 KKASSERT(pv);
2011
2012 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2013 m->md.pv_list_count--;
2014 KKASSERT(m->md.pv_list_count >= 0);
2015 if (TAILQ_EMPTY(&m->md.pv_list))
2016 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2017 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
2018 ++pmap->pm_generation;
2019 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem, info);
2020 free_pv_entry(pv);
2021
c8fe38ae
MD
2022 crit_exit();
2023 return rtval;
d7f50089
YY
2024}
2025
2026/*
c8fe38ae
MD
2027 * Create a pv entry for page at pa for
2028 * (pmap, va).
d7f50089 2029 */
bfc09ba0
MD
2030static
2031void
d7f50089
YY
2032pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m)
2033{
c8fe38ae
MD
2034 pv_entry_t pv;
2035
2036 crit_enter();
2037 pv = get_pv_entry();
2038 pv->pv_va = va;
2039 pv->pv_pmap = pmap;
2040 pv->pv_ptem = mpte;
2041
2042 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
2043 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
5926987a 2044 ++pmap->pm_generation;
c8fe38ae
MD
2045 m->md.pv_list_count++;
2046
2047 crit_exit();
d7f50089
YY
2048}
2049
2050/*
2051 * pmap_remove_pte: do the things to unmap a page in a process
2052 */
bfc09ba0
MD
2053static
2054int
c8fe38ae
MD
2055pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
2056 pmap_inval_info_t info)
2057{
2058 pt_entry_t oldpte;
2059 vm_page_t m;
2060
2061 pmap_inval_add(info, pmap, va);
2062 oldpte = pte_load_clear(ptq);
2063 if (oldpte & PG_W)
2064 pmap->pm_stats.wired_count -= 1;
2065 /*
2066 * Machines that don't support invlpg, also don't support
2067 * PG_G. XXX PG_G is disabled for SMP so don't worry about
2068 * the SMP case.
2069 */
2070 if (oldpte & PG_G)
2071 cpu_invlpg((void *)va);
2072 KKASSERT(pmap->pm_stats.resident_count > 0);
2073 --pmap->pm_stats.resident_count;
2074 if (oldpte & PG_MANAGED) {
2075 m = PHYS_TO_VM_PAGE(oldpte);
2076 if (oldpte & PG_M) {
2077#if defined(PMAP_DIAGNOSTIC)
2078 if (pmap_nw_modified((pt_entry_t) oldpte)) {
2079 kprintf(
48ffc236 2080 "pmap_remove: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2081 va, oldpte);
2082 }
2083#endif
2084 if (pmap_track_modified(va))
2085 vm_page_dirty(m);
2086 }
2087 if (oldpte & PG_A)
2088 vm_page_flag_set(m, PG_REFERENCED);
2089 return pmap_remove_entry(pmap, m, va, info);
2090 } else {
2091 return pmap_unuse_pt(pmap, va, NULL, info);
2092 }
2093
d7f50089
YY
2094 return 0;
2095}
2096
2097/*
2098 * pmap_remove_page:
2099 *
2100 * Remove a single page from a process address space.
2101 *
2102 * This function may not be called from an interrupt if the pmap is
2103 * not kernel_pmap.
2104 */
bfc09ba0
MD
2105static
2106void
c8fe38ae
MD
2107pmap_remove_page(struct pmap *pmap, vm_offset_t va, pmap_inval_info_t info)
2108{
48ffc236 2109 pt_entry_t *pte;
c8fe38ae 2110
48ffc236
JG
2111 pte = pmap_pte(pmap, va);
2112 if (pte == NULL)
2113 return;
2114 if ((*pte & PG_V) == 0)
2115 return;
2116 pmap_remove_pte(pmap, pte, va, info);
d7f50089
YY
2117}
2118
2119/*
2120 * pmap_remove:
2121 *
2122 * Remove the given range of addresses from the specified map.
2123 *
2124 * It is assumed that the start and end are properly
2125 * rounded to the page size.
2126 *
2127 * This function may not be called from an interrupt if the pmap is
2128 * not kernel_pmap.
2129 */
2130void
2131pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
2132{
48ffc236
JG
2133 vm_offset_t va_next;
2134 pml4_entry_t *pml4e;
2135 pdp_entry_t *pdpe;
2136 pd_entry_t ptpaddr, *pde;
2137 pt_entry_t *pte;
c8fe38ae
MD
2138 struct pmap_inval_info info;
2139
2140 if (pmap == NULL)
2141 return;
2142
2143 if (pmap->pm_stats.resident_count == 0)
2144 return;
2145
2146 pmap_inval_init(&info);
2147
2148 /*
2149 * special handling of removing one page. a very
2150 * common operation and easy to short circuit some
2151 * code.
2152 */
48ffc236
JG
2153 if (sva + PAGE_SIZE == eva) {
2154 pde = pmap_pde(pmap, sva);
2155 if (pde && (*pde & PG_PS) == 0) {
2156 pmap_remove_page(pmap, sva, &info);
2157 pmap_inval_flush(&info);
2158 return;
2159 }
c8fe38ae
MD
2160 }
2161
48ffc236
JG
2162 for (; sva < eva; sva = va_next) {
2163 pml4e = pmap_pml4e(pmap, sva);
2164 if ((*pml4e & PG_V) == 0) {
2165 va_next = (sva + NBPML4) & ~PML4MASK;
2166 if (va_next < sva)
2167 va_next = eva;
2168 continue;
2169 }
c8fe38ae 2170
48ffc236
JG
2171 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2172 if ((*pdpe & PG_V) == 0) {
2173 va_next = (sva + NBPDP) & ~PDPMASK;
2174 if (va_next < sva)
2175 va_next = eva;
2176 continue;
2177 }
c8fe38ae
MD
2178
2179 /*
2180 * Calculate index for next page table.
2181 */
48ffc236
JG
2182 va_next = (sva + NBPDR) & ~PDRMASK;
2183 if (va_next < sva)
2184 va_next = eva;
c8fe38ae 2185
48ffc236
JG
2186 pde = pmap_pdpe_to_pde(pdpe, sva);
2187 ptpaddr = *pde;
c8fe38ae
MD
2188
2189 /*
48ffc236 2190 * Weed out invalid mappings.
c8fe38ae
MD
2191 */
2192 if (ptpaddr == 0)
2193 continue;
2194
48ffc236
JG
2195 /*
2196 * Check for large page.
2197 */
2198 if ((ptpaddr & PG_PS) != 0) {
2199 /* JG FreeBSD has more complex treatment here */
2200 pmap_inval_add(&info, pmap, -1);
2201 *pde = 0;
2202 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2203 continue;
2204 }
2205
c8fe38ae
MD
2206 /*
2207 * Limit our scan to either the end of the va represented
2208 * by the current page table page, or to the end of the
2209 * range being removed.
2210 */
48ffc236
JG
2211 if (va_next > eva)
2212 va_next = eva;
c8fe38ae
MD
2213
2214 /*
2215 * NOTE: pmap_remove_pte() can block.
2216 */
48ffc236
JG
2217 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2218 sva += PAGE_SIZE) {
2219 if (*pte == 0)
c8fe38ae 2220 continue;
48ffc236 2221 if (pmap_remove_pte(pmap, pte, sva, &info))
c8fe38ae
MD
2222 break;
2223 }
2224 }
2225 pmap_inval_flush(&info);
d7f50089
YY
2226}
2227
2228/*
2229 * pmap_remove_all:
2230 *
c8fe38ae
MD
2231 * Removes this physical page from all physical maps in which it resides.
2232 * Reflects back modify bits to the pager.
d7f50089 2233 *
c8fe38ae 2234 * This routine may not be called from an interrupt.
d7f50089 2235 */
c8fe38ae 2236
bfc09ba0
MD
2237static
2238void
d7f50089
YY
2239pmap_remove_all(vm_page_t m)
2240{
c8fe38ae
MD
2241 struct pmap_inval_info info;
2242 pt_entry_t *pte, tpte;
2243 pv_entry_t pv;
2244
2245 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2246 return;
2247
2248 pmap_inval_init(&info);
2249 crit_enter();
2250 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2251 KKASSERT(pv->pv_pmap->pm_stats.resident_count > 0);
2252 --pv->pv_pmap->pm_stats.resident_count;
2253
2254 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
2255 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
2256 tpte = pte_load_clear(pte);
2257
2258 if (tpte & PG_W)
2259 pv->pv_pmap->pm_stats.wired_count--;
2260
2261 if (tpte & PG_A)
2262 vm_page_flag_set(m, PG_REFERENCED);
2263
2264 /*
2265 * Update the vm_page_t clean and reference bits.
2266 */
2267 if (tpte & PG_M) {
2268#if defined(PMAP_DIAGNOSTIC)
48ffc236 2269 if (pmap_nw_modified(tpte)) {
c8fe38ae 2270 kprintf(
48ffc236 2271 "pmap_remove_all: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2272 pv->pv_va, tpte);
2273 }
2274#endif
2275 if (pmap_track_modified(pv->pv_va))
2276 vm_page_dirty(m);
2277 }
2278 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2279 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist);
2280 ++pv->pv_pmap->pm_generation;
2281 m->md.pv_list_count--;
48ffc236 2282 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2283 if (TAILQ_EMPTY(&m->md.pv_list))
2284 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2285 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem, &info);
2286 free_pv_entry(pv);
2287 }
2288 crit_exit();
2289 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
2290 pmap_inval_flush(&info);
d7f50089
YY
2291}
2292
2293/*
2294 * pmap_protect:
2295 *
2296 * Set the physical protection on the specified range of this map
2297 * as requested.
2298 *
2299 * This function may not be called from an interrupt if the map is
2300 * not the kernel_pmap.
2301 */
2302void
2303pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2304{
48ffc236
JG
2305 vm_offset_t va_next;
2306 pml4_entry_t *pml4e;
2307 pdp_entry_t *pdpe;
2308 pd_entry_t ptpaddr, *pde;
2309 pt_entry_t *pte;
c8fe38ae
MD
2310 pmap_inval_info info;
2311
48ffc236
JG
2312 /* JG review for NX */
2313
c8fe38ae
MD
2314 if (pmap == NULL)
2315 return;
2316
2317 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2318 pmap_remove(pmap, sva, eva);
2319 return;
2320 }
2321
2322 if (prot & VM_PROT_WRITE)
2323 return;
2324
2325 pmap_inval_init(&info);
2326
48ffc236 2327 for (; sva < eva; sva = va_next) {
c8fe38ae 2328
48ffc236
JG
2329 pml4e = pmap_pml4e(pmap, sva);
2330 if ((*pml4e & PG_V) == 0) {
2331 va_next = (sva + NBPML4) & ~PML4MASK;
2332 if (va_next < sva)
2333 va_next = eva;
2334 continue;
2335 }
c8fe38ae 2336
48ffc236
JG
2337 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2338 if ((*pdpe & PG_V) == 0) {
2339 va_next = (sva + NBPDP) & ~PDPMASK;
2340 if (va_next < sva)
2341 va_next = eva;
2342 continue;
2343 }
c8fe38ae 2344
48ffc236
JG
2345 va_next = (sva + NBPDR) & ~PDRMASK;
2346 if (va_next < sva)
2347 va_next = eva;
c8fe38ae 2348
48ffc236
JG
2349 pde = pmap_pdpe_to_pde(pdpe, sva);
2350 ptpaddr = *pde;
c8fe38ae 2351
48ffc236
JG
2352 /*
2353 * Check for large page.
2354 */
2355 if ((ptpaddr & PG_PS) != 0) {
c8fe38ae 2356 pmap_inval_add(&info, pmap, -1);
48ffc236 2357 *pde &= ~(PG_M|PG_RW);
c8fe38ae
MD
2358 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2359 continue;
2360 }
2361
2362 /*
2363 * Weed out invalid mappings. Note: we assume that the page
2364 * directory table is always allocated, and in kernel virtual.
2365 */
2366 if (ptpaddr == 0)
2367 continue;
2368
48ffc236
JG
2369 if (va_next > eva)
2370 va_next = eva;
c8fe38ae 2371
48ffc236
JG
2372 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2373 sva += PAGE_SIZE) {
2374 pt_entry_t obits, pbits;
c8fe38ae
MD
2375 vm_page_t m;
2376
2377 /*
2378 * XXX non-optimal. Note also that there can be
2379 * no pmap_inval_flush() calls until after we modify
2380 * ptbase[sindex] (or otherwise we have to do another
2381 * pmap_inval_add() call).
2382 */
48ffc236
JG
2383 pmap_inval_add(&info, pmap, sva);
2384 obits = pbits = *pte;
2385 if ((pbits & PG_V) == 0)
2386 continue;
c8fe38ae
MD
2387 if (pbits & PG_MANAGED) {
2388 m = NULL;
2389 if (pbits & PG_A) {
48ffc236 2390 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2391 vm_page_flag_set(m, PG_REFERENCED);
2392 pbits &= ~PG_A;
2393 }
2394 if (pbits & PG_M) {
48ffc236 2395 if (pmap_track_modified(sva)) {
c8fe38ae 2396 if (m == NULL)
3cfe1a9f 2397 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2398 vm_page_dirty(m);
2399 pbits &= ~PG_M;
2400 }
2401 }
2402 }
2403
2404 pbits &= ~PG_RW;
2405
48ffc236
JG
2406 if (pbits != obits) {
2407 *pte = pbits;
c8fe38ae
MD
2408 }
2409 }
2410 }
2411 pmap_inval_flush(&info);
d7f50089
YY
2412}
2413
2414/*
c8fe38ae
MD
2415 * Insert the given physical page (p) at
2416 * the specified virtual address (v) in the
2417 * target physical map with the protection requested.
d7f50089 2418 *
c8fe38ae
MD
2419 * If specified, the page will be wired down, meaning
2420 * that the related pte can not be reclaimed.
d7f50089 2421 *
c8fe38ae
MD
2422 * NB: This is the only routine which MAY NOT lazy-evaluate
2423 * or lose information. That is, this routine must actually
2424 * insert this page into the given map NOW.
d7f50089
YY
2425 */
2426void
2427pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2428 boolean_t wired)
2429{
c8fe38ae 2430 vm_paddr_t pa;
48ffc236 2431 pd_entry_t *pde;
c8fe38ae
MD
2432 pt_entry_t *pte;
2433 vm_paddr_t opa;
48ffc236 2434 pt_entry_t origpte, newpte;
c8fe38ae
MD
2435 vm_page_t mpte;
2436 pmap_inval_info info;
2437
2438 if (pmap == NULL)
2439 return;
2440
48ffc236 2441 va = trunc_page(va);
c8fe38ae
MD
2442#ifdef PMAP_DIAGNOSTIC
2443 if (va >= KvaEnd)
2444 panic("pmap_enter: toobig");
2445 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
48ffc236 2446 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
c8fe38ae
MD
2447#endif
2448 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2449 kprintf("Warning: pmap_enter called on UVA with kernel_pmap\n");
48ffc236
JG
2450#ifdef DDB
2451 db_print_backtrace();
2452#endif
c8fe38ae
MD
2453 }
2454 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2455 kprintf("Warning: pmap_enter called on KVA without kernel_pmap\n");
48ffc236
JG
2456#ifdef DDB
2457 db_print_backtrace();
2458#endif
c8fe38ae
MD
2459 }
2460
2461 /*
2462 * In the case that a page table page is not
2463 * resident, we are creating it here.
2464 */
48ffc236 2465 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2466 mpte = pmap_allocpte(pmap, va);
2467 else
2468 mpte = NULL;
2469
2470 pmap_inval_init(&info);
48ffc236
JG
2471 pde = pmap_pde(pmap, va);
2472 if (pde != NULL && (*pde & PG_V) != 0) {
2473 if ((*pde & PG_PS) != 0)
2474 panic("pmap_enter: attempted pmap_enter on 2MB page");
2475 pte = pmap_pde_to_pte(pde, va);
2476 } else
2477 panic("pmap_enter: invalid page directory va=%#lx", va);
2478
2479 KKASSERT(pte != NULL);
2480 pa = VM_PAGE_TO_PHYS(m);
48ffc236 2481 origpte = *pte;
c8fe38ae
MD
2482 opa = origpte & PG_FRAME;
2483
c8fe38ae
MD
2484 /*
2485 * Mapping has not changed, must be protection or wiring change.
2486 */
2487 if (origpte && (opa == pa)) {
2488 /*
2489 * Wiring change, just update stats. We don't worry about
2490 * wiring PT pages as they remain resident as long as there
2491 * are valid mappings in them. Hence, if a user page is wired,
2492 * the PT page will be also.
2493 */
2494 if (wired && ((origpte & PG_W) == 0))
2495 pmap->pm_stats.wired_count++;
2496 else if (!wired && (origpte & PG_W))
2497 pmap->pm_stats.wired_count--;
2498
2499#if defined(PMAP_DIAGNOSTIC)
48ffc236 2500 if (pmap_nw_modified(origpte)) {
c8fe38ae 2501 kprintf(
48ffc236 2502 "pmap_enter: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2503 va, origpte);
2504 }
2505#endif
2506
2507 /*
2508 * Remove the extra pte reference. Note that we cannot
2509 * optimize the RO->RW case because we have adjusted the
2510 * wiring count above and may need to adjust the wiring
2511 * bits below.
2512 */
2513 if (mpte)
2514 mpte->hold_count--;
2515
2516 /*
2517 * We might be turning off write access to the page,
2518 * so we go ahead and sense modify status.
2519 */
2520 if (origpte & PG_MANAGED) {
2521 if ((origpte & PG_M) && pmap_track_modified(va)) {
2522 vm_page_t om;
2523 om = PHYS_TO_VM_PAGE(opa);
2524 vm_page_dirty(om);
2525 }
2526 pa |= PG_MANAGED;
2527 KKASSERT(m->flags & PG_MAPPED);
2528 }
2529 goto validate;
2530 }
2531 /*
2532 * Mapping has changed, invalidate old range and fall through to
2533 * handle validating new mapping.
2534 */
5926987a 2535 while (opa) {
c8fe38ae
MD
2536 int err;
2537 err = pmap_remove_pte(pmap, pte, va, &info);
2538 if (err)
48ffc236 2539 panic("pmap_enter: pte vanished, va: 0x%lx", va);
5926987a
MD
2540 origpte = *pte;
2541 opa = origpte & PG_FRAME;
2542 if (opa) {
2543 kprintf("pmap_enter: Warning, raced pmap %p va %p\n",
2544 pmap, (void *)va);
2545 }
c8fe38ae
MD
2546 }
2547
2548 /*
2549 * Enter on the PV list if part of our managed memory. Note that we
2550 * raise IPL while manipulating pv_table since pmap_enter can be
2551 * called at interrupt time.
2552 */
2553 if (pmap_initialized &&
2554 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2555 pmap_insert_entry(pmap, va, mpte, m);
2556 pa |= PG_MANAGED;
2557 vm_page_flag_set(m, PG_MAPPED);
2558 }
2559
2560 /*
2561 * Increment counters
2562 */
2563 ++pmap->pm_stats.resident_count;
2564 if (wired)
2565 pmap->pm_stats.wired_count++;
2566
2567validate:
2568 /*
2569 * Now validate mapping with desired protection/wiring.
2570 */
48ffc236 2571 newpte = (pt_entry_t) (pa | pte_prot(pmap, prot) | PG_V);
c8fe38ae
MD
2572
2573 if (wired)
2574 newpte |= PG_W;
48ffc236 2575 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2576 newpte |= PG_U;
2577 if (pmap == &kernel_pmap)
2578 newpte |= pgeflag;
2579
2580 /*
2581 * if the mapping or permission bits are different, we need
2582 * to update the pte.
2583 */
2584 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2585 pmap_inval_add(&info, pmap, va);
2586 *pte = newpte | PG_A;
2587 if (newpte & PG_RW)
2588 vm_page_flag_set(m, PG_WRITEABLE);
2589 }
2590 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
2591 pmap_inval_flush(&info);
d7f50089
YY
2592}
2593
2594/*
c8fe38ae
MD
2595 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
2596 * This code also assumes that the pmap has no pre-existing entry for this
2597 * VA.
d7f50089 2598 *
c8fe38ae 2599 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 2600 */
bfc09ba0 2601void
c8fe38ae 2602pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
d7f50089 2603{
c8fe38ae
MD
2604 pt_entry_t *pte;
2605 vm_paddr_t pa;
2606 vm_page_t mpte;
2607 vm_pindex_t ptepindex;
48ffc236 2608 pd_entry_t *ptepa;
c8fe38ae
MD
2609 pmap_inval_info info;
2610
2611 pmap_inval_init(&info);
2612
2613 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2614 kprintf("Warning: pmap_enter_quick called on UVA with kernel_pmap\n");
48ffc236
JG
2615#ifdef DDB
2616 db_print_backtrace();
2617#endif
c8fe38ae
MD
2618 }
2619 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2620 kprintf("Warning: pmap_enter_quick called on KVA without kernel_pmap\n");
48ffc236
JG
2621#ifdef DDB
2622 db_print_backtrace();
2623#endif
c8fe38ae
MD
2624 }
2625
2626 KKASSERT(va < UPT_MIN_ADDRESS); /* assert used on user pmaps only */
2627
2628 /*
2629 * Calculate the page table page (mpte), allocating it if necessary.
2630 *
2631 * A held page table page (mpte), or NULL, is passed onto the
2632 * section following.
2633 */
48ffc236 2634 if (va < VM_MAX_USER_ADDRESS) {
c8fe38ae
MD
2635 /*
2636 * Calculate pagetable page index
2637 */
48ffc236 2638 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
2639
2640 do {
2641 /*
2642 * Get the page directory entry
2643 */
48ffc236 2644 ptepa = pmap_pde(pmap, va);
c8fe38ae
MD
2645
2646 /*
2647 * If the page table page is mapped, we just increment
2648 * the hold count, and activate it.
2649 */
48ffc236
JG
2650 if (ptepa && (*ptepa & PG_V) != 0) {
2651 if (*ptepa & PG_PS)
2652 panic("pmap_enter_quick: unexpected mapping into 2MB page");
2653// if (pmap->pm_ptphint &&
2654// (pmap->pm_ptphint->pindex == ptepindex)) {
2655// mpte = pmap->pm_ptphint;
2656// } else {
c8fe38ae
MD
2657 mpte = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
2658 pmap->pm_ptphint = mpte;
48ffc236 2659// }
c8fe38ae
MD
2660 if (mpte)
2661 mpte->hold_count++;
2662 } else {
2663 mpte = _pmap_allocpte(pmap, ptepindex);
2664 }
2665 } while (mpte == NULL);
2666 } else {
2667 mpte = NULL;
2668 /* this code path is not yet used */
2669 }
2670
2671 /*
2672 * With a valid (and held) page directory page, we can just use
2673 * vtopte() to get to the pte. If the pte is already present
2674 * we do not disturb it.
2675 */
2676 pte = vtopte(va);
2677 if (*pte & PG_V) {
2678 if (mpte)
48ffc236 2679 pmap_unwire_pte_hold(pmap, va, mpte, &info);
c8fe38ae
MD
2680 pa = VM_PAGE_TO_PHYS(m);
2681 KKASSERT(((*pte ^ pa) & PG_FRAME) == 0);
2682 return;
2683 }
2684
2685 /*
2686 * Enter on the PV list if part of our managed memory
2687 */
2688 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2689 pmap_insert_entry(pmap, va, mpte, m);
2690 vm_page_flag_set(m, PG_MAPPED);
2691 }
2692
2693 /*
2694 * Increment counters
2695 */
2696 ++pmap->pm_stats.resident_count;
2697
2698 pa = VM_PAGE_TO_PHYS(m);
2699
2700 /*
2701 * Now validate mapping with RO protection
2702 */
2703 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2704 *pte = pa | PG_V | PG_U;
2705 else
2706 *pte = pa | PG_V | PG_U | PG_MANAGED;
2707/* pmap_inval_add(&info, pmap, va); shouldn't be needed inval->valid */
2708 pmap_inval_flush(&info);
d7f50089
YY
2709}
2710
2711/*
c8fe38ae
MD
2712 * Make a temporary mapping for a physical address. This is only intended
2713 * to be used for panic dumps.
d7f50089 2714 */
b2b3ffcd 2715/* JG Needed on x86_64? */
c8fe38ae
MD
2716void *
2717pmap_kenter_temporary(vm_paddr_t pa, int i)
d7f50089 2718{
c8fe38ae
MD
2719 pmap_kenter((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
2720 return ((void *)crashdumpmap);
d7f50089
YY
2721}
2722
c8fe38ae
MD
2723#define MAX_INIT_PT (96)
2724
d7f50089
YY
2725/*
2726 * This routine preloads the ptes for a given object into the specified pmap.
2727 * This eliminates the blast of soft faults on process startup and
2728 * immediately after an mmap.
2729 */
2730static int pmap_object_init_pt_callback(vm_page_t p, void *data);
2731
2732void
2733pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
2734 vm_object_t object, vm_pindex_t pindex,
2735 vm_size_t size, int limit)
2736{
c8fe38ae
MD
2737 struct rb_vm_page_scan_info info;
2738 struct lwp *lp;
48ffc236 2739 vm_size_t psize;
c8fe38ae
MD
2740
2741 /*
2742 * We can't preinit if read access isn't set or there is no pmap
2743 * or object.
2744 */
2745 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
2746 return;
2747
2748 /*
2749 * We can't preinit if the pmap is not the current pmap
2750 */
2751 lp = curthread->td_lwp;
2752 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
2753 return;
2754
b2b3ffcd 2755 psize = x86_64_btop(size);
c8fe38ae
MD
2756
2757 if ((object->type != OBJT_VNODE) ||
2758 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
2759 (object->resident_page_count > MAX_INIT_PT))) {
2760 return;
2761 }
2762
2763 if (psize + pindex > object->size) {
2764 if (object->size < pindex)
2765 return;
2766 psize = object->size - pindex;
2767 }
2768
2769 if (psize == 0)
2770 return;
2771
2772 /*
2773 * Use a red-black scan to traverse the requested range and load
2774 * any valid pages found into the pmap.
2775 *
2776 * We cannot safely scan the object's memq unless we are in a
2777 * critical section since interrupts can remove pages from objects.
2778 */
2779 info.start_pindex = pindex;
2780 info.end_pindex = pindex + psize - 1;
2781 info.limit = limit;
2782 info.mpte = NULL;
2783 info.addr = addr;
2784 info.pmap = pmap;
2785
2786 crit_enter();
2787 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
2788 pmap_object_init_pt_callback, &info);
2789 crit_exit();
d7f50089
YY
2790}
2791
2792static
2793int
2794pmap_object_init_pt_callback(vm_page_t p, void *data)
2795{
c8fe38ae
MD
2796 struct rb_vm_page_scan_info *info = data;
2797 vm_pindex_t rel_index;
2798 /*
2799 * don't allow an madvise to blow away our really
2800 * free pages allocating pv entries.
2801 */
2802 if ((info->limit & MAP_PREFAULT_MADVISE) &&
2803 vmstats.v_free_count < vmstats.v_free_reserved) {
2804 return(-1);
2805 }
2806 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2807 (p->busy == 0) && (p->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2808 if ((p->queue - p->pc) == PQ_CACHE)
2809 vm_page_deactivate(p);
2810 vm_page_busy(p);
2811 rel_index = p->pindex - info->start_pindex;
2812 pmap_enter_quick(info->pmap,
b2b3ffcd 2813 info->addr + x86_64_ptob(rel_index), p);
c8fe38ae
MD
2814 vm_page_wakeup(p);
2815 }
d7f50089
YY
2816 return(0);
2817}
2818
2819/*
1b9d3514
MD
2820 * Return TRUE if the pmap is in shape to trivially
2821 * pre-fault the specified address.
2822 *
2823 * Returns FALSE if it would be non-trivial or if a
2824 * pte is already loaded into the slot.
d7f50089 2825 */
1b9d3514
MD
2826int
2827pmap_prefault_ok(pmap_t pmap, vm_offset_t addr)
d7f50089 2828{
1b9d3514
MD
2829 pt_entry_t *pte;
2830 pd_entry_t *pde;
c8fe38ae 2831
1b9d3514
MD
2832 pde = pmap_pde(pmap, addr);
2833 if (pde == NULL || *pde == 0)
2834 return(0);
c8fe38ae 2835
1b9d3514
MD
2836 pte = vtopte(addr);
2837 if (*pte)
2838 return(0);
c8fe38ae 2839
1b9d3514 2840 return(1);
d7f50089
YY
2841}
2842
2843/*
2844 * Routine: pmap_change_wiring
2845 * Function: Change the wiring attribute for a map/virtual-address
2846 * pair.
2847 * In/out conditions:
2848 * The mapping must already exist in the pmap.
2849 */
2850void
2851pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
2852{
c8fe38ae
MD
2853 pt_entry_t *pte;
2854
2855 if (pmap == NULL)
2856 return;
2857
2858 pte = pmap_pte(pmap, va);
2859
2860 if (wired && !pmap_pte_w(pte))
2861 pmap->pm_stats.wired_count++;
2862 else if (!wired && pmap_pte_w(pte))
2863 pmap->pm_stats.wired_count--;
2864
2865 /*
2866 * Wiring is not a hardware characteristic so there is no need to
2867 * invalidate TLB. However, in an SMP environment we must use
2868 * a locked bus cycle to update the pte (if we are not using
2869 * the pmap_inval_*() API that is)... it's ok to do this for simple
2870 * wiring changes.
2871 */
2872#ifdef SMP
2873 if (wired)
71577ce5 2874 atomic_set_long(pte, PG_W);
c8fe38ae 2875 else
71577ce5 2876 atomic_clear_long(pte, PG_W);
c8fe38ae
MD
2877#else
2878 if (wired)
71577ce5 2879 atomic_set_long_nonlocked(pte, PG_W);
c8fe38ae 2880 else
71577ce5 2881 atomic_clear_long_nonlocked(pte, PG_W);
c8fe38ae 2882#endif
d7f50089
YY
2883}
2884
c8fe38ae
MD
2885
2886
d7f50089
YY
2887/*
2888 * Copy the range specified by src_addr/len
2889 * from the source map to the range dst_addr/len
2890 * in the destination map.
2891 *
2892 * This routine is only advisory and need not do anything.
2893 */
2894void
2895pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
bfc09ba0 2896 vm_size_t len, vm_offset_t src_addr)
d7f50089 2897{
bfc09ba0
MD
2898 return;
2899#if 0
c8fe38ae
MD
2900 pmap_inval_info info;
2901 vm_offset_t addr;
2902 vm_offset_t end_addr = src_addr + len;
2903 vm_offset_t pdnxt;
2904 pd_entry_t src_frame, dst_frame;
2905 vm_page_t m;
2906
2907 if (dst_addr != src_addr)
2908 return;
48ffc236 2909#if JGPMAP32
c8fe38ae
MD
2910 src_frame = src_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
2911 if (src_frame != (PTDpde & PG_FRAME)) {
2912 return;
2913 }
2914
2915 dst_frame = dst_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
2916 if (dst_frame != (APTDpde & PG_FRAME)) {
2917 APTDpde = (pd_entry_t) (dst_frame | PG_RW | PG_V);
2918 /* The page directory is not shared between CPUs */
2919 cpu_invltlb();
2920 }
48ffc236 2921#endif
c8fe38ae
MD
2922 pmap_inval_init(&info);
2923 pmap_inval_add(&info, dst_pmap, -1);
2924 pmap_inval_add(&info, src_pmap, -1);
2925
2926 /*
2927 * critical section protection is required to maintain the page/object
2928 * association, interrupts can free pages and remove them from
2929 * their objects.
2930 */
2931 crit_enter();
2932 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
2933 pt_entry_t *src_pte, *dst_pte;
2934 vm_page_t dstmpte, srcmpte;
2935 vm_offset_t srcptepaddr;
2936 vm_pindex_t ptepindex;
2937
2938 if (addr >= UPT_MIN_ADDRESS)
2939 panic("pmap_copy: invalid to pmap_copy page tables\n");
2940
2941 /*
2942 * Don't let optional prefaulting of pages make us go
2943 * way below the low water mark of free pages or way
2944 * above high water mark of used pv entries.
2945 */
2946 if (vmstats.v_free_count < vmstats.v_free_reserved ||
2947 pv_entry_count > pv_entry_high_water)
2948 break;
2949
2950 pdnxt = ((addr + PAGE_SIZE*NPTEPG) & ~(PAGE_SIZE*NPTEPG - 1));
2951 ptepindex = addr >> PDRSHIFT;
2952
48ffc236 2953#if JGPMAP32
c8fe38ae 2954 srcptepaddr = (vm_offset_t) src_pmap->pm_pdir[ptepindex];
48ffc236 2955#endif
c8fe38ae
MD
2956 if (srcptepaddr == 0)
2957 continue;
2958
2959 if (srcptepaddr & PG_PS) {
48ffc236 2960#if JGPMAP32
c8fe38ae
MD
2961 if (dst_pmap->pm_pdir[ptepindex] == 0) {
2962 dst_pmap->pm_pdir[ptepindex] = (pd_entry_t) srcptepaddr;
2963 dst_pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
2964 }
48ffc236 2965#endif
c8fe38ae
MD
2966 continue;
2967 }
2968
2969 srcmpte = vm_page_lookup(src_pmap->pm_pteobj, ptepindex);
2970 if ((srcmpte == NULL) || (srcmpte->hold_count == 0) ||
2971 (srcmpte->flags & PG_BUSY)) {
2972 continue;
2973 }
2974
2975 if (pdnxt > end_addr)
2976 pdnxt = end_addr;
2977
2978 src_pte = vtopte(addr);
48ffc236 2979#if JGPMAP32
c8fe38ae 2980 dst_pte = avtopte(addr);
48ffc236 2981#endif
c8fe38ae
MD
2982 while (addr < pdnxt) {
2983 pt_entry_t ptetemp;
2984
2985 ptetemp = *src_pte;
2986 /*
2987 * we only virtual copy managed pages
2988 */
2989 if ((ptetemp & PG_MANAGED) != 0) {
2990 /*
2991 * We have to check after allocpte for the
2992 * pte still being around... allocpte can
2993 * block.
2994 *
2995 * pmap_allocpte() can block. If we lose
2996 * our page directory mappings we stop.
2997 */
2998 dstmpte = pmap_allocpte(dst_pmap, addr);
2999
48ffc236 3000#if JGPMAP32
c8fe38ae
MD
3001 if (src_frame != (PTDpde & PG_FRAME) ||
3002 dst_frame != (APTDpde & PG_FRAME)
3003 ) {
3004 kprintf("WARNING: pmap_copy: detected and corrected race\n");
3005 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3006 goto failed;
3007 } else if ((*dst_pte == 0) &&
3008 (ptetemp = *src_pte) != 0 &&
3009 (ptetemp & PG_MANAGED)) {
3010 /*
3011 * Clear the modified and
3012 * accessed (referenced) bits
3013 * during the copy.
3014 */
3015 m = PHYS_TO_VM_PAGE(ptetemp);
3016 *dst_pte = ptetemp & ~(PG_M | PG_A);
3017 ++dst_pmap->pm_stats.resident_count;
3018 pmap_insert_entry(dst_pmap, addr,
3019 dstmpte, m);
3020 KKASSERT(m->flags & PG_MAPPED);
3021 } else {
3022 kprintf("WARNING: pmap_copy: dst_pte race detected and corrected\n");
3023 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3024 goto failed;
3025 }
48ffc236 3026#endif
c8fe38ae
MD
3027 if (dstmpte->hold_count >= srcmpte->hold_count)
3028 break;
3029 }
3030 addr += PAGE_SIZE;
3031 src_pte++;
3032 dst_pte++;
3033 }
3034 }
3035failed:
3036 crit_exit();
3037 pmap_inval_flush(&info);
f81851b8 3038#endif
d7f50089
YY
3039}
3040
3041/*
3042 * pmap_zero_page:
3043 *
48ffc236 3044 * Zero the specified physical page.
d7f50089
YY
3045 *
3046 * This function may be called from an interrupt and no locking is
3047 * required.
3048 */
3049void
3050pmap_zero_page(vm_paddr_t phys)
3051{
48ffc236 3052 vm_offset_t va = PHYS_TO_DMAP(phys);
c8fe38ae 3053
48ffc236 3054 pagezero((void *)va);
d7f50089
YY
3055}
3056
3057/*
3058 * pmap_page_assertzero:
3059 *
3060 * Assert that a page is empty, panic if it isn't.
3061 */
3062void
3063pmap_page_assertzero(vm_paddr_t phys)
3064{
48ffc236 3065 vm_offset_t virt = PHYS_TO_DMAP(phys);
bfc09ba0 3066 int i;
48ffc236 3067
bfc09ba0
MD
3068 for (i = 0; i < PAGE_SIZE; i += sizeof(long)) {
3069 if (*(long *)((char *)virt + i) != 0) {
3070 panic("pmap_page_assertzero() @ %p not zero!\n", (void *)virt);
c8fe38ae
MD
3071 }
3072 }
d7f50089
YY
3073}
3074
3075/*
3076 * pmap_zero_page:
3077 *
3078 * Zero part of a physical page by mapping it into memory and clearing
3079 * its contents with bzero.
3080 *
3081 * off and size may not cover an area beyond a single hardware page.
3082 */
3083void
3084pmap_zero_page_area(vm_paddr_t phys, int off, int size)
3085{
48ffc236 3086 vm_offset_t virt = PHYS_TO_DMAP(phys);
bfc09ba0 3087
48ffc236 3088 bzero((char *)virt + off, size);
d7f50089
YY
3089}
3090
3091/*
3092 * pmap_copy_page:
3093 *
3094 * Copy the physical page from the source PA to the target PA.
3095 * This function may be called from an interrupt. No locking
3096 * is required.
3097 */
3098void
3099pmap_copy_page(vm_paddr_t src, vm_paddr_t dst)
3100{
48ffc236 3101 vm_offset_t src_virt, dst_virt;
c8fe38ae 3102
48ffc236
JG
3103 src_virt = PHYS_TO_DMAP(src);
3104 dst_virt = PHYS_TO_DMAP(dst);
bfc09ba0 3105 bcopy((void *)src_virt, (void *)dst_virt, PAGE_SIZE);
d7f50089
YY
3106}
3107
3108/*
3109 * pmap_copy_page_frag:
3110 *
3111 * Copy the physical page from the source PA to the target PA.
3112 * This function may be called from an interrupt. No locking
3113 * is required.
3114 */
3115void
3116pmap_copy_page_frag(vm_paddr_t src, vm_paddr_t dst, size_t bytes)
3117{
48ffc236 3118 vm_offset_t src_virt, dst_virt;
c8fe38ae 3119
48ffc236
JG
3120 src_virt = PHYS_TO_DMAP(src);
3121 dst_virt = PHYS_TO_DMAP(dst);
bfc09ba0 3122
48ffc236
JG
3123 bcopy((char *)src_virt + (src & PAGE_MASK),
3124 (char *)dst_virt + (dst & PAGE_MASK),
c8fe38ae 3125 bytes);
d7f50089
YY
3126}
3127
3128/*
3129 * Returns true if the pmap's pv is one of the first
3130 * 16 pvs linked to from this page. This count may
3131 * be changed upwards or downwards in the future; it
3132 * is only necessary that true be returned for a small
3133 * subset of pmaps for proper page aging.
3134 */
3135boolean_t
3136pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3137{
c8fe38ae
MD
3138 pv_entry_t pv;
3139 int loops = 0;
3140
3141 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3142 return FALSE;
3143
3144 crit_enter();
3145
3146 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3147 if (pv->pv_pmap == pmap) {
3148 crit_exit();
3149 return TRUE;
3150 }
3151 loops++;
3152 if (loops >= 16)
3153 break;
3154 }
3155 crit_exit();
d7f50089
YY
3156 return (FALSE);
3157}
3158
3159/*
3160 * Remove all pages from specified address space
3161 * this aids process exit speeds. Also, this code
3162 * is special cased for current process only, but
3163 * can have the more generic (and slightly slower)
3164 * mode enabled. This is much faster than pmap_remove
3165 * in the case of running down an entire address space.
3166 */
3167void
3168pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3169{
c8fe38ae
MD
3170 struct lwp *lp;
3171 pt_entry_t *pte, tpte;
3172 pv_entry_t pv, npv;
3173 vm_page_t m;
3174 pmap_inval_info info;
3175 int iscurrentpmap;
48ffc236 3176 int save_generation;
c8fe38ae
MD
3177
3178 lp = curthread->td_lwp;
3179 if (lp && pmap == vmspace_pmap(lp->lwp_vmspace))
3180 iscurrentpmap = 1;
3181 else
3182 iscurrentpmap = 0;
3183
3184 pmap_inval_init(&info);
3185 crit_enter();
3186 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
3187 if (pv->pv_va >= eva || pv->pv_va < sva) {
3188 npv = TAILQ_NEXT(pv, pv_plist);
3189 continue;
3190 }
3191
3192 KKASSERT(pmap == pv->pv_pmap);
3193
3194 if (iscurrentpmap)
3195 pte = vtopte(pv->pv_va);
3196 else
3197 pte = pmap_pte_quick(pmap, pv->pv_va);
3198 if (pmap->pm_active)
3199 pmap_inval_add(&info, pmap, pv->pv_va);
3200
3201 /*
3202 * We cannot remove wired pages from a process' mapping
3203 * at this time
3204 */
3205 if (*pte & PG_W) {
3206 npv = TAILQ_NEXT(pv, pv_plist);
3207 continue;
3208 }
3209 tpte = pte_load_clear(pte);
3210
48ffc236 3211 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
c8fe38ae
MD
3212
3213 KASSERT(m < &vm_page_array[vm_page_array_size],
48ffc236 3214 ("pmap_remove_pages: bad tpte %lx", tpte));
c8fe38ae
MD
3215
3216 KKASSERT(pmap->pm_stats.resident_count > 0);
3217 --pmap->pm_stats.resident_count;
3218
3219 /*
3220 * Update the vm_page_t clean and reference bits.
3221 */
3222 if (tpte & PG_M) {
3223 vm_page_dirty(m);
3224 }
3225
3226 npv = TAILQ_NEXT(pv, pv_plist);
3227 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
3228 save_generation = ++pmap->pm_generation;
3229
3230 m->md.pv_list_count--;
3231 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3232 if (TAILQ_EMPTY(&m->md.pv_list))
3233 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
3234
3235 pmap_unuse_pt(pmap, pv->pv_va, pv->pv_ptem, &info);
3236 free_pv_entry(pv);
3237
3238 /*
3239 * Restart the scan if we blocked during the unuse or free
3240 * calls and other removals were made.
3241 */
3242 if (save_generation != pmap->pm_generation) {
3243 kprintf("Warning: pmap_remove_pages race-A avoided\n");
5926987a 3244 npv = TAILQ_FIRST(&pmap->pm_pvlist);
c8fe38ae
MD
3245 }
3246 }
3247 pmap_inval_flush(&info);
3248 crit_exit();
d7f50089
YY
3249}
3250
3251/*
c8fe38ae
MD
3252 * pmap_testbit tests bits in pte's
3253 * note that the testbit/clearbit routines are inline,
3254 * and a lot of things compile-time evaluate.
d7f50089 3255 */
bfc09ba0
MD
3256static
3257boolean_t
d7f50089
YY
3258pmap_testbit(vm_page_t m, int bit)
3259{
c8fe38ae
MD
3260 pv_entry_t pv;
3261 pt_entry_t *pte;
3262
3263 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3264 return FALSE;
3265
3266 if (TAILQ_FIRST(&m->md.pv_list) == NULL)
3267 return FALSE;
3268
3269 crit_enter();
3270
3271 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3272 /*
3273 * if the bit being tested is the modified bit, then
3274 * mark clean_map and ptes as never
3275 * modified.
3276 */
3277 if (bit & (PG_A|PG_M)) {
3278 if (!pmap_track_modified(pv->pv_va))
3279 continue;
3280 }
3281
3282#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3283 if (pv->pv_pmap == NULL) {
3284 kprintf("Null pmap (tb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3285 continue;
3286 }
3287#endif
3288 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3289 if (*pte & bit) {
3290 crit_exit();
3291 return TRUE;
3292 }
3293 }
3294 crit_exit();
d7f50089
YY
3295 return (FALSE);
3296}
3297
3298/*
c8fe38ae 3299 * this routine is used to modify bits in ptes
d7f50089 3300 */
bfc09ba0
MD
3301static __inline
3302void
d7f50089
YY
3303pmap_clearbit(vm_page_t m, int bit)
3304{
c8fe38ae
MD
3305 struct pmap_inval_info info;
3306 pv_entry_t pv;
3307 pt_entry_t *pte;
3308 pt_entry_t pbits;
3309
3310 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3311 return;
3312
3313 pmap_inval_init(&info);
3314 crit_enter();
3315
3316 /*
3317 * Loop over all current mappings setting/clearing as appropos If
3318 * setting RO do we need to clear the VAC?
3319 */
3320 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3321 /*
3322 * don't write protect pager mappings
3323 */
3324 if (bit == PG_RW) {
3325 if (!pmap_track_modified(pv->pv_va))
3326 continue;
3327 }
3328
3329#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3330 if (pv->pv_pmap == NULL) {
3331 kprintf("Null pmap (cb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3332 continue;
3333 }
3334#endif
3335
3336 /*
3337 * Careful here. We can use a locked bus instruction to
3338 * clear PG_A or PG_M safely but we need to synchronize
3339 * with the target cpus when we mess with PG_RW.
3340 *
3341 * We do not have to force synchronization when clearing
3342 * PG_M even for PTEs generated via virtual memory maps,
3343 * because the virtual kernel will invalidate the pmap
3344 * entry when/if it needs to resynchronize the Modify bit.
3345 */
3346 if (bit & PG_RW)
3347 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
3348 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3349again:
3350 pbits = *pte;
3351 if (pbits & bit) {
3352 if (bit == PG_RW) {
3353 if (pbits & PG_M) {
3354 vm_page_dirty(m);
48ffc236 3355 atomic_clear_long(pte, PG_M|PG_RW);
c8fe38ae
MD
3356 } else {
3357 /*
3358 * The cpu may be trying to set PG_M
3359 * simultaniously with our clearing
3360 * of PG_RW.
3361 */
48ffc236 3362 if (!atomic_cmpset_long(pte, pbits,
c8fe38ae
MD
3363 pbits & ~PG_RW))
3364 goto again;
3365 }
3366 } else if (bit == PG_M) {
3367 /*
3368 * We could also clear PG_RW here to force
3369 * a fault on write to redetect PG_M for
3370 * virtual kernels, but it isn't necessary
3371 * since virtual kernels invalidate the pte
3372 * when they clear the VPTE_M bit in their
3373 * virtual page tables.
3374 */
48ffc236 3375 atomic_clear_long(pte, PG_M);
c8fe38ae 3376 } else {
48ffc236 3377 atomic_clear_long(pte, bit);
c8fe38ae
MD
3378 }
3379 }
3380 }
3381 pmap_inval_flush(&info);
3382 crit_exit();
d7f50089
YY
3383}
3384
3385/*
3386 * pmap_page_protect:
3387 *
3388 * Lower the permission for all mappings to a given page.
3389 */
3390void
3391pmap_page_protect(vm_page_t m, vm_prot_t prot)
3392{
48ffc236 3393 /* JG NX support? */
c8fe38ae
MD
3394 if ((prot & VM_PROT_WRITE) == 0) {
3395 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) {
3396 pmap_clearbit(m, PG_RW);
3397 vm_page_flag_clear(m, PG_WRITEABLE);
3398 } else {
3399 pmap_remove_all(m);
3400 }
3401 }
d7f50089
YY
3402}
3403
3404vm_paddr_t
c8fe38ae 3405pmap_phys_address(vm_pindex_t ppn)
d7f50089 3406{
b2b3ffcd 3407 return (x86_64_ptob(ppn));
d7f50089
YY
3408}
3409
3410/*
3411 * pmap_ts_referenced:
3412 *
3413 * Return a count of reference bits for a page, clearing those bits.
3414 * It is not necessary for every reference bit to be cleared, but it
3415 * is necessary that 0 only be returned when there are truly no
3416 * reference bits set.
3417 *
3418 * XXX: The exact number of bits to check and clear is a matter that
3419 * should be tested and standardized at some point in the future for
3420 * optimal aging of shared pages.
3421 */
3422int
3423pmap_ts_referenced(vm_page_t m)
3424{
c8fe38ae
MD
3425 pv_entry_t pv, pvf, pvn;
3426 pt_entry_t *pte;
3427 int rtval = 0;
3428
3429 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3430 return (rtval);
3431
3432 crit_enter();
3433
3434 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3435
3436 pvf = pv;
3437
3438 do {
3439 pvn = TAILQ_NEXT(pv, pv_list);
3440
5926987a 3441 crit_enter();
c8fe38ae 3442 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
c8fe38ae 3443 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
5926987a 3444 crit_exit();
c8fe38ae
MD
3445
3446 if (!pmap_track_modified(pv->pv_va))
3447 continue;
3448
3449 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3450
3451 if (pte && (*pte & PG_A)) {
3452#ifdef SMP
48ffc236 3453 atomic_clear_long(pte, PG_A);
c8fe38ae 3454#else
48ffc236 3455 atomic_clear_long_nonlocked(pte, PG_A);
c8fe38ae
MD
3456#endif
3457 rtval++;
3458 if (rtval > 4) {
3459 break;
3460 }
3461 }
3462 } while ((pv = pvn) != NULL && pv != pvf);
3463 }
3464 crit_exit();
3465
3466 return (rtval);
d7f50089
YY
3467}
3468
3469/*
3470 * pmap_is_modified:
3471 *
3472 * Return whether or not the specified physical page was modified
3473 * in any physical maps.
3474 */
3475boolean_t
3476pmap_is_modified(vm_page_t m)
3477{
c8fe38ae 3478 return pmap_testbit(m, PG_M);
d7f50089
YY
3479}
3480
3481/*
3482 * Clear the modify bits on the specified physical page.
3483 */
3484void
3485pmap_clear_modify(vm_page_t m)
3486{
c8fe38ae 3487 pmap_clearbit(m, PG_M);
d7f50089
YY
3488}
3489
3490/*
3491 * pmap_clear_reference:
3492 *
3493 * Clear the reference bit on the specified physical page.
3494 */
3495void
3496pmap_clear_reference(vm_page_t m)
3497{
c8fe38ae 3498 pmap_clearbit(m, PG_A);
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YY
3499}
3500
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YY
3501/*
3502 * Miscellaneous support routines follow
3503 */
3504
bfc09ba0
MD
3505static
3506void
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YY
3507i386_protection_init(void)
3508{
3509 int *kp, prot;
3510
48ffc236 3511 /* JG NX support may go here; No VM_PROT_EXECUTE ==> set NX bit */
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YY
3512 kp = protection_codes;
3513 for (prot = 0; prot < 8; prot++) {
c8fe38ae
MD
3514 switch (prot) {
3515 case VM_PROT_NONE | VM_PROT_NONE | VM_PROT_NONE:
3516 /*
3517 * Read access is also 0. There isn't any execute bit,
3518 * so just make it readable.
3519 */
3520 case VM_PROT_READ | VM_PROT_NONE | VM_PROT_NONE:
3521 case VM_PROT_READ | VM_PROT_NONE | VM_PROT_EXECUTE:
3522 case VM_PROT_NONE | VM_PROT_NONE | VM_PROT_EXECUTE:
3523 *kp++ = 0;
3524 break;
3525 case VM_PROT_NONE | VM_PROT_WRITE | VM_PROT_NONE:
3526 case VM_PROT_NONE | VM_PROT_WRITE | VM_PROT_EXECUTE:
3527 case VM_PROT_READ | VM_PROT_WRITE | VM_PROT_NONE:
3528 case VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE:
3529 *kp++ = PG_RW;
3530 break;
3531 }
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YY
3532 }
3533}
3534
3535/*
3536 * Map a set of physical memory pages into the kernel virtual
3537 * address space. Return a pointer to where it is mapped. This
3538 * routine is intended to be used for mapping device memory,
3539 * NOT real memory.
3540 *
3541 * NOTE: we can't use pgeflag unless we invalidate the pages one at
3542 * a time.
3543 */
3544void *
3545pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3546{
3547 vm_offset_t va, tmpva, offset;