i386: Prepare mp_enable() for multi-stage procedure segmentation
[dragonfly.git] / sys / platform / pc32 / apic / lapic.h
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1/*
2 * Copyright (c) 1996, by Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the developer may NOT be used to endorse or promote products
11 * derived from this software without specific prior written permission.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD: src/sys/i386/include/mpapic.h,v 1.14.2.2 2000/09/30 02:49:34 ps Exp $
7bd34050 26 * $DragonFly: src/sys/platform/pc32/apic/mpapic.h,v 1.12 2008/06/07 11:37:23 mneumann Exp $
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27 */
28
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29#ifndef _ARCH_APIC_LAPIC_H_
30#define _ARCH_APIC_LAPIC_H_
984263bc 31
3274eb88 32#include <machine_base/apic/apicreg.h>
984263bc 33
984263bc 34/*
2d901d56 35 * APIC ID <-> CPU ID mapping macros
984263bc 36 */
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37#define CPUID_TO_APICID(cpu_id) (cpu_id_to_apic_id[(cpu_id)])
38#define APICID_TO_CPUID(apic_id) (apic_id_to_cpu_id[(apic_id)])
984263bc 39
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40#ifndef _SYS_QUEUE_H_
41#include <sys/queue.h>
42#endif
43
44struct lapic_enumerator {
45 int lapic_prio;
46 TAILQ_ENTRY(lapic_enumerator) lapic_link;
47 int (*lapic_probe)(struct lapic_enumerator *);
48 void (*lapic_enumerate)(struct lapic_enumerator *);
49};
50
51#define LAPIC_ENUM_PRIO_MPTABLE 20
52#define LAPIC_ENUM_PRIO_MADT 40
53
e126caf1 54#ifdef SMP
984263bc 55
cb7d6921 56extern volatile lapic_t *lapic;
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57extern int cpu_id_to_apic_id[];
58extern int apic_id_to_cpu_id[];
1d6d7089 59extern int lapic_enable;
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60
61void apic_dump(char*);
62void lapic_init(boolean_t);
63int apic_ipi(int, int, int);
64void selected_apic_ipi(cpumask_t, int, int);
65void single_apic_ipi(int, int, int);
66int single_apic_ipi_passive(int, int, int);
41e2c7e0 67void lapic_set_cpuid(int, int);
ac032dad 68int lapic_config(void);
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69void lapic_enumerator_register(struct lapic_enumerator *);
70void set_apic_timer(int);
71int get_apic_timer_frequency(void);
72int read_apic_timer(void);
73void u_sleep(int);
74
984263bc 75/*
3340ac41 76 * Send an IPI INTerrupt containing 'vector' to all CPUs EXCEPT myself
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77 */
78static __inline int
79all_but_self_ipi(int vector)
80{
0f7a3396 81 if (smp_active_mask == 1)
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82 return 0;
83 return apic_ipi(APIC_DEST_ALLESELF, vector, APIC_DELMODE_FIXED);
84}
85
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86#endif
87
84cc808b 88void lapic_map(vm_offset_t /* XXX should be vm_paddr_t */);
11bae9b8 89int lapic_unused_apic_id(int);
0bccf4f5 90void lapic_fixup_noioapic(void);
ad52b37b 91
3340ac41 92#endif /* _ARCH_APIC_LAPIC_H_ */