Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / bus / usb / ehci_pci.c
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1/*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Lennart Augustsson (augustss@carlstedt.se) at
7 * Carlstedt Research & Technology.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 * $FreeBSD: src/sys/dev/usb/ehci_pci.c,v 1.9 2003/12/17 17:15:41 peter Exp $
1f7ab7c9 37 * $DragonFly: src/sys/bus/usb/ehci_pci.c,v 1.11 2006/10/25 20:55:52 dillon Exp $
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38 */
39
40/*
41 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
42 *
43 * The EHCI 1.0 spec can be found at
44 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
45 * and the USB 2.0 spec at
46 * http://www.usb.org/developers/docs/usb_20.zip
47 */
48
49/* The low level controller code for EHCI has been split into
50 * PCI probes and EHCI specific code. This was done to facilitate the
51 * sharing of code between *BSD's
52 */
53
54#include "opt_bus.h"
55
56#include <sys/param.h>
57#include <sys/systm.h>
58#include <sys/kernel.h>
59#include <sys/module.h>
60#include <sys/bus.h>
61#include <sys/queue.h>
22b3f5ce 62#include <sys/lock.h>
1550dfd9 63#include <sys/rman.h>
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64
65#include <bus/pci/pcivar.h>
66#include <bus/pci/pcireg.h>
67
68#include <bus/usb/usb.h>
69#include <bus/usb/usbdi.h>
70#include <bus/usb/usbdivar.h>
71#include <bus/usb/usb_mem.h>
72
73#include <bus/usb/ehcireg.h>
74#include <bus/usb/ehcivar.h>
75
76#define PCI_EHCI_VENDORID_ACERLABS 0x10b9
77#define PCI_EHCI_VENDORID_AMD 0x1022
78#define PCI_EHCI_VENDORID_APPLE 0x106b
23e03f20 79#define PCI_EHCI_VENDORID_ATI 0x1002
1550dfd9 80#define PCI_EHCI_VENDORID_CMDTECH 0x1095
b58dae7c 81#define PCI_EHCI_VENDORID_INTEL 0x8086
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82#define PCI_EHCI_VENDORID_NEC 0x1033
83#define PCI_EHCI_VENDORID_OPTI 0x1045
23e03f20 84#define PCI_EHCI_VENDORID_PHILIPS 0x1131
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85#define PCI_EHCI_VENDORID_SIS 0x1039
86#define PCI_EHCI_VENDORID_NVIDIA 0x12D2
87#define PCI_EHCI_VENDORID_NVIDIA2 0x10DE
8e4265b9 88#define PCI_EHCI_VENDORID_VIA 0x1106
1550dfd9 89
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90/* AcerLabs/ALi */
91#define PCI_EHCI_DEVICEID_M5239 0x523910b9
92static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
93
94/* AMD */
95#define PCI_EHCI_DEVICEID_8111 0x10227463
96static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
97
98/* ATI */
99#define PCI_EHCI_DEVICEID_SB200 0x43451002
100static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
101#define PCI_EHCI_DEVICEID_SB400 0x43731002
102static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
103
104/* Intel */
105#define PCI_EHCI_DEVICEID_6300 0x25ad8086
106static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
107#define PCI_EHCI_DEVICEID_ICH4 0x24cd8086
108static const char *ehci_device_ich4 = "Intel 82801DB/L/M USB 2.0 controller";
109#define PCI_EHCI_DEVICEID_ICH5 0x24dd8086
110static const char *ehci_device_ich5 = "Intel 82801EB/R USB 2.0 controller";
5d02b047 111#define PCI_EHCI_DEVICEID_ICH6 0x265c8086
f8613d9f 112static const char *ehci_device_ich6 = "Intel 82801FB USB 2.0 controller";
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113#define PCI_EHCI_DEVICEID_ICH7 0x27cc8086
114static const char *ehci_device_ich7 = "Intel 82801GB/R USB 2.0 controller";
b58dae7c 115
23e03f20 116/* NEC */
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117#define PCI_EHCI_DEVICEID_NEC 0x00e01033
118static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
119
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120/* NVIDIA */
121#define PCI_EHCI_DEVICEID_NF2 0x006810de
122static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
123#define PCI_EHCI_DEVICEID_NF2_400 0x008810de
124static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
125#define PCI_EHCI_DEVICEID_NF3 0x00d810de
126static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
127#define PCI_EHCI_DEVICEID_NF3_250 0x00e810de
128static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
129#define PCI_EHCI_DEVICEID_NF4 0x005b10de
130static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
131
132/* Philips */
133#define PCI_EHCI_DEVICEID_ISP156X 0x15621131
134static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
135
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136/* VIA */
137#define PCI_EHCI_DEVICEID_VIA 0x31041106
138static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
139
140/* Generic */
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141static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
142
143#define PCI_EHCI_BASE_REG 0x10
144
145
146static int ehci_pci_attach(device_t self);
147static int ehci_pci_detach(device_t self);
148
149static const char *
150ehci_pci_match(device_t self)
151{
152 u_int32_t device_id = pci_get_devid(self);
153
154 switch (device_id) {
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155 case PCI_EHCI_DEVICEID_M5239:
156 return (ehci_device_m5239);
157 case PCI_EHCI_DEVICEID_8111:
158 return (ehci_device_8111);
159 case PCI_EHCI_DEVICEID_SB200:
160 return (ehci_device_sb200);
161 case PCI_EHCI_DEVICEID_SB400:
162 return (ehci_device_sb400);
163 case PCI_EHCI_DEVICEID_6300:
164 return (ehci_device_6300);
165 case PCI_EHCI_DEVICEID_ICH4:
166 return (ehci_device_ich4);
167 case PCI_EHCI_DEVICEID_ICH5:
168 return (ehci_device_ich5);
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169 case PCI_EHCI_DEVICEID_ICH6:
170 return (ehci_device_ich6);
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171 case PCI_EHCI_DEVICEID_ICH7:
172 return (ehci_device_ich7);
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173 case PCI_EHCI_DEVICEID_NEC:
174 return (ehci_device_nec);
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175 case PCI_EHCI_DEVICEID_NF2:
176 return (ehci_device_nf2);
177 case PCI_EHCI_DEVICEID_NF2_400:
178 return (ehci_device_nf2_400);
179 case PCI_EHCI_DEVICEID_NF3:
180 return (ehci_device_nf3);
181 case PCI_EHCI_DEVICEID_NF3_250:
182 return (ehci_device_nf3_250);
183 case PCI_EHCI_DEVICEID_NF4:
184 return (ehci_device_nf4);
185 case PCI_EHCI_DEVICEID_ISP156X:
186 return (ehci_device_isp156x);
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187 case PCI_EHCI_DEVICEID_VIA:
188 return (ehci_device_via);
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189 default:
190 if (pci_get_class(self) == PCIC_SERIALBUS
191 && pci_get_subclass(self) == PCIS_SERIALBUS_USB
192 && pci_get_progif(self) == PCI_INTERFACE_EHCI) {
193 return (ehci_device_generic);
194 }
195 }
196
197 return NULL; /* dunno */
198}
199
200static int
201ehci_pci_probe(device_t self)
202{
203 const char *desc = ehci_pci_match(self);
204
205 if (desc) {
206 device_set_desc(self, desc);
207 return 0;
208 } else {
209 return ENXIO;
210 }
211}
212
213static int
214ehci_pci_attach(device_t self)
215{
216 ehci_softc_t *sc = device_get_softc(self);
217 device_t parent;
218 device_t *neighbors;
219 device_t *nbus;
220 struct usbd_bus *bsc;
221 int err;
222 int rid;
223 int ncomp;
224 int count, buscount;
225 int slot, function;
226 int res;
227 int i;
228
229 switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
230 case PCI_USBREV_PRE_1_0:
231 case PCI_USBREV_1_0:
232 case PCI_USBREV_1_1:
233 sc->sc_bus.usbrev = USBREV_UNKNOWN;
234 printf("pre-2.0 USB rev\n");
235 return ENXIO;
236 case PCI_USBREV_2_0:
237 sc->sc_bus.usbrev = USBREV_2_0;
238 break;
239 default:
240 sc->sc_bus.usbrev = USBREV_UNKNOWN;
241 break;
242 }
243
244 pci_enable_busmaster(self);
245
246 rid = PCI_CBMEM;
247 sc->io_res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
248 0, ~0, 1, RF_ACTIVE);
249 if (!sc->io_res) {
250 device_printf(self, "Could not map memory\n");
251 return ENXIO;
252 }
253 sc->iot = rman_get_bustag(sc->io_res);
254 sc->ioh = rman_get_bushandle(sc->io_res);
255
256 rid = 0;
257 sc->irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid, 0, ~0, 1,
258 RF_SHAREABLE | RF_ACTIVE);
259 if (sc->irq_res == NULL) {
260 device_printf(self, "Could not allocate irq\n");
261 ehci_pci_detach(self);
262 return ENXIO;
263 }
264 sc->sc_bus.bdev = device_add_child(self, "usb", -1);
265 if (!sc->sc_bus.bdev) {
266 device_printf(self, "Could not add USB device\n");
267 ehci_pci_detach(self);
268 return ENOMEM;
269 }
270 device_set_ivars(sc->sc_bus.bdev, sc);
271
272 /* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
273 device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
274 switch (pci_get_vendor(self)) {
275 case PCI_EHCI_VENDORID_ACERLABS:
276 sprintf(sc->sc_vendor, "AcerLabs");
277 break;
278 case PCI_EHCI_VENDORID_AMD:
279 sprintf(sc->sc_vendor, "AMD");
280 break;
281 case PCI_EHCI_VENDORID_APPLE:
282 sprintf(sc->sc_vendor, "Apple");
283 break;
284 case PCI_EHCI_VENDORID_CMDTECH:
285 sprintf(sc->sc_vendor, "CMDTECH");
286 break;
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287 case PCI_EHCI_VENDORID_INTEL:
288 sprintf(sc->sc_vendor, "Intel");
289 break;
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290 case PCI_EHCI_VENDORID_NEC:
291 sprintf(sc->sc_vendor, "NEC");
292 break;
293 case PCI_EHCI_VENDORID_OPTI:
294 sprintf(sc->sc_vendor, "OPTi");
295 break;
296 case PCI_EHCI_VENDORID_SIS:
297 sprintf(sc->sc_vendor, "SiS");
298 break;
299 case PCI_EHCI_VENDORID_NVIDIA:
300 case PCI_EHCI_VENDORID_NVIDIA2:
301 sprintf(sc->sc_vendor, "nVidia");
302 break;
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303 case PCI_EHCI_VENDORID_VIA:
304 sprintf(sc->sc_vendor, "VIA");
305 break;
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306 default:
307 if (bootverbose)
308 device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
309 pci_get_devid(self));
310 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
311 }
312
ee61f228 313 err = bus_setup_intr(self, sc->irq_res, 0,
e9cb6d99 314 (driver_intr_t *) ehci_intr, sc, &sc->ih, NULL);
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315 if (err) {
316 device_printf(self, "Could not setup irq, %d\n", err);
317 sc->ih = NULL;
318 ehci_pci_detach(self);
319 return ENXIO;
320 }
321
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322 /* Enable workaround for dropped interrupts as required */
323 switch (pci_get_vendor(self)) {
324 case PCI_EHCI_VENDORID_ATI:
325 case PCI_EHCI_VENDORID_VIA:
326 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
327 if (bootverbose)
328 device_printf(self,
329 "Dropped interrupts workaround enabled\n");
330 break;
331 default:
332 break;
333 }
334
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335 /*
336 * Find companion controllers. According to the spec they always
337 * have lower function numbers so they should be enumerated already.
338 */
339 parent = device_get_parent(self);
340 res = device_get_children(parent, &neighbors, &count);
341 if (res != 0) {
342 device_printf(self, "Error finding companion busses\n");
343 ehci_pci_detach(self);
344 return ENXIO;
345 }
346 ncomp = 0;
347 slot = pci_get_slot(self);
348 function = pci_get_function(self);
349 for (i = 0; i < count; i++) {
350 if (pci_get_slot(neighbors[i]) == slot && \
351 pci_get_function(neighbors[i]) < function) {
352 res = device_get_children(neighbors[i],
353 &nbus, &buscount);
354 if (res != 0 || buscount != 1)
355 continue;
356 bsc = device_get_softc(nbus[0]);
357 printf("ehci_pci_attach: companion %s\n",
358 USBDEVNAME(bsc->bdev));
359 sc->sc_comps[ncomp++] = bsc;
360 if (ncomp >= EHCI_COMPANION_MAX)
361 break;
362 }
363 }
364 sc->sc_ncomp = ncomp;
365
366 err = ehci_init(sc);
367 if (!err)
368 err = device_probe_and_attach(sc->sc_bus.bdev);
369
370 if (err) {
371 device_printf(self, "USB init failed err=%d\n", err);
372#if 0 /* TODO */
373 ehci_pci_detach(self);
374#endif
375 return EIO;
376 }
b7736b61 377 ehci_init_intrs(sc);
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378 return 0;
379}
380
381static int
382ehci_pci_detach(device_t self)
383{
384 ehci_softc_t *sc = device_get_softc(self);
385
386 /*
387 * XXX this code is not yet fit to be used as detach for the EHCI
388 * controller
389 */
390
391 /*
392 * disable interrupts that might have been switched on in ehci_init
393 */
394 if (sc->iot && sc->ioh)
395 bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
396
397 if (sc->irq_res && sc->ih) {
398 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
399
400 if (err)
401 /* XXX or should we panic? */
402 device_printf(self, "Could not tear down irq, %d\n",
403 err);
404 sc->ih = NULL;
405 }
406 if (sc->sc_bus.bdev) {
407 device_delete_child(self, sc->sc_bus.bdev);
408 sc->sc_bus.bdev = NULL;
409 }
410 if (sc->irq_res) {
411 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
412 sc->irq_res = NULL;
413 }
414 if (sc->io_res) {
415 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
416 sc->io_res = NULL;
417 sc->iot = 0;
418 sc->ioh = 0;
419 }
420 return 0;
421}
422
423static device_method_t ehci_methods[] = {
424 /* Device interface */
425 DEVMETHOD(device_probe, ehci_pci_probe),
426 DEVMETHOD(device_attach, ehci_pci_attach),
427 DEVMETHOD(device_shutdown, bus_generic_shutdown),
428
429 /* Bus interface */
430 DEVMETHOD(bus_print_child, bus_generic_print_child),
431
432 {0, 0}
433};
434
435static driver_t ehci_driver = {
436 "ehci",
437 ehci_methods,
438 sizeof(ehci_softc_t),
439};
440
441static devclass_t ehci_devclass;
442
443DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
444DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, 0, 0);