Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / bus / usb / ohci.c
CommitLineData
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1/*
2 * $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $
3 * $FreeBSD: src/sys/dev/usb/ohci.c,v 1.141 2003/12/22 15:40:10 shiba Exp $
1f7ab7c9 4 * $DragonFly: src/sys/bus/usb/ohci.c,v 1.16 2006/10/25 20:55:52 dillon Exp $
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5 */
6/* Also, already ported:
7 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
8 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
9 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
10 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
c90ee8f8 11 * $NetBSD: 1.144 - 1.150 ported
1550dfd9 12 */
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13
14/*
15 * Copyright (c) 1998 The NetBSD Foundation, Inc.
16 * All rights reserved.
17 *
18 * This code is derived from software contributed to The NetBSD Foundation
19 * by Lennart Augustsson (lennart@augustsson.net) at
20 * Carlstedt Research & Technology.
21 *
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
24 * are met:
25 * 1. Redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution.
30 * 3. All advertising materials mentioning features or use of this software
31 * must display the following acknowledgement:
32 * This product includes software developed by the NetBSD
33 * Foundation, Inc. and its contributors.
34 * 4. Neither the name of The NetBSD Foundation nor the names of its
35 * contributors may be used to endorse or promote products derived
36 * from this software without specific prior written permission.
37 *
38 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
39 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
40 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
41 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
48 * POSSIBILITY OF SUCH DAMAGE.
49 */
50
51/*
52 * USB Open Host Controller driver.
53 *
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54 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
55 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
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56 */
57
58#include <sys/param.h>
59#include <sys/systm.h>
60#include <sys/malloc.h>
984263bc 61#include <sys/kernel.h>
1550dfd9 62#if defined(__NetBSD__) || defined(__OpenBSD__)
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63#include <sys/device.h>
64#include <sys/select.h>
15ba557b 65#elif defined(__FreeBSD__) || defined(__DragonFly__)
1550dfd9 66#include <sys/endian.h>
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67#include <sys/module.h>
68#include <sys/bus.h>
15ba557b 69#if defined(DIAGNOSTIC) && defined(__i386__)
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70#include <machine/cpu.h>
71#endif
72#endif
73#include <sys/proc.h>
74#include <sys/queue.h>
75#include <sys/sysctl.h>
76
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77#include <sys/thread2.h>
78
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79#include <machine/endian.h>
80
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81#include "usb.h"
82#include "usbdi.h"
83#include "usbdivar.h"
84#include "usb_mem.h"
85#include "usb_quirks.h"
984263bc 86
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87#include "ohcireg.h"
88#include "ohcivar.h"
984263bc 89
15ba557b 90#if defined(__FreeBSD__) || defined(__DragonFly__)
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91#include <machine/clock.h>
92
93#define delay(d) DELAY(d)
94#endif
95
96#if defined(__OpenBSD__)
97struct cfdriver ohci_cd = {
98 NULL, "ohci", DV_DULL
99};
100#endif
101
102#ifdef USB_DEBUG
103#define DPRINTF(x) if (ohcidebug) logprintf x
104#define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
105int ohcidebug = 0;
106SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
107SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
108 &ohcidebug, 0, "ohci debug level");
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109#ifndef __NetBSD__
110#define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
111#endif
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112#else
113#define DPRINTF(x)
114#define DPRINTFN(n,x)
115#endif
116
117/*
118 * The OHCI controller is little endian, so on big endian machines
119 * the data strored in memory needs to be swapped.
120 */
1550dfd9 121#if defined(__OpenBSD__)
984263bc 122#if BYTE_ORDER == BIG_ENDIAN
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123#define htole32(x) (bswap32(x))
124#define le32toh(x) (bswap32(x))
984263bc 125#else
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126#define htole32(x) (x)
127#define le32toh(x) (x)
128#endif
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129#endif
130
131struct ohci_pipe;
132
133Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
134Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
135
136Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
137Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
138
139Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
140Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
141
142#if 0
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143Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
144 ohci_soft_td_t *);
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145#endif
146Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
1550dfd9 147 ohci_softc_t *, int, int, usbd_xfer_handle,
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148 ohci_soft_td_t *, ohci_soft_td_t **);
149
150#if defined(__NetBSD__) || defined(__OpenBSD__)
151Static void ohci_shutdown(void *v);
152Static void ohci_power(int, void *);
153#endif
154Static usbd_status ohci_open(usbd_pipe_handle);
155Static void ohci_poll(struct usbd_bus *);
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156Static void ohci_softintr(void *);
157Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
158Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
984263bc 159Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
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160
161Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
162Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
163Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
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164Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
165Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
166Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
167Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
168Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
169Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
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170
171Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
172Static void ohci_device_isoc_enter(usbd_xfer_handle);
173
1550dfd9 174Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
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175Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
176
177Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
178Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
179
180Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
181Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
182Static void ohci_root_ctrl_abort(usbd_xfer_handle);
183Static void ohci_root_ctrl_close(usbd_pipe_handle);
1550dfd9 184Static void ohci_root_ctrl_done(usbd_xfer_handle);
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185
186Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
187Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
188Static void ohci_root_intr_abort(usbd_xfer_handle);
189Static void ohci_root_intr_close(usbd_pipe_handle);
1550dfd9 190Static void ohci_root_intr_done(usbd_xfer_handle);
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191
192Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
193Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
194Static void ohci_device_ctrl_abort(usbd_xfer_handle);
195Static void ohci_device_ctrl_close(usbd_pipe_handle);
1550dfd9 196Static void ohci_device_ctrl_done(usbd_xfer_handle);
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197
198Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
199Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
200Static void ohci_device_bulk_abort(usbd_xfer_handle);
201Static void ohci_device_bulk_close(usbd_pipe_handle);
1550dfd9 202Static void ohci_device_bulk_done(usbd_xfer_handle);
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203
204Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
205Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
206Static void ohci_device_intr_abort(usbd_xfer_handle);
207Static void ohci_device_intr_close(usbd_pipe_handle);
1550dfd9 208Static void ohci_device_intr_done(usbd_xfer_handle);
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209
210Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
211Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
212Static void ohci_device_isoc_abort(usbd_xfer_handle);
213Static void ohci_device_isoc_close(usbd_pipe_handle);
1550dfd9 214Static void ohci_device_isoc_done(usbd_xfer_handle);
984263bc 215
1550dfd9 216Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
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217 struct ohci_pipe *pipe, int ival);
218
1550dfd9 219Static int ohci_str(usb_string_descriptor_t *, int, const char *);
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220
221Static void ohci_timeout(void *);
1550dfd9 222Static void ohci_timeout_task(void *);
984263bc 223Static void ohci_rhsc_able(ohci_softc_t *, int);
1550dfd9 224Static void ohci_rhsc_enable(void *);
984263bc 225
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226Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
227Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
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228
229Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
230Static void ohci_noop(usbd_pipe_handle pipe);
231
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232Static usbd_status ohci_controller_init(ohci_softc_t *sc);
233
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234#ifdef USB_DEBUG
235Static void ohci_dumpregs(ohci_softc_t *);
236Static void ohci_dump_tds(ohci_soft_td_t *);
237Static void ohci_dump_td(ohci_soft_td_t *);
238Static void ohci_dump_ed(ohci_soft_ed_t *);
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239Static void ohci_dump_itd(ohci_soft_itd_t *);
240Static void ohci_dump_itds(ohci_soft_itd_t *);
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241#endif
242
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243#define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
244 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
245#define OWRITE1(sc, r, x) \
246 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
247#define OWRITE2(sc, r, x) \
248 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
249#define OWRITE4(sc, r, x) \
250 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
251#define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
252#define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
253#define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
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254
255/* Reverse the bits in a value 0 .. 31 */
1550dfd9 256Static u_int8_t revbits[OHCI_NO_INTRS] =
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257 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
258 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
259 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
260 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
261
262struct ohci_pipe {
263 struct usbd_pipe pipe;
264 ohci_soft_ed_t *sed;
1550dfd9 265 u_int32_t aborting;
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266 union {
267 ohci_soft_td_t *td;
268 ohci_soft_itd_t *itd;
269 } tail;
270 /* Info needed for different pipe kinds. */
271 union {
272 /* Control pipe */
273 struct {
274 usb_dma_t reqdma;
275 u_int length;
276 ohci_soft_td_t *setup, *data, *stat;
277 } ctl;
278 /* Interrupt pipe */
279 struct {
280 int nslots;
281 int pos;
282 } intr;
283 /* Bulk pipe */
284 struct {
285 u_int length;
286 int isread;
287 } bulk;
288 /* Iso pipe */
289 struct iso {
290 int next, inuse;
291 } iso;
292 } u;
293};
294
295#define OHCI_INTR_ENDPT 1
296
297Static struct usbd_bus_methods ohci_bus_methods = {
298 ohci_open,
1550dfd9 299 ohci_softintr,
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300 ohci_poll,
301 ohci_allocm,
302 ohci_freem,
303 ohci_allocx,
304 ohci_freex,
305};
306
1550dfd9 307Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
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308 ohci_root_ctrl_transfer,
309 ohci_root_ctrl_start,
310 ohci_root_ctrl_abort,
311 ohci_root_ctrl_close,
312 ohci_noop,
1550dfd9 313 ohci_root_ctrl_done,
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314};
315
1550dfd9 316Static struct usbd_pipe_methods ohci_root_intr_methods = {
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317 ohci_root_intr_transfer,
318 ohci_root_intr_start,
319 ohci_root_intr_abort,
320 ohci_root_intr_close,
321 ohci_noop,
322 ohci_root_intr_done,
323};
324
1550dfd9 325Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
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326 ohci_device_ctrl_transfer,
327 ohci_device_ctrl_start,
328 ohci_device_ctrl_abort,
329 ohci_device_ctrl_close,
330 ohci_noop,
331 ohci_device_ctrl_done,
332};
333
1550dfd9 334Static struct usbd_pipe_methods ohci_device_intr_methods = {
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335 ohci_device_intr_transfer,
336 ohci_device_intr_start,
337 ohci_device_intr_abort,
338 ohci_device_intr_close,
339 ohci_device_clear_toggle,
340 ohci_device_intr_done,
341};
342
1550dfd9 343Static struct usbd_pipe_methods ohci_device_bulk_methods = {
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344 ohci_device_bulk_transfer,
345 ohci_device_bulk_start,
346 ohci_device_bulk_abort,
347 ohci_device_bulk_close,
348 ohci_device_clear_toggle,
349 ohci_device_bulk_done,
350};
351
352Static struct usbd_pipe_methods ohci_device_isoc_methods = {
353 ohci_device_isoc_transfer,
354 ohci_device_isoc_start,
355 ohci_device_isoc_abort,
356 ohci_device_isoc_close,
357 ohci_noop,
358 ohci_device_isoc_done,
359};
360
361#if defined(__NetBSD__) || defined(__OpenBSD__)
362int
363ohci_activate(device_ptr_t self, enum devact act)
364{
365 struct ohci_softc *sc = (struct ohci_softc *)self;
366 int rv = 0;
367
368 switch (act) {
369 case DVACT_ACTIVATE:
370 return (EOPNOTSUPP);
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371
372 case DVACT_DEACTIVATE:
373 if (sc->sc_child != NULL)
374 rv = config_deactivate(sc->sc_child);
1550dfd9 375 sc->sc_dying = 1;
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376 break;
377 }
378 return (rv);
379}
380
381int
382ohci_detach(struct ohci_softc *sc, int flags)
383{
384 int rv = 0;
385
386 if (sc->sc_child != NULL)
387 rv = config_detach(sc->sc_child, flags);
1550dfd9 388
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389 if (rv != 0)
390 return (rv);
391
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392 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
393
394#if defined(__NetBSD__) || defined(__OpenBSD__)
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395 powerhook_disestablish(sc->sc_powerhook);
396 shutdownhook_disestablish(sc->sc_shutdownhook);
397#endif
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398
399 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
400
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401 /* free data structures XXX */
402
403 return (rv);
404}
405#endif
406
407ohci_soft_ed_t *
408ohci_alloc_sed(ohci_softc_t *sc)
409{
410 ohci_soft_ed_t *sed;
411 usbd_status err;
412 int i, offs;
413 usb_dma_t dma;
414
415 if (sc->sc_freeeds == NULL) {
416 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
417 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
418 OHCI_ED_ALIGN, &dma);
419 if (err)
1550dfd9 420 return (NULL);
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421 for(i = 0; i < OHCI_SED_CHUNK; i++) {
422 offs = i * OHCI_SED_SIZE;
1550dfd9 423 sed = KERNADDR(&dma, offs);
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424 sed->physaddr = DMAADDR(&dma, offs);
425 sed->next = sc->sc_freeeds;
426 sc->sc_freeeds = sed;
427 }
428 }
429 sed = sc->sc_freeeds;
430 sc->sc_freeeds = sed->next;
431 memset(&sed->ed, 0, sizeof(ohci_ed_t));
432 sed->next = 0;
433 return (sed);
434}
435
436void
437ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
438{
439 sed->next = sc->sc_freeeds;
440 sc->sc_freeeds = sed;
441}
442
443ohci_soft_td_t *
444ohci_alloc_std(ohci_softc_t *sc)
445{
446 ohci_soft_td_t *std;
447 usbd_status err;
448 int i, offs;
449 usb_dma_t dma;
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450
451 if (sc->sc_freetds == NULL) {
452 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
453 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
454 OHCI_TD_ALIGN, &dma);
455 if (err)
1550dfd9 456 return (NULL);
4e01b467 457 crit_enter();
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458 for(i = 0; i < OHCI_STD_CHUNK; i++) {
459 offs = i * OHCI_STD_SIZE;
1550dfd9 460 std = KERNADDR(&dma, offs);
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461 std->physaddr = DMAADDR(&dma, offs);
462 std->nexttd = sc->sc_freetds;
463 sc->sc_freetds = std;
464 }
4e01b467 465 crit_exit();
984263bc 466 }
1550dfd9 467
4e01b467 468 crit_enter();
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469 std = sc->sc_freetds;
470 sc->sc_freetds = std->nexttd;
471 memset(&std->td, 0, sizeof(ohci_td_t));
472 std->nexttd = NULL;
1550dfd9 473 std->xfer = NULL;
984263bc 474 ohci_hash_add_td(sc, std);
4e01b467 475 crit_exit();
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476
477 return (std);
478}
479
480void
481ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
482{
4e01b467 483 crit_enter();
984263bc 484 ohci_hash_rem_td(sc, std);
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485 std->nexttd = sc->sc_freetds;
486 sc->sc_freetds = std;
4e01b467 487 crit_exit();
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488}
489
490usbd_status
491ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
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492 int alen, int rd, usbd_xfer_handle xfer,
493 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
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494{
495 ohci_soft_td_t *next, *cur;
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496 ohci_physaddr_t dataphys;
497 u_int32_t tdflags;
984263bc 498 int offset = 0;
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499 int len, curlen;
500 usb_dma_t *dma = &xfer->dmabuf;
501 u_int16_t flags = xfer->flags;
984263bc 502
1550dfd9 503 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
984263bc 504
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505 len = alen;
506 cur = sp;
984263bc 507
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508 tdflags = htole32(
509 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
510 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
511 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
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512
513 for (;;) {
514 next = ohci_alloc_std(sc);
1550dfd9 515 if (next == NULL)
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516 goto nomem;
517
518 dataphys = DMAADDR(dma, offset);
519
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520 /*
521 * The OHCI hardware can handle at most one 4k crossing.
522 * XXX - currently we only allocate contigous buffers, but
523 * the OHCI spec says: If during the data transfer the buffer
524 * address contained in the HC's working copy of
525 * CurrentBufferPointer crosses a 4K boundary, the upper 20
526 * bits of Buffer End are copied to the working value of
527 * CurrentBufferPointer causing the next buffer address to
528 * be the 0th byte in the same 4K page that contains the
529 * last byte of the buffer (the 4K boundary crossing may
530 * occur within a data packet transfer.)
531 *
532 * If/when dma has multiple segments, this will need to
533 * properly handle fragmenting TD's.
534 *
535 * We can describe the above using maxsegsz = 4k and nsegs = 2
536 * in the future.
984263bc 537 */
1550dfd9
MD
538 if (OHCI_PAGE(dataphys) == OHCI_PAGE(DMAADDR(dma, offset +
539 len - 1)) || len - (OHCI_PAGE_SIZE -
540 OHCI_PAGE_OFFSET(dataphys)) <= OHCI_PAGE_SIZE) {
984263bc
MD
541 /* we can handle it in this TD */
542 curlen = len;
543 } else {
544 /* XXX The calculation below is wrong and could
545 * result in a packet that is not a multiple of the
546 * MaxPacketSize in the case where the buffer does not
547 * start on an appropriate address (like for example in
548 * the case of an mbuf cluster). You'll get an early
549 * short packet.
550 */
984263bc 551 /* must use multiple TDs, fill as much as possible. */
1550dfd9
MD
552 curlen = 2 * OHCI_PAGE_SIZE -
553 OHCI_PAGE_OFFSET(dataphys);
554 /* the length must be a multiple of the max size */
555 curlen -= curlen %
556 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
557#ifdef DIAGNOSTIC
558 if (curlen == 0)
559 panic("ohci_alloc_std: curlen == 0");
984263bc
MD
560#endif
561 }
562 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
1550dfd9
MD
563 "len=%d curlen=%d\n",
564 dataphys, len, curlen));
984263bc
MD
565 len -= curlen;
566
1550dfd9
MD
567 cur->td.td_flags = tdflags;
568 cur->td.td_cbp = htole32(dataphys);
984263bc 569 cur->nexttd = next;
1550dfd9
MD
570 cur->td.td_nexttd = htole32(next->physaddr);
571 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
984263bc
MD
572 cur->len = curlen;
573 cur->flags = OHCI_ADD_LEN;
1550dfd9 574 cur->xfer = xfer;
984263bc
MD
575 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
576 dataphys, dataphys + curlen - 1));
577 if (len == 0)
578 break;
1550dfd9
MD
579 if (len < 0)
580 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
581
984263bc
MD
582 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
583 offset += curlen;
584 cur = next;
585 }
586 if ((flags & USBD_FORCE_SHORT_XFER) &&
1550dfd9 587 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
984263bc
MD
588 /* Force a 0 length transfer at the end. */
589
984263bc
MD
590 cur = next;
591
592 next = ohci_alloc_std(sc);
1550dfd9 593 if (next == NULL)
984263bc
MD
594 goto nomem;
595
1550dfd9 596 cur->td.td_flags = tdflags;
984263bc
MD
597 cur->td.td_cbp = 0; /* indicate 0 length packet */
598 cur->nexttd = next;
1550dfd9 599 cur->td.td_nexttd = htole32(next->physaddr);
984263bc
MD
600 cur->td.td_be = ~0;
601 cur->len = 0;
602 cur->flags = 0;
1550dfd9 603 cur->xfer = xfer;
984263bc
MD
604 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
605 }
1550dfd9 606 *ep = cur;
984263bc
MD
607
608 return (USBD_NORMAL_COMPLETION);
609
610 nomem:
611 /* XXX free chain */
612 return (USBD_NOMEM);
613}
614
615#if 0
616Static void
617ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
618 ohci_soft_td_t *stdend)
619{
620 ohci_soft_td_t *p;
621
622 for (; std != stdend; std = p) {
623 p = std->nexttd;
624 ohci_free_std(sc, std);
625 }
626}
627#endif
628
629ohci_soft_itd_t *
630ohci_alloc_sitd(ohci_softc_t *sc)
631{
632 ohci_soft_itd_t *sitd;
633 usbd_status err;
4e01b467 634 int i, offs;
984263bc
MD
635 usb_dma_t dma;
636
6082d606 637 crit_enter();
984263bc
MD
638 if (sc->sc_freeitds == NULL) {
639 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
6082d606
MD
640 crit_exit();
641 err = usb_allocmem(&sc->sc_bus,
642 OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
643 OHCI_ITD_ALIGN, &dma);
984263bc 644 if (err)
1550dfd9 645 return (NULL);
4e01b467 646 crit_enter();
6082d606 647 for (i = 0; i < OHCI_SITD_CHUNK; i++) {
1550dfd9
MD
648 offs = i * OHCI_SITD_SIZE;
649 sitd = KERNADDR(&dma, offs);
984263bc
MD
650 sitd->physaddr = DMAADDR(&dma, offs);
651 sitd->nextitd = sc->sc_freeitds;
652 sc->sc_freeitds = sitd;
653 }
654 }
655 sitd = sc->sc_freeitds;
656 sc->sc_freeitds = sitd->nextitd;
657 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
1550dfd9
MD
658 sitd->nextitd = NULL;
659 sitd->xfer = NULL;
660 ohci_hash_add_itd(sc, sitd);
4e01b467 661 crit_exit();
1550dfd9
MD
662
663#ifdef DIAGNOSTIC
664 sitd->isdone = 0;
665#endif
666
984263bc
MD
667 return (sitd);
668}
669
670void
671ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
672{
1550dfd9
MD
673 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
674
675#ifdef DIAGNOSTIC
676 if (!sitd->isdone) {
677 panic("ohci_free_sitd: sitd=%p not done", sitd);
678 return;
679 }
680 /* Warn double free */
681 sitd->isdone = 0;
682#endif
683
4e01b467 684 crit_enter();
1550dfd9 685 ohci_hash_rem_itd(sc, sitd);
984263bc
MD
686 sitd->nextitd = sc->sc_freeitds;
687 sc->sc_freeitds = sitd;
4e01b467 688 crit_exit();
984263bc
MD
689}
690
691usbd_status
692ohci_init(ohci_softc_t *sc)
693{
694 ohci_soft_ed_t *sed, *psed;
695 usbd_status err;
696 int i;
1550dfd9 697 u_int32_t rev;
984263bc
MD
698
699 DPRINTF(("ohci_init: start\n"));
700#if defined(__OpenBSD__)
701 printf(",");
702#else
703 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
704#endif
705 rev = OREAD4(sc, OHCI_REVISION);
706 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
707 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
708
709 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
1550dfd9 710 printf("%s: unsupported OHCI revision\n",
984263bc
MD
711 USBDEVNAME(sc->sc_bus.bdev));
712 sc->sc_bus.usbrev = USBREV_UNKNOWN;
713 return (USBD_INVAL);
714 }
715 sc->sc_bus.usbrev = USBREV_1_0;
716
717 for (i = 0; i < OHCI_HASH_SIZE; i++)
718 LIST_INIT(&sc->sc_hash_tds[i]);
1550dfd9
MD
719 for (i = 0; i < OHCI_HASH_SIZE; i++)
720 LIST_INIT(&sc->sc_hash_itds[i]);
984263bc
MD
721
722 SIMPLEQ_INIT(&sc->sc_free_xfers);
723
1550dfd9 724 /* XXX determine alignment by R/W */
984263bc 725 /* Allocate the HCCA area. */
1550dfd9 726 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
984263bc
MD
727 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
728 if (err)
729 return (err);
1550dfd9 730 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
984263bc
MD
731 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
732
733 sc->sc_eintrs = OHCI_NORMAL_INTRS;
734
735 /* Allocate dummy ED that starts the control list. */
736 sc->sc_ctrl_head = ohci_alloc_sed(sc);
737 if (sc->sc_ctrl_head == NULL) {
738 err = USBD_NOMEM;
739 goto bad1;
740 }
1550dfd9 741 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
984263bc
MD
742
743 /* Allocate dummy ED that starts the bulk list. */
744 sc->sc_bulk_head = ohci_alloc_sed(sc);
745 if (sc->sc_bulk_head == NULL) {
746 err = USBD_NOMEM;
747 goto bad2;
748 }
1550dfd9 749 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
984263bc
MD
750
751 /* Allocate dummy ED that starts the isochronous list. */
752 sc->sc_isoc_head = ohci_alloc_sed(sc);
753 if (sc->sc_isoc_head == NULL) {
754 err = USBD_NOMEM;
755 goto bad3;
756 }
1550dfd9 757 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
984263bc
MD
758
759 /* Allocate all the dummy EDs that make up the interrupt tree. */
760 for (i = 0; i < OHCI_NO_EDS; i++) {
761 sed = ohci_alloc_sed(sc);
762 if (sed == NULL) {
763 while (--i >= 0)
764 ohci_free_sed(sc, sc->sc_eds[i]);
765 err = USBD_NOMEM;
766 goto bad4;
767 }
768 /* All ED fields are set to 0. */
769 sc->sc_eds[i] = sed;
1550dfd9 770 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
984263bc
MD
771 if (i != 0)
772 psed = sc->sc_eds[(i-1) / 2];
773 else
774 psed= sc->sc_isoc_head;
775 sed->next = psed;
1550dfd9 776 sed->ed.ed_nexted = htole32(psed->physaddr);
984263bc 777 }
1550dfd9 778 /*
984263bc
MD
779 * Fill HCCA interrupt table. The bit reversal is to get
780 * the tree set up properly to spread the interrupts.
781 */
782 for (i = 0; i < OHCI_NO_INTRS; i++)
1550dfd9
MD
783 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
784 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
785
786#ifdef USB_DEBUG
787 if (ohcidebug > 15) {
788 for (i = 0; i < OHCI_NO_EDS; i++) {
789 printf("ed#%d ", i);
790 ohci_dump_ed(sc->sc_eds[i]);
791 }
792 printf("iso ");
793 ohci_dump_ed(sc->sc_isoc_head);
794 }
795#endif
796
797 err = ohci_controller_init(sc);
798 if (err != USBD_NORMAL_COMPLETION)
799 goto bad5;
800
801 /* Set up the bus struct. */
802 sc->sc_bus.methods = &ohci_bus_methods;
803 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
804
805#if defined(__NetBSD__) || defined(__OpenBSD__)
806 sc->sc_control = sc->sc_intre = 0;
807 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
808 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
809#endif
810
811 usb_callout_init(sc->sc_tmo_rhsc);
812
813 return (USBD_NORMAL_COMPLETION);
814
815 bad5:
816 for (i = 0; i < OHCI_NO_EDS; i++)
817 ohci_free_sed(sc, sc->sc_eds[i]);
818 bad4:
819 ohci_free_sed(sc, sc->sc_isoc_head);
820 bad3:
1550dfd9 821 ohci_free_sed(sc, sc->sc_bulk_head);
c90ee8f8
MD
822 bad2:
823 ohci_free_sed(sc, sc->sc_ctrl_head);
1550dfd9
MD
824 bad1:
825 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
826 return (err);
827}
828
3d583874
MD
829void
830ohci_init_intrs(ohci_softc_t *sc)
831{
832 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
833}
834
1550dfd9
MD
835Static usbd_status
836ohci_controller_init(ohci_softc_t *sc)
837{
838 int i;
839 u_int32_t s, ctl, ival, hcr, fm, per, desca;
984263bc
MD
840
841 /* Determine in what context we are running. */
842 ctl = OREAD4(sc, OHCI_CONTROL);
843 if (ctl & OHCI_IR) {
844 /* SMM active, request change */
845 DPRINTF(("ohci_init: SMM active, request owner change\n"));
846 s = OREAD4(sc, OHCI_COMMAND_STATUS);
847 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
848 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
849 usb_delay_ms(&sc->sc_bus, 1);
850 ctl = OREAD4(sc, OHCI_CONTROL);
851 }
852 if ((ctl & OHCI_IR) == 0) {
853 printf("%s: SMM does not respond, resetting\n",
854 USBDEVNAME(sc->sc_bus.bdev));
855 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
856 goto reset;
857 }
1550dfd9
MD
858#if 0
859/* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
984263bc
MD
860 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
861 /* BIOS started controller. */
862 DPRINTF(("ohci_init: BIOS active\n"));
863 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
864 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
865 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
866 }
1550dfd9 867#endif
984263bc
MD
868 } else {
869 DPRINTF(("ohci_init: cold started\n"));
870 reset:
871 /* Controller was cold started. */
872 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
873 }
874
875 /*
876 * This reset should not be necessary according to the OHCI spec, but
877 * without it some controllers do not start.
878 */
879 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
880 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
881 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
882
883 /* We now own the host controller and the bus has been reset. */
884 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
885
886 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
887 /* Nominal time for a reset is 10 us. */
888 for (i = 0; i < 10; i++) {
889 delay(10);
890 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
891 if (!hcr)
892 break;
893 }
894 if (hcr) {
895 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
1550dfd9 896 return (USBD_IOERROR);
984263bc
MD
897 }
898#ifdef USB_DEBUG
899 if (ohcidebug > 15)
900 ohci_dumpregs(sc);
901#endif
902
903 /* The controller is now in SUSPEND state, we have 2ms to finish. */
904
905 /* Set up HC registers. */
906 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
907 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
908 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
3d583874
MD
909
910 /*
911 * disable all interrupts to avoid events while we are initializing
912 * the device.
913 */
984263bc 914 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
984263bc
MD
915 /* switch on desired functional features */
916 ctl = OREAD4(sc, OHCI_CONTROL);
917 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
918 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
919 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
920 /* And finally start it! */
921 OWRITE4(sc, OHCI_CONTROL, ctl);
922
923 /*
924 * The controller is now OPERATIONAL. Set a some final
925 * registers that should be set earlier, but that the
926 * controller ignores when in the SUSPEND state.
927 */
928 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
929 fm |= OHCI_FSMPS(ival) | ival;
930 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
931 per = OHCI_PERIODIC(ival); /* 90% periodic */
932 OWRITE4(sc, OHCI_PERIODIC_START, per);
933
1550dfd9
MD
934 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
935 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
936 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
937 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
938 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
939 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
984263bc 940
1550dfd9
MD
941 /*
942 * The AMD756 requires a delay before re-reading the register,
943 * otherwise it will occasionally report 0 ports.
944 */
c90ee8f8
MD
945 sc->sc_noport = 0;
946 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
947 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
948 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
949 }
984263bc
MD
950
951#ifdef USB_DEBUG
952 if (ohcidebug > 5)
953 ohci_dumpregs(sc);
954#endif
984263bc 955 return (USBD_NORMAL_COMPLETION);
984263bc
MD
956}
957
958usbd_status
959ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
960{
1550dfd9 961 return (usb_allocmem(bus, size, 0, dma));
984263bc
MD
962}
963
964void
965ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
966{
1550dfd9 967 usb_freemem(bus, dma);
984263bc
MD
968}
969
970usbd_xfer_handle
971ohci_allocx(struct usbd_bus *bus)
972{
973 struct ohci_softc *sc = (struct ohci_softc *)bus;
974 usbd_xfer_handle xfer;
975
976 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
1550dfd9
MD
977 if (xfer != NULL) {
978 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
979#ifdef DIAGNOSTIC
980 if (xfer->busy_free != XFER_FREE) {
981 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
982 xfer->busy_free);
983 }
984#endif
985 } else {
efda3bd0 986 xfer = kmalloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
1550dfd9
MD
987 }
988 if (xfer != NULL) {
989 memset(xfer, 0, sizeof (struct ohci_xfer));
990#ifdef DIAGNOSTIC
991 xfer->busy_free = XFER_BUSY;
992#endif
993 }
984263bc
MD
994 return (xfer);
995}
996
997void
998ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
999{
1000 struct ohci_softc *sc = (struct ohci_softc *)bus;
1550dfd9
MD
1001 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
1002 ohci_soft_itd_t *sitd;
6082d606
MD
1003 ohci_soft_itd_t **scanp;
1004 struct ohci_pipe *opipe;
1005 ohci_soft_ed_t *sed;
1006 ohci_physaddr_t tdphys;
1007 int neednewtail;
1550dfd9
MD
1008
1009 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
6082d606
MD
1010 crit_enter();
1011 opipe = (struct ohci_pipe *)xfer->pipe;
1012 KKASSERT(opipe != NULL);
1013 sed = opipe->sed;
1014
1015 scanp = (ohci_soft_itd_t **)&xfer->hcpriv;
1016 neednewtail = 0;
1017 while ((sitd = *scanp) != NULL) {
1018 if (sitd->xfer != xfer)
1019 break;
1020 if (opipe->tail.itd == sitd)
1021 neednewtail = 1;
1022 *scanp = sitd->nextitd;
1023 sitd->nextitd = NULL;
1550dfd9 1024 ohci_free_sitd(sc, sitd);
6082d606
MD
1025 }
1026 if (neednewtail) {
1027 sitd = ohci_alloc_sitd(sc);
1028 if (sitd == NULL)
1029 panic("cant alloc isoc");
1030 opipe->tail.itd = sitd;
1031 tdphys = sitd->physaddr;
1032 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
1033 sed->ed.ed_headp =
1034 sed->ed.ed_tailp = htole32(tdphys);
1035 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
1036 }
1037 crit_exit();
1550dfd9 1038 }
984263bc 1039
1550dfd9
MD
1040#ifdef DIAGNOSTIC
1041 if (xfer->busy_free != XFER_BUSY) {
1042 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1043 xfer->busy_free);
1044 return;
1045 }
1046 xfer->busy_free = XFER_FREE;
1047#endif
984263bc
MD
1048 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1049}
1050
1051/*
1052 * Shut down the controller when the system is going down.
1053 */
984263bc
MD
1054void
1055ohci_shutdown(void *v)
1056{
1057 ohci_softc_t *sc = v;
1058
1059 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1060 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1061}
1062
1063/*
1064 * Handle suspend/resume.
1065 *
1066 * We need to switch to polling mode here, because this routine is
1067 * called from an intterupt context. This is all right since we
1068 * are almost suspended anyway.
1069 */
1070void
1071ohci_power(int why, void *v)
1072{
984263bc 1073 ohci_softc_t *sc = v;
1550dfd9 1074 u_int32_t ctl;
984263bc 1075
1550dfd9 1076#ifdef USB_DEBUG
984263bc 1077 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
984263bc
MD
1078 ohci_dumpregs(sc);
1079#endif
1550dfd9 1080
4e01b467 1081 crit_enter();
1550dfd9
MD
1082 if (why != PWR_RESUME) {
1083 sc->sc_bus.use_polling++;
1084 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1085 if (sc->sc_control == 0) {
1086 /*
1087 * Preserve register values, in case that APM BIOS
1088 * does not recover them.
1089 */
1090 sc->sc_control = ctl;
1091 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1092 }
1093 ctl |= OHCI_HCFS_SUSPEND;
1094 OWRITE4(sc, OHCI_CONTROL, ctl);
1095 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1096 sc->sc_bus.use_polling--;
1097 } else {
1098 sc->sc_bus.use_polling++;
1099
1100 /* Some broken BIOSes never initialize Controller chip */
1101 ohci_controller_init(sc);
1102
1103 if (sc->sc_intre)
1104 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1105 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1106 if (sc->sc_control)
1107 ctl = sc->sc_control;
1108 else
1109 ctl = OREAD4(sc, OHCI_CONTROL);
1110 ctl |= OHCI_HCFS_RESUME;
1111 OWRITE4(sc, OHCI_CONTROL, ctl);
1112 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1113 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1114 OWRITE4(sc, OHCI_CONTROL, ctl);
1115 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1116 sc->sc_control = sc->sc_intre = 0;
1117 sc->sc_bus.use_polling--;
3d583874
MD
1118 ohci_init_intrs(sc);
1119
1550dfd9 1120 }
4e01b467 1121 crit_exit();
984263bc 1122}
984263bc
MD
1123
1124#ifdef USB_DEBUG
1125void
1126ohci_dumpregs(ohci_softc_t *sc)
1127{
1128 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1129 OREAD4(sc, OHCI_REVISION),
1130 OREAD4(sc, OHCI_CONTROL),
1131 OREAD4(sc, OHCI_COMMAND_STATUS)));
1132 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1133 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1134 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1135 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1136 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1137 OREAD4(sc, OHCI_HCCA),
1138 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1139 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1140 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1141 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1142 OREAD4(sc, OHCI_BULK_HEAD_ED),
1143 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1144 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1145 OREAD4(sc, OHCI_DONE_HEAD),
1146 OREAD4(sc, OHCI_FM_INTERVAL),
1147 OREAD4(sc, OHCI_FM_REMAINING)));
1148 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1149 OREAD4(sc, OHCI_FM_NUMBER),
1150 OREAD4(sc, OHCI_PERIODIC_START),
1151 OREAD4(sc, OHCI_LS_THRESHOLD)));
1152 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1153 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1154 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1155 OREAD4(sc, OHCI_RH_STATUS)));
1156 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1157 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1158 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1159 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1550dfd9
MD
1160 le32toh(sc->sc_hcca->hcca_frame_number),
1161 le32toh(sc->sc_hcca->hcca_done_head)));
984263bc
MD
1162}
1163#endif
1164
1165Static int ohci_intr1(ohci_softc_t *);
1166
1167int
1168ohci_intr(void *p)
1169{
1170 ohci_softc_t *sc = p;
1171
1550dfd9
MD
1172 if (sc == NULL || sc->sc_dying)
1173 return (0);
1174
984263bc
MD
1175 /* If we get an interrupt while polling, then just ignore it. */
1176 if (sc->sc_bus.use_polling) {
1177#ifdef DIAGNOSTIC
c90ee8f8 1178 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
984263bc
MD
1179#endif
1180 return (0);
1181 }
1182
1550dfd9 1183 return (ohci_intr1(sc));
984263bc
MD
1184}
1185
1186Static int
1187ohci_intr1(ohci_softc_t *sc)
1188{
1189 u_int32_t intrs, eintrs;
1190 ohci_physaddr_t done;
1191
1550dfd9
MD
1192 DPRINTFN(14,("ohci_intr1: enter\n"));
1193
984263bc
MD
1194 /* In case the interrupt occurs before initialization has completed. */
1195 if (sc == NULL || sc->sc_hcca == NULL) {
1196#ifdef DIAGNOSTIC
1197 printf("ohci_intr: sc->sc_hcca == NULL\n");
1198#endif
1199 return (0);
1200 }
1201
1550dfd9
MD
1202 intrs = 0;
1203 done = le32toh(sc->sc_hcca->hcca_done_head);
984263bc
MD
1204
1205 /* The LSb of done is used to inform the HC Driver that an interrupt
1206 * condition exists for both the Done list and for another event
1207 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1208 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1209 * interrupt was caused by other than the HccaDoneHead update and the
1210 * HcInterruptStatus register needs to be accessed to determine that
1211 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1212 * update interrupt is indicated and if the LSb of done is nonzero,
1213 * then an additional interrupt event is indicated and
1214 * HcInterruptStatus should be checked to determine its cause.
1215 */
1216 if (done != 0) {
984263bc
MD
1217 if (done & ~OHCI_DONE_INTRS)
1218 intrs = OHCI_WDH;
1219 if (done & OHCI_DONE_INTRS) {
1220 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1221 done &= ~OHCI_DONE_INTRS;
1222 }
1550dfd9
MD
1223 sc->sc_hcca->hcca_done_head = 0;
1224 } else
1225 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
984263bc 1226
1550dfd9 1227 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
984263bc 1228 return (0);
984263bc 1229
1550dfd9
MD
1230 intrs &= ~OHCI_MIE;
1231 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
984263bc
MD
1232 eintrs = intrs & sc->sc_eintrs;
1233 if (!eintrs)
1234 return (0);
1235
1236 sc->sc_bus.intr_context++;
1237 sc->sc_bus.no_intrs++;
1550dfd9 1238 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
984263bc
MD
1239 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1240 (u_int)eintrs));
1241
1242 if (eintrs & OHCI_SO) {
1550dfd9
MD
1243 sc->sc_overrun_cnt++;
1244 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1245 printf("%s: %u scheduling overruns\n",
1246 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1247 sc->sc_overrun_cnt = 0;
1248 }
984263bc 1249 /* XXX do what */
1550dfd9 1250 eintrs &= ~OHCI_SO;
984263bc
MD
1251 }
1252 if (eintrs & OHCI_WDH) {
1550dfd9
MD
1253 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1254 usb_schedsoftintr(&sc->sc_bus);
1255 eintrs &= ~OHCI_WDH;
984263bc
MD
1256 }
1257 if (eintrs & OHCI_RD) {
1258 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1259 /* XXX process resume detect */
1260 }
1261 if (eintrs & OHCI_UE) {
1262 printf("%s: unrecoverable error, controller halted\n",
1263 USBDEVNAME(sc->sc_bus.bdev));
1264 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1265 /* XXX what else */
1266 }
1267 if (eintrs & OHCI_RHSC) {
1268 ohci_rhsc(sc, sc->sc_intrxfer);
1550dfd9 1269 /*
984263bc
MD
1270 * Disable RHSC interrupt for now, because it will be
1271 * on until the port has been reset.
1272 */
1273 ohci_rhsc_able(sc, 0);
1550dfd9
MD
1274 /* Do not allow RHSC interrupts > 1 per second */
1275 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1276 eintrs &= ~OHCI_RHSC;
984263bc
MD
1277 }
1278
1279 sc->sc_bus.intr_context--;
1280
1550dfd9
MD
1281 if (eintrs != 0) {
1282 /* Block unprocessed interrupts. XXX */
1283 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1284 sc->sc_eintrs &= ~eintrs;
1285 printf("%s: blocking intrs 0x%x\n",
1286 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1287 }
984263bc
MD
1288
1289 return (1);
1290}
1291
1292void
1293ohci_rhsc_able(ohci_softc_t *sc, int on)
1294{
1295 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1296 if (on) {
1297 sc->sc_eintrs |= OHCI_RHSC;
1298 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1299 } else {
1300 sc->sc_eintrs &= ~OHCI_RHSC;
1301 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1302 }
1303}
1304
1550dfd9
MD
1305void
1306ohci_rhsc_enable(void *v_sc)
1307{
1308 ohci_softc_t *sc = v_sc;
1550dfd9 1309
4e01b467 1310 crit_enter();
1550dfd9 1311 ohci_rhsc_able(sc, 1);
4e01b467 1312 crit_exit();
1550dfd9
MD
1313}
1314
984263bc
MD
1315#ifdef USB_DEBUG
1316char *ohci_cc_strs[] = {
1317 "NO_ERROR",
1318 "CRC",
1319 "BIT_STUFFING",
1320 "DATA_TOGGLE_MISMATCH",
1321 "STALL",
1322 "DEVICE_NOT_RESPONDING",
1323 "PID_CHECK_FAILURE",
1324 "UNEXPECTED_PID",
1325 "DATA_OVERRUN",
1326 "DATA_UNDERRUN",
1327 "BUFFER_OVERRUN",
1328 "BUFFER_UNDERRUN",
1329 "reserved",
1330 "reserved",
1331 "NOT_ACCESSED",
1332 "NOT_ACCESSED"
1333};
1334#endif
1335
1336void
1550dfd9
MD
1337ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1338{
1339 ohci_soft_itd_t *sitd, *sidone, **ip;
1340 ohci_soft_td_t *std, *sdone, **p;
1341
1342 /* Reverse the done list. */
1343 for (sdone = NULL, sidone = NULL; done != 0; ) {
1344 std = ohci_hash_find_td(sc, done);
1345 if (std != NULL) {
1346 std->dnext = sdone;
1347 done = le32toh(std->td.td_nexttd);
1348 sdone = std;
1349 DPRINTFN(10,("add TD %p\n", std));
1350 continue;
1351 }
1352 sitd = ohci_hash_find_itd(sc, done);
1353 if (sitd != NULL) {
1354 sitd->dnext = sidone;
1355 done = le32toh(sitd->itd.itd_nextitd);
1356 sidone = sitd;
1357 DPRINTFN(5,("add ITD %p\n", sitd));
1358 continue;
1359 }
1360 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1361 }
1362
1363 /* sdone & sidone now hold the done lists. */
1364 /* Put them on the already processed lists. */
1365 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1366 ;
1367 *p = sdone;
1368 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1369 ;
1370 *ip = sidone;
1371}
1372
1373void
1374ohci_softintr(void *v)
984263bc 1375{
1550dfd9
MD
1376 ohci_softc_t *sc = v;
1377 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1378 ohci_soft_td_t *std, *sdone, *stdnext;
984263bc 1379 usbd_xfer_handle xfer;
1550dfd9 1380 struct ohci_pipe *opipe;
4e01b467 1381 int len, cc;
984263bc 1382
1550dfd9 1383 DPRINTFN(10,("ohci_softintr: enter\n"));
984263bc 1384
1550dfd9 1385 sc->sc_bus.intr_context++;
984263bc 1386
4e01b467 1387 crit_enter();
1550dfd9
MD
1388 sdone = sc->sc_sdone;
1389 sc->sc_sdone = NULL;
1390 sidone = sc->sc_sidone;
1391 sc->sc_sidone = NULL;
4e01b467 1392 crit_exit();
1550dfd9
MD
1393
1394 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
984263bc
MD
1395
1396#ifdef USB_DEBUG
1397 if (ohcidebug > 10) {
1398 DPRINTF(("ohci_process_done: TD done:\n"));
1550dfd9 1399 ohci_dump_tds(sdone);
984263bc
MD
1400 }
1401#endif
1402
1403 for (std = sdone; std; std = stdnext) {
1404 xfer = std->xfer;
1405 stdnext = std->dnext;
1550dfd9
MD
1406 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1407 std, xfer, (xfer ? xfer->hcpriv : NULL)));
984263bc 1408 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1550dfd9
MD
1409 /*
1410 * xfer == NULL: There seems to be no xfer associated
984263bc
MD
1411 * with this TD. It is tailp that happened to end up on
1412 * the done queue.
1413 * flags & OHCI_TD_HANDLED: The TD has already been
1414 * handled by process_done and should not be done again.
1550dfd9 1415 * Shouldn't happen, but some chips are broken(?).
984263bc
MD
1416 */
1417 continue;
1418 }
984263bc
MD
1419 if (xfer->status == USBD_CANCELLED ||
1420 xfer->status == USBD_TIMEOUT) {
1550dfd9 1421 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
984263bc
MD
1422 xfer));
1423 /* Handled by abort routine. */
1550dfd9
MD
1424 continue;
1425 }
1426 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1427
1428 len = std->len;
1429 if (std->td.td_cbp != 0)
1430 len -= le32toh(std->td.td_be) -
1431 le32toh(std->td.td_cbp) + 1;
1432 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1433 std->flags));
1434 if (std->flags & OHCI_ADD_LEN)
1435 xfer->actlen += len;
1436
1437 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1438 if (cc == OHCI_CC_NO_ERROR) {
984263bc
MD
1439 if (std->flags & OHCI_CALL_DONE) {
1440 xfer->status = USBD_NORMAL_COMPLETION;
4e01b467 1441 crit_enter();
984263bc 1442 usb_transfer_complete(xfer);
4e01b467 1443 crit_exit();
984263bc
MD
1444 }
1445 ohci_free_std(sc, std);
1446 } else {
1447 /*
1448 * Endpoint is halted. First unlink all the TDs
1449 * belonging to the failed transfer, and then restart
1450 * the endpoint.
1451 */
1452 ohci_soft_td_t *p, *n;
1550dfd9
MD
1453 opipe = (struct ohci_pipe *)xfer->pipe;
1454
1455 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1456 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1457 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
984263bc 1458
984263bc
MD
1459
1460 /* Mark all the TDs in the done queue for the current
1461 * xfer as handled
1462 */
1463 for (p = stdnext; p; p = p->dnext) {
1464 if (p->xfer == xfer)
1465 p->flags |= OHCI_TD_HANDLED;
1466 }
1467
1550dfd9 1468 /* remove TDs */
984263bc
MD
1469 for (p = std; p->xfer == xfer; p = n) {
1470 n = p->nexttd;
1471 ohci_free_std(sc, p);
1472 }
984263bc 1473
1550dfd9
MD
1474 /* clear halt */
1475 opipe->sed->ed.ed_headp = htole32(p->physaddr);
984263bc
MD
1476 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1477
1478 if (cc == OHCI_CC_STALL)
1479 xfer->status = USBD_STALLED;
1480 else
1481 xfer->status = USBD_IOERROR;
4e01b467 1482 crit_enter();
1550dfd9 1483 usb_transfer_complete(xfer);
4e01b467 1484 crit_exit();
1550dfd9
MD
1485 }
1486 }
984263bc 1487
1550dfd9
MD
1488#ifdef USB_DEBUG
1489 if (ohcidebug > 10) {
1490 DPRINTF(("ohci_softintr: ITD done:\n"));
1491 ohci_dump_itds(sidone);
1492 }
1493#endif
1494
1495 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1496 xfer = sitd->xfer;
1497 sitdnext = sitd->dnext;
1498 sitd->flags |= OHCI_ITD_INTFIN;
1499 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1500 sitd, xfer, xfer ? xfer->hcpriv : 0));
1501 if (xfer == NULL)
1502 continue;
1503 if (xfer->status == USBD_CANCELLED ||
1504 xfer->status == USBD_TIMEOUT) {
1505 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1506 xfer));
1507 /* Handled by abort routine. */
1508 continue;
1509 }
1510 if (xfer->pipe)
1511 if (xfer->pipe->aborting)
1512 continue; /*Ignore.*/
1513#ifdef DIAGNOSTIC
1514 if (sitd->isdone)
1515 printf("ohci_softintr: sitd=%p is done\n", sitd);
1516 sitd->isdone = 1;
1517#endif
1518 opipe = (struct ohci_pipe *)xfer->pipe;
1519 if (opipe->aborting)
1520 continue;
1521
1522 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1523 if (cc == OHCI_CC_NO_ERROR) {
1524 /* XXX compute length for input */
1525 if (sitd->flags & OHCI_CALL_DONE) {
1526 opipe->u.iso.inuse -= xfer->nframes;
1527 /* XXX update frlengths with actual length */
1528 /* XXX xfer->actlen = actlen; */
1529 xfer->status = USBD_NORMAL_COMPLETION;
4e01b467 1530 crit_enter();
1550dfd9 1531 usb_transfer_complete(xfer);
4e01b467 1532 crit_exit();
1550dfd9
MD
1533 }
1534 } else {
1535 /* XXX Do more */
1536 xfer->status = USBD_IOERROR;
4e01b467 1537 crit_enter();
984263bc 1538 usb_transfer_complete(xfer);
4e01b467 1539 crit_exit();
984263bc
MD
1540 }
1541 }
1550dfd9
MD
1542
1543#ifdef USB_USE_SOFTINTR
1544 if (sc->sc_softwake) {
1545 sc->sc_softwake = 0;
1546 wakeup(&sc->sc_softwake);
1547 }
1548#endif /* USB_USE_SOFTINTR */
1549
1550 sc->sc_bus.intr_context--;
1551 DPRINTFN(10,("ohci_softintr: done:\n"));
984263bc
MD
1552}
1553
1554void
1555ohci_device_ctrl_done(usbd_xfer_handle xfer)
1556{
1550dfd9 1557 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
984263bc
MD
1558
1559#ifdef DIAGNOSTIC
1560 if (!(xfer->rqflags & URQ_REQUEST)) {
1550dfd9 1561 panic("ohci_device_ctrl_done: not a request");
984263bc
MD
1562 }
1563#endif
1564 xfer->hcpriv = NULL;
1565}
1566
1567void
1568ohci_device_intr_done(usbd_xfer_handle xfer)
1569{
1570 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1571 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1572 ohci_soft_ed_t *sed = opipe->sed;
1573 ohci_soft_td_t *data, *tail;
1574
1575
1550dfd9 1576 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
984263bc
MD
1577 xfer, xfer->actlen));
1578
1579 xfer->hcpriv = NULL;
1580
1581 if (xfer->pipe->repeat) {
1582 data = opipe->tail.td;
1583 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1584 if (tail == NULL) {
1585 xfer->status = USBD_NOMEM;
1586 return;
1587 }
1588 tail->xfer = NULL;
1550dfd9
MD
1589
1590 data->td.td_flags = htole32(
1591 OHCI_TD_IN | OHCI_TD_NOCC |
984263bc
MD
1592 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1593 if (xfer->flags & USBD_SHORT_XFER_OK)
1550dfd9
MD
1594 data->td.td_flags |= htole32(OHCI_TD_R);
1595 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
984263bc 1596 data->nexttd = tail;
1550dfd9
MD
1597 data->td.td_nexttd = htole32(tail->physaddr);
1598 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1599 xfer->length - 1);
984263bc
MD
1600 data->len = xfer->length;
1601 data->xfer = xfer;
1602 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1603 xfer->hcpriv = data;
1604 xfer->actlen = 0;
1605
1550dfd9 1606 sed->ed.ed_tailp = htole32(tail->physaddr);
984263bc
MD
1607 opipe->tail.td = tail;
1608 }
1609}
1610
1611void
1612ohci_device_bulk_done(usbd_xfer_handle xfer)
1613{
1550dfd9 1614 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
984263bc
MD
1615 xfer, xfer->actlen));
1616
1617 xfer->hcpriv = NULL;
1618}
1619
1620void
1621ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1622{
1623 usbd_pipe_handle pipe;
984263bc
MD
1624 u_char *p;
1625 int i, m;
1626 int hstatus;
1627
1628 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1550dfd9 1629 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
984263bc
MD
1630 sc, xfer, hstatus));
1631
1632 if (xfer == NULL) {
1633 /* Just ignore the change. */
1634 return;
1635 }
1636
1637 pipe = xfer->pipe;
984263bc
MD
1638
1639 p = KERNADDR(&xfer->dmabuf, 0);
1640 m = min(sc->sc_noport, xfer->length * 8 - 1);
1641 memset(p, 0, xfer->length);
1642 for (i = 1; i <= m; i++) {
1550dfd9 1643 /* Pick out CHANGE bits from the status reg. */
984263bc
MD
1644 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1645 p[i/8] |= 1 << (i%8);
1646 }
1647 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1648 xfer->actlen = xfer->length;
1649 xfer->status = USBD_NORMAL_COMPLETION;
1650
1651 usb_transfer_complete(xfer);
1652}
1653
1654void
1655ohci_root_intr_done(usbd_xfer_handle xfer)
1656{
1657 xfer->hcpriv = NULL;
1658}
1659
1550dfd9
MD
1660void
1661ohci_root_ctrl_done(usbd_xfer_handle xfer)
1662{
1663 xfer->hcpriv = NULL;
1664}
1665
984263bc
MD
1666/*
1667 * Wait here until controller claims to have an interrupt.
1668 * Then call ohci_intr and return. Use timeout to avoid waiting
1669 * too long.
1670 */
1671void
1672ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1673{
1674 int timo = xfer->timeout;
1675 int usecs;
1676 u_int32_t intrs;
1677
1678 xfer->status = USBD_IN_PROGRESS;
1679 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1680 usb_delay_ms(&sc->sc_bus, 1);
1550dfd9
MD
1681 if (sc->sc_dying)
1682 break;
984263bc
MD
1683 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1684 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1685#ifdef USB_DEBUG
1686 if (ohcidebug > 15)
1687 ohci_dumpregs(sc);
1688#endif
1689 if (intrs) {
1690 ohci_intr1(sc);
1691 if (xfer->status != USBD_IN_PROGRESS)
1692 return;
1693 }
1694 }
1695
1696 /* Timeout */
1697 DPRINTF(("ohci_waitintr: timeout\n"));
984263bc
MD
1698 xfer->status = USBD_TIMEOUT;
1699 usb_transfer_complete(xfer);
1700 /* XXX should free TD */
1701}
1702
1703void
1704ohci_poll(struct usbd_bus *bus)
1705{
1706 ohci_softc_t *sc = (ohci_softc_t *)bus;
1550dfd9
MD
1707#ifdef USB_DEBUG
1708 static int last;
1709 int new;
1710 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1711 if (new != last) {
1712 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1713 last = new;
1714 }
1715#endif
984263bc
MD
1716
1717 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1718 ohci_intr1(sc);
1719}
1720
1721usbd_status
1722ohci_device_request(usbd_xfer_handle xfer)
1723{
1724 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1725 usb_device_request_t *req = &xfer->request;
1726 usbd_device_handle dev = opipe->pipe.device;
1727 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1728 int addr = dev->address;
1550dfd9 1729 ohci_soft_td_t *setup, *stat, *next, *tail;
984263bc
MD
1730 ohci_soft_ed_t *sed;
1731 int isread;
1732 int len;
1733 usbd_status err;
984263bc
MD
1734
1735 isread = req->bmRequestType & UT_READ;
1736 len = UGETW(req->wLength);
1737
1738 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1739 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1740 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1550dfd9 1741 UGETW(req->wIndex), len, addr,
984263bc
MD
1742 opipe->pipe.endpoint->edesc->bEndpointAddress));
1743
1744 setup = opipe->tail.td;
1745 stat = ohci_alloc_std(sc);
1746 if (stat == NULL) {
1747 err = USBD_NOMEM;
1748 goto bad1;
1749 }
1750 tail = ohci_alloc_std(sc);
1751 if (tail == NULL) {
1752 err = USBD_NOMEM;
1753 goto bad2;
1754 }
1755 tail->xfer = NULL;
1756
1757 sed = opipe->sed;
1758 opipe->u.ctl.length = len;
1759
c90ee8f8
MD
1760 /* Update device address and length since they may have changed
1761 during the setup of the control pipe in usbd_new_device(). */
984263bc 1762 /* XXX This only needs to be done once, but it's too early in open. */
1550dfd9
MD
1763 /* XXXX Should not touch ED here! */
1764 sed->ed.ed_flags = htole32(
1765 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
984263bc
MD
1766 OHCI_ED_SET_FA(addr) |
1767 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1768
1550dfd9
MD
1769 next = stat;
1770
984263bc
MD
1771 /* Set up data transaction */
1772 if (len != 0) {
1550dfd9 1773 ohci_soft_td_t *std = stat;
984263bc 1774
1550dfd9
MD
1775 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1776 std, &stat);
1777 stat = stat->nexttd; /* point at free TD */
1778 if (err)
1779 goto bad3;
1780 /* Start toggle at 1 and then use the carried toggle. */
1781 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1782 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
984263bc
MD
1783 }
1784
1785 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1786
1550dfd9
MD
1787 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1788 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1789 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
984263bc 1790 setup->nexttd = next;
1550dfd9
MD
1791 setup->td.td_nexttd = htole32(next->physaddr);
1792 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1793 setup->len = 0;
984263bc
MD
1794 setup->xfer = xfer;
1795 setup->flags = 0;
1796 xfer->hcpriv = setup;
1797
1550dfd9
MD
1798 stat->td.td_flags = htole32(
1799 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1800 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
984263bc
MD
1801 stat->td.td_cbp = 0;
1802 stat->nexttd = tail;
1550dfd9 1803 stat->td.td_nexttd = htole32(tail->physaddr);
984263bc 1804 stat->td.td_be = 0;
1550dfd9 1805 stat->flags = OHCI_CALL_DONE;
984263bc
MD
1806 stat->len = 0;
1807 stat->xfer = xfer;
1808
1809#ifdef USB_DEBUG
1810 if (ohcidebug > 5) {
1811 DPRINTF(("ohci_device_request:\n"));
1812 ohci_dump_ed(sed);
1813 ohci_dump_tds(setup);
1814 }
1815#endif
1816
1817 /* Insert ED in schedule */
4e01b467 1818 crit_enter();
1550dfd9 1819 sed->ed.ed_tailp = htole32(tail->physaddr);
984263bc
MD
1820 opipe->tail.td = tail;
1821 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1822 if (xfer->timeout && !sc->sc_bus.use_polling) {
1550dfd9
MD
1823 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1824 ohci_timeout, xfer);
984263bc 1825 }
4e01b467 1826 crit_exit();
984263bc
MD
1827
1828#ifdef USB_DEBUG
1550dfd9
MD
1829 if (ohcidebug > 20) {
1830 delay(10000);
984263bc
MD
1831 DPRINTF(("ohci_device_request: status=%x\n",
1832 OREAD4(sc, OHCI_COMMAND_STATUS)));
1550dfd9
MD
1833 ohci_dumpregs(sc);
1834 printf("ctrl head:\n");
1835 ohci_dump_ed(sc->sc_ctrl_head);
1836 printf("sed:\n");
984263bc
MD
1837 ohci_dump_ed(sed);
1838 ohci_dump_tds(setup);
1839 }
1840#endif
1841
1842 return (USBD_NORMAL_COMPLETION);
1843
1844 bad3:
1845 ohci_free_std(sc, tail);
1846 bad2:
1847 ohci_free_std(sc, stat);
1848 bad1:
1849 return (err);
1850}
1851
1852/*
4e01b467 1853 * Add an ED to the schedule. Called from a critical section.
984263bc
MD
1854 */
1855void
1856ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1857{
1550dfd9
MD
1858 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1859
984263bc
MD
1860 sed->next = head->next;
1861 sed->ed.ed_nexted = head->ed.ed_nexted;
1862 head->next = sed;
1550dfd9 1863 head->ed.ed_nexted = htole32(sed->physaddr);
984263bc
MD
1864}
1865
1866/*
4e01b467 1867 * Remove an ED from the schedule. Called from a critical section.
984263bc
MD
1868 */
1869void
1870ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1871{
1550dfd9 1872 ohci_soft_ed_t *p;
984263bc 1873
984263bc
MD
1874
1875 /* XXX */
1550dfd9 1876 for (p = head; p != NULL && p->next != sed; p = p->next)
984263bc
MD
1877 ;
1878 if (p == NULL)
1550dfd9 1879 panic("ohci_rem_ed: ED not found");
984263bc
MD
1880 p->next = sed->next;
1881 p->ed.ed_nexted = sed->ed.ed_nexted;
1882}
1883
1884/*
1885 * When a transfer is completed the TD is added to the done queue by
1886 * the host controller. This queue is the processed by software.
1887 * Unfortunately the queue contains the physical address of the TD
1888 * and we have no simple way to translate this back to a kernel address.
1889 * To make the translation possible (and fast) we use a hash table of
1890 * TDs currently in the schedule. The physical address is used as the
1891 * hash value.
1892 */
1893
1894#define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
4e01b467
MD
1895/*
1896 * Called from a critical section
1897 */
984263bc
MD
1898void
1899ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1900{
1901 int h = HASH(std->physaddr);
1902
984263bc
MD
1903 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1904}
1905
4e01b467
MD
1906/*
1907 * Called from a critical section
1908 */
984263bc
MD
1909void
1910ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1911{
984263bc
MD
1912 LIST_REMOVE(std, hnext);
1913}
1914
1915ohci_soft_td_t *
1916ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1917{
1918 int h = HASH(a);
1919 ohci_soft_td_t *std;
1920
1921 /* if these are present they should be masked out at an earlier
1922 * stage.
1923 */
1550dfd9 1924 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
984263bc
MD
1925 USBDEVNAME(sc->sc_bus.bdev),
1926 (int) a, "\20\1HALT\2TOGGLE"));
1927
1550dfd9 1928 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
984263bc
MD
1929 std != NULL;
1930 std = LIST_NEXT(std, hnext))
1931 if (std->physaddr == a)
1932 return (std);
1933
1934 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1935 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1550dfd9
MD
1936 return (NULL);
1937}
1938
4e01b467
MD
1939/*
1940 * Called from a critical section
1941 */
1550dfd9
MD
1942void
1943ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1944{
1945 int h = HASH(sitd->physaddr);
1946
1550dfd9
MD
1947 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1948 sitd, (u_long)sitd->physaddr));
1949
1950 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1951}
1952
4e01b467
MD
1953/*
1954 * Called from a critical section
1955 */
1550dfd9
MD
1956void
1957ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1958{
1550dfd9
MD
1959 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1960 sitd, (u_long)sitd->physaddr));
1961
1962 LIST_REMOVE(sitd, hnext);
1963}
1964
1965ohci_soft_itd_t *
1966ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1967{
1968 int h = HASH(a);
1969 ohci_soft_itd_t *sitd;
1970
1971 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1972 sitd != NULL;
1973 sitd = LIST_NEXT(sitd, hnext))
1974 if (sitd->physaddr == a)
1975 return (sitd);
1976 return (NULL);
984263bc
MD
1977}
1978
1979void
1980ohci_timeout(void *addr)
1550dfd9
MD
1981{
1982 struct ohci_xfer *oxfer = addr;
1983 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1984 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1985
1986 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1987
1988 if (sc->sc_dying) {
1989 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1990 return;
1991 }
1992
1993 /* Execute the abort in a process context. */
1994 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1995 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1996}
1997
1998void
1999ohci_timeout_task(void *addr)
984263bc
MD
2000{
2001 usbd_xfer_handle xfer = addr;
984263bc 2002
1550dfd9 2003 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
984263bc 2004
4e01b467 2005 crit_enter();
984263bc 2006 ohci_abort_xfer(xfer, USBD_TIMEOUT);
4e01b467 2007 crit_exit();
984263bc
MD
2008}
2009
2010#ifdef USB_DEBUG
2011void
2012ohci_dump_tds(ohci_soft_td_t *std)
2013{
2014 for (; std; std = std->nexttd)
2015 ohci_dump_td(std);
2016}
2017
2018void
2019ohci_dump_td(ohci_soft_td_t *std)
2020{
1550dfd9
MD
2021 char sbuf[128];
2022
2023 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
2024 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2025 sbuf, sizeof(sbuf));
2026
2027 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2028 "nexttd=0x%08lx be=0x%08lx\n",
2029 std, (u_long)std->physaddr, sbuf,
2030 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2031 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2032 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2033 (u_long)le32toh(std->td.td_cbp),
2034 (u_long)le32toh(std->td.td_nexttd),
2035 (u_long)le32toh(std->td.td_be));
2036}
2037
2038void
2039ohci_dump_itd(ohci_soft_itd_t *sitd)
2040{
2041 int i;
2042
2043 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2044 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2045 sitd, (u_long)sitd->physaddr,
2046 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2047 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2048 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2049 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2050 (u_long)le32toh(sitd->itd.itd_bp0),
2051 (u_long)le32toh(sitd->itd.itd_nextitd),
2052 (u_long)le32toh(sitd->itd.itd_be));
2053 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2054 printf("offs[%d]=0x%04x ", i,
2055 (u_int)le16toh(sitd->itd.itd_offset[i]));
2056 printf("\n");
2057}
2058
2059void
2060ohci_dump_itds(ohci_soft_itd_t *sitd)
2061{
2062 for (; sitd; sitd = sitd->nextitd)
2063 ohci_dump_itd(sitd);
984263bc
MD
2064}
2065
2066void
2067ohci_dump_ed(ohci_soft_ed_t *sed)
2068{
1550dfd9
MD
2069 char sbuf[128], sbuf2[128];
2070
2071 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2072 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2073 sbuf, sizeof(sbuf));
2074 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2075 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2076
2077 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2078 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2079 sed, (u_long)sed->physaddr,
2080 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2081 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2082 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2083 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2084 (u_long)le32toh(sed->ed.ed_headp),
2085 (u_long)le32toh(sed->ed.ed_nexted));
984263bc
MD
2086}
2087#endif
2088
2089usbd_status
2090ohci_open(usbd_pipe_handle pipe)
2091{
2092 usbd_device_handle dev = pipe->device;
2093 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2094 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2095 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2096 u_int8_t addr = dev->address;
2097 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2098 ohci_soft_ed_t *sed;
1550dfd9 2099 ohci_soft_td_t *std;
984263bc
MD
2100 ohci_soft_itd_t *sitd;
2101 ohci_physaddr_t tdphys;
2102 u_int32_t fmt;
2103 usbd_status err;
984263bc
MD
2104 int ival;
2105
2106 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2107 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1550dfd9
MD
2108
2109 if (sc->sc_dying)
2110 return (USBD_IOERROR);
2111
2112 std = NULL;
2113 sed = NULL;
2114
984263bc
MD
2115 if (addr == sc->sc_addr) {
2116 switch (ed->bEndpointAddress) {
2117 case USB_CONTROL_ENDPOINT:
2118 pipe->methods = &ohci_root_ctrl_methods;
2119 break;
2120 case UE_DIR_IN | OHCI_INTR_ENDPT:
2121 pipe->methods = &ohci_root_intr_methods;
2122 break;
2123 default:
2124 return (USBD_INVAL);
2125 }
2126 } else {
2127 sed = ohci_alloc_sed(sc);
2128 if (sed == NULL)
2129 goto bad0;
2130 opipe->sed = sed;
2131 if (xfertype == UE_ISOCHRONOUS) {
2132 sitd = ohci_alloc_sitd(sc);
1550dfd9 2133 if (sitd == NULL)
984263bc 2134 goto bad1;
984263bc 2135 opipe->tail.itd = sitd;
1550dfd9
MD
2136 opipe->aborting = 0;
2137 tdphys = sitd->physaddr;
984263bc 2138 fmt = OHCI_ED_FORMAT_ISO;
1550dfd9
MD
2139 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2140 fmt |= OHCI_ED_DIR_IN;
2141 else
2142 fmt |= OHCI_ED_DIR_OUT;
984263bc
MD
2143 } else {
2144 std = ohci_alloc_std(sc);
1550dfd9 2145 if (std == NULL)
984263bc 2146 goto bad1;
984263bc 2147 opipe->tail.td = std;
1550dfd9
MD
2148 tdphys = std->physaddr;
2149 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
984263bc 2150 }
1550dfd9
MD
2151 sed->ed.ed_flags = htole32(
2152 OHCI_ED_SET_FA(addr) |
c90ee8f8 2153 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
1550dfd9
MD
2154 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2155 fmt |
984263bc 2156 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1550dfd9 2157 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
984263bc
MD
2158
2159 switch (xfertype) {
2160 case UE_CONTROL:
2161 pipe->methods = &ohci_device_ctrl_methods;
1550dfd9
MD
2162 err = usb_allocmem(&sc->sc_bus,
2163 sizeof(usb_device_request_t),
984263bc
MD
2164 0, &opipe->u.ctl.reqdma);
2165 if (err)
2166 goto bad;
4e01b467 2167 crit_enter();
984263bc 2168 ohci_add_ed(sed, sc->sc_ctrl_head);
4e01b467 2169 crit_exit();
984263bc
MD
2170 break;
2171 case UE_INTERRUPT:
2172 pipe->methods = &ohci_device_intr_methods;
2173 ival = pipe->interval;
2174 if (ival == USBD_DEFAULT_INTERVAL)
2175 ival = ed->bInterval;
2176 return (ohci_device_setintr(sc, opipe, ival));
2177 case UE_ISOCHRONOUS:
2178 pipe->methods = &ohci_device_isoc_methods;
2179 return (ohci_setup_isoc(pipe));
2180 case UE_BULK:
2181 pipe->methods = &ohci_device_bulk_methods;
4e01b467 2182 crit_enter();
984263bc 2183 ohci_add_ed(sed, sc->sc_bulk_head);
4e01b467 2184 crit_exit();
984263bc
MD
2185 break;
2186 }
2187 }
2188 return (USBD_NORMAL_COMPLETION);
2189
2190 bad:
1550dfd9
MD
2191 if (std != NULL)
2192 ohci_free_std(sc, std);
984263bc 2193 bad1:
1550dfd9
MD
2194 if (sed != NULL)
2195 ohci_free_sed(sc, sed);
984263bc
MD
2196 bad0:
2197 return (USBD_NOMEM);
1550dfd9 2198
984263bc
MD
2199}
2200
2201/*
2202 * Close a reqular pipe.
2203 * Assumes that there are no pending transactions.
2204 */
2205void
2206ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2207{
2208 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2209 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2210 ohci_soft_ed_t *sed = opipe->sed;
984263bc 2211
4e01b467 2212 crit_enter();
984263bc 2213#ifdef DIAGNOSTIC
1550dfd9
MD
2214 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2215 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2216 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
984263bc 2217 ohci_soft_td_t *std;
1550dfd9 2218 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
984263bc
MD
2219 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2220 "tl=0x%x pipe=%p, std=%p\n", sed,
1550dfd9
MD
2221 (int)le32toh(sed->ed.ed_headp),
2222 (int)le32toh(sed->ed.ed_tailp),
984263bc 2223 pipe, std);
1550dfd9
MD
2224#ifdef USB_DEBUG
2225 usbd_dump_pipe(&opipe->pipe);
2226#endif
2227#ifdef USB_DEBUG
2228 ohci_dump_ed(sed);
2229 if (std)
2230 ohci_dump_td(std);
2231#endif
984263bc 2232 usb_delay_ms(&sc->sc_bus, 2);
1550dfd9
MD
2233 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2234 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
984263bc
MD
2235 printf("ohci_close_pipe: pipe still not empty\n");
2236 }
2237#endif
2238 ohci_rem_ed(sed, head);
1550dfd9
MD
2239 /* Make sure the host controller is not touching this ED */
2240 usb_delay_ms(&sc->sc_bus, 1);
4e01b467 2241 crit_exit();
984263bc
MD
2242 ohci_free_sed(sc, opipe->sed);
2243}
2244
1550dfd9 2245/*
984263bc 2246 * Abort a device request.
4e01b467
MD
2247 * If this routine is called from a critical section it guarantees that
2248 * the request will be removed from the hardware scheduling and that
2249 * the callback for it will be called with USBD_CANCELLED status.
984263bc
MD
2250 * It's impossible to guarantee that the requested transfer will not
2251 * have happened since the hardware runs concurrently.
2252 * If the transaction has already happened we rely on the ordinary
2253 * interrupt processing to process it.
2254 */
2255void
2256ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2257{
2258 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1550dfd9
MD
2259 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2260 ohci_soft_ed_t *sed = opipe->sed;
2261 ohci_soft_td_t *p, *n;
2262 ohci_physaddr_t headp;
4e01b467 2263 int hit;
984263bc 2264
1550dfd9 2265 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
984263bc 2266
1550dfd9
MD
2267 if (sc->sc_dying) {
2268 /* If we're dying, just do the software part. */
4e01b467 2269 crit_enter();
1550dfd9
MD
2270 xfer->status = status; /* make software ignore it */
2271 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2272 usb_transfer_complete(xfer);
4e01b467 2273 crit_exit();
6000a600 2274 return;
1550dfd9 2275 }
984263bc 2276
1550dfd9
MD
2277 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2278 panic("ohci_abort_xfer: not in process context");
984263bc 2279
1550dfd9
MD
2280 /*
2281 * Step 1: Make interrupt routine and hardware ignore xfer.
2282 */
4e01b467 2283 crit_enter();
1550dfd9
MD
2284 xfer->status = status; /* make software ignore it */
2285 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
4e01b467 2286 crit_exit();
984263bc 2287 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
1550dfd9 2288 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
984263bc 2289
1550dfd9
MD
2290 /*
2291 * Step 2: Wait until we know hardware has finished any possible
2292 * use of the xfer. Also make sure the soft interrupt routine
2293 * has run.
2294 */
2295 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
4e01b467 2296 crit_enter();
1550dfd9
MD
2297#ifdef USB_USE_SOFTINTR
2298 sc->sc_softwake = 1;
2299#endif /* USB_USE_SOFTINTR */
2300 usb_schedsoftintr(&sc->sc_bus);
2301#ifdef USB_USE_SOFTINTR
518fcd30 2302 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
1550dfd9 2303#endif /* USB_USE_SOFTINTR */
4e01b467 2304 crit_exit();
984263bc 2305
1550dfd9
MD
2306 /*
2307 * Step 3: Remove any vestiges of the xfer from the hardware.
2308 * The complication here is that the hardware may have executed
2309 * beyond the xfer we're trying to abort. So as we're scanning
2310 * the TDs of this xfer we check if the hardware points to
2311 * any of them.
2312 */
4e01b467 2313 crit_enter();
984263bc
MD
2314 p = xfer->hcpriv;
2315#ifdef DIAGNOSTIC
2316 if (p == NULL) {
4e01b467 2317 crit_exit();
1550dfd9 2318 printf("ohci_abort_xfer: hcpriv is NULL\n");
984263bc
MD
2319 return;
2320 }
2321#endif
1550dfd9
MD
2322#ifdef USB_DEBUG
2323 if (ohcidebug > 1) {
2324 DPRINTF(("ohci_abort_xfer: sed=\n"));
2325 ohci_dump_ed(sed);
2326 ohci_dump_tds(p);
2327 }
2328#endif
2329 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2330 hit = 0;
984263bc 2331 for (; p->xfer == xfer; p = n) {
1550dfd9 2332 hit |= headp == p->physaddr;
984263bc
MD
2333 n = p->nexttd;
2334 ohci_free_std(sc, p);
2335 }
1550dfd9
MD
2336 /* Zap headp register if hardware pointed inside the xfer. */
2337 if (hit) {
c90ee8f8 2338 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
1550dfd9
MD
2339 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2340 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2341 } else {
2342 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2343 }
984263bc 2344
1550dfd9
MD
2345 /*
2346 * Step 4: Turn on hardware again.
2347 */
2348 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
984263bc 2349
1550dfd9
MD
2350 /*
2351 * Step 5: Execute callback.
2352 */
984263bc
MD
2353 usb_transfer_complete(xfer);
2354
4e01b467 2355 crit_exit();
984263bc
MD
2356}
2357
2358/*
2359 * Data structures and routines to emulate the root hub.
2360 */
2361Static usb_device_descriptor_t ohci_devd = {
2362 USB_DEVICE_DESCRIPTOR_SIZE,
2363 UDESC_DEVICE, /* type */
2364 {0x00, 0x01}, /* USB version */
2365 UDCLASS_HUB, /* class */
2366 UDSUBCLASS_HUB, /* subclass */
2367 UDPROTO_FSHUB, /* protocol */
2368 64, /* max packet */
2369 {0},{0},{0x00,0x01}, /* device id */
2370 1,2,0, /* string indicies */
2371 1 /* # of configurations */
2372};
2373
2374Static usb_config_descriptor_t ohci_confd = {
2375 USB_CONFIG_DESCRIPTOR_SIZE,
2376 UDESC_CONFIG,
2377 {USB_CONFIG_DESCRIPTOR_SIZE +
2378 USB_INTERFACE_DESCRIPTOR_SIZE +
2379 USB_ENDPOINT_DESCRIPTOR_SIZE},
2380 1,
2381 1,
2382 0,
2383 UC_SELF_POWERED,
2384 0 /* max power */
2385};
2386
2387Static usb_interface_descriptor_t ohci_ifcd = {
2388 USB_INTERFACE_DESCRIPTOR_SIZE,
2389 UDESC_INTERFACE,
2390 0,
2391 0,
2392 1,
2393 UICLASS_HUB,
2394 UISUBCLASS_HUB,
2395 UIPROTO_FSHUB,
2396 0
2397};
2398
2399Static usb_endpoint_descriptor_t ohci_endpd = {
2400 USB_ENDPOINT_DESCRIPTOR_SIZE,
2401 UDESC_ENDPOINT,
2402 UE_DIR_IN | OHCI_INTR_ENDPT,
2403 UE_INTERRUPT,
2404 {8, 0}, /* max packet */
2405 255
2406};
2407
2408Static usb_hub_descriptor_t ohci_hubd = {
2409 USB_HUB_DESCRIPTOR_SIZE,
2410 UDESC_HUB,
2411 0,
2412 {0,0},
2413 0,
2414 0,
2415 {0},
2416};
2417
2418Static int
1550dfd9 2419ohci_str(usb_string_descriptor_t *p, int l, const char *s)
984263bc
MD
2420{
2421 int i;
2422
2423 if (l == 0)
2424 return (0);
2425 p->bLength = 2 * strlen(s) + 2;
2426 if (l == 1)
2427 return (1);
2428 p->bDescriptorType = UDESC_STRING;
2429 l -= 2;
2430 for (i = 0; s[i] && l > 1; i++, l -= 2)
2431 USETW2(p->bString[i], 0, s[i]);
2432 return (2*i+2);
2433}
2434
2435/*
2436 * Simulate a hardware hub by handling all the necessary requests.
2437 */
2438Static usbd_status
2439ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2440{
2441 usbd_status err;
2442
2443 /* Insert last in queue. */
2444 err = usb_insert_transfer(xfer);
2445 if (err)
2446 return (err);
2447
2448 /* Pipe isn't running, start first */
2449 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2450}
2451
2452Static usbd_status
2453ohci_root_ctrl_start(usbd_xfer_handle xfer)
2454{
2455 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2456 usb_device_request_t *req;
2457 void *buf = NULL;
2458 int port, i;
4e01b467 2459 int len, value, index, l, totlen = 0;
984263bc
MD
2460 usb_port_status_t ps;
2461 usb_hub_descriptor_t hubd;
2462 usbd_status err;
2463 u_int32_t v;
2464
1550dfd9
MD
2465 if (sc->sc_dying)
2466 return (USBD_IOERROR);
2467
984263bc
MD
2468#ifdef DIAGNOSTIC
2469 if (!(xfer->rqflags & URQ_REQUEST))
2470 /* XXX panic */
2471 return (USBD_INVAL);
2472#endif
2473 req = &xfer->request;
2474
1550dfd9 2475 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
984263bc
MD
2476 req->bmRequestType, req->bRequest));
2477
2478 len = UGETW(req->wLength);
2479 value = UGETW(req->wValue);
2480 index = UGETW(req->wIndex);
2481
2482 if (len != 0)
2483 buf = KERNADDR(&xfer->dmabuf, 0);
2484
2485#define C(x,y) ((x) | ((y) << 8))
2486 switch(C(req->bRequest, req->bmRequestType)) {
2487 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2488 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2489 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1550dfd9 2490 /*
984263bc
MD
2491 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2492 * for the integrated root hub.
2493 */
2494 break;
2495 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2496 if (len > 0) {
2497 *(u_int8_t *)buf = sc->sc_conf;
2498 totlen = 1;
2499 }
2500 break;
2501 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2502 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2503 switch(value >> 8) {
2504 case UDESC_DEVICE:
2505 if ((value & 0xff) != 0) {
2506 err = USBD_IOERROR;
2507 goto ret;
2508 }
2509 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2510 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2511 memcpy(buf, &ohci_devd, l);
2512 break;
2513 case UDESC_CONFIG:
2514 if ((value & 0xff) != 0) {
2515 err = USBD_IOERROR;
2516 goto ret;
2517 }
2518 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2519 memcpy(buf, &ohci_confd, l);
2520 buf = (char *)buf + l;
2521 len -= l;
2522 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2523 totlen += l;
2524 memcpy(buf, &ohci_ifcd, l);
2525 buf = (char *)buf + l;
2526 len -= l;
2527 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2528 totlen += l;
2529 memcpy(buf, &ohci_endpd, l);
2530 break;
2531 case UDESC_STRING:
2532 if (len == 0)
2533 break;
2534 *(u_int8_t *)buf = 0;
2535 totlen = 1;
2536 switch (value & 0xff) {
2537 case 1: /* Vendor */
2538 totlen = ohci_str(buf, len, sc->sc_vendor);
2539 break;
2540 case 2: /* Product */
2541 totlen = ohci_str(buf, len, "OHCI root hub");
2542 break;
2543 }
2544 break;
2545 default:
2546 err = USBD_IOERROR;
2547 goto ret;
2548 }
2549 break;
2550 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2551 if (len > 0) {
2552 *(u_int8_t *)buf = 0;
2553 totlen = 1;
2554 }
2555 break;
2556 case C(UR_GET_STATUS, UT_READ_DEVICE):
2557 if (len > 1) {
2558 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2559 totlen = 2;
2560 }
2561 break;
2562 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2563 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2564 if (len > 1) {
2565 USETW(((usb_status_t *)buf)->wStatus, 0);
2566 totlen = 2;
2567 }
2568 break;
2569 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2570 if (value >= USB_MAX_DEVICES) {
2571 err = USBD_IOERROR;
2572 goto ret;
2573 }
2574 sc->sc_addr = value;
2575 break;
2576 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2577 if (value != 0 && value != 1) {
2578 err = USBD_IOERROR;
2579 goto ret;
2580 }
2581 sc->sc_conf = value;
2582 break;
2583 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2584 break;
2585 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2586 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2587 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2588 err = USBD_IOERROR;
2589 goto ret;
2590 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2591 break;
2592 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2593 break;
2594 /* Hub requests */
2595 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2596 break;
2597 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2598 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2599 "port=%d feature=%d\n",
2600 index, value));
2601 if (index < 1 || index > sc->sc_noport) {
2602 err = USBD_IOERROR;
2603 goto ret;
2604 }
2605 port = OHCI_RH_PORT_STATUS(index);
2606 switch(value) {
2607 case UHF_PORT_ENABLE:
2608 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2609 break;
2610 case UHF_PORT_SUSPEND:
2611 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2612 break;
2613 case UHF_PORT_POWER:
1550dfd9 2614 /* Yes, writing to the LOW_SPEED bit clears power. */
984263bc
MD
2615 OWRITE4(sc, port, UPS_LOW_SPEED);
2616 break;
2617 case UHF_C_PORT_CONNECTION:
2618 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2619 break;
2620 case UHF_C_PORT_ENABLE:
2621 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2622 break;
2623 case UHF_C_PORT_SUSPEND:
2624 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2625 break;
2626 case UHF_C_PORT_OVER_CURRENT:
2627 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2628 break;
2629 case UHF_C_PORT_RESET:
2630 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2631 break;
2632 default:
2633 err = USBD_IOERROR;
2634 goto ret;
2635 }
2636 switch(value) {
2637 case UHF_C_PORT_CONNECTION:
2638 case UHF_C_PORT_ENABLE:
2639 case UHF_C_PORT_SUSPEND:
2640 case UHF_C_PORT_OVER_CURRENT:
2641 case UHF_C_PORT_RESET:
2642 /* Enable RHSC interrupt if condition is cleared. */
2643 if ((OREAD4(sc, port) >> 16) == 0)
2644 ohci_rhsc_able(sc, 1);
2645 break;
2646 default:
2647 break;
2648 }
2649 break;
2650 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
c90ee8f8 2651 if ((value & 0xff) != 0) {
984263bc
MD
2652 err = USBD_IOERROR;
2653 goto ret;
2654 }
2655 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2656 hubd = ohci_hubd;
2657 hubd.bNbrPorts = sc->sc_noport;
2658 USETW(hubd.wHubCharacteristics,
1550dfd9 2659 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
984263bc
MD
2660 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2661 /* XXX overcurrent */
2662 );
2663 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2664 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1550dfd9 2665 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
984263bc
MD
2666 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2667 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2668 l = min(len, hubd.bDescLength);
2669 totlen = l;
2670 memcpy(buf, &hubd, l);
2671 break;
2672 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2673 if (len != 4) {
2674 err = USBD_IOERROR;
2675 goto ret;
2676 }
2677 memset(buf, 0, len); /* ? XXX */
2678 totlen = len;
2679 break;
2680 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2681 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2682 index));
2683 if (index < 1 || index > sc->sc_noport) {
2684 err = USBD_IOERROR;
2685 goto ret;
2686 }
2687 if (len != 4) {
2688 err = USBD_IOERROR;
2689 goto ret;
2690 }
2691 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2692 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2693 v));
2694 USETW(ps.wPortStatus, v);
2695 USETW(ps.wPortChange, v >> 16);
2696 l = min(len, sizeof ps);
2697 memcpy(buf, &ps, l);
2698 totlen = l;
2699 break;
2700 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2701 err = USBD_IOERROR;
2702 goto ret;
2703 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2704 break;
2705 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2706 if (index < 1 || index > sc->sc_noport) {
2707 err = USBD_IOERROR;
2708 goto ret;
2709 }
2710 port = OHCI_RH_PORT_STATUS(index);
2711 switch(value) {
2712 case UHF_PORT_ENABLE:
2713 OWRITE4(sc, port, UPS_PORT_ENABLED);
2714 break;
2715 case UHF_PORT_SUSPEND:
2716 OWRITE4(sc, port, UPS_SUSPEND);
2717 break;
2718 case UHF_PORT_RESET:
2719 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2720 index));
2721 OWRITE4(sc, port, UPS_RESET);
1550dfd9
MD
2722 for (i = 0; i < 5; i++) {
2723 usb_delay_ms(&sc->sc_bus,
2724 USB_PORT_ROOT_RESET_DELAY);
2725 if (sc->sc_dying) {
2726 err = USBD_IOERROR;
2727 goto ret;
2728 }
984263bc
MD
2729 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2730 break;
2731 }
2732 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2733 index, OREAD4(sc, port)));
2734 break;
2735 case UHF_PORT_POWER:
2736 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2737 "%d\n", index));
2738 OWRITE4(sc, port, UPS_PORT_POWER);
2739 break;
2740 default:
2741 err = USBD_IOERROR;
2742 goto ret;
2743 }
2744 break;
2745 default:
2746 err = USBD_IOERROR;
2747 goto ret;
2748 }
2749 xfer->actlen = totlen;
2750 err = USBD_NORMAL_COMPLETION;
2751 ret:
2752 xfer->status = err;
4e01b467 2753 crit_enter();
984263bc 2754 usb_transfer_complete(xfer);
4e01b467 2755 crit_exit();
984263bc
MD
2756 return (USBD_IN_PROGRESS);
2757}
2758
2759/* Abort a root control request. */
2760Static void
2761ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2762{
2763 /* Nothing to do, all transfers are synchronous. */
2764}
2765
2766/* Close the root pipe. */
2767Static void
2768ohci_root_ctrl_close(usbd_pipe_handle pipe)
2769{
2770 DPRINTF(("ohci_root_ctrl_close\n"));
2771 /* Nothing to do. */
2772}
2773
2774Static usbd_status
2775ohci_root_intr_transfer(usbd_xfer_handle xfer)
2776{
2777 usbd_status err;
2778
2779 /* Insert last in queue. */
2780 err = usb_insert_transfer(xfer);
2781 if (err)
2782 return (err);
2783
2784 /* Pipe isn't running, start first */
2785 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2786}
2787
2788Static usbd_status
2789ohci_root_intr_start(usbd_xfer_handle xfer)
2790{
2791 usbd_pipe_handle pipe = xfer->pipe;
2792 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2793
1550dfd9
MD
2794 if (sc->sc_dying)
2795 return (USBD_IOERROR);
2796
984263bc
MD
2797 sc->sc_intrxfer = xfer;
2798
2799 return (USBD_IN_PROGRESS);
2800}
2801
2802/* Abort a root interrupt request. */
2803Static void
2804ohci_root_intr_abort(usbd_xfer_handle xfer)
2805{
984263bc
MD
2806 if (xfer->pipe->intrxfer == xfer) {
2807 DPRINTF(("ohci_root_intr_abort: remove\n"));
2808 xfer->pipe->intrxfer = NULL;
2809 }
2810 xfer->status = USBD_CANCELLED;
4e01b467 2811 crit_enter();
984263bc 2812 usb_transfer_complete(xfer);
4e01b467 2813 crit_exit();
984263bc
MD
2814}
2815
2816/* Close the root pipe. */
2817Static void
2818ohci_root_intr_close(usbd_pipe_handle pipe)
2819{
2820 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1550dfd9 2821
984263bc
MD
2822 DPRINTF(("ohci_root_intr_close\n"));
2823
2824 sc->sc_intrxfer = NULL;
2825}
2826
2827/************************/
2828
2829Static usbd_status
2830ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2831{
2832 usbd_status err;
2833
2834 /* Insert last in queue. */
2835 err = usb_insert_transfer(xfer);
2836 if (err)
2837 return (err);
2838
2839 /* Pipe isn't running, start first */
2840 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2841}
2842
2843Static usbd_status
2844ohci_device_ctrl_start(usbd_xfer_handle xfer)
2845{
2846 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2847 usbd_status err;
2848
1550dfd9
MD
2849 if (sc->sc_dying)
2850 return (USBD_IOERROR);
2851
984263bc
MD
2852#ifdef DIAGNOSTIC
2853 if (!(xfer->rqflags & URQ_REQUEST)) {
2854 /* XXX panic */
2855 printf("ohci_device_ctrl_transfer: not a request\n");
2856 return (USBD_INVAL);
2857 }
2858#endif
2859
2860 err = ohci_device_request(xfer);
2861 if (err)
2862 return (err);
2863
2864 if (sc->sc_bus.use_polling)
2865 ohci_waitintr(sc, xfer);
2866 return (USBD_IN_PROGRESS);
2867}
2868
2869/* Abort a device control request. */
2870Static void
2871ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2872{
2873 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2874 ohci_abort_xfer(xfer, USBD_CANCELLED);
2875}
2876
2877/* Close a device control pipe. */
2878Static void
2879ohci_device_ctrl_close(usbd_pipe_handle pipe)
2880{
2881 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2882 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2883
2884 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2885 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2886 ohci_free_std(sc, opipe->tail.td);
2887}
2888
2889/************************/
2890
2891Static void
2892ohci_device_clear_toggle(usbd_pipe_handle pipe)
2893{
2894 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2895
1550dfd9 2896 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
984263bc
MD
2897}
2898
2899Static void
2900ohci_noop(usbd_pipe_handle pipe)
2901{
2902}
2903
2904Static usbd_status
2905ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2906{
2907 usbd_status err;
2908
2909 /* Insert last in queue. */
2910 err = usb_insert_transfer(xfer);
2911 if (err)
2912 return (err);
2913
2914 /* Pipe isn't running, start first */
2915 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2916}
2917
2918Static usbd_status
2919ohci_device_bulk_start(usbd_xfer_handle xfer)
2920{
2921 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2922 usbd_device_handle dev = opipe->pipe.device;
2923 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2924 int addr = dev->address;
2925 ohci_soft_td_t *data, *tail, *tdp;
2926 ohci_soft_ed_t *sed;
4e01b467 2927 int len, isread, endpt;
984263bc
MD
2928 usbd_status err;
2929
1550dfd9
MD
2930 if (sc->sc_dying)
2931 return (USBD_IOERROR);
2932
984263bc
MD
2933#ifdef DIAGNOSTIC
2934 if (xfer->rqflags & URQ_REQUEST) {
2935 /* XXX panic */
2936 printf("ohci_device_bulk_start: a request\n");
2937 return (USBD_INVAL);
2938 }
2939#endif
2940
2941 len = xfer->length;
2942 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2943 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2944 sed = opipe->sed;
2945
2946 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2947 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2948 endpt));
2949
2950 opipe->u.bulk.isread = isread;
2951 opipe->u.bulk.length = len;
2952
2953 /* Update device address */
1550dfd9
MD
2954 sed->ed.ed_flags = htole32(
2955 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
984263bc
MD
2956 OHCI_ED_SET_FA(addr));
2957
2958 /* Allocate a chain of new TDs (including a new tail). */
2959 data = opipe->tail.td;
1550dfd9
MD
2960 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2961 data, &tail);
2962 /* We want interrupt at the end of the transfer. */
2963 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2964 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2965 tail->flags |= OHCI_CALL_DONE;
2966 tail = tail->nexttd; /* point at sentinel */
984263bc
MD
2967 if (err)
2968 return (err);
2969
2970 tail->xfer = NULL;
2971 xfer->hcpriv = data;
2972
2973 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2974 "td_cbp=0x%08x td_be=0x%08x\n",
1550dfd9
MD
2975 (int)le32toh(sed->ed.ed_flags),
2976 (int)le32toh(data->td.td_flags),
2977 (int)le32toh(data->td.td_cbp),
2978 (int)le32toh(data->td.td_be)));
984263bc
MD
2979
2980#ifdef USB_DEBUG
1550dfd9 2981 if (ohcidebug > 5) {
984263bc
MD
2982 ohci_dump_ed(sed);
2983 ohci_dump_tds(data);
2984 }
2985#endif
2986
2987 /* Insert ED in schedule */
4e01b467 2988 crit_enter();
984263bc
MD
2989 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2990 tdp->xfer = xfer;
984263bc 2991 }
1550dfd9 2992 sed->ed.ed_tailp = htole32(tail->physaddr);
984263bc 2993 opipe->tail.td = tail;
1550dfd9 2994 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
984263bc
MD
2995 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2996 if (xfer->timeout && !sc->sc_bus.use_polling) {
1550dfd9
MD
2997 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2998 ohci_timeout, xfer);
984263bc
MD
2999 }
3000
3001#if 0
3002/* This goes wrong if we are too slow. */
1550dfd9
MD
3003 if (ohcidebug > 10) {
3004 delay(10000);
984263bc
MD
3005 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3006 OREAD4(sc, OHCI_COMMAND_STATUS)));
3007 ohci_dump_ed(sed);
3008 ohci_dump_tds(data);
3009 }
3010#endif
3011
4e01b467 3012 crit_exit();
984263bc 3013
561ecfcb
MD
3014 if (sc->sc_bus.use_polling)
3015 ohci_waitintr(sc, xfer);
3016
984263bc
MD
3017 return (USBD_IN_PROGRESS);
3018}
3019
3020Static void
3021ohci_device_bulk_abort(usbd_xfer_handle xfer)
3022{
3023 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3024 ohci_abort_xfer(xfer, USBD_CANCELLED);
3025}
3026
1550dfd9 3027/*
984263bc
MD
3028 * Close a device bulk pipe.
3029 */
3030Static void
3031ohci_device_bulk_close(usbd_pipe_handle pipe)
3032{
3033 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3034 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3035
3036 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3037 ohci_close_pipe(pipe, sc->sc_bulk_head);
3038 ohci_free_std(sc, opipe->tail.td);
3039}
3040
3041/************************/
3042
3043Static usbd_status
3044ohci_device_intr_transfer(usbd_xfer_handle xfer)
3045{
3046 usbd_status err;
3047
3048 /* Insert last in queue. */
3049 err = usb_insert_transfer(xfer);
3050 if (err)
3051 return (err);
3052
3053 /* Pipe isn't running, start first */
3054 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3055}
3056
3057Static usbd_status
3058ohci_device_intr_start(usbd_xfer_handle xfer)
3059{
3060 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3061 usbd_device_handle dev = opipe->pipe.device;
3062 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3063 ohci_soft_ed_t *sed = opipe->sed;
3064 ohci_soft_td_t *data, *tail;
3065 int len;
984263bc 3066
1550dfd9
MD
3067 if (sc->sc_dying)
3068 return (USBD_IOERROR);
3069
984263bc
MD
3070 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3071 "flags=%d priv=%p\n",
3072 xfer, xfer->length, xfer->flags, xfer->priv));
3073
3074#ifdef DIAGNOSTIC
3075 if (xfer->rqflags & URQ_REQUEST)
1550dfd9 3076 panic("ohci_device_intr_transfer: a request");
984263bc
MD
3077#endif
3078
3079 len = xfer->length;
3080
3081 data = opipe->tail.td;
3082 tail = ohci_alloc_std(sc);
3083 if (tail == NULL)
3084 return (USBD_NOMEM);
3085 tail->xfer = NULL;
3086
1550dfd9
MD
3087 data->td.td_flags = htole32(
3088 OHCI_TD_IN | OHCI_TD_NOCC |
984263bc
MD
3089 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3090 if (xfer->flags & USBD_SHORT_XFER_OK)
1550dfd9
MD
3091 data->td.td_flags |= htole32(OHCI_TD_R);
3092 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
984263bc 3093 data->nexttd = tail;
1550dfd9
MD
3094 data->td.td_nexttd = htole32(tail->physaddr);
3095 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
984263bc
MD
3096 data->len = len;
3097 data->xfer = xfer;
3098 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3099 xfer->hcpriv = data;
3100
3101#ifdef USB_DEBUG
3102 if (ohcidebug > 5) {
3103 DPRINTF(("ohci_device_intr_transfer:\n"));
3104 ohci_dump_ed(sed);
3105 ohci_dump_tds(data);
3106 }
3107#endif
3108
3109 /* Insert ED in schedule */
4e01b467 3110 crit_enter();
1550dfd9 3111 sed->ed.ed_tailp = htole32(tail->physaddr);
984263bc 3112 opipe->tail.td = tail;
1550dfd9 3113 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
984263bc
MD
3114
3115#if 0
3116/*
3117 * This goes horribly wrong, printing thousands of descriptors,
3118 * because false references are followed due to the fact that the
3119 * TD is gone.
3120 */
3121 if (ohcidebug > 5) {
3122 usb_delay_ms(&sc->sc_bus, 5);
3123 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3124 OREAD4(sc, OHCI_COMMAND_STATUS)));
3125 ohci_dump_ed(sed);
3126 ohci_dump_tds(data);
3127 }
3128#endif
4e01b467 3129 crit_exit();
984263bc
MD
3130
3131 return (USBD_IN_PROGRESS);
3132}
3133
3134/* Abort a device control request. */
3135Static void
3136ohci_device_intr_abort(usbd_xfer_handle xfer)
3137{
3138 if (xfer->pipe->intrxfer == xfer) {
3139 DPRINTF(("ohci_device_intr_abort: remove\n"));
3140 xfer->pipe->intrxfer = NULL;
3141 }
3142 ohci_abort_xfer(xfer, USBD_CANCELLED);
3143}
3144
3145/* Close a device interrupt pipe. */
3146Static void
3147ohci_device_intr_close(usbd_pipe_handle pipe)
3148{
3149 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3150 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3151 int nslots = opipe->u.intr.nslots;
3152 int pos = opipe->u.intr.pos;
3153 int j;
3154 ohci_soft_ed_t *p, *sed = opipe->sed;
984263bc
MD
3155
3156 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3157 pipe, nslots, pos));
4e01b467 3158 crit_enter();
1550dfd9
MD
3159 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3160 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3161 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
984263bc
MD
3162 usb_delay_ms(&sc->sc_bus, 2);
3163#ifdef DIAGNOSTIC
1550dfd9
MD
3164 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3165 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3166 panic("%s: Intr pipe %p still has TDs queued",
984263bc
MD
3167 USBDEVNAME(sc->sc_bus.bdev), pipe);
3168#endif
3169
3170 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3171 ;
3172#ifdef DIAGNOSTIC
3173 if (p == NULL)
1550dfd9 3174 panic("ohci_device_intr_close: ED not found");
984263bc
MD
3175#endif
3176 p->next = sed->next;
3177 p->ed.ed_nexted = sed->ed.ed_nexted;
4e01b467 3178 crit_exit();
984263bc
MD
3179
3180 for (j = 0; j < nslots; j++)
3181 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3182
3183 ohci_free_std(sc, opipe->tail.td);
3184 ohci_free_sed(sc, opipe->sed);
3185}
3186
3187Static usbd_status
3188ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3189{
4e01b467 3190 int i, j, best;
984263bc
MD
3191 u_int npoll, slow, shigh, nslots;
3192 u_int bestbw, bw;
3193 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3194
3195 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3196 if (ival == 0) {
3197 printf("ohci_setintr: 0 interval\n");
3198 return (USBD_INVAL);
3199 }
3200
3201 npoll = OHCI_NO_INTRS;
3202 while (npoll > ival)
3203 npoll /= 2;
3204 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3205
3206 /*
3207 * We now know which level in the tree the ED must go into.
3208 * Figure out which slot has most bandwidth left over.
3209 * Slots to examine:
3210 * npoll
3211 * 1 0
3212 * 2 1 2
3213 * 4 3 4 5 6
3214 * 8 7 8 9 10 11 12 13 14
3215 * N (N-1) .. (N-1+N-1)
3216 */
3217 slow = npoll-1;
3218 shigh = slow + npoll;
3219 nslots = OHCI_NO_INTRS / npoll;
3220 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3221 bw = 0;
3222 for (j = 0; j < nslots; j++)
3223 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3224 if (bw < bestbw) {
3225 best = i;
3226 bestbw = bw;
3227 }
3228 }
1550dfd9 3229 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
984263bc
MD
3230 best, slow, shigh, bestbw));
3231
4e01b467 3232 crit_enter();
984263bc
MD
3233 hsed = sc->sc_eds[best];
3234 sed->next = hsed->next;
3235 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3236 hsed->next = sed;
1550dfd9 3237 hsed->ed.ed_nexted = htole32(sed->physaddr);
4e01b467 3238 crit_exit();
984263bc
MD
3239
3240 for (j = 0; j < nslots; j++)
3241 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3242 opipe->u.intr.nslots = nslots;
3243 opipe->u.intr.pos = best;
3244
3245 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3246 return (USBD_NORMAL_COMPLETION);
3247}
3248
3249/***********************/
3250
3251usbd_status
3252ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3253{
3254 usbd_status err;
3255
3256 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3257
3258 /* Put it on our queue, */
3259 err = usb_insert_transfer(xfer);
3260
3261 /* bail out on error, */
3262 if (err && err != USBD_IN_PROGRESS)
3263 return (err);
3264
3265 /* XXX should check inuse here */
3266
3267 /* insert into schedule, */
3268 ohci_device_isoc_enter(xfer);
3269
1550dfd9 3270 /* and start if the pipe wasn't running */
984263bc
MD
3271 if (!err)
3272 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3273
3274 return (err);
3275}
3276
3277void
3278ohci_device_isoc_enter(usbd_xfer_handle xfer)
3279{
3280 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3281 usbd_device_handle dev = opipe->pipe.device;
3282 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3283 ohci_soft_ed_t *sed = opipe->sed;
3284 struct iso *iso = &opipe->u.iso;
1550dfd9
MD
3285 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3286 ohci_soft_itd_t *sitd, *nsitd;
6082d606 3287 ohci_soft_itd_t **scanp;
1550dfd9 3288 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
984263bc 3289 int i, ncur, nframes;
984263bc 3290
1550dfd9
MD
3291 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3292 "nframes=%d\n",
3293 iso->inuse, iso->next, xfer, xfer->nframes));
3294
3295 if (sc->sc_dying)
3296 return;
3297
3298 if (iso->next == -1) {
3299 /* Not in use yet, schedule it a few frames ahead. */
3300 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3301 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3302 iso->next));
3303 }
3304
6082d606
MD
3305 /*
3306 * Not sure what is going on here. This appears to be trying to
3307 * free the previous xfer related to xfer, but why wouldn't
3308 * sitd->xfer always equal xfer during the scan ?
3309 */
1550dfd9 3310 if (xfer->hcpriv) {
6082d606 3311 int neednewtail = 0;
1550dfd9 3312
6082d606
MD
3313 crit_enter();
3314 scanp = (ohci_soft_itd_t **)&xfer->hcpriv;
3315 while ((sitd = *scanp) != NULL) {
3316 if (sitd->xfer != xfer)
3317 break;
3318 if (opipe->tail.itd == sitd)
3319 neednewtail = 1;
3320 *scanp = sitd->nextitd;
3321 sitd->nextitd = NULL;
3322 ohci_free_sitd(sc, sitd);
3323 }
3324 crit_exit();
3325 if (neednewtail) {
1550dfd9
MD
3326 sitd = ohci_alloc_sitd(sc);
3327 if (sitd == NULL)
3328 panic("cant alloc isoc");
3329 opipe->tail.itd = sitd;
3330 tdphys = sitd->physaddr;
3331 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3332 sed->ed.ed_headp =
3333 sed->ed.ed_tailp = htole32(tdphys);
3334 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3335 }
3336 }
3337
984263bc
MD
3338 sitd = opipe->tail.itd;
3339 buf = DMAADDR(&xfer->dmabuf, 0);
1550dfd9
MD
3340 bp0 = OHCI_PAGE(buf);
3341 offs = OHCI_PAGE_OFFSET(buf);
984263bc 3342 nframes = xfer->nframes;
1550dfd9 3343 xfer->hcpriv = sitd;
984263bc 3344 for (i = ncur = 0; i < nframes; i++, ncur++) {
1550dfd9 3345 noffs = offs + xfer->frlengths[i];
984263bc 3346 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
1550dfd9
MD
3347 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3348
3349 /* Allocate next ITD */
984263bc
MD
3350 nsitd = ohci_alloc_sitd(sc);
3351 if (nsitd == NULL) {
3352 /* XXX what now? */
1550dfd9
MD
3353 printf("%s: isoc TD alloc failed\n",
3354 USBDEVNAME(sc->sc_bus.bdev));
984263bc
MD
3355 return;
3356 }
1550dfd9
MD
3357
3358 /* Fill current ITD */
3359 sitd->itd.itd_flags = htole32(
3360 OHCI_ITD_NOCC |
984263bc 3361 OHCI_ITD_SET_SF(iso->next) |
1550dfd9
MD
3362 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3363 OHCI_ITD_SET_FC(ncur));
3364 sitd->itd.itd_bp0 = htole32(bp0);
3365 sitd->nextitd = nsitd;
3366 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3367 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3368 sitd->xfer = xfer;
3369 sitd->flags = OHCI_ITD_ACTIVE;
3370
984263bc 3371 sitd = nsitd;
1550dfd9
MD
3372 iso->next = iso->next + ncur;
3373 bp0 = OHCI_PAGE(buf + offs);
984263bc 3374 ncur = 0;
984263bc 3375 }
1550dfd9
MD
3376 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3377 offs = noffs;
984263bc
MD
3378 }
3379 nsitd = ohci_alloc_sitd(sc);
3380 if (nsitd == NULL) {
3381 /* XXX what now? */
1550dfd9
MD
3382 printf("%s: isoc TD alloc failed\n",
3383 USBDEVNAME(sc->sc_bus.bdev));
984263bc
MD
3384 return;
3385 }
1550dfd9
MD
3386 /* Fixup last used ITD */
3387 sitd->itd.itd_flags = htole32(
3388 OHCI_ITD_NOCC |
984263bc
MD
3389 OHCI_ITD_SET_SF(iso->next) |
3390 OHCI_ITD_SET_DI(0) |
3391 OHCI_ITD_SET_FC(ncur));
1550dfd9
MD
3392 sitd->itd.itd_bp0 = htole32(bp0);
3393 sitd->nextitd = nsitd;
3394 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3395 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3396 sitd->xfer = xfer;
3397 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3398
984263bc 3399 iso->next = iso->next + ncur;
1550dfd9
MD
3400 iso->inuse += nframes;
3401
3402 xfer->actlen = offs; /* XXX pretend we did it all */
3403
3404 xfer->status = USBD_IN_PROGRESS;
3405
3406 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3407
3408#ifdef USB_DEBUG
3409 if (ohcidebug > 5) {
3410 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3411 le32toh(sc->sc_hcca->hcca_frame_number)));
3412 ohci_dump_itds(xfer->hcpriv);
3413 ohci_dump_ed(sed);
3414 }
3415#endif
984263bc 3416
4e01b467 3417 crit_enter();
c90ee8f8 3418 sed->ed.ed_tailp = htole32(nsitd->physaddr);
984263bc 3419 opipe->tail.itd = nsitd;
1550dfd9 3420 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
4e01b467 3421 crit_exit();
1550dfd9
MD
3422
3423#ifdef USB_DEBUG
3424 if (ohcidebug > 5) {
3425 delay(150000);
3426 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3427 le32toh(sc->sc_hcca->hcca_frame_number)));
3428 ohci_dump_itds(xfer->hcpriv);
3429 ohci_dump_ed(sed);
3430 }
3431#endif
984263bc
MD
3432}
3433
3434usbd_status
3435ohci_device_isoc_start(usbd_xfer_handle xfer)
3436{
1550dfd9
MD
3437 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3438 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3439 ohci_soft_ed_t *sed;
1550dfd9
MD
3440
3441 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3442
3443 if (sc->sc_dying)
3444 return (USBD_IOERROR);
3445
3446#ifdef DIAGNOSTIC
3447 if (xfer->status != USBD_IN_PROGRESS)
3448 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3449#endif
3450
3451 /* XXX anything to do? */
3452
4e01b467 3453 crit_enter();
1550dfd9
MD
3454 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3455 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
4e01b467 3456 crit_exit();
1550dfd9
MD
3457
3458 return (USBD_IN_PROGRESS);
984263bc
MD
3459}
3460
3461void
3462ohci_device_isoc_abort(usbd_xfer_handle xfer)
3463{
1550dfd9
MD
3464 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3465 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3466 ohci_soft_ed_t *sed;
3467 ohci_soft_itd_t *sitd, *tmp_sitd;
4e01b467 3468 int undone,num_sitds;
1550dfd9 3469
4e01b467 3470 crit_enter();
1550dfd9
MD
3471 opipe->aborting = 1;
3472
3473 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3474
3475 /* Transfer is already done. */
3476 if (xfer->status != USBD_NOT_STARTED &&
3477 xfer->status != USBD_IN_PROGRESS) {
4e01b467 3478 crit_exit();
1550dfd9
MD
3479 printf("ohci_device_isoc_abort: early return\n");
3480 return;
3481 }
3482
3483 /* Give xfer the requested abort code. */
3484 xfer->status = USBD_CANCELLED;
3485
3486 sed = opipe->sed;
3487 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3488
3489 num_sitds = 0;
3490 sitd = xfer->hcpriv;
3491#ifdef DIAGNOSTIC
3492 if (sitd == NULL) {
4e01b467 3493 crit_exit();
1550dfd9
MD
3494 printf("ohci_device_isoc_abort: hcpriv==0\n");
3495 return;
3496 }
3497#endif
3498 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3499 num_sitds++;
3500#ifdef DIAGNOSTIC
3501 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3502 sitd->isdone = 1;
3503#endif
3504 }
3505
4e01b467 3506 crit_exit();
1550dfd9
MD
3507
3508 /*
3509 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3510 * take a usb 1ms cycle. Conservatively wait for it to drain.
3511 * Even with DMA done, it can take awhile for the "batch"
3512 * delivery of completion interrupts to occur thru the controller.
3513 */
3514
3515 do {
3516 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3517
3518 undone = 0;
3519 tmp_sitd = xfer->hcpriv;
3520 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3521 tmp_sitd = tmp_sitd->nextitd) {
3522 if (OHCI_CC_NO_ERROR ==
3523 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3524 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3525 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3526 undone++;
3527 }
3528 } while( undone != 0 );
3529
4e01b467 3530 crit_enter();
1550dfd9
MD
3531
3532 /* Run callback. */
3533 usb_transfer_complete(xfer);
3534
3535 if (sitd != NULL)
3536 /*
3537 * Only if there is a `next' sitd in next xfer...
3538 * unlink this xfer's sitds.
3539 */
3540 sed->ed.ed_headp = htole32(sitd->physaddr);
3541 else
3542 sed->ed.ed_headp = 0;
3543
3544 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3545
4e01b467 3546 crit_exit();
984263bc
MD
3547}
3548
3549void
3550ohci_device_isoc_done(usbd_xfer_handle xfer)
3551{
1550dfd9
MD
3552 /* This null routine corresponds to non-isoc "done()" routines
3553 * that free the stds associated with an xfer after a completed
3554 * xfer interrupt. However, in the case of isoc transfers, the
3555 * sitds associated with the transfer have already been processed
3556 * and reallocated for the next iteration by
3557 * "ohci_device_isoc_transfer()".
3558 *
3559 * Routine "usb_transfer_complete()" is called at the end of every
3560 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3561 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3562 * pipeline by setting up the next transfer iteration) and 2) then
3563 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3564 * working for the ohci usb because this routine was trashing the
3565 * xfer set up for the next iteration (thus, only the first
3566 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3567 * this could all be re-factored, but that's another pass...
3568 */
984263bc
MD
3569}
3570
3571usbd_status
3572ohci_setup_isoc(usbd_pipe_handle pipe)
3573{
3574 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1550dfd9 3575 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
984263bc
MD
3576 struct iso *iso = &opipe->u.iso;
3577
3578 iso->next = -1;
3579 iso->inuse = 0;
3580
4e01b467 3581 crit_enter();
1550dfd9 3582 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
4e01b467 3583 crit_exit();
1550dfd9 3584
984263bc
MD
3585 return (USBD_NORMAL_COMPLETION);
3586}
3587
3588void
3589ohci_device_isoc_close(usbd_pipe_handle pipe)
3590{
3591 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3592 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1550dfd9 3593 ohci_soft_ed_t *sed;
984263bc
MD
3594
3595 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
1550dfd9
MD
3596
3597 sed = opipe->sed;
3598 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3599
3600 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3601
3602 /* up to NISOREQs xfers still outstanding. */
3603
3604#ifdef DIAGNOSTIC
3605 opipe->tail.itd->isdone = 1;
3606#endif
3607 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/
6082d606 3608 opipe->tail.itd = NULL;
984263bc 3609}