Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / bus / usb / uhci_pci.c
CommitLineData
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1/*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Lennart Augustsson (augustss@carlstedt.se) at
7 * Carlstedt Research & Technology.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/dev/usb/uhci_pci.c,v 1.51 2003/11/28 05:28:29 imp Exp $
1f7ab7c9 38 * $DragonFly: src/sys/bus/usb/uhci_pci.c,v 1.8 2006/10/25 20:55:52 dillon Exp $
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39 */
40
41/* Universal Host Controller Interface
42 *
43 * UHCI spec: http://www.intel.com/
44 */
45
46/* The low level controller code for UHCI has been split into
47 * PCI probes and UHCI specific code. This was done to facilitate the
48 * sharing of code between *BSD's
49 */
50
51#include "opt_bus.h"
52
53#include <sys/param.h>
54#include <sys/systm.h>
55#include <sys/kernel.h>
56#include <sys/module.h>
57#include <sys/bus.h>
58#include <sys/queue.h>
15ba557b 59#if defined(__FreeBSD__) || defined(__DragonFly__)
1550dfd9 60#include <sys/bus.h>
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61#include <sys/rman.h>
62#endif
63
64#include <bus/pci/pcivar.h>
65#include <bus/pci/pcireg.h>
66
67#include <bus/usb/usb.h>
68#include <bus/usb/usbdi.h>
69#include <bus/usb/usbdivar.h>
70#include <bus/usb/usb_mem.h>
71
72#include <bus/usb/uhcireg.h>
73#include <bus/usb/uhcivar.h>
74
75#define PCI_UHCI_VENDORID_INTEL 0x8086
76#define PCI_UHCI_VENDORID_VIA 0x1106
77
78#define PCI_UHCI_DEVICEID_PIIX3 0x70208086
79static const char *uhci_device_piix3 = "Intel 82371SB (PIIX3) USB controller";
80
81#define PCI_UHCI_DEVICEID_PIIX4 0x71128086
82#define PCI_UHCI_DEVICEID_PIIX4E 0x71128086 /* no separate stepping */
83static const char *uhci_device_piix4 = "Intel 82371AB/EB (PIIX4) USB controller";
84
85#define PCI_UHCI_DEVICEID_ICH 0x24128086
86static const char *uhci_device_ich = "Intel 82801AA (ICH) USB controller";
87
88#define PCI_UHCI_DEVICEID_ICH0 0x24228086
89static const char *uhci_device_ich0 = "Intel 82801AB (ICH0) USB controller";
90
91#define PCI_UHCI_DEVICEID_ICH2_A 0x24428086
92static const char *uhci_device_ich2_a = "Intel 82801BA/BAM (ICH2) USB controller USB-A";
93
94#define PCI_UHCI_DEVICEID_ICH2_B 0x24448086
95static const char *uhci_device_ich2_b = "Intel 82801BA/BAM (ICH2) USB controller USB-B";
96
97#define PCI_UHCI_DEVICEID_ICH3_A 0x24828086
98static const char *uhci_device_ich3_a = "Intel 82801CA/CAM (ICH3) USB controller USB-A";
99
100#define PCI_UHCI_DEVICEID_ICH3_B 0x24848086
101static const char *uhci_device_ich3_b = "Intel 82801CA/CAM (ICH3) USB controller USB-B";
102
103#define PCI_UHCI_DEVICEID_ICH3_C 0x24878086
104static const char *uhci_device_ich3_c = "Intel 82801CA/CAM (ICH3) USB controller USB-C";
105
106#define PCI_UHCI_DEVICEID_ICH4_A 0x24c28086
107static const char *uhci_device_ich4_a = "Intel 82801DB (ICH4) USB controller USB-A";
108
109#define PCI_UHCI_DEVICEID_ICH4_B 0x24c48086
110static const char *uhci_device_ich4_b = "Intel 82801DB (ICH4) USB controller USB-B";
111
112#define PCI_UHCI_DEVICEID_ICH4_C 0x24c78086
113static const char *uhci_device_ich4_c = "Intel 82801DB (ICH4) USB controller USB-C";
114
115#define PCI_UHCI_DEVICEID_ICH5_A 0x24d28086
116static const char *uhci_device_ich5_a = "Intel 82801EB (ICH5) USB controller USB-A";
117
118#define PCI_UHCI_DEVICEID_ICH5_B 0x24d48086
119static const char *uhci_device_ich5_b = "Intel 82801EB (ICH5) USB controller USB-B";
120
121#define PCI_UHCI_DEVICEID_ICH5_C 0x24d78086
122static const char *uhci_device_ich5_c = "Intel 82801EB (ICH5) USB controller USB-C";
123
124#define PCI_UHCI_DEVICEID_ICH5_D 0x24de8086
125static const char *uhci_device_ich5_d = "Intel 82801EB (ICH5) USB controller USB-D";
126
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127#define PCI_UHCI_DEVICEID_ICH6_A 0x26588086
128static const char *uhci_device_ich6_a = "Intel 82801FB (ICH6) USB controller USB-A";
129
130#define PCI_UHCI_DEVICEID_ICH6_B 0x26598086
131static const char *uhci_device_ich6_b = "Intel 82801FB (ICH6) USB controller USB-B";
132
133#define PCI_UHCI_DEVICEID_ICH6_C 0x265a8086
134static const char *uhci_device_ich6_c = "Intel 82801FB (ICH6) USB controller USB-C";
135
136#define PCI_UHCI_DEVICEID_ICH6_D 0x265b8086
137static const char *uhci_device_ich6_d = "Intel 82801FB (ICH6) USB controller USB-D";
d2ce3a27 138
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139#define PCI_UHCI_DEVICEID_440MX 0x719a8086
140static const char *uhci_device_440mx = "Intel 82443MX USB controller";
141
142#define PCI_UHCI_DEVICEID_460GX 0x76028086
143static const char *uhci_device_460gx = "Intel 82372FB/82468GX USB controller";
144
145#define PCI_UHCI_DEVICEID_VT83C572 0x30381106
146static const char *uhci_device_vt83c572 = "VIA 83C572 USB controller";
147
148static const char *uhci_device_generic = "UHCI (generic) USB controller";
149
150#define PCI_UHCI_BASE_REG 0x20
151
152
153static int uhci_pci_attach(device_t self);
154static int uhci_pci_detach(device_t self);
155static int uhci_pci_suspend(device_t self);
156static int uhci_pci_resume(device_t self);
157
158
159static int
160uhci_pci_suspend(device_t self)
161{
162 uhci_softc_t *sc = device_get_softc(self);
163 int err;
164
165 err = bus_generic_suspend(self);
166 if (err)
167 return err;
168 uhci_power(PWR_SUSPEND, sc);
169
170 return 0;
171}
172
173static int
174uhci_pci_resume(device_t self)
175{
176 uhci_softc_t *sc = device_get_softc(self);
177
178 uhci_power(PWR_RESUME, sc);
179 bus_generic_resume(self);
180
181 return 0;
182}
183
184static const char *
185uhci_pci_match(device_t self)
186{
187 u_int32_t device_id = pci_get_devid(self);
188
189 if (device_id == PCI_UHCI_DEVICEID_PIIX3) {
190 return (uhci_device_piix3);
191 } else if (device_id == PCI_UHCI_DEVICEID_PIIX4) {
192 return (uhci_device_piix4);
193 } else if (device_id == PCI_UHCI_DEVICEID_ICH) {
194 return (uhci_device_ich);
195 } else if (device_id == PCI_UHCI_DEVICEID_ICH0) {
196 return (uhci_device_ich0);
197 } else if (device_id == PCI_UHCI_DEVICEID_ICH2_A) {
198 return (uhci_device_ich2_a);
199 } else if (device_id == PCI_UHCI_DEVICEID_ICH2_B) {
200 return (uhci_device_ich2_b);
201 } else if (device_id == PCI_UHCI_DEVICEID_ICH3_A) {
202 return (uhci_device_ich3_a);
203 } else if (device_id == PCI_UHCI_DEVICEID_ICH3_B) {
204 return (uhci_device_ich3_b);
205 } else if (device_id == PCI_UHCI_DEVICEID_ICH3_C) {
206 return (uhci_device_ich3_c);
207 } else if (device_id == PCI_UHCI_DEVICEID_ICH4_A) {
208 return (uhci_device_ich4_a);
209 } else if (device_id == PCI_UHCI_DEVICEID_ICH4_B) {
210 return (uhci_device_ich4_b);
211 } else if (device_id == PCI_UHCI_DEVICEID_ICH4_C) {
212 return (uhci_device_ich4_c);
213 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_A) {
214 return (uhci_device_ich5_a);
215 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_B) {
216 return (uhci_device_ich5_b);
217 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_C) {
218 return (uhci_device_ich5_c);
219 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_D) {
220 return (uhci_device_ich5_d);
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221 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_A) {
222 return (uhci_device_ich6_a);
223 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_B) {
224 return (uhci_device_ich6_b);
225 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_C) {
226 return (uhci_device_ich6_c);
227 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_D) {
228 return (uhci_device_ich6_d);
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229 } else if (device_id == PCI_UHCI_DEVICEID_440MX) {
230 return (uhci_device_440mx);
231 } else if (device_id == PCI_UHCI_DEVICEID_460GX) {
232 return (uhci_device_460gx);
233 } else if (device_id == PCI_UHCI_DEVICEID_VT83C572) {
234 return (uhci_device_vt83c572);
235 } else {
236 if (pci_get_class(self) == PCIC_SERIALBUS
237 && pci_get_subclass(self) == PCIS_SERIALBUS_USB
238 && pci_get_progif(self) == PCI_INTERFACE_UHCI) {
239 return (uhci_device_generic);
240 }
241 }
242
243 return NULL; /* dunno... */
244}
245
246static int
247uhci_pci_probe(device_t self)
248{
249 const char *desc = uhci_pci_match(self);
250
251 if (desc) {
252 device_set_desc(self, desc);
253 return 0;
254 } else {
255 return ENXIO;
256 }
257}
258
259static int
260uhci_pci_attach(device_t self)
261{
262 uhci_softc_t *sc = device_get_softc(self);
263 int rid;
264 int err;
265
266 pci_enable_busmaster(self);
267
268 rid = PCI_UHCI_BASE_REG;
269 sc->io_res = bus_alloc_resource(self, SYS_RES_IOPORT, &rid,
270 0, ~0, 1, RF_ACTIVE);
271 if (!sc->io_res) {
272 device_printf(self, "Could not map ports\n");
273 return ENXIO;
274 }
275 sc->iot = rman_get_bustag(sc->io_res);
276 sc->ioh = rman_get_bushandle(sc->io_res);
277
278 /* disable interrupts */
279 bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
280
281 rid = 0;
282 sc->irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid,
283 0, ~0, 1,
284 RF_SHAREABLE | RF_ACTIVE);
285 if (sc->irq_res == NULL) {
286 device_printf(self, "Could not allocate irq\n");
287 uhci_pci_detach(self);
288 return ENXIO;
289 }
290 sc->sc_bus.bdev = device_add_child(self, "usb", -1);
291 if (!sc->sc_bus.bdev) {
292 device_printf(self, "Could not add USB device\n");
293 uhci_pci_detach(self);
294 return ENOMEM;
295 }
296 device_set_ivars(sc->sc_bus.bdev, sc);
297
298 /* uhci_pci_match must never return NULL if uhci_pci_probe succeeded */
299 device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
300 switch (pci_get_vendor(self)) {
301 case PCI_UHCI_VENDORID_INTEL:
302 sprintf(sc->sc_vendor, "Intel");
303 break;
304 case PCI_UHCI_VENDORID_VIA:
305 sprintf(sc->sc_vendor, "VIA");
306 break;
307 default:
308 if (bootverbose)
309 device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
310 pci_get_devid(self));
311 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
312 }
313
314 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
315 case PCI_USBREV_PRE_1_0:
316 sc->sc_bus.usbrev = USBREV_PRE_1_0;
317 break;
318 case PCI_USBREV_1_0:
319 sc->sc_bus.usbrev = USBREV_1_0;
320 break;
321 default:
322 sc->sc_bus.usbrev = USBREV_UNKNOWN;
323 break;
324 }
325
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326 /*
327 * Set the PIRQD enable bit and switch off all the others. We don't
328 * want legacy support to interfere with us XXX Does this also mean
329 * that the BIOS won't touch the keyboard anymore if it is connected
330 * to the ports of the root hub?
331 */
332#ifdef USB_DEBUG
333 if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN)
334 device_printf(self, "LegSup = 0x%04x\n",
335 pci_read_config(self, PCI_LEGSUP, 2));
336#endif
337 pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
338
339 err = uhci_init(sc);
340 if (!err)
341 err = device_probe_and_attach(sc->sc_bus.bdev);
342
343 if (err) {
344 device_printf(self, "USB init failed\n");
345 uhci_pci_detach(self);
346 return EIO;
347 }
aa0bb337 348
ee61f228 349 err = bus_setup_intr(self, sc->irq_res, 0,
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350 (driver_intr_t *) uhci_intr, sc, &sc->ih, NULL);
351 if (err) {
352 device_printf(self, "Could not setup irq, %d\n", err);
353 sc->ih = NULL;
354 uhci_pci_detach(self);
355 return ENXIO;
356 }
357
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358 return 0; /* success */
359}
360
361int
362uhci_pci_detach(device_t self)
363{
364 uhci_softc_t *sc = device_get_softc(self);
365
366 /*
367 * XXX This function is not yet complete and should not be added
368 * method list.
369 */
370#if 0
371 if uhci_init
372 was successful
373 we should call something like uhci_deinit
374#endif
375
376 /*
377 * disable interrupts that might have been switched on in
378 * uhci_init.
379 */
380 if (sc->iot && sc->ioh)
381 bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
382
383 if (sc->irq_res && sc->ih) {
384 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
385
386 if (err)
387 /* XXX or should we panic? */
388 device_printf(self, "Could not tear down irq, %d\n",
389 err);
390 sc->ih = NULL;
391 }
392 if (sc->sc_bus.bdev) {
393 device_delete_child(self, sc->sc_bus.bdev);
394 sc->sc_bus.bdev = NULL;
395 }
396 if (sc->irq_res) {
397 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
398 sc->irq_res = NULL;
399 }
400 if (sc->io_res) {
401 bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG,
402 sc->io_res);
403 sc->io_res = NULL;
404 sc->iot = 0;
405 sc->ioh = 0;
406 }
407 return 0;
408}
409
410
411static device_method_t uhci_methods[] = {
412 /* Device interface */
413 DEVMETHOD(device_probe, uhci_pci_probe),
414 DEVMETHOD(device_attach, uhci_pci_attach),
415 DEVMETHOD(device_suspend, uhci_pci_suspend),
416 DEVMETHOD(device_resume, uhci_pci_resume),
417 DEVMETHOD(device_shutdown, bus_generic_shutdown),
418
419 /* Bus interface */
420 DEVMETHOD(bus_print_child, bus_generic_print_child),
421
422 {0, 0}
423};
424
425static driver_t uhci_driver = {
426 "uhci",
427 uhci_methods,
428 sizeof(uhci_softc_t),
429};
430
431static devclass_t uhci_devclass;
432
433DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, 0, 0);
434DRIVER_MODULE(uhci, cardbus, uhci_driver, uhci_devclass, 0, 0);