Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / dev / disk / aha / aha.c
CommitLineData
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1/*
2 * Generic register and struct definitions for the Adaptech 154x/164x
3 * SCSI host adapters. Product specific probe and attach routines can
4 * be found in:
5 * aha 1540/1542B/1542C/1542CF/1542CP aha_isa.c
6 *
7 * Copyright (c) 1998 M. Warner Losh.
8 * All Rights Reserved.
9 *
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions, and the following disclaimer,
16 * without modification, immediately at the beginning of the file.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * Derived from bt.c written by:
33 *
34 * Copyright (c) 1998 Justin T. Gibbs.
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions, and the following disclaimer,
42 * without modification, immediately at the beginning of the file.
43 * 2. The name of the author may not be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
50 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 *
58 * $FreeBSD: src/sys/dev/aha/aha.c,v 1.34.2.1 2000/08/02 22:24:39 peter Exp $
1f7ab7c9 59 * $DragonFly: src/sys/dev/disk/aha/aha.c,v 1.14 2006/10/25 20:55:53 dillon Exp $
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60 */
61
62#include <sys/param.h>
af77114a 63#include <sys/bus.h>
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64#include <sys/systm.h>
65#include <sys/malloc.h>
66#include <sys/buf.h>
67#include <sys/kernel.h>
c1139c5e 68#include <sys/thread2.h>
984263bc 69
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70#include <machine/clock.h>
71
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72#include <bus/cam/cam.h>
73#include <bus/cam/cam_ccb.h>
74#include <bus/cam/cam_sim.h>
75#include <bus/cam/cam_xpt_sim.h>
76#include <bus/cam/cam_debug.h>
984263bc 77
1f2de5d4 78#include <bus/cam/scsi/scsi_message.h>
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79
80#include <vm/vm.h>
81#include <vm/pmap.h>
82
1f2de5d4 83#include "ahareg.h"
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84
85struct aha_softc *aha_softcs[NAHATOT];
86
af77114a 87#define PRVERB(x) do { if (bootverbose) device_printf x; } while(0)
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88
89/* Macro to determine that a rev is potentially a new valid one
90 * so that the driver doesn't keep breaking on new revs as it
91 * did for the CF and CP.
92 */
93#define PROBABLY_NEW_BOARD(REV) (REV > 0x43 && REV < 0x56)
94
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95/* MailBox Management functions */
96static __inline void ahanextinbox(struct aha_softc *aha);
97static __inline void ahanextoutbox(struct aha_softc *aha);
98
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99#define aha_name(aha) device_get_nameunit(aha->dev)
100
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101static __inline void
102ahanextinbox(struct aha_softc *aha)
103{
104 if (aha->cur_inbox == aha->last_inbox)
105 aha->cur_inbox = aha->in_boxes;
106 else
107 aha->cur_inbox++;
108}
109
110static __inline void
111ahanextoutbox(struct aha_softc *aha)
112{
113 if (aha->cur_outbox == aha->last_outbox)
114 aha->cur_outbox = aha->out_boxes;
115 else
116 aha->cur_outbox++;
117}
118
119#define ahautoa24(u,s3) \
120 (s3)[0] = ((u) >> 16) & 0xff; \
121 (s3)[1] = ((u) >> 8) & 0xff; \
122 (s3)[2] = (u) & 0xff;
123
124#define aha_a24tou(s3) \
125 (((s3)[0] << 16) | ((s3)[1] << 8) | (s3)[2])
126
127/* CCB Mangement functions */
128static __inline u_int32_t ahaccbvtop(struct aha_softc *aha,
129 struct aha_ccb *accb);
130static __inline struct aha_ccb* ahaccbptov(struct aha_softc *aha,
131 u_int32_t ccb_addr);
132
133static __inline u_int32_t
134ahaccbvtop(struct aha_softc *aha, struct aha_ccb *accb)
135{
136 return (aha->aha_ccb_physbase
137 + (u_int32_t)((caddr_t)accb - (caddr_t)aha->aha_ccb_array));
138}
139static __inline struct aha_ccb *
140ahaccbptov(struct aha_softc *aha, u_int32_t ccb_addr)
141{
142 return (aha->aha_ccb_array +
143 + ((struct aha_ccb*)ccb_addr-(struct aha_ccb*)aha->aha_ccb_physbase));
144}
145
146static struct aha_ccb* ahagetccb(struct aha_softc *aha);
147static __inline void ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb);
148static void ahaallocccbs(struct aha_softc *aha);
149static bus_dmamap_callback_t ahaexecuteccb;
150static void ahadone(struct aha_softc *aha, struct aha_ccb *accb,
151 aha_mbi_comp_code_t comp_code);
152
153/* Host adapter command functions */
154static int ahareset(struct aha_softc* aha, int hard_reset);
155
156/* Initialization functions */
157static int ahainitmboxes(struct aha_softc *aha);
158static bus_dmamap_callback_t ahamapmboxes;
159static bus_dmamap_callback_t ahamapccbs;
160static bus_dmamap_callback_t ahamapsgs;
161
162/* Transfer Negotiation Functions */
163static void ahafetchtransinfo(struct aha_softc *aha,
164 struct ccb_trans_settings *cts);
165
166/* CAM SIM entry points */
167#define ccb_accb_ptr spriv_ptr0
168#define ccb_aha_ptr spriv_ptr1
169static void ahaaction(struct cam_sim *sim, union ccb *ccb);
170static void ahapoll(struct cam_sim *sim);
171
172/* Our timeout handler */
173static timeout_t ahatimeout;
174
175u_long aha_unit = 0;
176
177/*
178 * Do our own re-probe protection until a configuration
179 * manager can do it for us. This ensures that we don't
180 * reprobe a card already found by the EISA or PCI probes.
181 */
182static struct aha_isa_port aha_isa_ports[] =
183{
184 { 0x130, 4 },
185 { 0x134, 5 },
186 { 0x230, 2 },
187 { 0x234, 3 },
188 { 0x330, 0 },
189 { 0x334, 1 }
190};
191
192/*
193 * I/O ports listed in the order enumerated by the
194 * card for certain op codes.
195 */
196static u_int16_t aha_board_ports[] =
197{
198 0x330,
199 0x334,
200 0x230,
201 0x234,
202 0x130,
203 0x134
204};
205
206/* Exported functions */
207struct aha_softc *
af77114a 208aha_alloc(device_t dev, bus_space_tag_t tag, bus_space_handle_t bsh)
984263bc 209{
af77114a 210 struct aha_softc *aha;
984263bc 211
af77114a 212 int unit = device_get_unit(dev);
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213 if (unit != AHA_TEMP_UNIT) {
214 if (unit >= NAHATOT) {
af77114a 215 device_printf(dev, "unit number (%d) too high\n", unit);
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216 return NULL;
217 }
218
219 /*
220 * Allocate a storage area for us
221 */
222 if (aha_softcs[unit]) {
af77114a 223 device_printf(dev, "memory already allocated\n");
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224 return NULL;
225 }
226 }
227
efda3bd0 228 aha = kmalloc(sizeof(struct aha_softc), M_DEVBUF, M_INTWAIT | M_ZERO);
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229 SLIST_INIT(&aha->free_aha_ccbs);
230 LIST_INIT(&aha->pending_ccbs);
231 SLIST_INIT(&aha->sg_maps);
af77114a 232 aha->dev = dev;
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233 aha->tag = tag;
234 aha->bsh = bsh;
235 aha->ccb_sg_opcode = INITIATOR_SG_CCB_WRESID;
236 aha->ccb_ccb_opcode = INITIATOR_CCB_WRESID;
237
af77114a 238 if (unit != AHA_TEMP_UNIT) {
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239 aha_softcs[unit] = aha;
240 }
241 return (aha);
242}
243
244void
245aha_free(struct aha_softc *aha)
246{
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247 int unit = device_get_unit(aha->dev);
248
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249 switch (aha->init_level) {
250 default:
251 case 8:
252 {
253 struct sg_map_node *sg_map;
254
255 while ((sg_map = SLIST_FIRST(&aha->sg_maps))!= NULL) {
256 SLIST_REMOVE_HEAD(&aha->sg_maps, links);
257 bus_dmamap_unload(aha->sg_dmat,
258 sg_map->sg_dmamap);
259 bus_dmamem_free(aha->sg_dmat, sg_map->sg_vaddr,
260 sg_map->sg_dmamap);
efda3bd0 261 kfree(sg_map, M_DEVBUF);
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262 }
263 bus_dma_tag_destroy(aha->sg_dmat);
264 }
6b08710e 265 /* fall through */
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266 case 7:
267 bus_dmamap_unload(aha->ccb_dmat, aha->ccb_dmamap);
6b08710e 268 /* fall through */
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269 case 6:
270 bus_dmamap_destroy(aha->ccb_dmat, aha->ccb_dmamap);
271 bus_dmamem_free(aha->ccb_dmat, aha->aha_ccb_array,
272 aha->ccb_dmamap);
6b08710e 273 /* fall through */
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274 case 5:
275 bus_dma_tag_destroy(aha->ccb_dmat);
6b08710e 276 /* fall through */
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277 case 4:
278 bus_dmamap_unload(aha->mailbox_dmat, aha->mailbox_dmamap);
6b08710e 279 /* fall through */
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280 case 3:
281 bus_dmamem_free(aha->mailbox_dmat, aha->in_boxes,
282 aha->mailbox_dmamap);
283 bus_dmamap_destroy(aha->mailbox_dmat, aha->mailbox_dmamap);
6b08710e 284 /* fall through */
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285 case 2:
286 bus_dma_tag_destroy(aha->buffer_dmat);
6b08710e 287 /* fall through */
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288 case 1:
289 bus_dma_tag_destroy(aha->mailbox_dmat);
6b08710e 290 /* fall through */
984263bc 291 case 0:
6b08710e 292 break;
984263bc 293 }
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294 if (unit != AHA_TEMP_UNIT) {
295 aha_softcs[unit] = NULL;
984263bc 296 }
efda3bd0 297 kfree(aha, M_DEVBUF);
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298}
299
300/*
301 * Probe the adapter and verify that the card is an Adaptec.
302 */
303int
304aha_probe(struct aha_softc* aha)
305{
306 u_int status;
307 u_int intstat;
308 int error;
309 board_id_data_t board_id;
310
311 /*
312 * See if the three I/O ports look reasonable.
313 * Touch the minimal number of registers in the
314 * failure case.
315 */
316 status = aha_inb(aha, STATUS_REG);
317 if ((status == 0)
318 || (status & (DIAG_ACTIVE|CMD_REG_BUSY|
319 STATUS_REG_RSVD)) != 0) {
af77114a 320 PRVERB((aha->dev, "status reg test failed %x\n", status));
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321 return (ENXIO);
322 }
323
324 intstat = aha_inb(aha, INTSTAT_REG);
325 if ((intstat & INTSTAT_REG_RSVD) != 0) {
af77114a 326 PRVERB((aha->dev, "Failed Intstat Reg Test\n"));
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327 return (ENXIO);
328 }
329
330 /*
331 * Looking good so far. Final test is to reset the
332 * adapter and fetch the board ID and ensure we aren't
333 * looking at a BusLogic.
334 */
335 if ((error = ahareset(aha, /*hard_reset*/TRUE)) != 0) {
af77114a 336 PRVERB((aha->dev, "Failed Reset\n"));
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337 return (ENXIO);
338 }
339
340 /*
341 * Get the board ID. We use this to see if we're dealing with
342 * a buslogic card or a aha card (or clone).
343 */
344 error = aha_cmd(aha, AOP_INQUIRE_BOARD_ID, NULL, /*parmlen*/0,
345 (u_int8_t*)&board_id, sizeof(board_id),
346 DEFAULT_CMD_TIMEOUT);
347 if (error != 0) {
af77114a 348 PRVERB((aha->dev, "INQUIRE failed %x\n", error));
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349 return (ENXIO);
350 }
351 aha->fw_major = board_id.firmware_rev_major;
352 aha->fw_minor = board_id.firmware_rev_minor;
353 aha->boardid = board_id.board_type;
354
355 /*
356 * The Buslogic cards have an id of either 0x41 or 0x42. So
357 * if those come up in the probe, we test the geometry register
358 * of the board. Adaptec boards that are this old will not have
359 * this register, and return 0xff, while buslogic cards will return
360 * something different.
361 *
362 * It appears that for reasons unknow, for the for the
363 * aha-1542B cards, we need to wait a little bit before trying
364 * to read the geometry register. I picked 10ms since we have
365 * reports that a for loop to 1000 did the trick, and this
366 * errs on the side of conservatism. Besides, no one will
367 * notice a 10mS delay here, even the 1542B card users :-)
368 *
369 * Some compatible cards return 0 here. Some cards also
370 * seem to return 0x7f.
371 *
372 * XXX I'm not sure how this will impact other cloned cards
373 *
374 * This really should be replaced with the esetup command, since
375 * that appears to be more reliable. This becomes more and more
376 * true over time as we discover more cards that don't read the
377 * geometry register consistantly.
378 */
379 if (aha->boardid <= 0x42) {
380 /* Wait 10ms before reading */
381 DELAY(10000);
382 status = aha_inb(aha, GEOMETRY_REG);
383 if (status != 0xff && status != 0x00 && status != 0x7f) {
af77114a 384 PRVERB((aha->dev, "Geometry Register test failed 0x%x\n", status));
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385 return (ENXIO);
386 }
387 }
388
389 return (0);
390}
391
392/*
393 * Pull the boards setup information and record it in our softc.
394 */
395int
396aha_fetch_adapter_info(struct aha_softc *aha)
397{
398 setup_data_t setup_info;
399 config_data_t config_data;
400 u_int8_t length_param;
401 int error;
402 struct aha_extbios extbios;
403
404 switch (aha->boardid) {
405 case BOARD_1540_16HEAD_BIOS:
406 snprintf(aha->model, sizeof(aha->model), "1540 16 head BIOS");
407 break;
408 case BOARD_1540_64HEAD_BIOS:
409 snprintf(aha->model, sizeof(aha->model), "1540 64 head BIOS");
410 break;
411 case BOARD_1542:
412 snprintf(aha->model, sizeof(aha->model), "1540/1542 64 head BIOS");
413 break;
414 case BOARD_1640:
415 snprintf(aha->model, sizeof(aha->model), "1640");
416 break;
417 case BOARD_1740:
418 snprintf(aha->model, sizeof(aha->model), "1740A/1742A/1744");
419 break;
420 case BOARD_1542C:
421 snprintf(aha->model, sizeof(aha->model), "1542C");
422 break;
423 case BOARD_1542CF:
424 snprintf(aha->model, sizeof(aha->model), "1542CF");
425 break;
426 case BOARD_1542CP:
427 snprintf(aha->model, sizeof(aha->model), "1542CP");
428 break;
429 default:
430 snprintf(aha->model, sizeof(aha->model), "Unknown");
431 break;
432 }
433 /*
434 * If we are a new type of 1542 board (anything newer than a 1542C)
435 * then disable the extended bios so that the
436 * mailbox interface is unlocked.
437 * This is also true for the 1542B Version 3.20. First Adaptec
438 * board that supports >1Gb drives.
439 * No need to check the extended bios flags as some of the
440 * extensions that cause us problems are not flagged in that byte.
441 */
442 if (PROBABLY_NEW_BOARD(aha->boardid) ||
443 (aha->boardid == 0x41
444 && aha->fw_major == 0x31 &&
445 aha->fw_minor >= 0x34)) {
446 error = aha_cmd(aha, AOP_RETURN_EXT_BIOS_INFO, NULL,
447 /*paramlen*/0, (u_char *)&extbios, sizeof(extbios),
448 DEFAULT_CMD_TIMEOUT);
449 error = aha_cmd(aha, AOP_MBOX_IF_ENABLE, (u_int8_t *)&extbios,
450 /*paramlen*/2, NULL, 0, DEFAULT_CMD_TIMEOUT);
451 }
452 if (aha->boardid < 0x41)
af77114a 453 device_printf(aha->dev, "Warning: aha-1542A won't likely work.\n");
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454
455 aha->max_sg = 17; /* Need >= 17 to do 64k I/O */
456 aha->diff_bus = 0;
457 aha->extended_lun = 0;
458 aha->extended_trans = 0;
459 aha->max_ccbs = 16;
460 /* Determine Sync/Wide/Disc settings */
461 length_param = sizeof(setup_info);
462 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &length_param,
463 /*paramlen*/1, (u_int8_t*)&setup_info,
464 sizeof(setup_info), DEFAULT_CMD_TIMEOUT);
465 if (error != 0) {
af77114a
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466 device_printf(aha->dev, "aha_fetch_adapter_info - Failed "
467 "Get Setup Info\n");
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468 return (error);
469 }
470 if (setup_info.initiate_sync != 0) {
471 aha->sync_permitted = ALL_TARGETS;
472 }
473 aha->disc_permitted = ALL_TARGETS;
474
475 /* We need as many mailboxes as we can have ccbs */
476 aha->num_boxes = aha->max_ccbs;
477
478 /* Determine our SCSI ID */
479
480 error = aha_cmd(aha, AOP_INQUIRE_CONFIG, NULL, /*parmlen*/0,
481 (u_int8_t*)&config_data, sizeof(config_data),
482 DEFAULT_CMD_TIMEOUT);
483 if (error != 0) {
af77114a 484 device_printf(aha->dev, "aha_fetch_adapter_info - Failed Get Config\n");
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485 return (error);
486 }
487 aha->scsi_id = config_data.scsi_id;
488 return (0);
489}
490
491/*
492 * Start the board, ready for normal operation
493 */
494int
495aha_init(struct aha_softc* aha)
496{
497 /* Announce the Adapter */
af77114a 498 device_printf(aha->dev, "AHA-%s FW Rev. %c.%c (ID=%x) ",
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499 aha->model, aha->fw_major, aha->fw_minor, aha->boardid);
500
501 if (aha->diff_bus != 0)
502 printf("Diff ");
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503 printf("SCSI Host Adapter, SCSI ID %d, %d CCBs\n", aha->scsi_id,
504 aha->max_ccbs);
505
506 /*
507 * Create our DMA tags. These tags define the kinds of device
508 * accessible memory allocations and memory mappings we will
509 * need to perform during normal operation.
510 *
511 * Unless we need to further restrict the allocation, we rely
512 * on the restrictions of the parent dmat, hence the common
513 * use of MAXADDR and MAXSIZE.
514 */
515
516 /* DMA tag for mapping buffers into device visible space. */
517 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
518 /*lowaddr*/BUS_SPACE_MAXADDR,
519 /*highaddr*/BUS_SPACE_MAXADDR,
520 /*filter*/NULL, /*filterarg*/NULL,
521 /*maxsize*/MAXBSIZE, /*nsegments*/AHA_NSEG,
522 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
523 /*flags*/BUS_DMA_ALLOCNOW,
524 &aha->buffer_dmat) != 0) {
525 goto error_exit;
526 }
527
528 aha->init_level++;
529 /* DMA tag for our mailboxes */
530 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
531 /*lowaddr*/BUS_SPACE_MAXADDR,
532 /*highaddr*/BUS_SPACE_MAXADDR,
533 /*filter*/NULL, /*filterarg*/NULL,
534 aha->num_boxes * (sizeof(aha_mbox_in_t)
535 + sizeof(aha_mbox_out_t)),
536 /*nsegments*/1,
537 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
538 /*flags*/0, &aha->mailbox_dmat) != 0) {
539 goto error_exit;
540 }
541
542 aha->init_level++;
543
544 /* Allocation for our mailboxes */
545 if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
546 BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0) {
547 goto error_exit;
548 }
549
550 aha->init_level++;
551
552 /* And permanently map them */
553 bus_dmamap_load(aha->mailbox_dmat, aha->mailbox_dmamap,
554 aha->out_boxes,
555 aha->num_boxes * (sizeof(aha_mbox_in_t)
556 + sizeof(aha_mbox_out_t)),
557 ahamapmboxes, aha, /*flags*/0);
558
559 aha->init_level++;
560
561 aha->in_boxes = (aha_mbox_in_t *)&aha->out_boxes[aha->num_boxes];
562
563 ahainitmboxes(aha);
564
565 /* DMA tag for our ccb structures */
566 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
567 /*lowaddr*/BUS_SPACE_MAXADDR,
568 /*highaddr*/BUS_SPACE_MAXADDR,
569 /*filter*/NULL, /*filterarg*/NULL,
570 aha->max_ccbs * sizeof(struct aha_ccb),
571 /*nsegments*/1,
572 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
573 /*flags*/0, &aha->ccb_dmat) != 0) {
574 goto error_exit;
575 }
576
577 aha->init_level++;
578
579 /* Allocation for our ccbs */
580 if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
581 BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0) {
582 goto error_exit;
583 }
584
585 aha->init_level++;
586
587 /* And permanently map them */
588 bus_dmamap_load(aha->ccb_dmat, aha->ccb_dmamap,
589 aha->aha_ccb_array,
590 aha->max_ccbs * sizeof(struct aha_ccb),
591 ahamapccbs, aha, /*flags*/0);
592
593 aha->init_level++;
594
595 /* DMA tag for our S/G structures. We allocate in page sized chunks */
596 if (bus_dma_tag_create(aha->parent_dmat, /*alignment*/1, /*boundary*/0,
597 /*lowaddr*/BUS_SPACE_MAXADDR,
598 /*highaddr*/BUS_SPACE_MAXADDR,
599 /*filter*/NULL, /*filterarg*/NULL,
600 PAGE_SIZE, /*nsegments*/1,
601 /*maxsegsz*/BUS_SPACE_MAXSIZE_24BIT,
602 /*flags*/0, &aha->sg_dmat) != 0) {
603 goto error_exit;
604 }
605
606 aha->init_level++;
607
608 /* Perform initial CCB allocation */
609 bzero(aha->aha_ccb_array, aha->max_ccbs * sizeof(struct aha_ccb));
610 ahaallocccbs(aha);
611
612 if (aha->num_ccbs == 0) {
af77114a
SZ
613 device_printf(aha->dev,
614 "aha_init - Unable to allocate initial ccbs\n");
984263bc
MD
615 goto error_exit;
616 }
617
618 /*
619 * Note that we are going and return (to probe)
620 */
621 return 0;
622
623error_exit:
624
625 return (ENXIO);
626}
627
628int
629aha_attach(struct aha_softc *aha)
630{
631 int tagged_dev_openings;
632 struct cam_devq *devq;
633
634 /*
635 * We don't do tagged queueing, since the aha cards don't
636 * support it.
637 */
638 tagged_dev_openings = 0;
639
640 /*
641 * Create the device queue for our SIM.
642 */
643 devq = cam_simq_alloc(aha->max_ccbs - 1);
644 if (devq == NULL)
645 return (ENOMEM);
646
647 /*
648 * Construct our SIM entry
649 */
af77114a 650 aha->sim = cam_sim_alloc(ahaaction, ahapoll, "aha", aha, device_get_unit(aha->dev),
984263bc 651 2, tagged_dev_openings, devq);
3aed1355 652 cam_simq_release(devq);
984263bc 653 if (aha->sim == NULL) {
984263bc
MD
654 return (ENOMEM);
655 }
656
657 if (xpt_bus_register(aha->sim, 0) != CAM_SUCCESS) {
3aed1355 658 cam_sim_free(aha->sim);
984263bc
MD
659 return (ENXIO);
660 }
661
662 if (xpt_create_path(&aha->path, /*periph*/NULL,
663 cam_sim_path(aha->sim), CAM_TARGET_WILDCARD,
664 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
665 xpt_bus_deregister(cam_sim_path(aha->sim));
3aed1355 666 cam_sim_free(aha->sim);
984263bc
MD
667 return (ENXIO);
668 }
669
670 return (0);
671}
672
984263bc
MD
673void
674aha_find_probe_range(int ioport, int *port_index, int *max_port_index)
675{
676 if (ioport > 0) {
677 int i;
678
679 for (i = 0;i < AHA_NUM_ISAPORTS; i++)
680 if (ioport <= aha_isa_ports[i].addr)
681 break;
682 if ((i >= AHA_NUM_ISAPORTS)
683 || (ioport != aha_isa_ports[i].addr)) {
684 printf("\n"
685"aha_isa_probe: Invalid baseport of 0x%x specified.\n"
686"aha_isa_probe: Nearest valid baseport is 0x%x.\n"
687"aha_isa_probe: Failing probe.\n",
688 ioport,
689 (i < AHA_NUM_ISAPORTS)
690 ? aha_isa_ports[i].addr
691 : aha_isa_ports[AHA_NUM_ISAPORTS - 1].addr);
692 *port_index = *max_port_index = -1;
693 return;
694 }
695 *port_index = *max_port_index = aha_isa_ports[i].bio;
696 } else {
697 *port_index = 0;
698 *max_port_index = AHA_NUM_ISAPORTS - 1;
699 }
700}
701
702int
703aha_iop_from_bio(isa_compat_io_t bio_index)
704{
705 if (bio_index >= 0 && bio_index < AHA_NUM_ISAPORTS)
706 return (aha_board_ports[bio_index]);
707 return (-1);
708}
709
710static void
711ahaallocccbs(struct aha_softc *aha)
712{
713 struct aha_ccb *next_ccb;
714 struct sg_map_node *sg_map;
715 bus_addr_t physaddr;
716 aha_sg_t *segs;
717 int newcount;
718 int i;
719
720 next_ccb = &aha->aha_ccb_array[aha->num_ccbs];
721
efda3bd0 722 sg_map = kmalloc(sizeof(*sg_map), M_DEVBUF, M_INTWAIT);
984263bc
MD
723
724 /* Allocate S/G space for the next batch of CCBS */
725 if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
726 BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
efda3bd0 727 kfree(sg_map, M_DEVBUF);
984263bc
MD
728 return;
729 }
730
731 SLIST_INSERT_HEAD(&aha->sg_maps, sg_map, links);
732
733 bus_dmamap_load(aha->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
734 PAGE_SIZE, ahamapsgs, aha, /*flags*/0);
735
736 segs = sg_map->sg_vaddr;
737 physaddr = sg_map->sg_physaddr;
738
739 newcount = (PAGE_SIZE / (AHA_NSEG * sizeof(aha_sg_t)));
740 for (i = 0; aha->num_ccbs < aha->max_ccbs && i < newcount; i++) {
741 int error;
742
743 next_ccb->sg_list = segs;
744 next_ccb->sg_list_phys = physaddr;
745 next_ccb->flags = ACCB_FREE;
746 error = bus_dmamap_create(aha->buffer_dmat, /*flags*/0,
747 &next_ccb->dmamap);
748 if (error != 0)
749 break;
750 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, next_ccb, links);
751 segs += AHA_NSEG;
752 physaddr += (AHA_NSEG * sizeof(aha_sg_t));
753 next_ccb++;
754 aha->num_ccbs++;
755 }
756
757 /* Reserve a CCB for error recovery */
758 if (aha->recovery_accb == NULL) {
759 aha->recovery_accb = SLIST_FIRST(&aha->free_aha_ccbs);
760 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
761 }
762}
763
764static __inline void
765ahafreeccb(struct aha_softc *aha, struct aha_ccb *accb)
766{
c1139c5e 767 crit_enter();
984263bc
MD
768 if ((accb->flags & ACCB_ACTIVE) != 0)
769 LIST_REMOVE(&accb->ccb->ccb_h, sim_links.le);
770 if (aha->resource_shortage != 0
771 && (accb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
772 accb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
773 aha->resource_shortage = FALSE;
774 }
775 accb->flags = ACCB_FREE;
776 SLIST_INSERT_HEAD(&aha->free_aha_ccbs, accb, links);
777 aha->active_ccbs--;
c1139c5e 778 crit_exit();
984263bc
MD
779}
780
781static struct aha_ccb*
782ahagetccb(struct aha_softc *aha)
783{
784 struct aha_ccb* accb;
984263bc 785
c1139c5e 786 crit_enter();
984263bc
MD
787 if ((accb = SLIST_FIRST(&aha->free_aha_ccbs)) != NULL) {
788 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
789 aha->active_ccbs++;
790 } else if (aha->num_ccbs < aha->max_ccbs) {
791 ahaallocccbs(aha);
792 accb = SLIST_FIRST(&aha->free_aha_ccbs);
793 if (accb == NULL)
af77114a 794 device_printf(aha->dev, "Can't malloc ACCB\n");
984263bc
MD
795 else {
796 SLIST_REMOVE_HEAD(&aha->free_aha_ccbs, links);
797 aha->active_ccbs++;
798 }
799 }
c1139c5e 800 crit_exit();
984263bc
MD
801
802 return (accb);
803}
804
805static void
806ahaaction(struct cam_sim *sim, union ccb *ccb)
807{
808 struct aha_softc *aha;
809
810 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahaaction\n"));
811
812 aha = (struct aha_softc *)cam_sim_softc(sim);
813
814 switch (ccb->ccb_h.func_code) {
815 /* Common cases first */
816 case XPT_SCSI_IO: /* Execute the requested I/O operation */
817 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
818 {
819 struct aha_ccb *accb;
820 struct aha_hccb *hccb;
821
822 /*
823 * get a accb to use.
824 */
825 if ((accb = ahagetccb(aha)) == NULL) {
c1139c5e 826 crit_enter();
984263bc 827 aha->resource_shortage = TRUE;
c1139c5e 828 crit_exit();
984263bc
MD
829 xpt_freeze_simq(aha->sim, /*count*/1);
830 ccb->ccb_h.status = CAM_REQUEUE_REQ;
831 xpt_done(ccb);
832 return;
833 }
834
835 hccb = &accb->hccb;
836
837 /*
838 * So we can find the ACCB when an abort is requested
839 */
840 accb->ccb = ccb;
841 ccb->ccb_h.ccb_accb_ptr = accb;
842 ccb->ccb_h.ccb_aha_ptr = aha;
843
844 /*
845 * Put all the arguments for the xfer in the accb
846 */
847 hccb->target = ccb->ccb_h.target_id;
848 hccb->lun = ccb->ccb_h.target_lun;
849 hccb->ahastat = 0;
850 hccb->sdstat = 0;
851
852 if (ccb->ccb_h.func_code == XPT_SCSI_IO) {
853 struct ccb_scsiio *csio;
854 struct ccb_hdr *ccbh;
855
856 csio = &ccb->csio;
857 ccbh = &csio->ccb_h;
858 hccb->opcode = aha->ccb_ccb_opcode;
859 hccb->datain = (ccb->ccb_h.flags & CAM_DIR_IN) != 0;
860 hccb->dataout = (ccb->ccb_h.flags & CAM_DIR_OUT) != 0;
861 hccb->cmd_len = csio->cdb_len;
862 if (hccb->cmd_len > sizeof(hccb->scsi_cdb)) {
863 ccb->ccb_h.status = CAM_REQ_INVALID;
864 ahafreeccb(aha, accb);
865 xpt_done(ccb);
866 return;
867 }
868 hccb->sense_len = csio->sense_len;
869 if ((ccbh->flags & CAM_CDB_POINTER) != 0) {
870 if ((ccbh->flags & CAM_CDB_PHYS) == 0) {
871 bcopy(csio->cdb_io.cdb_ptr,
872 hccb->scsi_cdb, hccb->cmd_len);
873 } else {
874 /* I guess I could map it in... */
875 ccbh->status = CAM_REQ_INVALID;
876 ahafreeccb(aha, accb);
877 xpt_done(ccb);
878 return;
879 }
880 } else {
881 bcopy(csio->cdb_io.cdb_bytes,
882 hccb->scsi_cdb, hccb->cmd_len);
883 }
884 /*
885 * If we have any data to send with this command,
886 * map it into bus space.
887 */
888 /* Only use S/G if there is a transfer */
889 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
890 if ((ccbh->flags & CAM_SCATTER_VALID) == 0) {
891 /*
892 * We've been given a pointer
893 * to a single buffer.
894 */
895 if ((ccbh->flags & CAM_DATA_PHYS)==0) {
984263bc
MD
896 int error;
897
c1139c5e 898 crit_enter();
984263bc
MD
899 error = bus_dmamap_load(
900 aha->buffer_dmat,
901 accb->dmamap,
902 csio->data_ptr,
903 csio->dxfer_len,
904 ahaexecuteccb,
905 accb,
906 /*flags*/0);
907 if (error == EINPROGRESS) {
908 /*
909 * So as to maintain
910 * ordering, freeze the
911 * controller queue
912 * until our mapping is
913 * returned.
914 */
915 xpt_freeze_simq(aha->sim,
916 1);
917 csio->ccb_h.status |=
918 CAM_RELEASE_SIMQ;
919 }
c1139c5e 920 crit_exit();
984263bc
MD
921 } else {
922 struct bus_dma_segment seg;
923
924 /* Pointer to physical buffer */
925 seg.ds_addr =
926 (bus_addr_t)csio->data_ptr;
927 seg.ds_len = csio->dxfer_len;
928 ahaexecuteccb(accb, &seg, 1, 0);
929 }
930 } else {
931 struct bus_dma_segment *segs;
932
933 if ((ccbh->flags & CAM_DATA_PHYS) != 0)
934 panic("ahaaction - Physical "
935 "segment pointers "
936 "unsupported");
937
938 if ((ccbh->flags&CAM_SG_LIST_PHYS)==0)
939 panic("ahaaction - Virtual "
940 "segment addresses "
941 "unsupported");
942
943 /* Just use the segments provided */
944 segs = (struct bus_dma_segment *)
945 csio->data_ptr;
946 ahaexecuteccb(accb, segs,
947 csio->sglist_cnt, 0);
948 }
949 } else {
950 ahaexecuteccb(accb, NULL, 0, 0);
951 }
952 } else {
953 hccb->opcode = INITIATOR_BUS_DEV_RESET;
954 /* No data transfer */
955 hccb->datain = TRUE;
956 hccb->dataout = TRUE;
957 hccb->cmd_len = 0;
958 hccb->sense_len = 0;
959 ahaexecuteccb(accb, NULL, 0, 0);
960 }
961 break;
962 }
963 case XPT_EN_LUN: /* Enable LUN as a target */
964 case XPT_TARGET_IO: /* Execute target I/O request */
965 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
966 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
967 case XPT_ABORT: /* Abort the specified CCB */
968 /* XXX Implement */
969 ccb->ccb_h.status = CAM_REQ_INVALID;
970 xpt_done(ccb);
971 break;
972 case XPT_SET_TRAN_SETTINGS:
973 {
974 /* XXX Implement */
975 ccb->ccb_h.status = CAM_PROVIDE_FAIL;
976 xpt_done(ccb);
977 break;
978 }
979 case XPT_GET_TRAN_SETTINGS:
980 /* Get default/user set transfer settings for the target */
981 {
982 struct ccb_trans_settings *cts;
983 u_int target_mask;
984
985 cts = &ccb->cts;
986 target_mask = 0x01 << ccb->ccb_h.target_id;
987 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
988 cts->flags = 0;
989 if ((aha->disc_permitted & target_mask) != 0)
990 cts->flags |= CCB_TRANS_DISC_ENB;
991 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
992 if ((aha->sync_permitted & target_mask) != 0) {
993 if (aha->boardid >= BOARD_1542CF)
994 cts->sync_period = 25;
995 else
996 cts->sync_period = 50;
997 } else
998 cts->sync_period = 0;
999
1000 if (cts->sync_period != 0)
1001 cts->sync_offset = 15;
1002
1003 cts->valid = CCB_TRANS_SYNC_RATE_VALID
1004 | CCB_TRANS_SYNC_OFFSET_VALID
1005 | CCB_TRANS_BUS_WIDTH_VALID
1006 | CCB_TRANS_DISC_VALID
1007 | CCB_TRANS_TQ_VALID;
1008 } else {
1009 ahafetchtransinfo(aha, cts);
1010 }
1011
1012 ccb->ccb_h.status = CAM_REQ_CMP;
1013 xpt_done(ccb);
1014 break;
1015 }
1016 case XPT_CALC_GEOMETRY:
1017 {
1018 struct ccb_calc_geometry *ccg;
1019 u_int32_t size_mb;
1020 u_int32_t secs_per_cylinder;
1021
1022 ccg = &ccb->ccg;
1023 size_mb = ccg->volume_size
1024 / ((1024L * 1024L) / ccg->block_size);
1025
1026 if (size_mb >= 1024 && (aha->extended_trans != 0)) {
1027 if (size_mb >= 2048) {
1028 ccg->heads = 255;
1029 ccg->secs_per_track = 63;
1030 } else {
1031 ccg->heads = 128;
1032 ccg->secs_per_track = 32;
1033 }
1034 } else {
1035 ccg->heads = 64;
1036 ccg->secs_per_track = 32;
1037 }
1038 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1039 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1040 ccb->ccb_h.status = CAM_REQ_CMP;
1041 xpt_done(ccb);
1042 break;
1043 }
1044 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1045 {
1046 ahareset(aha, /*hardreset*/TRUE);
1047 ccb->ccb_h.status = CAM_REQ_CMP;
1048 xpt_done(ccb);
1049 break;
1050 }
1051 case XPT_TERM_IO: /* Terminate the I/O process */
1052 /* XXX Implement */
1053 ccb->ccb_h.status = CAM_REQ_INVALID;
1054 xpt_done(ccb);
1055 break;
1056 case XPT_PATH_INQ: /* Path routing inquiry */
1057 {
1058 struct ccb_pathinq *cpi = &ccb->cpi;
1059
1060 cpi->version_num = 1; /* XXX??? */
1061 cpi->hba_inquiry = PI_SDTR_ABLE;
1062 cpi->target_sprt = 0;
1063 cpi->hba_misc = 0;
1064 cpi->hba_eng_cnt = 0;
1065 cpi->max_target = 7;
1066 cpi->max_lun = 7;
1067 cpi->initiator_id = aha->scsi_id;
1068 cpi->bus_id = cam_sim_bus(sim);
1069 cpi->base_transfer_speed = 3300;
1070 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1071 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
1072 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1073 cpi->unit_number = cam_sim_unit(sim);
1074 cpi->ccb_h.status = CAM_REQ_CMP;
1075 xpt_done(ccb);
1076 break;
1077 }
1078 default:
1079 ccb->ccb_h.status = CAM_REQ_INVALID;
1080 xpt_done(ccb);
1081 break;
1082 }
1083}
1084
1085static void
1086ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1087{
1088 struct aha_ccb *accb;
1089 union ccb *ccb;
1090 struct aha_softc *aha;
984263bc
MD
1091 u_int32_t paddr;
1092
1093 accb = (struct aha_ccb *)arg;
1094 ccb = accb->ccb;
1095 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1096
1097 if (error != 0) {
1098 if (error != EFBIG)
af77114a
SZ
1099 device_printf(aha->dev,
1100 "Unexepected error 0x%x returned from "
1101 "bus_dmamap_load\n", error);
984263bc
MD
1102 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
1103 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1104 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
1105 }
1106 ahafreeccb(aha, accb);
1107 xpt_done(ccb);
1108 return;
1109 }
1110
1111 if (nseg != 0) {
1112 aha_sg_t *sg;
1113 bus_dma_segment_t *end_seg;
1114 bus_dmasync_op_t op;
1115
1116 end_seg = dm_segs + nseg;
1117
1118 /* Copy the segments into our SG list */
1119 sg = accb->sg_list;
1120 while (dm_segs < end_seg) {
1121 ahautoa24(dm_segs->ds_len, sg->len);
1122 ahautoa24(dm_segs->ds_addr, sg->addr);
1123 sg++;
1124 dm_segs++;
1125 }
1126
1127 if (nseg > 1) {
1128 accb->hccb.opcode = aha->ccb_sg_opcode;
1129 ahautoa24((sizeof(aha_sg_t) * nseg),
1130 accb->hccb.data_len);
1131 ahautoa24(accb->sg_list_phys, accb->hccb.data_addr);
1132 } else {
1133 bcopy(accb->sg_list->len, accb->hccb.data_len, 3);
1134 bcopy(accb->sg_list->addr, accb->hccb.data_addr, 3);
1135 }
1136
1137 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1138 op = BUS_DMASYNC_PREREAD;
1139 else
1140 op = BUS_DMASYNC_PREWRITE;
1141
1142 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1143
1144 } else {
1145 accb->hccb.opcode = INITIATOR_CCB;
1146 ahautoa24(0, accb->hccb.data_len);
1147 ahautoa24(0, accb->hccb.data_addr);
1148 }
1149
c1139c5e 1150 crit_enter();
984263bc
MD
1151
1152 /*
1153 * Last time we need to check if this CCB needs to
1154 * be aborted.
1155 */
1156 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
1157 if (nseg != 0)
1158 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1159 ahafreeccb(aha, accb);
1160 xpt_done(ccb);
c1139c5e 1161 crit_exit();
984263bc
MD
1162 return;
1163 }
1164
1165 accb->flags = ACCB_ACTIVE;
1166 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1167 LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
1168
ddcafce9
JS
1169 callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000,
1170 ahatimeout, accb);
984263bc
MD
1171
1172 /* Tell the adapter about this command */
1173 if (aha->cur_outbox->action_code != AMBO_FREE) {
1174 /*
1175 * We should never encounter a busy mailbox.
1176 * If we do, warn the user, and treat it as
1177 * a resource shortage. If the controller is
1178 * hung, one of the pending transactions will
1179 * timeout causing us to start recovery operations.
1180 */
af77114a
SZ
1181 device_printf(aha->dev,
1182 "Encountered busy mailbox with %d out of %d "
1183 "commands active!!!", aha->active_ccbs, aha->max_ccbs);
ddcafce9 1184 callout_stop(&ccb->ccb_h.timeout_ch);
984263bc
MD
1185 if (nseg != 0)
1186 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1187 ahafreeccb(aha, accb);
1188 aha->resource_shortage = TRUE;
1189 xpt_freeze_simq(aha->sim, /*count*/1);
1190 ccb->ccb_h.status = CAM_REQUEUE_REQ;
1191 xpt_done(ccb);
b2a7de38 1192 crit_exit();
984263bc
MD
1193 return;
1194 }
1195 paddr = ahaccbvtop(aha, accb);
1196 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1197 aha->cur_outbox->action_code = AMBO_START;
1198 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1199
1200 ahanextoutbox(aha);
c1139c5e 1201 crit_exit();
984263bc
MD
1202}
1203
1204void
1205aha_intr(void *arg)
1206{
1207 struct aha_softc *aha;
1208 u_int intstat;
1209
1210 aha = (struct aha_softc *)arg;
1211 while (((intstat = aha_inb(aha, INTSTAT_REG)) & INTR_PENDING) != 0) {
1212 if ((intstat & CMD_COMPLETE) != 0) {
1213 aha->latched_status = aha_inb(aha, STATUS_REG);
1214 aha->command_cmp = TRUE;
1215 }
1216
1217 aha_outb(aha, CONTROL_REG, RESET_INTR);
1218
1219 if ((intstat & IMB_LOADED) != 0) {
1220 while (aha->cur_inbox->comp_code != AMBI_FREE) {
1221 u_int32_t paddr;
1222 paddr = aha_a24tou(aha->cur_inbox->ccb_addr);
1223 ahadone(aha,
1224 ahaccbptov(aha, paddr),
1225 aha->cur_inbox->comp_code);
1226 aha->cur_inbox->comp_code = AMBI_FREE;
1227 ahanextinbox(aha);
1228 }
1229 }
1230
1231 if ((intstat & SCSI_BUS_RESET) != 0) {
1232 ahareset(aha, /*hardreset*/FALSE);
1233 }
1234 }
1235}
1236
1237static void
1238ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_code)
1239{
1240 union ccb *ccb;
1241 struct ccb_scsiio *csio;
1242
1243 ccb = accb->ccb;
1244 csio = &accb->ccb->csio;
1245
1246 if ((accb->flags & ACCB_ACTIVE) == 0) {
af77114a
SZ
1247 device_printf(aha->dev,
1248 "ahadone - Attempt to free non-active ACCB %p\n",
1249 (void *)accb);
984263bc
MD
1250 return;
1251 }
1252
1253 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1254 bus_dmasync_op_t op;
1255
1256 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1257 op = BUS_DMASYNC_POSTREAD;
1258 else
1259 op = BUS_DMASYNC_POSTWRITE;
1260 bus_dmamap_sync(aha->buffer_dmat, accb->dmamap, op);
1261 bus_dmamap_unload(aha->buffer_dmat, accb->dmamap);
1262 }
1263
1264 if (accb == aha->recovery_accb) {
1265 /*
1266 * The recovery ACCB does not have a CCB associated
1267 * with it, so short circuit the normal error handling.
1268 * We now traverse our list of pending CCBs and process
1269 * any that were terminated by the recovery CCBs action.
1270 * We also reinstate timeouts for all remaining, pending,
1271 * CCBs.
1272 */
1273 struct cam_path *path;
1274 struct ccb_hdr *ccb_h;
1275 cam_status error;
1276
1277 /* Notify all clients that a BDR occured */
1278 error = xpt_create_path(&path, /*periph*/NULL,
1279 cam_sim_path(aha->sim),
1280 accb->hccb.target,
1281 CAM_LUN_WILDCARD);
1282
1283 if (error == CAM_REQ_CMP)
1284 xpt_async(AC_SENT_BDR, path, NULL);
1285
1286 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1287 while (ccb_h != NULL) {
1288 struct aha_ccb *pending_accb;
1289
1290 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1291 if (pending_accb->hccb.target == accb->hccb.target) {
1292 pending_accb->hccb.ahastat = AHASTAT_HA_BDR;
1293 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1294 ahadone(aha, pending_accb, AMBI_ERROR);
1295 } else {
ddcafce9
JS
1296 callout_reset(&ccb_h->timeout_ch,
1297 (ccb_h->timeout * hz) / 1000,
1298 ahatimeout, pending_accb);
984263bc
MD
1299 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1300 }
1301 }
af77114a 1302 device_printf(aha->dev, "No longer in timeout\n");
984263bc
MD
1303 return;
1304 }
1305
ddcafce9 1306 callout_stop(&ccb->ccb_h.timeout_ch);
984263bc
MD
1307
1308 switch (comp_code) {
1309 case AMBI_FREE:
af77114a
SZ
1310 device_printf(aha->dev,
1311 "ahadone - CCB completed with free status!\n");
984263bc
MD
1312 break;
1313 case AMBI_NOT_FOUND:
af77114a
SZ
1314 device_printf(aha->dev,
1315 "ahadone - CCB Abort failed to find CCB\n");
984263bc
MD
1316 break;
1317 case AMBI_ABORT:
1318 case AMBI_ERROR:
1319 /* An error occured */
1320 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1321 csio->resid = 0;
1322 else
1323 csio->resid = aha_a24tou(accb->hccb.data_len);
1324 switch(accb->hccb.ahastat) {
1325 case AHASTAT_DATARUN_ERROR:
1326 {
1327 if (csio->resid <= 0) {
1328 csio->ccb_h.status = CAM_DATA_RUN_ERR;
1329 break;
1330 }
1331 /* FALLTHROUGH */
1332 }
1333 case AHASTAT_NOERROR:
1334 csio->scsi_status = accb->hccb.sdstat;
1335 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1336 switch(csio->scsi_status) {
1337 case SCSI_STATUS_CHECK_COND:
1338 case SCSI_STATUS_CMD_TERMINATED:
1339 csio->ccb_h.status |= CAM_AUTOSNS_VALID;
1340 /*
1341 * The aha writes the sense data at different
1342 * offsets based on the scsi cmd len
1343 */
1344 bcopy((caddr_t) &accb->hccb.scsi_cdb +
1345 accb->hccb.cmd_len,
1346 (caddr_t) &csio->sense_data,
1347 accb->hccb.sense_len);
1348 break;
1349 default:
1350 break;
1351 case SCSI_STATUS_OK:
1352 csio->ccb_h.status = CAM_REQ_CMP;
1353 break;
1354 }
1355 break;
1356 case AHASTAT_SELTIMEOUT:
1357 csio->ccb_h.status = CAM_SEL_TIMEOUT;
1358 break;
1359 case AHASTAT_UNEXPECTED_BUSFREE:
1360 csio->ccb_h.status = CAM_UNEXP_BUSFREE;
1361 break;
1362 case AHASTAT_INVALID_PHASE:
1363 csio->ccb_h.status = CAM_SEQUENCE_FAIL;
1364 break;
1365 case AHASTAT_INVALID_ACTION_CODE:
1366 panic("%s: Inavlid Action code", aha_name(aha));
1367 break;
1368 case AHASTAT_INVALID_OPCODE:
1369 if (accb->hccb.opcode < INITIATOR_CCB_WRESID)
1370 panic("%s: Invalid CCB Opcode %x hccb = %p",
1371 aha_name(aha), accb->hccb.opcode,
1372 &accb->hccb);
af77114a
SZ
1373 device_printf(aha->dev,
1374 "AHA-1540A detected, compensating\n");
984263bc
MD
1375 aha->ccb_sg_opcode = INITIATOR_SG_CCB;
1376 aha->ccb_ccb_opcode = INITIATOR_CCB;
1377 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
1378 csio->ccb_h.status = CAM_REQUEUE_REQ;
1379 break;
1380 case AHASTAT_LINKED_CCB_LUN_MISMATCH:
1381 /* We don't even support linked commands... */
1382 panic("%s: Linked CCB Lun Mismatch", aha_name(aha));
1383 break;
1384 case AHASTAT_INVALID_CCB_OR_SG_PARAM:
1385 panic("%s: Invalid CCB or SG list", aha_name(aha));
1386 break;
1387 case AHASTAT_HA_SCSI_BUS_RESET:
1388 if ((csio->ccb_h.status & CAM_STATUS_MASK)
1389 != CAM_CMD_TIMEOUT)
1390 csio->ccb_h.status = CAM_SCSI_BUS_RESET;
1391 break;
1392 case AHASTAT_HA_BDR:
1393 if ((accb->flags & ACCB_DEVICE_RESET) == 0)
1394 csio->ccb_h.status = CAM_BDR_SENT;
1395 else
1396 csio->ccb_h.status = CAM_CMD_TIMEOUT;
1397 break;
1398 }
1399 if (csio->ccb_h.status != CAM_REQ_CMP) {
1400 xpt_freeze_devq(csio->ccb_h.path, /*count*/1);
1401 csio->ccb_h.status |= CAM_DEV_QFRZN;
1402 }
1403 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1404 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1405 ahafreeccb(aha, accb);
1406 xpt_done(ccb);
1407 break;
1408 case AMBI_OK:
1409 /* All completed without incident */
1410 /* XXX DO WE NEED TO COPY SENSE BYTES HERE???? XXX */
1411 /* I don't think so since it works???? */
1412 ccb->ccb_h.status |= CAM_REQ_CMP;
1413 if ((accb->flags & ACCB_RELEASE_SIMQ) != 0)
1414 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1415 ahafreeccb(aha, accb);
1416 xpt_done(ccb);
1417 break;
1418 }
1419}
1420
1421static int
1422ahareset(struct aha_softc* aha, int hard_reset)
1423{
1424 struct ccb_hdr *ccb_h;
1425 u_int status;
1426 u_int timeout;
1427 u_int8_t reset_type;
1428
1429 if (hard_reset != 0)
1430 reset_type = HARD_RESET;
1431 else
1432 reset_type = SOFT_RESET;
1433 aha_outb(aha, CONTROL_REG, reset_type);
1434
1435 /* Wait 5sec. for Diagnostic start */
1436 timeout = 5 * 10000;
1437 while (--timeout) {
1438 status = aha_inb(aha, STATUS_REG);
1439 if ((status & DIAG_ACTIVE) != 0)
1440 break;
1441 DELAY(100);
1442 }
1443 if (timeout == 0) {
af77114a
SZ
1444 PRVERB((aha->dev, "ahareset - Diagnostic Active failed to "
1445 "assert. status = 0x%x\n", status));
984263bc
MD
1446 return (ETIMEDOUT);
1447 }
1448
1449 /* Wait 10sec. for Diagnostic end */
1450 timeout = 10 * 10000;
1451 while (--timeout) {
1452 status = aha_inb(aha, STATUS_REG);
1453 if ((status & DIAG_ACTIVE) == 0)
1454 break;
1455 DELAY(100);
1456 }
1457 if (timeout == 0) {
1458 panic("%s: ahareset - Diagnostic Active failed to drop. "
1459 "status = 0x%x\n", aha_name(aha), status);
1460 return (ETIMEDOUT);
1461 }
1462
1463 /* Wait for the host adapter to become ready or report a failure */
1464 timeout = 10000;
1465 while (--timeout) {
1466 status = aha_inb(aha, STATUS_REG);
1467 if ((status & (DIAG_FAIL|HA_READY|DATAIN_REG_READY)) != 0)
1468 break;
1469 DELAY(100);
1470 }
1471 if (timeout == 0) {
af77114a
SZ
1472 device_printf(aha->dev, "ahareset - Host adapter failed to "
1473 "come ready. status = 0x%x\n", status);
984263bc
MD
1474 return (ETIMEDOUT);
1475 }
1476
1477 /* If the diagnostics failed, tell the user */
1478 if ((status & DIAG_FAIL) != 0
1479 || (status & HA_READY) == 0) {
af77114a 1480 device_printf(aha->dev, "ahareset - Adapter failed diagnostics\n");
984263bc 1481 if ((status & DATAIN_REG_READY) != 0)
af77114a
SZ
1482 device_printf(aha->dev, "ahareset - Host Adapter "
1483 "Error code = 0x%x\n", aha_inb(aha, DATAIN_REG));
984263bc
MD
1484 return (ENXIO);
1485 }
1486
1487 /* If we've allocated mailboxes, initialize them */
1488 if (aha->init_level > 4)
1489 ahainitmboxes(aha);
1490
1491 /* If we've attached to the XPT, tell it about the event */
1492 if (aha->path != NULL)
1493 xpt_async(AC_BUS_RESET, aha->path, NULL);
1494
1495 /*
1496 * Perform completion processing for all outstanding CCBs.
1497 */
1498 while ((ccb_h = LIST_FIRST(&aha->pending_ccbs)) != NULL) {
1499 struct aha_ccb *pending_accb;
1500
1501 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
1502 pending_accb->hccb.ahastat = AHASTAT_HA_SCSI_BUS_RESET;
1503 ahadone(aha, pending_accb, AMBI_ERROR);
1504 }
1505
1506 return (0);
1507}
1508
1509/*
1510 * Send a command to the adapter.
1511 */
1512int
1513aha_cmd(struct aha_softc *aha, aha_op_t opcode, u_int8_t *params,
1514 u_int param_len, u_int8_t *reply_data, u_int reply_len,
1515 u_int cmd_timeout)
1516{
1517 u_int timeout;
1518 u_int status;
1519 u_int saved_status;
1520 u_int intstat;
1521 u_int reply_buf_size;
984263bc
MD
1522 int cmd_complete;
1523 int error;
1524
1525 /* No data returned to start */
1526 reply_buf_size = reply_len;
1527 reply_len = 0;
1528 intstat = 0;
1529 cmd_complete = 0;
1530 saved_status = 0;
1531 error = 0;
1532
1533 /*
1534 * All commands except for the "start mailbox" and the "enable
1535 * outgoing mailbox read interrupt" commands cannot be issued
1536 * while there are pending transactions. Freeze our SIMQ
1537 * and wait for all completions to occur if necessary.
1538 */
1539 timeout = 100000;
c1139c5e 1540 crit_enter();
984263bc
MD
1541 while (LIST_FIRST(&aha->pending_ccbs) != NULL && --timeout) {
1542 /* Fire the interrupt handler in case interrupts are blocked */
1543 aha_intr(aha);
c1139c5e 1544 crit_exit();
984263bc 1545 DELAY(100);
c1139c5e 1546 crit_enter();
984263bc 1547 }
c1139c5e 1548 crit_exit();
984263bc
MD
1549
1550 if (timeout == 0) {
af77114a 1551 device_printf(aha->dev, "aha_cmd: Timeout waiting for adapter idle\n");
984263bc
MD
1552 return (ETIMEDOUT);
1553 }
1554 aha->command_cmp = 0;
1555 /*
1556 * Wait up to 10 sec. for the adapter to become
1557 * ready to accept commands.
1558 */
1559 timeout = 100000;
1560 while (--timeout) {
1561
1562 status = aha_inb(aha, STATUS_REG);
1563 if ((status & HA_READY) != 0
1564 && (status & CMD_REG_BUSY) == 0)
1565 break;
1566 /*
1567 * Throw away any pending data which may be
1568 * left over from earlier commands that we
1569 * timedout on.
1570 */
1571 if ((status & DATAIN_REG_READY) != 0)
1572 (void)aha_inb(aha, DATAIN_REG);
1573 DELAY(100);
1574 }
1575 if (timeout == 0) {
af77114a
SZ
1576 device_printf(aha->dev, "aha_cmd: Timeout waiting for adapter "
1577 "ready, status = 0x%x\n", status);
984263bc
MD
1578 return (ETIMEDOUT);
1579 }
1580
1581 /*
1582 * Send the opcode followed by any necessary parameter bytes.
1583 */
1584 aha_outb(aha, COMMAND_REG, opcode);
1585
1586 /*
1587 * Wait for up to 1sec to get the parameter list sent
1588 */
1589 timeout = 10000;
1590 while (param_len && --timeout) {
1591 DELAY(100);
c1139c5e 1592 crit_enter();
984263bc
MD
1593 status = aha_inb(aha, STATUS_REG);
1594 intstat = aha_inb(aha, INTSTAT_REG);
c1139c5e 1595 crit_exit();
984263bc
MD
1596
1597 if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1598 == (INTR_PENDING|CMD_COMPLETE)) {
1599 saved_status = status;
1600 cmd_complete = 1;
1601 break;
1602 }
1603
1604 if (aha->command_cmp != 0) {
1605 saved_status = aha->latched_status;
1606 cmd_complete = 1;
1607 break;
1608 }
1609 if ((status & DATAIN_REG_READY) != 0)
1610 break;
1611 if ((status & CMD_REG_BUSY) == 0) {
1612 aha_outb(aha, COMMAND_REG, *params++);
1613 param_len--;
1614 timeout = 10000;
1615 }
1616 }
1617 if (timeout == 0) {
af77114a
SZ
1618 device_printf(aha->dev, "aha_cmd: Timeout sending parameters, "
1619 "status = 0x%x\n", status);
984263bc
MD
1620 error = ETIMEDOUT;
1621 }
1622
1623 /*
1624 * For all other commands, we wait for any output data
1625 * and the final comand completion interrupt.
1626 */
1627 while (cmd_complete == 0 && --cmd_timeout) {
1628
c1139c5e 1629 crit_enter();
984263bc
MD
1630 status = aha_inb(aha, STATUS_REG);
1631 intstat = aha_inb(aha, INTSTAT_REG);
c1139c5e 1632 crit_exit();
984263bc
MD
1633
1634 if (aha->command_cmp != 0) {
1635 cmd_complete = 1;
1636 saved_status = aha->latched_status;
1637 } else if ((intstat & (INTR_PENDING|CMD_COMPLETE))
1638 == (INTR_PENDING|CMD_COMPLETE)) {
1639 /*
1640 * Our poll (in case interrupts are blocked)
1641 * saw the CMD_COMPLETE interrupt.
1642 */
1643 cmd_complete = 1;
1644 saved_status = status;
1645 }
1646 if ((status & DATAIN_REG_READY) != 0) {
1647 u_int8_t data;
1648
1649 data = aha_inb(aha, DATAIN_REG);
1650 if (reply_len < reply_buf_size) {
1651 *reply_data++ = data;
1652 } else {
af77114a
SZ
1653 device_printf(aha->dev, "aha_cmd - Discarded reply data "
1654 "byte for opcode 0x%x\n", opcode);
984263bc
MD
1655 }
1656 /*
1657 * Reset timeout to ensure at least a second
1658 * between response bytes.
1659 */
1660 cmd_timeout = MAX(cmd_timeout, 10000);
1661 reply_len++;
1662 }
1663 DELAY(100);
1664 }
1665 if (cmd_timeout == 0) {
af77114a
SZ
1666 device_printf(aha->dev, "aha_cmd: Timeout: status = 0x%x, "
1667 "intstat = 0x%x, reply_len = %d\n", status, intstat,
1668 reply_len);
984263bc
MD
1669 return (ETIMEDOUT);
1670 }
1671
1672 /*
1673 * Clear any pending interrupts. Block interrupts so our
1674 * interrupt handler is not re-entered.
1675 */
c1139c5e 1676 crit_enter();
984263bc 1677 aha_intr(aha);
c1139c5e 1678 crit_exit();
984263bc
MD
1679
1680 if (error != 0)
1681 return (error);
1682
1683 /*
1684 * If the command was rejected by the controller, tell the caller.
1685 */
1686 if ((saved_status & CMD_INVALID) != 0) {
af77114a 1687 PRVERB((aha->dev, "Invalid Command 0x%x\n", opcode));
984263bc
MD
1688 /*
1689 * Some early adapters may not recover properly from
1690 * an invalid command. If it appears that the controller
1691 * has wedged (i.e. status was not cleared by our interrupt
1692 * reset above), perform a soft reset.
1693 */
1694 DELAY(1000);
1695 status = aha_inb(aha, STATUS_REG);
1696 if ((status & (CMD_INVALID|STATUS_REG_RSVD|DATAIN_REG_READY|
1697 CMD_REG_BUSY|DIAG_FAIL|DIAG_ACTIVE)) != 0
1698 || (status & (HA_READY|INIT_REQUIRED))
1699 != (HA_READY|INIT_REQUIRED)) {
1700 ahareset(aha, /*hard_reset*/FALSE);
1701 }
1702 return (EINVAL);
1703 }
1704
1705 if (param_len > 0) {
1706 /* The controller did not accept the full argument list */
af77114a
SZ
1707 PRVERB((aha->dev, "Controller did not accept full argument "
1708 "list (%d > 0)\n", param_len));
984263bc
MD
1709 return (E2BIG);
1710 }
1711
1712 if (reply_len != reply_buf_size) {
1713 /* Too much or too little data received */
af77114a
SZ
1714 PRVERB((aha->dev,"data received mistmatch (%d != %d)\n",
1715 reply_len, reply_buf_size));
984263bc
MD
1716 return (EMSGSIZE);
1717 }
1718
1719 /* We were successful */
1720 return (0);
1721}
1722
1723static int
1724ahainitmboxes(struct aha_softc *aha)
1725{
1726 int error;
1727 init_24b_mbox_params_t init_mbox;
1728
1729 bzero(aha->in_boxes, sizeof(aha_mbox_in_t) * aha->num_boxes);
1730 bzero(aha->out_boxes, sizeof(aha_mbox_out_t) * aha->num_boxes);
1731 aha->cur_inbox = aha->in_boxes;
1732 aha->last_inbox = aha->in_boxes + aha->num_boxes - 1;
1733 aha->cur_outbox = aha->out_boxes;
1734 aha->last_outbox = aha->out_boxes + aha->num_boxes - 1;
1735
1736 /* Tell the adapter about them */
1737 init_mbox.num_mboxes = aha->num_boxes;
1738 ahautoa24(aha->mailbox_physbase, init_mbox.base_addr);
1739 error = aha_cmd(aha, AOP_INITIALIZE_MBOX, (u_int8_t *)&init_mbox,
1740 /*parmlen*/sizeof(init_mbox), /*reply_buf*/NULL,
1741 /*reply_len*/0, DEFAULT_CMD_TIMEOUT);
1742
1743 if (error != 0)
af77114a
SZ
1744 device_printf(aha->dev,
1745 "ahainitmboxes: Initialization command failed\n");
984263bc
MD
1746 return (error);
1747}
1748
1749/*
1750 * Update the XPT's idea of the negotiated transfer
1751 * parameters for a particular target.
1752 */
1753static void
1754ahafetchtransinfo(struct aha_softc *aha, struct ccb_trans_settings* cts)
1755{
1756 setup_data_t setup_info;
1757 u_int target;
1758 u_int targ_offset;
1759 u_int sync_period;
1760 int error;
1761 u_int8_t param;
1762 targ_syncinfo_t sync_info;
1763
1764 target = cts->ccb_h.target_id;
1765 targ_offset = (target & 0x7);
1766
1767 /*
1768 * Inquire Setup Information. This command retreives
1769 * the sync info for older models.
1770 */
1771 param = sizeof(setup_info);
1772 error = aha_cmd(aha, AOP_INQUIRE_SETUP_INFO, &param, /*paramlen*/1,
1773 (u_int8_t*)&setup_info, sizeof(setup_info),
1774 DEFAULT_CMD_TIMEOUT);
1775
1776 if (error != 0) {
af77114a
SZ
1777 device_printf(aha->dev,
1778 "ahafetchtransinfo - Inquire Setup Info Failed %d\n",
1779 error);
984263bc
MD
1780 return;
1781 }
1782
1783 sync_info = setup_info.syncinfo[targ_offset];
1784
1785 if (sync_info.sync == 0)
1786 cts->sync_offset = 0;
1787 else
1788 cts->sync_offset = sync_info.offset;
1789
1790 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1791
1792 if (aha->boardid >= BOARD_1542CF)
1793 sync_period = 1000;
1794 else
1795 sync_period = 2000;
1796 sync_period += 500 * sync_info.period;
1797
1798 /* Convert ns value to standard SCSI sync rate */
1799 if (cts->sync_offset != 0)
1800 cts->sync_period = scsi_calc_syncparam(sync_period);
1801 else
1802 cts->sync_period = 0;
1803
1804 cts->valid = CCB_TRANS_SYNC_RATE_VALID
1805 | CCB_TRANS_SYNC_OFFSET_VALID
1806 | CCB_TRANS_BUS_WIDTH_VALID;
1807 xpt_async(AC_TRANSFER_NEG, cts->ccb_h.path, cts);
1808}
1809
1810static void
1811ahamapmboxes(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1812{
1813 struct aha_softc* aha;
1814
1815 aha = (struct aha_softc*)arg;
1816 aha->mailbox_physbase = segs->ds_addr;
1817}
1818
1819static void
1820ahamapccbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1821{
1822 struct aha_softc* aha;
1823
1824 aha = (struct aha_softc*)arg;
1825 aha->aha_ccb_physbase = segs->ds_addr;
1826}
1827
1828static void
1829ahamapsgs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1830{
1831
1832 struct aha_softc* aha;
1833
1834 aha = (struct aha_softc*)arg;
1835 SLIST_FIRST(&aha->sg_maps)->sg_physaddr = segs->ds_addr;
1836}
1837
1838static void
1839ahapoll(struct cam_sim *sim)
1840{
1841 aha_intr(cam_sim_softc(sim));
1842}
1843
1844static void
1845ahatimeout(void *arg)
1846{
1847 struct aha_ccb *accb;
1848 union ccb *ccb;
1849 struct aha_softc *aha;
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1850 u_int32_t paddr;
1851
1852 accb = (struct aha_ccb *)arg;
1853 ccb = accb->ccb;
1854 aha = (struct aha_softc *)ccb->ccb_h.ccb_aha_ptr;
1855 xpt_print_path(ccb->ccb_h.path);
1856 printf("CCB %p - timed out\n", (void *)accb);
1857
c1139c5e 1858 crit_enter();
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1859
1860 if ((accb->flags & ACCB_ACTIVE) == 0) {
1861 xpt_print_path(ccb->ccb_h.path);
1862 printf("CCB %p - timed out CCB already completed\n",
1863 (void *)accb);
c1139c5e 1864 crit_exit();
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1865 return;
1866 }
1867
1868 /*
1869 * In order to simplify the recovery process, we ask the XPT
1870 * layer to halt the queue of new transactions and we traverse
1871 * the list of pending CCBs and remove their timeouts. This
1872 * means that the driver attempts to clear only one error
1873 * condition at a time. In general, timeouts that occur
1874 * close together are related anyway, so there is no benefit
1875 * in attempting to handle errors in parrallel. Timeouts will
1876 * be reinstated when the recovery process ends.
1877 */
1878 if ((accb->flags & ACCB_DEVICE_RESET) == 0) {
1879 struct ccb_hdr *ccb_h;
1880
1881 if ((accb->flags & ACCB_RELEASE_SIMQ) == 0) {
1882 xpt_freeze_simq(aha->sim, /*count*/1);
1883 accb->flags |= ACCB_RELEASE_SIMQ;
1884 }
1885
1886 ccb_h = LIST_FIRST(&aha->pending_ccbs);
1887 while (ccb_h != NULL) {
1888 struct aha_ccb *pending_accb;
1889
1890 pending_accb = (struct aha_ccb *)ccb_h->ccb_accb_ptr;
ddcafce9 1891 callout_stop(&ccb_h->timeout_ch);
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1892 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
1893 }
1894 }
1895
1896 if ((accb->flags & ACCB_DEVICE_RESET) != 0
1897 || aha->cur_outbox->action_code != AMBO_FREE) {
1898 /*
1899 * Try a full host adapter/SCSI bus reset.
1900 * We do this only if we have already attempted
1901 * to clear the condition with a BDR, or we cannot
1902 * attempt a BDR for lack of mailbox resources.
1903 */
1904 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1905 ahareset(aha, /*hardreset*/TRUE);
af77114a 1906 device_printf(aha->dev, "No longer in timeout\n");
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1907 } else {
1908 /*
1909 * Send a Bus Device Reset message:
1910 * The target that is holding up the bus may not
1911 * be the same as the one that triggered this timeout
1912 * (different commands have different timeout lengths),
1913 * but we have no way of determining this from our
1914 * timeout handler. Our strategy here is to queue a
1915 * BDR message to the target of the timed out command.
1916 * If this fails, we'll get another timeout 2 seconds
1917 * later which will attempt a bus reset.
1918 */
1919 accb->flags |= ACCB_DEVICE_RESET;
ddcafce9 1920 callout_reset(&ccb->ccb_h.timeout_ch, 2 * hz, ahatimeout, accb);
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1921 aha->recovery_accb->hccb.opcode = INITIATOR_BUS_DEV_RESET;
1922
1923 /* No Data Transfer */
1924 aha->recovery_accb->hccb.datain = TRUE;
1925 aha->recovery_accb->hccb.dataout = TRUE;
1926 aha->recovery_accb->hccb.ahastat = 0;
1927 aha->recovery_accb->hccb.sdstat = 0;
1928 aha->recovery_accb->hccb.target = ccb->ccb_h.target_id;
1929
1930 /* Tell the adapter about this command */
1931 paddr = ahaccbvtop(aha, aha->recovery_accb);
1932 ahautoa24(paddr, aha->cur_outbox->ccb_addr);
1933 aha->cur_outbox->action_code = AMBO_START;
1934 aha_outb(aha, COMMAND_REG, AOP_START_MBOX);
1935 ahanextoutbox(aha);
1936 }
1937
c1139c5e 1938 crit_exit();
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1939}
1940
1941int
1942aha_detach(struct aha_softc *aha)
1943{
1944 xpt_async(AC_LOST_DEVICE, aha->path, NULL);
1945 xpt_free_path(aha->path);
1946 xpt_bus_deregister(cam_sim_path(aha->sim));
3aed1355 1947 cam_sim_free(aha->sim);
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1948 return (0);
1949}