Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / dev / disk / mpt / mpt_pci.c
CommitLineData
984263bc 1/* $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.3.2.3 2002/09/24 21:37:25 mjacob Exp $ */
1f7ab7c9 2/* $DragonFly: src/sys/dev/disk/mpt/mpt_pci.c,v 1.9 2006/10/25 20:55:53 dillon Exp $ */
984263bc
MD
3/*
4 * PCI specific probe and attach routines for LSI '909 FC adapters.
5 * FreeBSD Version.
6 *
7 * Copyright (c) 2000, 2001 by Greg Ansley
8 * Partially derived from Matt Jacob's ISP driver.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31/*
32 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/bus.h>
1f7ab7c9
MD
40#include <sys/rman.h>
41#include <sys/malloc.h>
984263bc 42
2f23e4e2 43#include <bus/pci/pcidevs.h>
1f2de5d4
MD
44#include <bus/pci/pcireg.h>
45#include <bus/pci/pcivar.h>
984263bc 46
1f2de5d4 47#include "mpt_freebsd.h"
984263bc 48
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49#ifndef PCIM_CMD_SERRESPEN
50#define PCIM_CMD_SERRESPEN 0x0100
51#endif
52
53
54
55#define MEM_MAP_REG 0x14
56#define MEM_MAP_SRAM 0x1C
57
58static int mpt_probe(device_t);
59static int mpt_attach(device_t);
60static void mpt_free_bus_resources(mpt_softc_t *mpt);
61static int mpt_detach(device_t);
62static int mpt_shutdown(device_t);
63static int mpt_dma_mem_alloc(mpt_softc_t *mpt);
64static void mpt_dma_mem_free(mpt_softc_t *mpt);
65static void mpt_read_config_regs(mpt_softc_t *mpt);
66static void mpt_pci_intr(void *);
67
68static device_method_t mpt_methods[] = {
69 /* Device interface */
70 DEVMETHOD(device_probe, mpt_probe),
71 DEVMETHOD(device_attach, mpt_attach),
72 DEVMETHOD(device_detach, mpt_detach),
73 DEVMETHOD(device_shutdown, mpt_shutdown),
74 { 0, 0 }
75};
76
77static driver_t mpt_driver = {
78 "mpt", mpt_methods, sizeof (mpt_softc_t)
79};
80static devclass_t mpt_devclass;
81DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
82MODULE_VERSION(mpt, 1);
83
84int
85mpt_intr(void *dummy)
86{
87 int nrepl = 0;
88 u_int32_t reply;
89 mpt_softc_t *mpt = (mpt_softc_t *)dummy;
90
91 if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0)
92 return (0);
93 reply = mpt_pop_reply_queue(mpt);
94 while (reply != MPT_REPLY_EMPTY) {
95 nrepl++;
96 if (mpt->verbose > 1) {
97 if ((reply & MPT_CONTEXT_REPLY) != 0) {
98 /* Address reply; IOC has something to say */
99 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
100 } else {
101 /* Context reply ; all went well */
102 device_printf(mpt->dev,
103 "context %u reply OK\n", reply);
104 }
105 }
106 mpt_done(mpt, reply);
107 reply = mpt_pop_reply_queue(mpt);
108 }
109 return (nrepl != 0);
110}
111
112static int
113mpt_probe(device_t dev)
114{
115 char *desc;
116
2f23e4e2 117 if (pci_get_vendor(dev) != PCI_VENDOR_SYMBIOS)
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118 return (ENXIO);
119
120 switch ((pci_get_device(dev) & ~1)) {
2f23e4e2 121 case PCI_PRODUCT_SYMBIOS_FC909:
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122 desc = "LSILogic FC909 FC Adapter";
123 break;
2f23e4e2 124 case PCI_PRODUCT_SYMBIOS_FC909A:
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125 desc = "LSILogic FC909A FC Adapter";
126 break;
2f23e4e2 127 case PCI_PRODUCT_SYMBIOS_FC919:
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128 desc = "LSILogic FC919 FC Adapter";
129 break;
2f23e4e2 130 case PCI_PRODUCT_SYMBIOS_FC929:
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131 desc = "LSILogic FC929 FC Adapter";
132 break;
2f23e4e2 133 case PCI_PRODUCT_SYMBIOS_1030:
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134 desc = "LSILogic 1030 Ultra4 Adapter";
135 break;
136 default:
137 return (ENXIO);
138 }
139
140 device_set_desc(dev, desc);
141 return (0);
142}
143
144#ifdef RELENG_4
145static void
146mpt_set_options(mpt_softc_t *mpt)
147{
148 int bitmap;
149
150 bitmap = 0;
bc01a404 151 if (kgetenv_int("mpt_disable", &bitmap)) {
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152 if (bitmap & (1 << mpt->unit)) {
153 mpt->disabled = 1;
154 }
155 }
156
157 bitmap = 0;
bc01a404 158 if (kgetenv_int("mpt_debug", &bitmap)) {
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159 if (bitmap & (1 << mpt->unit)) {
160 mpt->verbose = 2;
161 }
162 }
163
164}
165#else
166static void
167mpt_set_options(mpt_softc_t *mpt)
168{
169 int tval;
170
171 tval = 0;
172 if (resource_int_value(device_get_name(mpt->dev),
173 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
174 mpt->disabled = 1;
175 }
176 tval = 0;
177 if (resource_int_value(device_get_name(mpt->dev),
178 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
179 mpt->verbose += tval;
180 }
181}
182#endif
183
184
185static void
186mpt_link_peer(mpt_softc_t *mpt)
187{
188 mpt_softc_t *mpt2;
189
190 if (mpt->unit == 0) {
191 return;
192 }
193
194 /*
195 * XXX: depends on probe order
196 */
197 mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1);
198
199 if (mpt2 == NULL) {
200 return;
201 }
202 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
203 return;
204 }
205 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
206 return;
207 }
208 mpt->mpt2 = mpt2;
209 mpt2->mpt2 = mpt;
210 if (mpt->verbose) {
211 device_printf(mpt->dev, "linking with peer (mpt%d)\n",
212 device_get_unit(mpt2->dev));
213 }
214}
215
216
217static int
218mpt_attach(device_t dev)
219{
220 int iqd;
221 u_int32_t data, cmd;
222 mpt_softc_t *mpt;
223
224 /* Allocate the softc structure */
225 mpt = (mpt_softc_t*) device_get_softc(dev);
226 if (mpt == NULL) {
227 device_printf(dev, "cannot allocate softc\n");
228 return (ENOMEM);
229 }
230 bzero(mpt, sizeof (mpt_softc_t));
231 switch ((pci_get_device(dev) & ~1)) {
2f23e4e2
SW
232 case PCI_PRODUCT_SYMBIOS_FC909:
233 case PCI_PRODUCT_SYMBIOS_FC909A:
234 case PCI_PRODUCT_SYMBIOS_FC919:
235 case PCI_PRODUCT_SYMBIOS_FC929:
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236 mpt->is_fc = 1;
237 break;
238 default:
239 break;
240 }
241 mpt->dev = dev;
242 mpt->unit = device_get_unit(dev);
243 mpt_set_options(mpt);
244 mpt->verbose += (bootverbose != 0)? 1 : 0;
245
246 /* Make sure memory access decoders are enabled */
247 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
248 if ((cmd & PCIM_CMD_MEMEN) == 0) {
249 device_printf(dev, "Memory accesses disabled");
250 goto bad;
251 }
252
253 /*
254 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
255 */
256 cmd |=
257 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
258 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
259 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
260
261 /*
262 * Make sure we've disabled the ROM.
263 */
264 data = pci_read_config(dev, PCIR_BIOS, 4);
265 data &= ~1;
266 pci_write_config(dev, PCIR_BIOS, data, 4);
267
268
269 /*
270 * Is this part a dual?
271 * If so, link with our partner (around yet)
272 */
2f23e4e2
SW
273 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_SYMBIOS_FC929 ||
274 (pci_get_device(dev) & ~1) == PCI_PRODUCT_SYMBIOS_1030) {
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275 mpt_link_peer(mpt);
276 }
277
278 /* Set up the memory regions */
279 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
280 mpt->pci_reg_id = MEM_MAP_REG;
281 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
282 &mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
283 if (mpt->pci_reg == NULL) {
284 device_printf(dev, "unable to map any ports\n");
285 goto bad;
286 }
287 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
288 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
289 /* Get the Physical Address */
290 mpt->pci_pa = rman_get_start(mpt->pci_reg);
291
292 /* Get a handle to the interrupt */
293 iqd = 0;
294 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
295 1, RF_ACTIVE | RF_SHAREABLE);
296 if (mpt->pci_irq == NULL) {
297 device_printf(dev, "could not allocate interrupt\n");
298 goto bad;
299 }
300
301 /* Register the interrupt handler */
302 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
e9cb6d99 303 mpt, &mpt->ih, NULL)) {
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304 device_printf(dev, "could not setup interrupt\n");
305 goto bad;
306 }
307
308 MPT_LOCK_SETUP(mpt);
309
310 /* Disable interrupts at the part */
311 mpt_disable_ints(mpt);
312
313 /* Allocate dma memory */
314 if (mpt_dma_mem_alloc(mpt)) {
315 device_printf(dev, "Could not allocate DMA memory\n");
316 goto bad;
317 }
318
319 /*
320 * Save the PCI config register values
321 *
322 * Hard resets are known to screw up the BAR for diagnostic
323 * memory accesses (Mem1).
324 *
325 * Using Mem1 is known to make the chip stop responding to
326 * configuration space transfers, so we need to save it now
327 */
328
329 mpt_read_config_regs(mpt);
330
331 /* Initialize the hardware */
332 if (mpt->disabled == 0) {
333 MPT_LOCK(mpt);
334 if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
335 MPT_UNLOCK(mpt);
336 goto bad;
337 }
338
339 /*
340 * Attach to CAM
341 */
984263bc 342 mpt_cam_attach(mpt);
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MD
343 MPT_UNLOCK(mpt);
344 }
345
346 return (0);
347
348bad:
349 mpt_dma_mem_free(mpt);
350 mpt_free_bus_resources(mpt);
351
352 /*
353 * but return zero to preserve unit numbering
354 */
355 return (0);
356}
357
358/*
359 * Free bus resources
360 */
361static void
362mpt_free_bus_resources(mpt_softc_t *mpt)
363{
364 if (mpt->ih) {
365 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
366 mpt->ih = 0;
367 }
368
369 if (mpt->pci_irq) {
370 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
371 mpt->pci_irq = 0;
372 }
373
374 if (mpt->pci_reg) {
375 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
376 mpt->pci_reg);
377 mpt->pci_reg = 0;
378 }
379 MPT_LOCK_DESTROY(mpt);
380}
381
382
383/*
384 * Disconnect ourselves from the system.
385 */
386static int
387mpt_detach(device_t dev)
388{
389 mpt_softc_t *mpt;
390 mpt = (mpt_softc_t*) device_get_softc(dev);
391
392 device_printf(mpt->dev,"mpt_detach!\n");
393
394 if (mpt) {
395 mpt_disable_ints(mpt);
396 mpt_cam_detach(mpt);
397 mpt_reset(mpt);
398 mpt_dma_mem_free(mpt);
399 mpt_free_bus_resources(mpt);
400 }
401 return(0);
402}
403
404
405/*
406 * Disable the hardware
407 */
408static int
409mpt_shutdown(device_t dev)
410{
411 mpt_softc_t *mpt;
412 mpt = (mpt_softc_t*) device_get_softc(dev);
413
414 if (mpt) {
415 mpt_reset(mpt);
416 }
417 return(0);
418}
419
420
421struct imush {
422 mpt_softc_t *mpt;
423 int error;
424 u_int32_t phys;
425};
426
427static void
428mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
429{
430 struct imush *imushp = (struct imush *) arg;
431 imushp->error = error;
432 imushp->phys = segs->ds_addr;
433}
434
435
436static int
437mpt_dma_mem_alloc(mpt_softc_t *mpt)
438{
439 int i, error;
440 u_char *vptr;
441 u_int32_t pptr, end;
442 size_t len;
443 struct imush im;
444 device_t dev = mpt->dev;
445
446 /* Check if we alreay have allocated the reply memory */
447 if (mpt->reply_phys != NULL) {
448 return 0;
449 }
450
451 len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt);
452#ifdef RELENG_4
efda3bd0 453 mpt->request_pool = (request_t *) kmalloc(len, M_DEVBUF, M_WAITOK);
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MD
454 if (mpt->request_pool == NULL) {
455 device_printf(dev, "cannot allocate request pool\n");
456 return (1);
457 }
458 bzero(mpt->request_pool, len);
459#else
460 mpt->request_pool = (request_t *)
efda3bd0 461 kmalloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
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MD
462 if (mpt->request_pool == NULL) {
463 device_printf(dev, "cannot allocate request pool\n");
464 return (1);
465 }
466#endif
467
468 /*
469 * Create a dma tag for this device
470 *
471 * Align at page boundaries, limit to 32-bit addressing
472 * (The chip supports 64-bit addressing, but this driver doesn't)
473 */
474 if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
475 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
476 BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
477 &mpt->parent_dmat) != 0) {
478 device_printf(dev, "cannot create parent dma tag\n");
479 return (1);
480 }
481
482 /* Create a child tag for reply buffers */
483 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
484 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
485 NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
486 &mpt->reply_dmat) != 0) {
487 device_printf(dev, "cannot create a dma tag for replies\n");
488 return (1);
489 }
490
491 /* Allocate some DMA accessable memory for replies */
492 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
493 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
494 device_printf(dev, "cannot allocate %d bytes of reply memory\n",
495 PAGE_SIZE);
496 return (1);
497 }
498
499 im.mpt = mpt;
500 im.error = 0;
501
502 /* Load and lock it into "bus space" */
503 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
504 PAGE_SIZE, mpt_map_rquest, &im, 0);
505
506 if (im.error) {
507 device_printf(dev,
508 "error %d loading dma map for DMA reply queue\n", im.error);
509 return (1);
510 }
511 mpt->reply_phys = im.phys;
512
513 /* Create a child tag for data buffers */
514 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
515 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
516 NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
517 &mpt->buffer_dmat) != 0) {
518 device_printf(dev,
519 "cannot create a dma tag for data buffers\n");
520 return (1);
521 }
522
523 /* Create a child tag for request buffers */
524 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
525 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
526 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
527 &mpt->request_dmat) != 0) {
528 device_printf(dev, "cannot create a dma tag for requests\n");
529 return (1);
530 }
531
532 /* Allocate some DMA accessable memory for requests */
533 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
534 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
535 device_printf(dev,
536 "cannot allocate %d bytes of request memory\n",
537 MPT_REQ_MEM_SIZE(mpt));
538 return (1);
539 }
540
541 im.mpt = mpt;
542 im.error = 0;
543
544 /* Load and lock it into "bus space" */
545 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
546 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0);
547
548 if (im.error) {
549 device_printf(dev,
550 "error %d loading dma map for DMA request queue\n",
551 im.error);
552 return (1);
553 }
554 mpt->request_phys = im.phys;
555
556 i = 0;
557 pptr = mpt->request_phys;
558 vptr = mpt->request;
559 end = pptr + MPT_REQ_MEM_SIZE(mpt);
560 while(pptr < end) {
561 request_t *req = &mpt->request_pool[i];
562 req->index = i++;
563
564 /* Store location of Request Data */
565 req->req_pbuf = pptr;
566 req->req_vbuf = vptr;
567
568 pptr += MPT_REQUEST_AREA;
569 vptr += MPT_REQUEST_AREA;
570
571 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
572 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
573
574 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
575 if (error) {
576 device_printf(dev,
577 "error %d creating per-cmd DMA maps\n", error);
578 return (1);
579 }
580 }
581 return (0);
582}
583
584
585
586/* Deallocate memory that was allocated by mpt_dma_mem_alloc
587 */
588static void
589mpt_dma_mem_free(mpt_softc_t *mpt)
590{
591 int i;
592
593 /* Make sure we aren't double destroying */
594 if (mpt->reply_dmat == 0) {
595 if (mpt->verbose)
596 device_printf(mpt->dev,"Already released dma memory\n");
597 return;
598 }
599
600 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
601 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
602 }
603 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
604 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
605 bus_dma_tag_destroy(mpt->request_dmat);
606 bus_dma_tag_destroy(mpt->buffer_dmat);
607 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
608 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
609 bus_dma_tag_destroy(mpt->reply_dmat);
610 bus_dma_tag_destroy(mpt->parent_dmat);
611 mpt->reply_dmat = 0;
efda3bd0 612 kfree(mpt->request_pool, M_DEVBUF);
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613 mpt->request_pool = 0;
614
615}
616
617
618
619/* Reads modifiable (via PCI transactions) config registers */
620static void
621mpt_read_config_regs(mpt_softc_t *mpt)
622{
623 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
624 mpt->pci_cfg.LatencyTimer_LineSize =
625 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
626 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
627 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
628 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
629 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
630 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
631 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
632 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
633 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
634}
635
636/* Sets modifiable config registers */
637void
638mpt_set_config_regs(mpt_softc_t *mpt)
639{
640 u_int32_t val;
641
642#define MPT_CHECK(reg, offset, size) \
643 val = pci_read_config(mpt->dev, offset, size); \
644 if (mpt->pci_cfg.reg != val) { \
645 device_printf(mpt->dev, \
646 "Restoring " #reg " to 0x%X from 0x%X\n", \
647 mpt->pci_cfg.reg, val); \
648 }
649
650 if (mpt->verbose) {
651 MPT_CHECK(Command, PCIR_COMMAND, 2);
652 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
653 MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
654 MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
655 MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
656 MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
657 MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
658 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
659 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
660 MPT_CHECK(PMCSR, 0x44, 4);
661 }
662#undef MPT_CHECK
663
664 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
665 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
666 mpt->pci_cfg.LatencyTimer_LineSize, 2);
667 pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
668 pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
669 pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
670 pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
671 pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
672 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
673 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
674 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
675}
676
677static void
678mpt_pci_intr(void *arg)
679{
680 mpt_softc_t *mpt = arg;
681 MPT_LOCK(mpt);
682 (void) mpt_intr(mpt);
683 MPT_UNLOCK(mpt);
684}