Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / dev / pccard / pccbb / pccbb.c
CommitLineData
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1/*
2 * Copyright (c) 2002 M. Warner Losh.
3 * Copyright (c) 2000,2001 Jonathan Chen.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification, immediately at the beginning of the file.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $
1f7ab7c9 30 * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.18 2006/10/25 20:56:00 dillon Exp $
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31 */
32
33/*
34 * Copyright (c) 1998, 1999 and 2000
35 * HAYAKAWA Koichi. All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 * This product includes software developed by HAYAKAWA Koichi.
48 * 4. The name of the author may not be used to endorse or promote products
49 * derived from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 */
62
63/*
64 * Driver for PCI to CardBus Bridge chips
65 *
66 * References:
67 * TI Datasheets:
68 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
69 *
70 * Written by Jonathan Chen <jon@freebsd.org>
71 * The author would like to acknowledge:
72 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
73 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things
74 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
75 * * David Cross: Author of the initial ugly hack for a specific cardbus card
76 */
77
78#include <sys/param.h>
79#include <sys/systm.h>
80#include <sys/proc.h>
81#include <sys/errno.h>
f5100ab5 82#include <sys/interrupt.h>
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83#include <sys/kernel.h>
84#include <sys/lock.h>
85#include <sys/malloc.h>
86#include <sys/sysctl.h>
87#include <sys/kthread.h>
88#include <sys/bus.h>
666d2603 89#include <sys/rman.h>
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90
91#include <bus/pci/pcireg.h>
92#include <bus/pci/pcivar.h>
93#include <machine/clock.h>
94
95#include <bus/pccard/pccardreg.h>
96#include <bus/pccard/pccardvar.h>
97
98#include <dev/pccard/exca/excareg.h>
99#include <dev/pccard/exca/excavar.h>
100
101#include <dev/pccard/pccbb/pccbbreg.h>
102#include <dev/pccard/pccbb/pccbbvar.h>
103
104#include "power_if.h"
105#include "card_if.h"
106#include "pcib_if.h"
107
108#define DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
109#define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
110
111#define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \
112 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
113#define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \
114 pci_write_config(DEV, REG, ( \
115 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
116
117#define CBB_START_MEM 0x88000000
118#define CBB_START_32_IO 0x1000
119#define CBB_START_16_IO 0x100
120
121struct yenta_chipinfo {
122 uint32_t yc_id;
123 const char *yc_name;
124 int yc_chiptype;
125} yc_chipsets[] = {
126 /* Texas Instruments chips */
127 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
128 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
129 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
130
131 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
132 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
133 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
134 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
135 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
136 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X},
137 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X},
138 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X},
139 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
140 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
141 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
142 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
143 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
144 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/
145 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
146 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX},
147 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX},
148 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
149 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
150 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
151 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX},
152
153 /* Ricoh chips */
154 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X},
155 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X},
156 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X},
157 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X},
158 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X},
159 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X},
160
161 /* Toshiba products */
162 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95},
163 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95},
164 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97},
165 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97},
166
167 /* Cirrus Logic */
168 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS},
169 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS},
170 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS},
171
172 /* 02Micro */
173 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS},
174 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS},
175 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS},
176 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS},
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177 {PCIC_ID_OZ6922, "O2Micro OZ6922 PCI-CardBus Bridge", CB_CIRRUS},
178 {PCIC_ID_OZ6933, "O2Micro OZ6933 PCI-CardBus Bridge", CB_CIRRUS},
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179
180 /* sentinel */
181 {0 /* null id */, "unknown", CB_UNKNOWN},
182};
183
184/* sysctl vars */
185SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
186
187/* There's no way to say TUNEABLE_LONG to get the right types */
188u_long cbb_start_mem = CBB_START_MEM;
189TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem);
190SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
191 &cbb_start_mem, CBB_START_MEM,
192 "Starting address for memory allocations");
193
194u_long cbb_start_16_io = CBB_START_16_IO;
195TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io);
196SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
197 &cbb_start_16_io, CBB_START_16_IO,
198 "Starting ioport for 16-bit cards");
199
200u_long cbb_start_32_io = CBB_START_32_IO;
201TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io);
202SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
203 &cbb_start_32_io, CBB_START_32_IO,
204 "Starting ioport for 32-bit cards");
205
206int cbb_debug = 0;
207TUNABLE_INT("hw.cbb.debug", &cbb_debug);
208SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
209 "Verbose cardbus bridge debugging");
210
211static int cbb_chipset(uint32_t pci_id, const char **namep);
212static int cbb_probe(device_t brdev);
213static void cbb_chipinit(struct cbb_softc *sc);
214static int cbb_attach(device_t brdev);
3c89d513 215static void cbb_release_helper(device_t brdev);
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216static int cbb_detach(device_t brdev);
217static int cbb_shutdown(device_t brdev);
218static void cbb_driver_added(device_t brdev, driver_t *driver);
219static void cbb_child_detached(device_t brdev, device_t child);
220static void cbb_event_thread(void *arg);
221static void cbb_insert(struct cbb_softc *sc);
222static void cbb_removal(struct cbb_softc *sc);
223static void cbb_intr(void *arg);
224static int cbb_detect_voltage(device_t brdev);
225static int cbb_power(device_t brdev, int volts);
226static void cbb_cardbus_reset(device_t brdev);
227static int cbb_cardbus_power_enable_socket(device_t brdev,
228 device_t child);
229static void cbb_cardbus_power_disable_socket(device_t brdev,
230 device_t child);
231static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
232 uint32_t end);
233static int cbb_cardbus_mem_open(device_t brdev, int win,
234 uint32_t start, uint32_t end);
235static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
236static int cbb_cardbus_activate_resource(device_t brdev, device_t child,
237 int type, int rid, struct resource *res);
238static int cbb_cardbus_deactivate_resource(device_t brdev,
239 device_t child, int type, int rid, struct resource *res);
240static struct resource *cbb_cardbus_alloc_resource(device_t brdev,
241 device_t child, int type, int *rid, u_long start,
242 u_long end, u_long count, uint flags);
243static int cbb_cardbus_release_resource(device_t brdev, device_t child,
244 int type, int rid, struct resource *res);
245static int cbb_power_enable_socket(device_t brdev, device_t child);
246static void cbb_power_disable_socket(device_t brdev, device_t child);
247static int cbb_activate_resource(device_t brdev, device_t child,
248 int type, int rid, struct resource *r);
249static int cbb_deactivate_resource(device_t brdev, device_t child,
250 int type, int rid, struct resource *r);
251static struct resource *cbb_alloc_resource(device_t brdev, device_t child,
252 int type, int *rid, u_long start, u_long end, u_long count,
253 uint flags);
254static int cbb_release_resource(device_t brdev, device_t child,
255 int type, int rid, struct resource *r);
256static int cbb_read_ivar(device_t brdev, device_t child, int which,
257 uintptr_t *result);
258static int cbb_write_ivar(device_t brdev, device_t child, int which,
259 uintptr_t value);
260static int cbb_maxslots(device_t brdev);
261static uint32_t cbb_read_config(device_t brdev, int b, int s, int f,
262 int reg, int width);
263static void cbb_write_config(device_t brdev, int b, int s, int f,
264 int reg, uint32_t val, int width);
265
266/*
267 */
268static __inline void
269cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)
270{
271 bus_space_write_4(sc->bst, sc->bsh, reg, val);
272}
273
274static __inline uint32_t
275cbb_get(struct cbb_softc *sc, uint32_t reg)
276{
277 return (bus_space_read_4(sc->bst, sc->bsh, reg));
278}
279
280static __inline void
281cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
282{
283 cbb_set(sc, reg, cbb_get(sc, reg) | bits);
284}
285
286static __inline void
287cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
288{
289 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits);
290}
291
292static void
293cbb_remove_res(struct cbb_softc *sc, struct resource *res)
294{
295 struct cbb_reslist *rle;
296
297 SLIST_FOREACH(rle, &sc->rl, link) {
298 if (rle->res == res) {
299 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
efda3bd0 300 kfree(rle, M_DEVBUF);
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301 return;
302 }
303 }
304}
305
306static struct resource *
307cbb_find_res(struct cbb_softc *sc, int type, int rid)
308{
309 struct cbb_reslist *rle;
310
311 SLIST_FOREACH(rle, &sc->rl, link)
312 if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
313 return (rle->res);
314 return (NULL);
315}
316
4b87c318 317static int
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318cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
319 int rid)
320{
321 struct cbb_reslist *rle;
322
323 /*
324 * Need to record allocated resource so we can iterate through
325 * it later.
326 */
efda3bd0 327 rle = kmalloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
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328 if (rle == NULL)
329 return (ENOMEM);
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330 rle->res = res;
331 rle->type = type;
332 rle->rid = rid;
333 SLIST_INSERT_HEAD(&sc->rl, rle, link);
4b87c318 334 return (0);
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335}
336
337static void
338cbb_destroy_res(struct cbb_softc *sc)
339{
340 struct cbb_reslist *rle;
341
342 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
343 device_printf(sc->dev, "Danger Will Robinson: Resource "
344 "left allocated! This is a bug... "
345 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
346 rman_get_start(rle->res));
347 SLIST_REMOVE_HEAD(&sc->rl, link);
efda3bd0 348 kfree(rle, M_DEVBUF);
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349 }
350}
351
352/************************************************************************/
353/* Probe/Attach */
354/************************************************************************/
355
356static int
357cbb_chipset(uint32_t pci_id, const char **namep)
358{
359 struct yenta_chipinfo *ycp;
360
361 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp)
362 continue;
363 if (namep != NULL)
364 *namep = ycp->yc_name;
365 return (ycp->yc_chiptype);
366}
367
368static int
369cbb_probe(device_t brdev)
370{
371 const char *name;
372 uint32_t progif;
373 uint32_t subclass;
f8d45478 374 uint32_t class;
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375
376 /*
377 * Do we know that we support the chipset? If so, then we
378 * accept the device.
379 */
380 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) {
381 device_set_desc(brdev, name);
382 return (0);
383 }
384
385 /*
386 * We do support generic CardBus bridges. All that we've seen
387 * to date have progif 0 (the Yenta spec, and successors mandate
388 * this). We do not support PCI PCMCIA bridges (with one exception)
389 * with this driver since they generally are I/O mapped. Those
390 * are supported by the pcic driver. This should help us be more
391 * future proof.
392 */
f8d45478 393 class = pci_get_class(brdev);
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394 subclass = pci_get_subclass(brdev);
395 progif = pci_get_progif(brdev);
f8d45478 396 if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_CARDBUS && progif == 0) {
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397 device_set_desc(brdev, "PCI-CardBus Bridge");
398 return (0);
399 }
400 return (ENXIO);
401}
402
403
404static void
405cbb_chipinit(struct cbb_softc *sc)
406{
407 uint32_t mux, sysctrl;
408
409 /* Set CardBus latency timer */
410 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
411 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
412
413 /* Set PCI latency timer */
414 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
415 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
416
417 /* Enable memory access */
418 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND,
419 | PCIM_CMD_MEMEN
420 | PCIM_CMD_PORTEN
421 | PCIM_CMD_BUSMASTEREN, 2);
422
423 /* disable Legacy IO */
424 switch (sc->chipset) {
425 case CB_RF5C46X:
426 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
427 & ~(CBBM_BRIDGECTRL_RL_3E0_EN |
428 CBBM_BRIDGECTRL_RL_3E2_EN), 2);
429 break;
430 default:
431 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4);
432 break;
433 }
434
435 /* Use PCI interrupt for interrupt routing */
436 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
437 & ~(CBBM_BRIDGECTRL_MASTER_ABORT |
438 CBBM_BRIDGECTRL_INTR_IREQ_EN),
439 | CBBM_BRIDGECTRL_WRITE_POST_EN,
440 2);
441
442 /*
443 * XXX this should be a function table, ala OLDCARD. This means
444 * that we could more easily support ISA interrupts for pccard
445 * cards if we had to.
446 */
447 switch (sc->chipset) {
448 case CB_TI113X:
449 /*
450 * The TI 1031, TI 1130 and TI 1131 all require another bit
451 * be set to enable PCI routing of interrupts, and then
452 * a bit for each of the CSC and Function interrupts we
453 * want routed.
454 */
455 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
456 | CBBM_CBCTRL_113X_PCI_INTR |
457 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
458 1);
459 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
460 & ~(CBBM_DEVCTRL_INT_SERIAL |
461 CBBM_DEVCTRL_INT_PCI), 1);
462 break;
463 case CB_TI12XX:
464 /*
465 * Some TI 12xx (and [14][45]xx) based pci cards
466 * sometimes have issues with the MFUNC register not
467 * being initialized due to a bad EEPROM on board.
468 * Laptops that this matters on have this register
469 * properly initialized.
470 *
471 * The TI125X parts have a different register.
472 */
473 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
474 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
475 if (mux == 0) {
476 mux = (mux & ~CBBM_MFUNC_PIN0) |
477 CBBM_MFUNC_PIN0_INTA;
478 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
479 mux = (mux & ~CBBM_MFUNC_PIN1) |
480 CBBM_MFUNC_PIN1_INTB;
481 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4);
482 }
483 /*FALLTHROUGH*/
484 case CB_TI125X:
485 /*
486 * Disable zoom video. Some machines initialize this
487 * improperly and exerpience has shown that this helps
488 * on some machines.
489 */
490 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
491 break;
492 case CB_TOPIC97:
493 /*
494 * Disable Zoom Video, ToPIC 97, 100.
495 */
496 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
497 /*
498 * ToPIC 97, 100
499 * At offset 0xa1: INTERRUPT CONTROL register
500 * 0x1: Turn on INT interrupts.
501 */
502 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL,
503 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1);
504 goto topic_common;
505 case CB_TOPIC95:
506 /*
507 * SOCKETCTRL appears to be TOPIC 95/B specific
508 */
509 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL,
510 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4);
511
512 topic_common:;
513 /*
514 * At offset 0xa0: SLOT CONTROL
515 * 0x80 Enable CardBus Functionality
516 * 0x40 Enable CardBus and PC Card registers
517 * 0x20 Lock ID in exca regs
518 * 0x10 Write protect ID in config regs
519 * Clear the rest of the bits, which defaults the slot
520 * in legacy mode to 0x3e0 and offset 0. (legacy
521 * mode is determined elsewhere)
522 */
523 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL,
524 CBBM_TOPIC_SLOTCTRL_SLOTON |
525 CBBM_TOPIC_SLOTCTRL_SLOTEN |
526 CBBM_TOPIC_SLOTCTRL_ID_LOCK |
527 CBBM_TOPIC_SLOTCTRL_ID_WP, 1);
528
529 /*
530 * At offset 0xa3 Card Detect Control Register
531 * 0x80 CARDBUS enbale
532 * 0x01 Cleared for hardware change detect
533 */
534 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC,
535 | CBBM_TOPIC_CDC_CARDBUS,
536 & ~CBBM_TOPIC_CDC_SWDETECT, 4);
537 break;
538 }
539
540 /*
541 * Need to tell ExCA registers to route via PCI interrupts. There
542 * are two ways to do this. Once is to set INTR_ENABLE and the
543 * other is to set CSC to 0. Since both methods are mutually
544 * compatible, we do both.
545 */
546 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
547 exca_write(&sc->exca, EXCA_CSC_INTR, 0);
548
549 /* close all memory and io windows */
550 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
551 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
552 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
553 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);
554 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4);
555 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4);
556 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4);
557 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
558}
559
560static int
561cbb_attach(device_t brdev)
562{
563 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
564 int rid;
565
f2770c70 566 lockinit(&sc->lock, "cbb", 0, 0);
666d2603
JS
567 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL);
568 sc->dev = brdev;
569 sc->cbdev = NULL;
570 sc->pccarddev = NULL;
571 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
572 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
573 SLIST_INIT(&sc->rl);
574 STAILQ_INIT(&sc->intr_handlers);
575
576#ifndef BURN_THE_BOATS
577 /*
578 * The PCI bus code should assign us memory in the absense
579 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge
580 * up something here until the PCI/acpi code properly assigns the
581 * resource.
582 */
583#endif
584 rid = CBBR_SOCKBASE;
585 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
586 0, ~0, 1, RF_ACTIVE);
587 if (!sc->base_res) {
588#ifdef BURN_THE_BOATS
589 device_printf(brdev, "Could not map register memory\n");
590 return (ENOMEM);
591#else
592 uint32_t sockbase;
963aebf7 593
666d2603
JS
594 /*
595 * Generally, the BIOS will assign this memory for us.
596 * However, newer BIOSes do not because the MS design
597 * documents have mandated that this is for the OS
598 * to assign rather than the BIOS. This driver shouldn't
599 * be doing this, but until the pci bus code (or acpi)
600 * does this, we allow CardBus bridges to work on more
601 * machines.
602 */
963aebf7 603 pci_write_config(brdev, rid, 0xffffffff, 4);
666d2603 604 sockbase = pci_read_config(brdev, rid, 4);
963aebf7
JH
605 sockbase = (sockbase & 0xfffffff0) & -(sockbase & 0xfffffff0);
606 sc->base_res = bus_generic_alloc_resource(
607 device_get_parent(brdev), brdev, SYS_RES_MEMORY,
608 &rid, cbb_start_mem, ~0, sockbase,
609 RF_ACTIVE|rman_make_alignment_flags(sockbase));
610 if (!sc->base_res) {
611 device_printf(brdev,
612 "Could not grab register memory\n");
613 return (ENOMEM);
666d2603 614 }
963aebf7
JH
615 sc->flags |= CBB_KLUDGE_ALLOC;
616 pci_write_config(brdev, CBBR_SOCKBASE,
617 rman_get_start(sc->base_res), 4);
666d2603
JS
618#endif
619 }
963aebf7
JH
620 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
621 rman_get_start(sc->base_res)));
666d2603
JS
622
623 sc->bst = rman_get_bustag(sc->base_res);
624 sc->bsh = rman_get_bushandle(sc->base_res);
625 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
626 sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
627 cbb_chipinit(sc);
628
629 /* attach children */
630 sc->cbdev = device_add_child(brdev, "cardbus", -1);
631 if (sc->cbdev == NULL)
632 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
633 else if (device_probe_and_attach(sc->cbdev) != 0) {
634 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
635 sc->cbdev = NULL;
636 }
637
638 sc->pccarddev = device_add_child(brdev, "pccard", -1);
639 if (sc->pccarddev == NULL)
640 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
641 else if (device_probe_and_attach(sc->pccarddev) != 0) {
642 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
643 sc->pccarddev = NULL;
644 }
645
646 /* Map and establish the interrupt. */
647 rid = 0;
648 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1,
649 RF_SHAREABLE | RF_ACTIVE);
650 if (sc->irq_res == NULL) {
651 printf("cbb: Unable to map IRQ...\n");
652 goto err;
666d2603
JS
653 }
654
ee61f228 655 if (bus_setup_intr(brdev, sc->irq_res, 0, cbb_intr, sc,
e9cb6d99 656 &sc->intrhand, NULL)) {
666d2603
JS
657 device_printf(brdev, "couldn't establish interrupt");
658 goto err;
659 }
660
661 /* reset 16-bit pcmcia bus */
662 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
663
664 /* turn off power */
665 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
666
667 /* CSC Interrupt: Card detect interrupt on */
668 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
669
670 /* reset interrupt */
671 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT));
672
673 /* Start the thread */
674 if (kthread_create(cbb_event_thread, sc, &sc->event_thread,
675 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) {
676 device_printf (sc->dev, "unable to create event thread.\n");
677 panic ("cbb_create_event_thread");
678 }
679
680 return (0);
681err:
682 if (sc->irq_res)
683 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
684 if (sc->base_res) {
685 if (sc->flags & CBB_KLUDGE_ALLOC)
686 bus_generic_release_resource(device_get_parent(brdev),
687 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
688 sc->base_res);
689 else
690 bus_release_resource(brdev, SYS_RES_MEMORY,
691 CBBR_SOCKBASE, sc->base_res);
692 }
693 return (ENOMEM);
694}
695
3c89d513
MD
696/*
697 * shutdown and detach both call the release helper to disable the interrupt
698 * and cleanup the resources.
699 */
700static
701void
702cbb_release_helper(device_t brdev)
666d2603
JS
703{
704 struct cbb_softc *sc = device_get_softc(brdev);
666d2603 705
df4f70a6 706 lockmgr(&sc->lock, LK_EXCLUSIVE);
666d2603 707 sc->flags |= CBB_KTHREAD_DONE;
df4f70a6 708 lockmgr(&sc->lock, LK_RELEASE);
666d2603
JS
709 if (sc->flags & CBB_KTHREAD_RUNNING) {
710 wakeup(sc);
3c89d513 711 tsleep(cbb_detach, 0, "pccbb", 2);
666d2603 712 }
666d2603 713
3c89d513
MD
714 /*
715 * Reset the bridge controller and reset the interrupt, then tear
716 * it down (which disables the interrupt) and de-power.
717 */
718 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
719 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
720
721 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
722 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
723
724 /*
725 * Release interrupt and memory-mapped resources. Device memory
726 * cannot be safely accessed after we do this.
727 */
666d2603 728 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
3c89d513 729 if (sc->flags & CBB_KLUDGE_ALLOC) {
666d2603
JS
730 bus_generic_release_resource(device_get_parent(brdev),
731 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
732 sc->base_res);
3c89d513 733 } else {
666d2603
JS
734 bus_release_resource(brdev, SYS_RES_MEMORY,
735 CBBR_SOCKBASE, sc->base_res);
3c89d513 736 }
666d2603
JS
737}
738
739static int
3c89d513 740cbb_detach(device_t brdev)
666d2603 741{
3c89d513
MD
742 device_t *devlist;
743 int numdevs;
744 int error;
745 int i;
666d2603 746
3c89d513 747 device_get_children(brdev, &devlist, &numdevs);
666d2603 748
3c89d513
MD
749 error = 0;
750 for (i = 0; i < numdevs; i++) {
751 if (device_detach(devlist[i]) == 0)
752 device_delete_child(brdev, devlist[i]);
753 else
754 error++;
755 }
efda3bd0 756 kfree (devlist, M_TEMP);
3c89d513
MD
757 if (error == 0)
758 cbb_release_helper(brdev);
759 else
760 error = ENXIO;
761 return (error);
762}
666d2603 763
3c89d513
MD
764static int
765cbb_shutdown(device_t brdev)
766{
767 device_t *devlist;
768 int numdevs;
769 int i;
770
771 device_get_children(brdev, &devlist, &numdevs);
666d2603 772
3c89d513
MD
773 for (i = 0; i < numdevs; i++) {
774 if (device_shutdown(devlist[i]) == 0)
775 ; /* XXX delete the child without detach? */
776 }
efda3bd0 777 kfree (devlist, M_TEMP);
3c89d513
MD
778 cbb_release_helper(brdev);
779
780 /*
781 * This may prevent bios confusion on reboot for some bioses
782 */
666d2603
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783 pci_write_config(brdev, PCIR_COMMAND, 0, 2);
784 return (0);
785}
786
787static int
788cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
e9cb6d99
MD
789 int flags, driver_intr_t *intr, void *arg,
790 void **cookiep, lwkt_serialize_t serializer)
666d2603
JS
791{
792 struct cbb_intrhand *ih;
793 struct cbb_softc *sc = device_get_softc(dev);
794
795 /*
796 * You aren't allowed to have fast interrupts for pccard/cardbus
797 * things since those interrupts are PCI and shared. Since we use
798 * the PCI interrupt for the status change interrupts, it can't be
799 * free for use by the driver. Fast interrupts must not be shared.
800 */
efda3bd0 801 ih = kmalloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_WAITOK|M_ZERO);
666d2603
JS
802 if (ih == NULL)
803 return (ENOMEM);
804 *cookiep = ih;
805 ih->intr = intr;
806 ih->arg = arg;
f5100ab5 807 ih->serializer = serializer;
666d2603
JS
808 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries);
809 /*
810 * XXX we should do what old card does to ensure that we don't
811 * XXX call the function's interrupt routine(s).
812 */
813 /*
814 * XXX need to turn on ISA interrupts, if we ever support them, but
815 * XXX for now that's all we need to do.
816 */
817 return (0);
818}
819
820static int
821cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
822 void *cookie)
823{
824 struct cbb_intrhand *ih;
825 struct cbb_softc *sc = device_get_softc(dev);
826
3c89d513 827 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */
666d2603
JS
828 /* XXX Need to do different things for ISA interrupts. */
829 ih = (struct cbb_intrhand *) cookie;
830 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries);
efda3bd0 831 kfree(ih, M_DEVBUF);
666d2603
JS
832 return (0);
833}
834
835
836static void
837cbb_driver_added(device_t brdev, driver_t *driver)
838{
839 struct cbb_softc *sc = device_get_softc(brdev);
840 device_t *devlist;
841 int tmp;
842 int numdevs;
843 int wake;
844 uint32_t sockstate;
845
846 DEVICE_IDENTIFY(driver, brdev);
847 device_get_children(brdev, &devlist, &numdevs);
848 wake = 0;
849 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
850 for (tmp = 0; tmp < numdevs; tmp++) {
851 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT &&
852 device_probe_and_attach(devlist[tmp]) == 0) {
853 if (devlist[tmp] == NULL)
854 /* NOTHING */;
855 else if (strcmp(driver->name, "cardbus") == 0) {
856 sc->cbdev = devlist[tmp];
857 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
858 (sockstate & CBB_SOCKET_STAT_CB))
859 wake++;
860 } else if (strcmp(driver->name, "pccard") == 0) {
861 sc->pccarddev = devlist[tmp];
862 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
863 (sockstate & CBB_SOCKET_STAT_16BIT))
864 wake++;
865 } else
866 device_printf(brdev,
867 "Unsupported child bus: %s\n",
868 driver->name);
869 }
870 }
efda3bd0 871 kfree(devlist, M_TEMP);
666d2603
JS
872
873 if (wake > 0) {
874 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD)
875 == 0) {
876 wakeup(sc);
877 }
878 }
879}
880
881static void
882cbb_child_detached(device_t brdev, device_t child)
883{
884 struct cbb_softc *sc = device_get_softc(brdev);
885
886 if (child == sc->cbdev)
887 sc->cbdev = NULL;
888 else if (child == sc->pccarddev)
889 sc->pccarddev = NULL;
890 else
891 device_printf(brdev, "Unknown child detached: %s %p/%p\n",
892 device_get_nameunit(child), sc->cbdev, sc->pccarddev);
893}
894
895/************************************************************************/
896/* Kthreads */
897/************************************************************************/
898
899static void
900cbb_event_thread(void *arg)
901{
902 struct cbb_softc *sc = arg;
903 uint32_t status;
904 int err;
905
906 /*
907 * We take out Giant here because we need it deep, down in
908 * the bowels of the vm system for mapping the memory we need
909 * to read the CIS. We also need it for kthread_exit, which
910 * drops it.
911 */
912 sc->flags |= CBB_KTHREAD_RUNNING;
913 while (1) {
914 /*
915 * Check to see if we have anything first so that
916 * if there's a card already inserted, we do the
917 * right thing.
918 */
df4f70a6 919 lockmgr(&sc->lock, LK_EXCLUSIVE);
666d2603
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920 if (sc->flags & CBB_KTHREAD_DONE)
921 break;
922
923 status = cbb_get(sc, CBB_SOCKET_STATE);
924 /* mtx_lock(&Giant); */
925 if ((status & CBB_SOCKET_STAT_CD) == 0)
926 cbb_insert(sc);
927 else
928 cbb_removal(sc);
df4f70a6 929 lockmgr(&sc->lock, LK_RELEASE);
666d2603
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930 /* mtx_unlock(&Giant); */
931
932 /*
933 * Wait until it has been 1s since the last time we
934 * get an interrupt. We handle the rest of the interrupt
935 * at the top of the loop.
936 */
937 err = tsleep(sc, 0, "pccbb", 0);
938 while (err != EWOULDBLOCK &&
939 (sc->flags & CBB_KTHREAD_DONE) == 0)
940 err = tsleep(sc, 0, "pccbb", 1 * hz);
941 }
666d2603 942 sc->flags &= ~CBB_KTHREAD_RUNNING;
df4f70a6 943 lockmgr(&sc->lock, LK_RELEASE);
666d2603
JS
944 /* mtx_lock(&Giant); */
945 kthread_exit();
946}
947
948/************************************************************************/
949/* Insert/removal */
950/************************************************************************/
951
952static void
953cbb_insert(struct cbb_softc *sc)
954{
955 uint32_t sockevent, sockstate;
956
957 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
958 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
959
960 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
961 sockevent, sockstate));
962
963 if (sockstate & CBB_SOCKET_STAT_16BIT) {
964 if (sc->pccarddev != NULL) {
965 sc->flags |= CBB_16BIT_CARD;
966 sc->flags |= CBB_CARD_OK;
967 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) {
968 device_printf(sc->dev,
969 "PC Card card activation failed\n");
970 sc->flags &= ~CBB_CARD_OK;
971 }
972 } else {
973 device_printf(sc->dev,
974 "PC Card inserted, but no pccard bus.\n");
975 }
976 } else if (sockstate & CBB_SOCKET_STAT_CB) {
977 if (sc->cbdev != NULL) {
978 sc->flags &= ~CBB_16BIT_CARD;
979 sc->flags |= CBB_CARD_OK;
980 if (CARD_ATTACH_CARD(sc->cbdev) != 0) {
981 device_printf(sc->dev,
982 "CardBus card activation failed\n");
983 sc->flags &= ~CBB_CARD_OK;
984 }
985 } else {
986 device_printf(sc->dev,
987 "CardBus card inserted, but no cardbus bus.\n");
988 }
989 } else {
990 /*
991 * We should power the card down, and try again a couple of
992 * times if this happens. XXX
993 */
994 device_printf (sc->dev, "Unsupported card type detected\n");
995 }
996}
997
998static void
999cbb_removal(struct cbb_softc *sc)
1000{
1001 if (sc->flags & CBB_16BIT_CARD) {
1002 if (sc->pccarddev != NULL)
1003 CARD_DETACH_CARD(sc->pccarddev);
1004 } else {
1005 if (sc->cbdev != NULL)
1006 CARD_DETACH_CARD(sc->cbdev);
1007 }
1008 cbb_destroy_res(sc);
1009}
1010
1011/************************************************************************/
1012/* Interrupt Handler */
1013/************************************************************************/
1014
1015static void
1016cbb_intr(void *arg)
1017{
1018 struct cbb_softc *sc = arg;
1019 uint32_t sockevent;
1020 struct cbb_intrhand *ih;
1021
1022 /*
1023 * This ISR needs work XXX
1024 */
1025 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1026 if (sockevent) {
1027 /* ack the interrupt */
1028 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
1029
1030 /*
1031 * If anything has happened to the socket, we assume that
1032 * the card is no longer OK, and we shouldn't call its
1033 * ISR. We set CARD_OK as soon as we've attached the
1034 * card. This helps in a noisy eject, which happens
1035 * all too often when users are ejecting their PC Cards.
1036 *
1037 * We use this method in preference to checking to see if
1038 * the card is still there because the check suffers from
1039 * a race condition in the bouncing case. Prior versions
1040 * of the pccard software used a similar trick and achieved
1041 * excellent results.
1042 */
1043 if (sockevent & CBB_SOCKET_EVENT_CD) {
df4f70a6 1044 lockmgr(&sc->lock, LK_EXCLUSIVE);
666d2603 1045 sc->flags &= ~CBB_CARD_OK;
df4f70a6 1046 lockmgr(&sc->lock, LK_RELEASE);
666d2603
JS
1047 wakeup(sc);
1048 }
1049 if (sockevent & CBB_SOCKET_EVENT_CSTS) {
1050 DPRINTF((" cstsevent occured: 0x%08x\n",
1051 cbb_get(sc, CBB_SOCKET_STATE)));
1052 }
1053 if (sockevent & CBB_SOCKET_EVENT_POWER) {
1054 DPRINTF((" pwrevent occured: 0x%08x\n",
1055 cbb_get(sc, CBB_SOCKET_STATE)));
1056 }
1057 /* Other bits? */
1058 }
1059 if (sc->flags & CBB_CARD_OK) {
1060 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) {
f5100ab5
MD
1061 if (ih->serializer) {
1062 lwkt_serialize_handler_call(ih->serializer,
1063 (inthand2_t *)ih->intr,
1064 ih->arg, NULL);
1065 } else {
1066 (*ih->intr)(ih->arg);
1067 }
666d2603
JS
1068 }
1069
1070 }
1071}
1072
1073/************************************************************************/
1074/* Generic Power functions */
1075/************************************************************************/
1076
1077static int
1078cbb_detect_voltage(device_t brdev)
1079{
1080 struct cbb_softc *sc = device_get_softc(brdev);
1081 uint32_t psr;
1082 int vol = CARD_UKN_CARD;
1083
1084 psr = cbb_get(sc, CBB_SOCKET_STATE);
1085
1086 if (psr & CBB_SOCKET_STAT_5VCARD)
1087 vol |= CARD_5V_CARD;
1088 if (psr & CBB_SOCKET_STAT_3VCARD)
1089 vol |= CARD_3V_CARD;
1090 if (psr & CBB_SOCKET_STAT_XVCARD)
1091 vol |= CARD_XV_CARD;
1092 if (psr & CBB_SOCKET_STAT_YVCARD)
1093 vol |= CARD_YV_CARD;
1094
1095 return (vol);
1096}
1097
1098static int
1099cbb_power(device_t brdev, int volts)
1100{
1101 uint32_t status, sock_ctrl;
1102 struct cbb_softc *sc = device_get_softc(brdev);
1103 int timeout;
1104 uint32_t sockevent;
1105
1106 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n",
1107 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1108 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1109 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1110 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1111 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1112 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1113 "VCC-UNKNOWN",
1114 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1115 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" :
1116 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" :
1117 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1118 "VPP-UNKNOWN",
1119 volts));
1120
1121 status = cbb_get(sc, CBB_SOCKET_STATE);
1122 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
1123
1124 switch (volts & CARD_VCCMASK) {
1125 case CARD_VCC_UC:
1126 break;
1127 case CARD_VCC_5V:
1128 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */
1129 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1130 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
1131 } else {
1132 device_printf(sc->dev,
1133 "BAD voltage request: no 5 V card\n");
1134 }
1135 break;
1136 case CARD_VCC_3V:
1137 if (CBB_SOCKET_STAT_3VCARD & status) {
1138 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1139 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
1140 } else {
1141 device_printf(sc->dev,
1142 "BAD voltage request: no 3.3 V card\n");
1143 }
1144 break;
1145 case CARD_VCC_0V:
1146 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1147 break;
1148 default:
1149 return (0); /* power NEVER changed */
1150 break;
1151 }
1152
1153 switch (volts & CARD_VPPMASK) {
1154 case CARD_VPP_UC:
1155 break;
1156 case CARD_VPP_0V:
1157 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1158 break;
1159 case CARD_VPP_VCC:
1160 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1161 sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
1162 break;
1163 case CARD_VPP_12V:
1164 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1165 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V;
1166 break;
1167 }
1168
1169 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
1170 return (1); /* no change necessary */
1171
1172 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
1173 status = cbb_get(sc, CBB_SOCKET_STATE);
1174
1175 /*
1176 * XXX This busy wait is bogus. We should wait for a power
1177 * interrupt and then whine if the status is bad. If we're
1178 * worried about the card not coming up, then we should also
1179 * schedule a timeout which we can cacel in the power interrupt.
1180 */
1181 timeout = 20;
1182 do {
1183 DELAY(20*1000);
1184 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1185 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0);
1186 /* reset event status */
1187 /* XXX should only reset EVENT_POWER */
1188 cbb_set(sc, CBB_SOCKET_EVENT, sockevent);
1189 if (timeout < 0) {
1190 printf ("VCC supply failed.\n");
1191 return (0);
1192 }
1193
1194 /* XXX
1195 * delay 400 ms: thgough the standard defines that the Vcc set-up time
1196 * is 20 ms, some PC-Card bridge requires longer duration.
1197 * XXX Note: We should check the stutus AFTER the delay to give time
1198 * for things to stabilize.
1199 */
1200 DELAY(400*1000);
1201
1202 if (status & CBB_SOCKET_STAT_BADVCC) {
1203 device_printf(sc->dev,
1204 "bad Vcc request. ctrl=0x%x, status=0x%x\n",
1205 sock_ctrl ,status);
1206 printf("cbb_power: %s and %s [%x]\n",
1207 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1208 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1209 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1210 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1211 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1212 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1213 "VCC-UNKNOWN",
1214 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1215 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V":
1216 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC":
1217 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1218 "VPP-UNKNOWN",
1219 volts);
1220 return (0);
1221 }
1222 return (1); /* power changed correctly */
1223}
1224
1225/*
1226 * detect the voltage for the card, and set it. Since the power
1227 * used is the square of the voltage, lower voltages is a big win
1228 * and what Windows does (and what Microsoft prefers). The MS paper
1229 * also talks about preferring the CIS entry as well.
1230 */
1231static int
1232cbb_do_power(device_t brdev)
1233{
1234 int voltage;
1235
1236 /* Prefer lowest voltage supported */
1237 voltage = cbb_detect_voltage(brdev);
1238 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1239 if (voltage & CARD_YV_CARD)
1240 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC);
1241 else if (voltage & CARD_XV_CARD)
1242 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC);
1243 else if (voltage & CARD_3V_CARD)
1244 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC);
1245 else if (voltage & CARD_5V_CARD)
1246 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC);
1247 else {
1248 device_printf(brdev, "Unknown card voltage\n");
1249 return (ENXIO);
1250 }
1251 return (0);
1252}
1253
1254/************************************************************************/
1255/* CardBus power functions */
1256/************************************************************************/
1257
1258static void
1259cbb_cardbus_reset(device_t brdev)
1260{
1261 struct cbb_softc *sc = device_get_softc(brdev);
1262 int delay_us;
1263
1264 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000;
1265
1266 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
1267
1268 DELAY(delay_us);
1269
1270 /* If a card exists, unreset it! */
1271 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) {
1272 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1273 &~CBBM_BRIDGECTRL_RESET, 2);
1274 DELAY(delay_us);
1275 }
1276}
1277
1278static int
1279cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1280{
1281 struct cbb_softc *sc = device_get_softc(brdev);
1282 int err;
1283
1284 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) ==
1285 CBB_SOCKET_STAT_CD)
1286 return (ENODEV);
1287
1288 err = cbb_do_power(brdev);
1289 if (err)
1290 return (err);
1291 cbb_cardbus_reset(brdev);
1292 return (0);
1293}
1294
1295static void
1296cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1297{
1298 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1299 cbb_cardbus_reset(brdev);
1300}
1301
1302/************************************************************************/
1303/* CardBus Resource */
1304/************************************************************************/
1305
1306static int
1307cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1308{
1309 int basereg;
1310 int limitreg;
1311
1312 if ((win < 0) || (win > 1)) {
1313 DEVPRINTF((brdev,
1314 "cbb_cardbus_io_open: window out of range %d\n", win));
1315 return (EINVAL);
1316 }
1317
1318 basereg = win * 8 + CBBR_IOBASE0;
1319 limitreg = win * 8 + CBBR_IOLIMIT0;
1320
1321 pci_write_config(brdev, basereg, start, 4);
1322 pci_write_config(brdev, limitreg, end, 4);
1323 return (0);
1324}
1325
1326static int
1327cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1328{
1329 int basereg;
1330 int limitreg;
1331
1332 if ((win < 0) || (win > 1)) {
1333 DEVPRINTF((brdev,
1334 "cbb_cardbus_mem_open: window out of range %d\n", win));
1335 return (EINVAL);
1336 }
1337
1338 basereg = win*8 + CBBR_MEMBASE0;
1339 limitreg = win*8 + CBBR_MEMLIMIT0;
1340
1341 pci_write_config(brdev, basereg, start, 4);
1342 pci_write_config(brdev, limitreg, end, 4);
1343 return (0);
1344}
1345
1346/*
1347 * XXX The following function belongs in the pci bus layer.
1348 */
1349static void
1350cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1351{
1352 uint32_t starts[2];
1353 uint32_t ends[2];
1354 struct cbb_reslist *rle;
1355 int align;
1356 int prefetchable[2];
1357 uint32_t reg;
1358
1359 starts[0] = starts[1] = 0xffffffff;
1360 ends[0] = ends[1] = 0;
1361
1362 if (type == SYS_RES_MEMORY)
1363 align = CBB_MEMALIGN;
1364 else if (type == SYS_RES_IOPORT)
1365 align = CBB_IOALIGN;
1366 else
1367 align = 1;
1368
1369 SLIST_FOREACH(rle, &sc->rl, link) {
1370 if (rle->type != type)
1371 ;
1372 else if (rle->res == NULL) {
1373 device_printf(sc->dev, "WARNING: Resource not reserved? "
1374 "(type=%d, addr=%lx)\n",
1375 rle->type, rman_get_start(rle->res));
1376 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) {
1377 /* XXX */
1378 } else if (starts[0] == 0xffffffff) {
1379 starts[0] = rman_get_start(rle->res);
1380 ends[0] = rman_get_end(rle->res);
1381 prefetchable[0] =
1382 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1383 } else if (rman_get_end(rle->res) > ends[0] &&
1384 rman_get_start(rle->res) - ends[0] <
1385 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1386 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1387 ends[0] = rman_get_end(rle->res);
1388 } else if (rman_get_start(rle->res) < starts[0] &&
1389 starts[0] - rman_get_end(rle->res) <
1390 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1391 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1392 starts[0] = rman_get_start(rle->res);
1393 } else if (starts[1] == 0xffffffff) {
1394 starts[1] = rman_get_start(rle->res);
1395 ends[1] = rman_get_end(rle->res);
1396 prefetchable[1] =
1397 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1398 } else if (rman_get_end(rle->res) > ends[1] &&
1399 rman_get_start(rle->res) - ends[1] <
1400 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1401 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1402 ends[1] = rman_get_end(rle->res);
1403 } else if (rman_get_start(rle->res) < starts[1] &&
1404 starts[1] - rman_get_end(rle->res) <
1405 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1406 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1407 starts[1] = rman_get_start(rle->res);
1408 } else {
1409 uint32_t diffs[2];
1410 int win;
1411
1412 diffs[0] = diffs[1] = 0xffffffff;
1413 if (rman_get_start(rle->res) > ends[0])
1414 diffs[0] = rman_get_start(rle->res) - ends[0];
1415 else if (rman_get_end(rle->res) < starts[0])
1416 diffs[0] = starts[0] - rman_get_end(rle->res);
1417 if (rman_get_start(rle->res) > ends[1])
1418 diffs[1] = rman_get_start(rle->res) - ends[1];
1419 else if (rman_get_end(rle->res) < starts[1])
1420 diffs[1] = starts[1] - rman_get_end(rle->res);
1421
1422 win = (diffs[0] <= diffs[1])?0:1;
1423 if (rman_get_start(rle->res) > ends[win])
1424 ends[win] = rman_get_end(rle->res);
1425 else if (rman_get_end(rle->res) < starts[win])
1426 starts[win] = rman_get_start(rle->res);
1427 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE))
1428 prefetchable[win] = 0;
1429 }
1430
1431 if (starts[0] != 0xffffffff)
1432 starts[0] -= starts[0] % align;
1433 if (starts[1] != 0xffffffff)
1434 starts[1] -= starts[1] % align;
1435 if (ends[0] % align != 0)
1436 ends[0] += align - ends[0]%align - 1;
1437 if (ends[1] % align != 0)
1438 ends[1] += align - ends[1]%align - 1;
1439 }
1440
1441 if (type == SYS_RES_MEMORY) {
1442 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1443 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1444 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1445 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0|
1446 CBBM_BRIDGECTRL_PREFETCH_1);
1447 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)|
1448 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0);
1449 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1450 } else if (type == SYS_RES_IOPORT) {
1451 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1452 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1453 }
1454}
1455
1456static int
1457cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1458 int rid, struct resource *res)
1459{
1460 int ret;
1461
1462 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1463 type, rid, res);
1464 if (ret != 0)
1465 return (ret);
1466 cbb_cardbus_auto_open(device_get_softc(brdev), type);
1467 return (0);
1468}
1469
1470static int
1471cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1472 int rid, struct resource *res)
1473{
1474 int ret;
1475
1476 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1477 type, rid, res);
1478 if (ret != 0)
1479 return (ret);
1480 cbb_cardbus_auto_open(device_get_softc(brdev), type);
1481 return (0);
1482}
1483
1484static struct resource *
1485cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1486 int *rid, u_long start, u_long end, u_long count, uint flags)
1487{
1488 struct cbb_softc *sc = device_get_softc(brdev);
1489 int tmp;
1490 struct resource *res;
1491
1492 switch (type) {
1493 case SYS_RES_IRQ:
1494 tmp = rman_get_start(sc->irq_res);
1495 if (start > tmp || end < tmp || count != 1) {
1496 device_printf(child, "requested interrupt %ld-%ld,"
1497 "count = %ld not supported by cbb\n",
1498 start, end, count);
1499 return (NULL);
1500 }
1501 start = end = tmp;
1502 break;
1503 case SYS_RES_IOPORT:
1504 if (start <= cbb_start_32_io)
1505 start = cbb_start_32_io;
1506 if (end < start)
1507 end = start;
1508 break;
1509 case SYS_RES_MEMORY:
1510 if (start <= cbb_start_mem)
1511 start = cbb_start_mem;
1512 if (end < start)
1513 end = start;
1514 break;
1515 }
1516
1517 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1518 start, end, count, flags & ~RF_ACTIVE);
1519 if (res == NULL) {
1520 printf("cbb alloc res fail\n");
1521 return (NULL);
1522 }
4b87c318
SS
1523 if (cbb_insert_res(sc, res, type, *rid)) {
1524 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type,
fc508c29 1525 *rid, res);
4b87c318
SS
1526 return (NULL);
1527 }
666d2603
JS
1528 if (flags & RF_ACTIVE)
1529 if (bus_activate_resource(child, type, *rid, res) != 0) {
1530 bus_release_resource(child, type, *rid, res);
1531 return (NULL);
1532 }
1533
1534 return (res);
1535}
1536
1537static int
1538cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1539 int rid, struct resource *res)
1540{
1541 struct cbb_softc *sc = device_get_softc(brdev);
1542 int error;
1543
1544 if (rman_get_flags(res) & RF_ACTIVE) {
1545 error = bus_deactivate_resource(child, type, rid, res);
1546 if (error != 0)
1547 return (error);
1548 }
1549 cbb_remove_res(sc, res);
1550 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1551 type, rid, res));
1552}
1553
1554/************************************************************************/
1555/* PC Card Power Functions */
1556/************************************************************************/
1557
1558static int
1559cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1560{
1561 struct cbb_softc *sc = device_get_softc(brdev);
1562 int err;
1563
1564 DPRINTF(("cbb_pcic_socket_enable:\n"));
1565
1566 /* power down/up the socket to reset */
1567 err = cbb_do_power(brdev);
1568 if (err)
1569 return (err);
1570 exca_reset(&sc->exca, child);
1571
1572 return (0);
1573}
1574
1575static void
1576cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1577{
1578 struct cbb_softc *sc = device_get_softc(brdev);
1579
1580 DPRINTF(("cbb_pcic_socket_disable\n"));
1581
1582 /* reset signal asserting... */
1583 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
1584 DELAY(2*1000);
1585
1586 /* power down the socket */
1587 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1588 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
1589
1590 /* wait 300ms until power fails (Tpf). */
1591 DELAY(300 * 1000);
1592}
1593
1594/************************************************************************/
1595/* POWER methods */
1596/************************************************************************/
1597
1598static int
1599cbb_power_enable_socket(device_t brdev, device_t child)
1600{
1601 struct cbb_softc *sc = device_get_softc(brdev);
1602
1603 if (sc->flags & CBB_16BIT_CARD)
1604 return (cbb_pcic_power_enable_socket(brdev, child));
1605 else
1606 return (cbb_cardbus_power_enable_socket(brdev, child));
1607}
1608
1609static void
1610cbb_power_disable_socket(device_t brdev, device_t child)
1611{
1612 struct cbb_softc *sc = device_get_softc(brdev);
1613 if (sc->flags & CBB_16BIT_CARD)
1614 cbb_pcic_power_disable_socket(brdev, child);
1615 else
1616 cbb_cardbus_power_disable_socket(brdev, child);
1617}
1618static int
1619cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1620 struct resource *res)
1621{
1622 int err;
1623 struct cbb_softc *sc = device_get_softc(brdev);
1624 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */
1625 switch (type) {
1626 case SYS_RES_IOPORT:
1627 err = exca_io_map(&sc->exca, 0, res);
1628 break;
1629 case SYS_RES_MEMORY:
1630 err = exca_mem_map(&sc->exca, 0, res);
1631 break;
1632 default:
1633 err = 0;
1634 break;
1635 }
1636 if (err)
1637 return (err);
1638
1639 }
1640 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1641 type, rid, res));
1642}
1643
1644static int
1645cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1646 int rid, struct resource *res)
1647{
1648 struct cbb_softc *sc = device_get_softc(brdev);
1649
1650 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */
1651 switch (type) {
1652 case SYS_RES_IOPORT:
1653 if (exca_io_unmap_res(&sc->exca, res))
1654 return (ENOENT);
1655 break;
1656 case SYS_RES_MEMORY:
1657 if (exca_mem_unmap_res(&sc->exca, res))
1658 return (ENOENT);
1659 break;
1660 }
1661 }
1662 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1663 type, rid, res));
1664}
1665
1666static struct resource *
1667cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1668 u_long start, u_long end, u_long count, uint flags)
1669{
1670 struct resource *res = NULL;
1671 struct cbb_softc *sc = device_get_softc(brdev);
1672 int tmp;
1673
1674 switch (type) {
1675 case SYS_RES_MEMORY:
1676 if (start < cbb_start_mem)
1677 start = cbb_start_mem;
1678 if (end < start)
1679 end = start;
1680 flags = (flags & ~RF_ALIGNMENT_MASK) |
1681 rman_make_alignment_flags(CBB_MEMALIGN);
1682 break;
1683 case SYS_RES_IOPORT:
1684 if (start < cbb_start_16_io)
1685 start = cbb_start_16_io;
1686 if (end < start)
1687 end = start;
1688 break;
1689 case SYS_RES_IRQ:
1690 tmp = rman_get_start(sc->irq_res);
1691 if (start > tmp || end < tmp || count != 1) {
1692 device_printf(child, "requested interrupt %ld-%ld,"
1693 "count = %ld not supported by cbb\n",
1694 start, end, count);
1695 return (NULL);
1696 }
1697 flags |= RF_SHAREABLE;
1698 start = end = rman_get_start(sc->irq_res);
1699 break;
1700 }
1701 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1702 start, end, count, flags & ~RF_ACTIVE);
1703 if (res == NULL)
1704 return (NULL);
4b87c318
SS
1705 if (cbb_insert_res(sc, res, type, *rid)) {
1706 BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, type,
fc508c29 1707 *rid, res);
4b87c318
SS
1708 return (NULL);
1709 }
666d2603
JS
1710 if (flags & RF_ACTIVE) {
1711 if (bus_activate_resource(child, type, *rid, res) != 0) {
1712 bus_release_resource(child, type, *rid, res);
1713 return (NULL);
1714 }
1715 }
1716
1717 return (res);
1718}
1719
1720static int
1721cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1722 int rid, struct resource *res)
1723{
1724 struct cbb_softc *sc = device_get_softc(brdev);
1725 int error;
1726
1727 if (rman_get_flags(res) & RF_ACTIVE) {
1728 error = bus_deactivate_resource(child, type, rid, res);
1729 if (error != 0)
1730 return (error);
1731 }
1732 cbb_remove_res(sc, res);
1733 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1734 type, rid, res));
1735}
1736
1737/************************************************************************/
1738/* PC Card methods */
1739/************************************************************************/
1740
1741static int
1742cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1743 uint32_t flags)
1744{
1745 struct cbb_softc *sc = device_get_softc(brdev);
1746 struct resource *res;
1747
1748 if (type != SYS_RES_MEMORY)
1749 return (EINVAL);
1750 res = cbb_find_res(sc, type, rid);
1751 if (res == NULL) {
1752 device_printf(brdev,
1753 "set_res_flags: specified rid not found\n");
1754 return (ENOENT);
1755 }
1756 return (exca_mem_set_flags(&sc->exca, res, flags));
1757}
1758
1759static int
1760cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1761 uint32_t cardaddr, uint32_t *deltap)
1762{
1763 struct cbb_softc *sc = device_get_softc(brdev);
1764 struct resource *res;
1765
1766 res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1767 if (res == NULL) {
1768 device_printf(brdev,
1769 "set_memory_offset: specified rid not found\n");
1770 return (ENOENT);
1771 }
1772 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1773}
1774
1775/************************************************************************/
1776/* BUS Methods */
1777/************************************************************************/
1778
1779
1780static int
1781cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1782 struct resource *r)
1783{
1784 struct cbb_softc *sc = device_get_softc(brdev);
1785
1786 if (sc->flags & CBB_16BIT_CARD)
1787 return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1788 else
1789 return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1790 r));
1791}
1792
1793static int
1794cbb_deactivate_resource(device_t brdev, device_t child, int type,
1795 int rid, struct resource *r)
1796{
1797 struct cbb_softc *sc = device_get_softc(brdev);
1798
1799 if (sc->flags & CBB_16BIT_CARD)
1800 return (cbb_pcic_deactivate_resource(brdev, child, type,
1801 rid, r));
1802 else
1803 return (cbb_cardbus_deactivate_resource(brdev, child, type,
1804 rid, r));
1805}
1806
1807static struct resource *
1808cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1809 u_long start, u_long end, u_long count, uint flags)
1810{
1811 struct cbb_softc *sc = device_get_softc(brdev);
1812
1813 if (sc->flags & CBB_16BIT_CARD)
1814 return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1815 start, end, count, flags));
1816 else
1817 return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1818 start, end, count, flags));
1819}
1820
1821static int
1822cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1823 struct resource *r)
1824{
1825 struct cbb_softc *sc = device_get_softc(brdev);
1826
1827 if (sc->flags & CBB_16BIT_CARD)
1828 return (cbb_pcic_release_resource(brdev, child, type,
1829 rid, r));
1830 else
1831 return (cbb_cardbus_release_resource(brdev, child, type,
1832 rid, r));
1833}
1834
1835static int
1836cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1837{
1838 struct cbb_softc *sc = device_get_softc(brdev);
1839
1840 switch (which) {
1841 case PCIB_IVAR_BUS:
1842 *result = sc->secbus;
1843 return (0);
1844 }
1845 return (ENOENT);
1846}
1847
1848static int
1849cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1850{
1851 struct cbb_softc *sc = device_get_softc(brdev);
1852
1853 switch (which) {
1854 case PCIB_IVAR_BUS:
1855 sc->secbus = value;
1856 break;
1857 }
1858 return (ENOENT);
1859}
1860
1861/************************************************************************/
1862/* PCI compat methods */
1863/************************************************************************/
1864
1865static int
1866cbb_maxslots(device_t brdev)
1867{
1868 return (0);
1869}
1870
1871static uint32_t
1872cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
1873{
1874 /*
1875 * Pass through to the next ppb up the chain (i.e. our grandparent).
1876 */
1877 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
1878 b, s, f, reg, width));
1879}
1880
1881static void
1882cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,
1883 int width)
1884{
1885 /*
1886 * Pass through to the next ppb up the chain (i.e. our grandparent).
1887 */
1888 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)),
1889 b, s, f, reg, val, width);
1890}
1891
1892static int
1893cbb_suspend(device_t self)
1894{
1895 int error = 0;
1896 struct cbb_softc *sc = device_get_softc(self);
1897
666d2603
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1898 bus_teardown_intr(self, sc->irq_res, sc->intrhand);
1899 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */
1900 error = bus_generic_suspend(self);
1901 return (error);
1902}
1903
1904static int
1905cbb_resume(device_t self)
1906{
1907 int error = 0;
1908 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1909 uint32_t tmp;
1910
1911 /*
1912 * Some BIOSes will not save the BARs for the pci chips, so we
1913 * must do it ourselves. If the BAR is reset to 0 for an I/O
1914 * device, it will read back as 0x1, so no explicit test for
1915 * memory devices are needed.
1916 *
1917 * Note: The PCI bus code should do this automatically for us on
1918 * suspend/resume, but until it does, we have to cope.
1919 */
1920 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1921 DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1922 rman_get_start(sc->base_res)));
1923
1924 cbb_chipinit(sc);
1925
1926 /* reset interrupt -- Do we really need to do this? */
1927 tmp = cbb_get(sc, CBB_SOCKET_EVENT);
1928 cbb_set(sc, CBB_SOCKET_EVENT, tmp);
1929
1930 /* re-establish the interrupt. */
ee61f228 1931 if (bus_setup_intr(self, sc->irq_res, 0, cbb_intr, sc,
e9cb6d99 1932 &sc->intrhand, NULL)) {
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1933 device_printf(self, "couldn't re-establish interrupt");
1934 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
1935 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE,
1936 sc->base_res);
1937 sc->irq_res = NULL;
1938 sc->base_res = NULL;
1939 return (ENOMEM);
1940 }
1941
1942 /* CSC Interrupt: Card detect interrupt on */
1943 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1944
1945 /* Signal the thread to wakeup. */
1946 wakeup(sc);
1947
1948 error = bus_generic_resume(self);
1949
1950 return (error);
1951}
1952
1953static int
1954cbb_child_present(device_t self)
1955{
1956 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1957 uint32_t sockstate;
1958
1959 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1960 return ((sockstate & CBB_SOCKET_STAT_CD) != 0 &&
1961 (sc->flags & CBB_CARD_OK) != 0);
1962}
1963
1964static device_method_t cbb_methods[] = {
1965 /* Device interface */
1966 DEVMETHOD(device_probe, cbb_probe),
1967 DEVMETHOD(device_attach, cbb_attach),
1968 DEVMETHOD(device_detach, cbb_detach),
1969 DEVMETHOD(device_shutdown, cbb_shutdown),
1970 DEVMETHOD(device_suspend, cbb_suspend),
1971 DEVMETHOD(device_resume, cbb_resume),
1972
1973 /* bus methods */
1974 DEVMETHOD(bus_print_child, bus_generic_print_child),
1975 DEVMETHOD(bus_read_ivar, cbb_read_ivar),
1976 DEVMETHOD(bus_write_ivar, cbb_write_ivar),
1977 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource),
1978 DEVMETHOD(bus_release_resource, cbb_release_resource),
1979 DEVMETHOD(bus_activate_resource, cbb_activate_resource),
1980 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource),
1981 DEVMETHOD(bus_driver_added, cbb_driver_added),
1982 DEVMETHOD(bus_child_detached, cbb_child_detached),
1983 DEVMETHOD(bus_setup_intr, cbb_setup_intr),
1984 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr),
1985 DEVMETHOD(bus_child_present, cbb_child_present),
1986
1987 /* 16-bit card interface */
1988 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags),
1989 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset),
1990
1991 /* power interface */
1992 DEVMETHOD(power_enable_socket, cbb_power_enable_socket),
1993 DEVMETHOD(power_disable_socket, cbb_power_disable_socket),
1994
1995 /* pcib compatibility interface */
1996 DEVMETHOD(pcib_maxslots, cbb_maxslots),
1997 DEVMETHOD(pcib_read_config, cbb_read_config),
1998 DEVMETHOD(pcib_write_config, cbb_write_config),
1999 {0,0}
2000};
2001
2002static driver_t cbb_driver = {
2003 "cbb",
2004 cbb_methods,
2005 sizeof(struct cbb_softc)
2006};
2007
2008static devclass_t cbb_devclass;
2009
2010DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0);
2011MODULE_VERSION(cbb, 1);
2012MODULE_DEPEND(cbb, exca, 1, 1, 1);