Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / dev / raid / amr / amr.c
CommitLineData
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1/*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * Copyright (c) 2002 Eric Moore
28 * Copyright (c) 2002 LSI Logic Corporation
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 * 1. Redistributions of source code must retain the above copyright
35 * notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 * notice, this list of conditions and the following disclaimer in the
38 * documentation and/or other materials provided with the distribution.
39 * 3. The party using or redistributing the source code and binary forms
40 * agrees to the disclaimer below and the terms and conditions set forth
41 * herein.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
46 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
53 * SUCH DAMAGE.
54 *
55 * $FreeBSD: src/sys/dev/amr/amr.c,v 1.7.2.13 2003/01/15 13:41:18 emoore Exp $
1f7ab7c9 56 * $DragonFly: src/sys/dev/raid/amr/amr.c,v 1.23 2006/10/25 20:56:00 dillon Exp $
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57 */
58
59/*
60 * Driver for the AMI MegaRaid family of controllers.
61 */
62
63#include <sys/param.h>
64#include <sys/systm.h>
65#include <sys/malloc.h>
66#include <sys/kernel.h>
67
1f2de5d4 68#include "amr_compat.h"
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69#include <sys/bus.h>
70#include <sys/conf.h>
71#include <sys/devicestat.h>
72#include <sys/disk.h>
73#include <sys/stat.h>
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74#include <sys/rman.h>
75
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76#include <bus/pci/pcireg.h>
77#include <bus/pci/pcivar.h>
984263bc 78
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79#include "amrio.h"
80#include "amrreg.h"
81#include "amrvar.h"
984263bc 82#define AMR_DEFINE_TABLES
1f2de5d4 83#include "amr_tables.h"
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84
85#define AMR_CDEV_MAJOR 132
86
87static d_open_t amr_open;
88static d_close_t amr_close;
89static d_ioctl_t amr_ioctl;
90
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91static struct dev_ops amr_ops = {
92 { "amr", AMR_CDEV_MAJOR, 0 },
93 .d_open = amr_open,
94 .d_close = amr_close,
95 .d_ioctl = amr_ioctl
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96};
97
98/*
99 * Initialisation, bus interface.
100 */
101static void amr_startup(void *arg);
102
103/*
104 * Command wrappers
105 */
106static int amr_query_controller(struct amr_softc *sc);
107static void *amr_enquiry(struct amr_softc *sc, size_t bufsize,
108 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual);
109static void amr_completeio(struct amr_command *ac);
110static int amr_support_ext_cdb(struct amr_softc *sc);
111
112/*
113 * Command buffer allocation.
114 */
115static void amr_alloccmd_cluster(struct amr_softc *sc);
116static void amr_freecmd_cluster(struct amr_command_cluster *acc);
117
118/*
119 * Command processing.
120 */
121static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp);
122static int amr_wait_command(struct amr_command *ac);
123static int amr_getslot(struct amr_command *ac);
124static void amr_mapcmd(struct amr_command *ac);
125static void amr_unmapcmd(struct amr_command *ac);
126static int amr_start(struct amr_command *ac);
127static void amr_complete(void *context, int pending);
128
129/*
130 * Status monitoring
131 */
132static void amr_periodic(void *data);
133
134/*
135 * Interface-specific shims
136 */
137static int amr_quartz_submit_command(struct amr_softc *sc);
138static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
139static int amr_quartz_poll_command(struct amr_command *ac);
140
141static int amr_std_submit_command(struct amr_softc *sc);
142static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
143static int amr_std_poll_command(struct amr_command *ac);
144static void amr_std_attach_mailbox(struct amr_softc *sc);
145
146#ifdef AMR_BOARD_INIT
147static int amr_quartz_init(struct amr_softc *sc);
148static int amr_std_init(struct amr_softc *sc);
149#endif
150
151/*
152 * Debugging
153 */
154static void amr_describe_controller(struct amr_softc *sc);
155#ifdef AMR_DEBUG
156#if 0
157static void amr_printcommand(struct amr_command *ac);
158#endif
159#endif
160
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161DECLARE_DUMMY_MODULE(amr);
162
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163/********************************************************************************
164 ********************************************************************************
165 Inline Glue
166 ********************************************************************************
167 ********************************************************************************/
168
169/********************************************************************************
170 ********************************************************************************
171 Public Interfaces
172 ********************************************************************************
173 ********************************************************************************/
174
175/********************************************************************************
176 * Initialise the controller and softc.
177 */
178int
179amr_attach(struct amr_softc *sc)
180{
181
182 debug_called(1);
183
184 /*
185 * Initialise per-controller queues.
186 */
187 TAILQ_INIT(&sc->amr_completed);
188 TAILQ_INIT(&sc->amr_freecmds);
189 TAILQ_INIT(&sc->amr_cmd_clusters);
190 TAILQ_INIT(&sc->amr_ready);
191 bioq_init(&sc->amr_bioq);
192
42cdd4ab 193#if defined(__FreeBSD__) && __FreeBSD_version >= 500005
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194 /*
195 * Initialise command-completion task.
196 */
197 TASK_INIT(&sc->amr_task_complete, 0, amr_complete, sc);
198#endif
199
200 debug(2, "queue init done");
201
202 /*
203 * Configure for this controller type.
204 */
205 if (AMR_IS_QUARTZ(sc)) {
206 sc->amr_submit_command = amr_quartz_submit_command;
207 sc->amr_get_work = amr_quartz_get_work;
208 sc->amr_poll_command = amr_quartz_poll_command;
209 } else {
210 sc->amr_submit_command = amr_std_submit_command;
211 sc->amr_get_work = amr_std_get_work;
212 sc->amr_poll_command = amr_std_poll_command;
fc6d0222 213 amr_std_attach_mailbox(sc);
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214 }
215
216#ifdef AMR_BOARD_INIT
217 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))))
218 return(ENXIO);
219#endif
220
221 /*
222 * Quiz controller for features and limits.
223 */
224 if (amr_query_controller(sc))
225 return(ENXIO);
226
227 debug(2, "controller query complete");
228
229 /*
230 * Attach our 'real' SCSI channels to CAM.
231 */
232 if (amr_cam_attach(sc))
233 return(ENXIO);
234 debug(2, "CAM attach done");
235
236 /*
237 * Create the control device.
238 */
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239 dev_ops_add(&amr_ops, -1, device_get_unit(sc->amr_dev));
240 sc->amr_dev_t = make_dev(&amr_ops, device_get_unit(sc->amr_dev),
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241 UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR,
242 "amr%d", device_get_unit(sc->amr_dev));
984263bc 243 sc->amr_dev_t->si_drv1 = sc;
e4c9c0c8 244 reference_dev(sc->amr_dev_t);
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245
246 /*
247 * Schedule ourselves to bring the controller up once interrupts are
248 * available.
249 */
250 bzero(&sc->amr_ich, sizeof(struct intr_config_hook));
251 sc->amr_ich.ich_func = amr_startup;
252 sc->amr_ich.ich_arg = sc;
a1e26a0c 253 sc->amr_ich.ich_desc = "amr";
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254 if (config_intrhook_establish(&sc->amr_ich) != 0) {
255 device_printf(sc->amr_dev, "can't establish configuration hook\n");
256 return(ENOMEM);
257 }
258
259 /*
260 * Print a little information about the controller.
261 */
262 amr_describe_controller(sc);
263
264 debug(2, "attach complete");
265 return(0);
266}
267
268/********************************************************************************
269 * Locate disk resources and attach children to them.
270 */
271static void
272amr_startup(void *arg)
273{
274 struct amr_softc *sc = (struct amr_softc *)arg;
275 struct amr_logdrive *dr;
276 int i, error;
277
278 debug_called(1);
0cdb68f0 279 callout_init(&sc->amr_timeout);
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280
281 /* pull ourselves off the intrhook chain */
282 config_intrhook_disestablish(&sc->amr_ich);
283
284 /* get up-to-date drive information */
285 if (amr_query_controller(sc)) {
286 device_printf(sc->amr_dev, "can't scan controller for drives\n");
287 return;
288 }
289
290 /* iterate over available drives */
291 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) {
292 /* are we already attached to this drive? */
293 if (dr->al_disk == 0) {
294 /* generate geometry information */
295 if (dr->al_size > 0x200000) { /* extended translation? */
296 dr->al_heads = 255;
297 dr->al_sectors = 63;
298 } else {
299 dr->al_heads = 64;
300 dr->al_sectors = 32;
301 }
302 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors);
303
304 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1);
305 if (dr->al_disk == 0)
306 device_printf(sc->amr_dev, "device_add_child failed\n");
307 device_set_ivars(dr->al_disk, dr);
308 }
309 }
310
311 if ((error = bus_generic_attach(sc->amr_dev)) != 0)
312 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error);
313
314 /* mark controller back up */
315 sc->amr_state &= ~AMR_STATE_SHUTDOWN;
316
317 /* interrupts will be enabled before we do anything more */
318 sc->amr_state |= AMR_STATE_INTEN;
319
320 /*
321 * Start the timeout routine.
322 */
9087698d 323/* callout_reset(&sc->amr_timeout, hz, amr_periodic, sc); */
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324
325 return;
326}
327
328/*******************************************************************************
329 * Free resources associated with a controller instance
330 */
331void
332amr_free(struct amr_softc *sc)
333{
334 struct amr_command_cluster *acc;
335
336 /* detach from CAM */
337 amr_cam_detach(sc);
338
339 /* cancel status timeout */
0cdb68f0 340 callout_stop(&sc->amr_timeout);
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341
342 /* throw away any command buffers */
343 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) {
344 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link);
345 amr_freecmd_cluster(acc);
346 }
347
348 /* destroy control device */
b13267a5 349 if( sc->amr_dev_t != (cdev_t)NULL)
984263bc 350 destroy_dev(sc->amr_dev_t);
fef8985e 351 dev_ops_remove(&amr_ops, -1, device_get_unit(sc->amr_dev));
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352}
353
354/*******************************************************************************
355 * Receive a bio structure from a child device and queue it on a particular
356 * disk resource, then poke the disk resource to start as much work as it can.
357 */
358int
359amr_submit_bio(struct amr_softc *sc, struct bio *bio)
360{
361 debug_called(2);
362
363 amr_enqueue_bio(sc, bio);
364 amr_startio(sc);
365 return(0);
366}
367
368/********************************************************************************
369 * Accept an open operation on the control device.
370 */
371static int
fef8985e 372amr_open(struct dev_open_args *ap)
984263bc 373{
b13267a5 374 cdev_t dev = ap->a_head.a_dev;
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375 int unit = minor(dev);
376 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
377
378 debug_called(1);
379
380 sc->amr_state |= AMR_STATE_OPEN;
381 return(0);
382}
383
384/********************************************************************************
385 * Accept the last close on the control device.
386 */
387static int
fef8985e 388amr_close(struct dev_close_args *ap)
984263bc 389{
b13267a5 390 cdev_t dev = ap->a_head.a_dev;
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391 int unit = minor(dev);
392 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
393
394 debug_called(1);
395
396 sc->amr_state &= ~AMR_STATE_OPEN;
397 return (0);
398}
399
400/********************************************************************************
401 * Handle controller-specific control operations.
402 */
403static int
fef8985e 404amr_ioctl(struct dev_ioctl_args *ap)
984263bc 405{
b13267a5 406 cdev_t dev = ap->a_head.a_dev;
984263bc 407 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
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408 int *arg = (int *)ap->a_data;
409 struct amr_user_ioctl *au = (struct amr_user_ioctl *)ap->a_data;
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410 struct amr_command *ac;
411 struct amr_mailbox_ioctl *mbi;
fef8985e 412 struct amr_passthrough *apt;
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413 void *dp;
414 int error;
415
416 debug_called(1);
417
418 error = 0;
419 dp = NULL;
fef8985e 420 apt = NULL;
984263bc 421 ac = NULL;
fef8985e 422 switch(ap->a_cmd) {
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423
424 case AMR_IO_VERSION:
425 debug(1, "AMR_IO_VERSION");
426 *arg = AMR_IO_VERSION_NUMBER;
427 break;
428
429 case AMR_IO_COMMAND:
430 debug(1, "AMR_IO_COMMAND 0x%x", au->au_cmd[0]);
431 /* handle inbound data buffer */
432 if (au->au_length != 0) {
efda3bd0 433 if ((dp = kmalloc(au->au_length, M_DEVBUF, M_WAITOK)) == NULL) {
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434 error = ENOMEM;
435 break;
436 }
437 if ((error = copyin(au->au_buffer, dp, au->au_length)) != 0)
438 break;
439 debug(2, "copyin %ld bytes from %p -> %p", au->au_length, au->au_buffer, dp);
440 }
441
442 if ((ac = amr_alloccmd(sc)) == NULL) {
443 error = ENOMEM;
444 break;
445 }
446
447 /* handle SCSI passthrough command */
448 if (au->au_cmd[0] == AMR_CMD_PASS) {
efda3bd0 449 if ((apt = kmalloc(sizeof(*apt), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
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450 error = ENOMEM;
451 break;
452 }
453
454 /* copy cdb */
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455 apt->ap_cdb_length = au->au_cmd[2];
456 bcopy(&au->au_cmd[3], &apt->ap_cdb[0], apt->ap_cdb_length);
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457
458 /* build passthrough */
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459 apt->ap_timeout = au->au_cmd[apt->ap_cdb_length + 3] & 0x07;
460 apt->ap_ars = (au->au_cmd[apt->ap_cdb_length + 3] & 0x08) ? 1 : 0;
461 apt->ap_islogical = (au->au_cmd[apt->ap_cdb_length + 3] & 0x80) ? 1 : 0;
462 apt->ap_logical_drive_no = au->au_cmd[apt->ap_cdb_length + 4];
463 apt->ap_channel = au->au_cmd[apt->ap_cdb_length + 5];
464 apt->ap_scsi_id = au->au_cmd[apt->ap_cdb_length + 6];
465 apt->ap_request_sense_length = 14;
466 apt->ap_data_transfer_length = au->au_length;
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467 /* XXX what about the request-sense area? does the caller want it? */
468
469 /* build command */
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470 ac->ac_data = apt;
471 ac->ac_length = sizeof(*apt);
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472 ac->ac_flags |= AMR_CMD_DATAOUT;
473 ac->ac_ccb_data = dp;
474 ac->ac_ccb_length = au->au_length;
475 if (au->au_direction & AMR_IO_READ)
476 ac->ac_flags |= AMR_CMD_CCB_DATAIN;
477 if (au->au_direction & AMR_IO_WRITE)
478 ac->ac_flags |= AMR_CMD_CCB_DATAOUT;
479
480 ac->ac_mailbox.mb_command = AMR_CMD_PASS;
481
482 } else {
483 /* direct command to controller */
484 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox;
485
486 /* copy pertinent mailbox items */
487 mbi->mb_command = au->au_cmd[0];
488 mbi->mb_channel = au->au_cmd[1];
489 mbi->mb_param = au->au_cmd[2];
490 mbi->mb_pad[0] = au->au_cmd[3];
491 mbi->mb_drive = au->au_cmd[4];
492
493 /* build the command */
494 ac->ac_data = dp;
495 ac->ac_length = au->au_length;
496 if (au->au_direction & AMR_IO_READ)
497 ac->ac_flags |= AMR_CMD_DATAIN;
498 if (au->au_direction & AMR_IO_WRITE)
499 ac->ac_flags |= AMR_CMD_DATAOUT;
500 }
501
502 /* run the command */
503 if ((error = amr_wait_command(ac)) != 0)
504 break;
505
506 /* copy out data and set status */
507 if (au->au_length != 0)
508 error = copyout(dp, au->au_buffer, au->au_length);
509 debug(2, "copyout %ld bytes from %p -> %p", au->au_length, dp, au->au_buffer);
510 if (dp != NULL)
511 debug(2, "%16d", (int)dp);
512 au->au_status = ac->ac_status;
513 break;
514
515 default:
516 debug(1, "unknown ioctl 0x%lx", cmd);
517 error = ENOIOCTL;
518 break;
519 }
520
521 if (dp != NULL)
efda3bd0 522 kfree(dp, M_DEVBUF);
fef8985e 523 if (apt != NULL)
efda3bd0 524 kfree(apt, M_DEVBUF);
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525 if (ac != NULL)
526 amr_releasecmd(ac);
527 return(error);
528}
529
530/********************************************************************************
531 ********************************************************************************
532 Status Monitoring
533 ********************************************************************************
534 ********************************************************************************/
535
536/********************************************************************************
537 * Perform a periodic check of the controller status
538 */
539static void
540amr_periodic(void *data)
541{
542 struct amr_softc *sc = (struct amr_softc *)data;
543
544 debug_called(2);
545
546 /* XXX perform periodic status checks here */
547
548 /* compensate for missed interrupts */
549 amr_done(sc);
550
551 /* reschedule */
0cdb68f0 552 callout_reset(&sc->amr_timeout, hz, amr_periodic, sc);
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553}
554
555/********************************************************************************
556 ********************************************************************************
557 Command Wrappers
558 ********************************************************************************
559 ********************************************************************************/
560
561/********************************************************************************
562 * Interrogate the controller for the operational parameters we require.
563 */
564static int
565amr_query_controller(struct amr_softc *sc)
566{
567 struct amr_enquiry3 *aex;
568 struct amr_prodinfo *ap;
569 struct amr_enquiry *ae;
570 int ldrv;
571
572 /*
573 * If we haven't found the real limit yet, let us have a couple of commands in
574 * order to be able to probe.
575 */
576 if (sc->amr_maxio == 0)
577 sc->amr_maxio = 2;
578
579 /*
580 * Greater than 10 byte cdb support
581 */
582 sc->support_ext_cdb = amr_support_ext_cdb(sc);
583
584 if(sc->support_ext_cdb) {
585 debug(2,"supports extended CDBs.");
586 }
587
588 /*
589 * Try to issue an ENQUIRY3 command
590 */
591 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
592 AMR_CONFIG_ENQ3_SOLICITED_FULL)) != NULL) {
593
594 /*
595 * Fetch current state of logical drives.
596 */
597 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) {
598 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv];
599 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv];
600 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv];
601 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
602 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
603 }
efda3bd0 604 kfree(aex, M_DEVBUF);
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605
606 /*
607 * Get product info for channel count.
608 */
609 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) == NULL) {
610 device_printf(sc->amr_dev, "can't obtain product data from controller\n");
611 return(1);
612 }
613 sc->amr_maxdrives = 40;
614 sc->amr_maxchan = ap->ap_nschan;
615 sc->amr_maxio = ap->ap_maxio;
616 sc->amr_type |= AMR_TYPE_40LD;
efda3bd0 617 kfree(ap, M_DEVBUF);
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618
619 } else {
620
621 /* failed, try the 8LD ENQUIRY commands */
622 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) == NULL) {
623 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) == NULL) {
624 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n");
625 return(1);
626 }
627 ae->ae_signature = 0;
628 }
629
630 /*
631 * Fetch current state of logical drives.
632 */
633 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) {
634 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv];
635 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv];
636 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv];
637 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
638 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
639 }
640
641 sc->amr_maxdrives = 8;
642 sc->amr_maxchan = ae->ae_adapter.aa_channels;
643 sc->amr_maxio = ae->ae_adapter.aa_maxio;
efda3bd0 644 kfree(ae, M_DEVBUF);
984263bc
MD
645 }
646
647 /*
648 * Mark remaining drives as unused.
649 */
650 for (; ldrv < AMR_MAXLD; ldrv++)
651 sc->amr_drive[ldrv].al_size = 0xffffffff;
652
653 /*
654 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust
655 * the controller's reported value, and lockups have been seen when we do.
656 */
657 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD);
658
659 return(0);
660}
661
662/********************************************************************************
663 * Run a generic enquiry-style command.
664 */
665static void *
666amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual)
667{
668 struct amr_command *ac;
669 void *result;
670 u_int8_t *mbox;
671 int error;
672
673 debug_called(1);
674
675 error = 1;
676 result = NULL;
677
678 /* get ourselves a command buffer */
679 if ((ac = amr_alloccmd(sc)) == NULL)
680 goto out;
681 /* allocate the response structure */
efda3bd0 682 result = kmalloc(bufsize, M_DEVBUF, M_INTWAIT);
984263bc
MD
683 /* set command flags */
684 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
685
686 /* point the command at our data */
687 ac->ac_data = result;
688 ac->ac_length = bufsize;
689
690 /* build the command proper */
691 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
692 mbox[0] = cmd;
693 mbox[2] = cmdsub;
694 mbox[3] = cmdqual;
695
696 /* can't assume that interrupts are going to work here, so play it safe */
697 if (sc->amr_poll_command(ac))
698 goto out;
699 error = ac->ac_status;
700
701 out:
702 if (ac != NULL)
703 amr_releasecmd(ac);
704 if ((error != 0) && (result != NULL)) {
efda3bd0 705 kfree(result, M_DEVBUF);
984263bc
MD
706 result = NULL;
707 }
708 return(result);
709}
710
711/********************************************************************************
712 * Flush the controller's internal cache, return status.
713 */
714int
715amr_flush(struct amr_softc *sc)
716{
717 struct amr_command *ac;
718 int error;
719
720 /* get ourselves a command buffer */
721 error = 1;
722 if ((ac = amr_alloccmd(sc)) == NULL)
723 goto out;
724 /* set command flags */
725 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
726
727 /* build the command proper */
728 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH;
729
730 /* we have to poll, as the system may be going down or otherwise damaged */
731 if (sc->amr_poll_command(ac))
732 goto out;
733 error = ac->ac_status;
734
735 out:
736 if (ac != NULL)
737 amr_releasecmd(ac);
738 return(error);
739}
740
741/********************************************************************************
742 * Detect extented cdb >> greater than 10 byte cdb support
743 * returns '1' means this support exist
744 * returns '0' means this support doesn't exist
745 */
746static int
747amr_support_ext_cdb(struct amr_softc *sc)
748{
749 struct amr_command *ac;
750 u_int8_t *mbox;
751 int error;
752
753 /* get ourselves a command buffer */
754 error = 0;
755 if ((ac = amr_alloccmd(sc)) == NULL)
756 goto out;
757 /* set command flags */
758 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
759
760 /* build the command proper */
761 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
762 mbox[0] = 0xA4;
763 mbox[2] = 0x16;
764
765
766 /* we have to poll, as the system may be going down or otherwise damaged */
767 if (sc->amr_poll_command(ac))
768 goto out;
769 if( ac->ac_status == AMR_STATUS_SUCCESS ) {
770 error = 1;
771 }
772
773out:
774 if (ac != NULL)
775 amr_releasecmd(ac);
776 return(error);
777}
778
779/********************************************************************************
780 * Try to find I/O work for the controller from one or more of the work queues.
781 *
782 * We make the assumption that if the controller is not ready to take a command
783 * at some given time, it will generate an interrupt at some later time when
784 * it is.
785 */
786void
787amr_startio(struct amr_softc *sc)
788{
789 struct amr_command *ac;
790
791 /* spin until something prevents us from doing any work */
792 for (;;) {
793
794 /* try to get a ready command */
795 ac = amr_dequeue_ready(sc);
796
797 /* if that failed, build a command from a bio */
798 if (ac == NULL)
799 (void)amr_bio_command(sc, &ac);
800
801 /* if that failed, build a command from a ccb */
802 if (ac == NULL)
803 (void)amr_cam_command(sc, &ac);
804
805 /* if we don't have anything to do, give up */
806 if (ac == NULL)
807 break;
808
809 /* try to give the command to the controller; if this fails save it for later and give up */
810 if (amr_start(ac)) {
811 debug(2, "controller busy, command deferred");
812 amr_requeue_ready(ac); /* XXX schedule retry very soon? */
813 break;
814 }
815 }
816}
817
818/********************************************************************************
819 * Handle completion of an I/O command.
820 */
821static void
822amr_completeio(struct amr_command *ac)
823{
824 struct amr_softc *sc = ac->ac_sc;
825
826 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */
81b5c339
MD
827 ac->ac_bio->bio_buf->b_error = EIO;
828 ac->ac_bio->bio_buf->b_flags |= B_ERROR;
984263bc
MD
829
830 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status);
831/* amr_printcommand(ac);*/
832 }
833 amrd_intr(ac->ac_bio);
834 amr_releasecmd(ac);
835}
836
837/********************************************************************************
838 ********************************************************************************
839 Command Processing
840 ********************************************************************************
841 ********************************************************************************/
842
843/********************************************************************************
844 * Convert a bio off the top of the bio queue into a command.
845 */
846static int
847amr_bio_command(struct amr_softc *sc, struct amr_command **acp)
848{
849 struct amr_command *ac;
850 struct amrd_softc *amrd;
851 struct bio *bio;
852 int error;
853 int blkcount;
854 int driveno;
855 int cmd;
54078292 856 u_int32_t lba;
984263bc
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857
858 ac = NULL;
859 error = 0;
860
861 /* get a bio to work on */
862 if ((bio = amr_dequeue_bio(sc)) == NULL)
863 goto out;
864
865 /* get a command */
866 if ((ac = amr_alloccmd(sc)) == NULL) {
867 error = ENOMEM;
868 goto out;
869 }
870
871 /* connect the bio to the command */
872 ac->ac_complete = amr_completeio;
873 ac->ac_bio = bio;
81b5c339
MD
874 ac->ac_data = bio->bio_buf->b_data;
875 ac->ac_length = bio->bio_buf->b_bcount;
10f3fee5 876 if (bio->bio_buf->b_cmd == BUF_CMD_READ) {
984263bc
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877 ac->ac_flags |= AMR_CMD_DATAIN;
878 cmd = AMR_CMD_LREAD;
879 } else {
880 ac->ac_flags |= AMR_CMD_DATAOUT;
881 cmd = AMR_CMD_LWRITE;
882 }
81b5c339 883 amrd = (struct amrd_softc *)bio->bio_driver_info;
984263bc 884 driveno = amrd->amrd_drive - sc->amr_drive;
81b5c339 885 blkcount = (bio->bio_buf->b_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE;
54078292 886 lba = bio->bio_offset / AMR_BLKSIZE;
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887
888 ac->ac_mailbox.mb_command = cmd;
889 ac->ac_mailbox.mb_blkcount = blkcount;
54078292 890 ac->ac_mailbox.mb_lba = lba;
984263bc
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891 ac->ac_mailbox.mb_drive = driveno;
892 /* we fill in the s/g related data when the command is mapped */
893
54078292
MD
894 if ((lba + blkcount) > sc->amr_drive[driveno].al_size)
895 device_printf(sc->amr_dev, "I/O beyond end of unit (%ud,%d > %lu)\n",
896 lba, blkcount,
984263bc
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897 (u_long)sc->amr_drive[driveno].al_size);
898
899out:
900 if (error != 0) {
901 if (ac != NULL)
902 amr_releasecmd(ac);
903 if (bio != NULL) /* this breaks ordering... */
904 amr_enqueue_bio(sc, bio);
905 }
906 *acp = ac;
907 return(error);
908}
909
910/********************************************************************************
911 * Take a command, submit it to the controller and sleep until it completes
912 * or fails. Interrupts must be enabled, returns nonzero on error.
913 */
914static int
915amr_wait_command(struct amr_command *ac)
916{
917 int error, count;
918
919 debug_called(1);
920
921 ac->ac_complete = NULL;
922 ac->ac_flags |= AMR_CMD_SLEEP;
923 if ((error = amr_start(ac)) != 0)
924 return(error);
925
926 count = 0;
927 /* XXX better timeout? */
928 while ((ac->ac_flags & AMR_CMD_BUSY) && (count < 30)) {
377d4740 929 tsleep(ac, PCATCH, "amrwcmd", hz);
984263bc
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930 }
931 return(0);
932}
933
934/********************************************************************************
935 * Take a command, submit it to the controller and busy-wait for it to return.
936 * Returns nonzero on error. Can be safely called with interrupts enabled.
937 */
938static int
939amr_std_poll_command(struct amr_command *ac)
940{
941 struct amr_softc *sc = ac->ac_sc;
942 int error, count;
943
944 debug_called(2);
945
946 ac->ac_complete = NULL;
947 if ((error = amr_start(ac)) != 0)
948 return(error);
949
950 count = 0;
951 do {
952 /*
953 * Poll for completion, although the interrupt handler may beat us to it.
954 * Note that the timeout here is somewhat arbitrary.
955 */
956 amr_done(sc);
957 DELAY(1000);
958 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000));
959 if (!(ac->ac_flags & AMR_CMD_BUSY)) {
960 error = 0;
961 } else {
962 /* XXX the slot is now marked permanently busy */
963 error = EIO;
964 device_printf(sc->amr_dev, "polled command timeout\n");
965 }
966 return(error);
967}
968
969/********************************************************************************
970 * Take a command, submit it to the controller and busy-wait for it to return.
971 * Returns nonzero on error. Can be safely called with interrupts enabled.
972 */
973static int
974amr_quartz_poll_command(struct amr_command *ac)
975{
976 struct amr_softc *sc = ac->ac_sc;
984263bc
MD
977 int error,count;
978
979 debug_called(2);
980
981 /* now we have a slot, we can map the command (unmapped in amr_complete) */
982 amr_mapcmd(ac);
983
7f2216bc 984 crit_enter();
984263bc 985
510931cd
HP
986 if (sc->amr_state & AMR_STATE_INTEN) {
987 count=0;
988 while (sc->amr_busyslots) {
989 tsleep(sc, PCATCH, "amrpoll", hz);
990 if(count++>10) {
991 break;
992 }
993 }
994
995 if(sc->amr_busyslots) {
996 device_printf(sc->amr_dev, "adapter is busy\n");
7f2216bc 997 crit_exit();
510931cd
HP
998 amr_unmapcmd(ac);
999 ac->ac_status=0;
1000 return(1);
1001 }
984263bc
MD
1002 }
1003
1004 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1005
1006 /* clear the poll/ack fields in the mailbox */
1007 sc->amr_mailbox->mb_ident = 0xFE;
1008 sc->amr_mailbox->mb_nstatus = 0xFF;
1009 sc->amr_mailbox->mb_status = 0xFF;
1010 sc->amr_mailbox->mb_poll = 0;
1011 sc->amr_mailbox->mb_ack = 0;
1012 sc->amr_mailbox->mb_busy = 1;
1013
1014 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1015
1016 while(sc->amr_mailbox->mb_nstatus == 0xFF);
1017 while(sc->amr_mailbox->mb_status == 0xFF);
1018 ac->ac_status=sc->amr_mailbox->mb_status;
1019 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0;
1020 while(sc->amr_mailbox->mb_poll != 0x77);
1021 sc->amr_mailbox->mb_poll = 0;
1022 sc->amr_mailbox->mb_ack = 0x77;
1023
1024 /* acknowledge that we have the commands */
1025 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1026 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK);
1027
7f2216bc 1028 crit_exit();
984263bc
MD
1029
1030 /* unmap the command's data buffer */
1031 amr_unmapcmd(ac);
1032
1033 return(error);
1034}
1035
1036/********************************************************************************
1037 * Get a free command slot for a command if it doesn't already have one.
1038 *
1039 * May be safely called multiple times for a given command.
1040 */
1041static int
1042amr_getslot(struct amr_command *ac)
1043{
1044 struct amr_softc *sc = ac->ac_sc;
7f2216bc 1045 int slot, limit, error;
984263bc
MD
1046
1047 debug_called(3);
1048
1049 /* if the command already has a slot, don't try to give it another one */
1050 if (ac->ac_slot != 0)
1051 return(0);
1052
1053 /* enforce slot usage limit */
1054 limit = (ac->ac_flags & AMR_CMD_PRIORITY) ? sc->amr_maxio : sc->amr_maxio - 4;
1055 if (sc->amr_busyslots > limit)
1056 return(EBUSY);
1057
1058 /*
1059 * Allocate a slot. XXX linear scan is slow
1060 */
1061 error = EBUSY;
7f2216bc 1062 crit_enter();
984263bc
MD
1063 for (slot = 0; slot < sc->amr_maxio; slot++) {
1064 if (sc->amr_busycmd[slot] == NULL) {
1065 sc->amr_busycmd[slot] = ac;
1066 sc->amr_busyslots++;
1067 ac->ac_slot = slot;
1068 error = 0;
1069 break;
1070 }
1071 }
7f2216bc 1072 crit_exit();
984263bc
MD
1073
1074 return(error);
1075}
1076
1077/********************************************************************************
1078 * Map/unmap (ac)'s data in the controller's addressable space as required.
1079 *
1080 * These functions may be safely called multiple times on a given command.
1081 */
1082static void
1083amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1084{
1085 struct amr_command *ac = (struct amr_command *)arg;
1086 struct amr_softc *sc = ac->ac_sc;
1087 struct amr_sgentry *sg;
1088 int i;
1089 u_int8_t *sgc;
1090
1091 debug_called(3);
1092
1093 /* get base address of s/g table */
1094 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1095
1096 /* save data physical address */
1097 ac->ac_dataphys = segs[0].ds_addr;
1098
1099 /* for AMR_CMD_CONFIG the s/g count goes elsewhere */
1100 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG) {
1101 sgc = &(((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param);
1102 } else {
1103 sgc = &ac->ac_mailbox.mb_nsgelem;
1104 }
1105
1106 /* decide whether we need to populate the s/g table */
1107 if (nsegments < 2) {
1108 *sgc = 0;
1109 ac->ac_mailbox.mb_nsgelem = 0;
1110 ac->ac_mailbox.mb_physaddr = ac->ac_dataphys;
1111 } else {
1112 ac->ac_mailbox.mb_nsgelem = nsegments;
1113 *sgc = nsegments;
1114 ac->ac_mailbox.mb_physaddr = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1115 for (i = 0; i < nsegments; i++, sg++) {
1116 sg->sg_addr = segs[i].ds_addr;
1117 sg->sg_count = segs[i].ds_len;
1118 }
1119 }
1120}
1121
1122static void
1123amr_setup_ccbmap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1124{
1125 struct amr_command *ac = (struct amr_command *)arg;
1126 struct amr_softc *sc = ac->ac_sc;
1127 struct amr_sgentry *sg;
1128 struct amr_passthrough *ap = (struct amr_passthrough *)ac->ac_data;
1129 struct amr_ext_passthrough *aep = (struct amr_ext_passthrough *)ac->ac_data;
1130 int i;
1131
1132 /* get base address of s/g table */
1133 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1134
1135 /* decide whether we need to populate the s/g table */
1136 if( ac->ac_mailbox.mb_command == AMR_CMD_EXTPASS ) {
1137 if (nsegments < 2) {
1138 aep->ap_no_sg_elements = 0;
1139 aep->ap_data_transfer_address = segs[0].ds_addr;
1140 } else {
1141 /* save s/g table information in passthrough */
1142 aep->ap_no_sg_elements = nsegments;
1143 aep->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1144 /* populate s/g table (overwrites previous call which mapped the passthrough) */
1145 for (i = 0; i < nsegments; i++, sg++) {
1146 sg->sg_addr = segs[i].ds_addr;
1147 sg->sg_count = segs[i].ds_len;
1148 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1149 }
1150 }
1151 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1152 aep->ap_no_sg_elements, aep->ap_data_transfer_address, ac->ac_dataphys);
1153 } else {
1154 if (nsegments < 2) {
1155 ap->ap_no_sg_elements = 0;
1156 ap->ap_data_transfer_address = segs[0].ds_addr;
1157 } else {
1158 /* save s/g table information in passthrough */
1159 ap->ap_no_sg_elements = nsegments;
1160 ap->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1161 /* populate s/g table (overwrites previous call which mapped the passthrough) */
1162 for (i = 0; i < nsegments; i++, sg++) {
1163 sg->sg_addr = segs[i].ds_addr;
1164 sg->sg_count = segs[i].ds_len;
1165 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1166 }
1167 }
1168 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1169 ap->ap_no_sg_elements, ap->ap_data_transfer_address, ac->ac_dataphys);
1170 }
1171}
1172
1173static void
1174amr_mapcmd(struct amr_command *ac)
1175{
1176 struct amr_softc *sc = ac->ac_sc;
1177
1178 debug_called(3);
1179
1180 /* if the command involves data at all, and hasn't been mapped */
1181 if (!(ac->ac_flags & AMR_CMD_MAPPED)) {
1182
1183 if (ac->ac_data != NULL) {
1184 /* map the data buffers into bus space and build the s/g list */
1185 bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, ac->ac_length,
1186 amr_setup_dmamap, ac, 0);
1187 if (ac->ac_flags & AMR_CMD_DATAIN)
1188 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREREAD);
1189 if (ac->ac_flags & AMR_CMD_DATAOUT)
1190 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREWRITE);
1191 }
1192
1193 if (ac->ac_ccb_data != NULL) {
1194 bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, ac->ac_ccb_data, ac->ac_ccb_length,
1195 amr_setup_ccbmap, ac, 0);
1196 if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1197 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREREAD);
1198 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1199 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREWRITE);
1200 }
1201 ac->ac_flags |= AMR_CMD_MAPPED;
1202 }
1203}
1204
1205static void
1206amr_unmapcmd(struct amr_command *ac)
1207{
1208 struct amr_softc *sc = ac->ac_sc;
1209
1210 debug_called(3);
1211
1212 /* if the command involved data at all and was mapped */
1213 if (ac->ac_flags & AMR_CMD_MAPPED) {
1214
1215 if (ac->ac_data != NULL) {
1216 if (ac->ac_flags & AMR_CMD_DATAIN)
1217 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTREAD);
1218 if (ac->ac_flags & AMR_CMD_DATAOUT)
1219 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTWRITE);
1220 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap);
1221 }
1222
1223 if (ac->ac_ccb_data != NULL) {
1224 if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1225 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTREAD);
1226 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1227 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTWRITE);
1228 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_ccb_dmamap);
1229 }
1230 ac->ac_flags &= ~AMR_CMD_MAPPED;
1231 }
1232}
1233
1234/********************************************************************************
1235 * Take a command and give it to the controller, returns 0 if successful, or
1236 * EBUSY if the command should be retried later.
1237 */
1238static int
1239amr_start(struct amr_command *ac)
1240{
1241 struct amr_softc *sc = ac->ac_sc;
7f2216bc 1242 int done, i;
984263bc
MD
1243
1244 debug_called(3);
1245
1246 /* mark command as busy so that polling consumer can tell */
1247 ac->ac_flags |= AMR_CMD_BUSY;
1248
1249 /* get a command slot (freed in amr_done) */
1250 if (amr_getslot(ac))
1251 return(EBUSY);
1252
1253 /* now we have a slot, we can map the command (unmapped in amr_complete) */
1254 amr_mapcmd(ac);
1255
1256 /* mark the new mailbox we are going to copy in as busy */
1257 ac->ac_mailbox.mb_busy = 1;
1258
1259 /* clear the poll/ack fields in the mailbox */
1260 sc->amr_mailbox->mb_poll = 0;
1261 sc->amr_mailbox->mb_ack = 0;
1262
1263 /*
1264 * Save the slot number so that we can locate this command when complete.
1265 * Note that ident = 0 seems to be special, so we don't use it.
1266 */
1267 ac->ac_mailbox.mb_ident = ac->ac_slot + 1;
1268
1269 /*
1270 * Spin waiting for the mailbox, give up after ~1 second. We expect the
1271 * controller to be able to handle our I/O.
1272 *
1273 * XXX perhaps we should wait for less time, and count on the deferred command
1274 * handling to deal with retries?
1275 */
1276 debug(4, "wait for mailbox");
1277 for (i = 10000, done = 0; (i > 0) && !done; i--) {
7f2216bc 1278 crit_enter();
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1279
1280 /* is the mailbox free? */
1281 if (sc->amr_mailbox->mb_busy == 0) {
1282 debug(4, "got mailbox");
1283 sc->amr_mailbox64->mb64_segment = 0;
1284 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1285 done = 1;
1286
1287 /* not free, spin waiting */
1288 } else {
1289 debug(4, "busy flag %x\n", sc->amr_mailbox->mb_busy);
1290 /* this is somewhat ugly */
1291 DELAY(100);
1292 }
7f2216bc 1293 crit_exit();
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1294 }
1295
1296 /*
1297 * Now give the command to the controller
1298 */
1299 if (done) {
1300 if (sc->amr_submit_command(sc)) {
1301 /* the controller wasn't ready to take the command, forget that we tried to post it */
1302 sc->amr_mailbox->mb_busy = 0;
1303 return(EBUSY);
1304 }
1305 debug(3, "posted command");
1306 return(0);
1307 }
1308
1309 /*
1310 * The controller wouldn't take the command. Return the command as busy
1311 * so that it is retried later.
1312 */
1313 return(EBUSY);
1314}
1315
1316/********************************************************************************
1317 * Extract one or more completed commands from the controller (sc)
1318 *
1319 * Returns nonzero if any commands on the work queue were marked as completed.
1320 */
1321int
1322amr_done(struct amr_softc *sc)
1323{
1324 struct amr_command *ac;
1325 struct amr_mailbox mbox;
1326 int i, idx, result;
1327
1328 debug_called(3);
1329
1330 /* See if there's anything for us to do */
1331 result = 0;
1332
1333 /* loop collecting completed commands */
1334 for (;;) {
1335 /* poll for a completed command's identifier and status */
1336 if (sc->amr_get_work(sc, &mbox)) {
1337 result = 1;
1338
1339 /* iterate over completed commands in this result */
1340 for (i = 0; i < mbox.mb_nstatus; i++) {
1341 /* get pointer to busy command */
1342 idx = mbox.mb_completed[i] - 1;
1343 ac = sc->amr_busycmd[idx];
1344
1345 /* really a busy command? */
1346 if (ac != NULL) {
1347
1348 /* pull the command from the busy index */
1349 sc->amr_busycmd[idx] = NULL;
1350 sc->amr_busyslots--;
1351
1352 /* save status for later use */
1353 ac->ac_status = mbox.mb_status;
1354 amr_enqueue_completed(ac);
1355 debug(3, "completed command with status %x", mbox.mb_status);
1356 } else {
1357 device_printf(sc->amr_dev, "bad slot %d completed\n", idx);
1358 }
1359 }
1360 } else {
1361 break; /* no work */
1362 }
1363 }
1364
1365 /* if we've completed any commands, try posting some more */
1366 if (result)
1367 amr_startio(sc);
1368
1369 /* handle completion and timeouts */
42cdd4ab 1370#if defined(__FreeBSD__) && __FreeBSD_version >= 500005
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1371 if (sc->amr_state & AMR_STATE_INTEN)
1372 taskqueue_enqueue(taskqueue_swi, &sc->amr_task_complete);
1373 else
1374#endif
1375 amr_complete(sc, 0);
1376
1377 return(result);
1378}
1379
1380/********************************************************************************
1381 * Do completion processing on done commands on (sc)
1382 */
1383static void
1384amr_complete(void *context, int pending)
1385{
1386 struct amr_softc *sc = (struct amr_softc *)context;
1387 struct amr_command *ac;
1388
1389 debug_called(3);
1390
1391 /* pull completed commands off the queue */
1392 for (;;) {
1393 ac = amr_dequeue_completed(sc);
1394 if (ac == NULL)
1395 break;
1396
1397 /* unmap the command's data buffer */
1398 amr_unmapcmd(ac);
1399
1400 /* unbusy the command */
1401 ac->ac_flags &= ~AMR_CMD_BUSY;
1402
1403 /*
1404 * Is there a completion handler?
1405 */
1406 if (ac->ac_complete != NULL) {
1407 ac->ac_complete(ac);
1408
1409 /*
1410 * Is someone sleeping on this one?
1411 */
1412 } else if (ac->ac_flags & AMR_CMD_SLEEP) {
1413 wakeup(ac);
1414 }
1415
1416 if(!sc->amr_busyslots) {
1417 wakeup(sc);
1418 }
1419 }
1420}
1421
1422/********************************************************************************
1423 ********************************************************************************
1424 Command Buffer Management
1425 ********************************************************************************
1426 ********************************************************************************/
1427
1428/********************************************************************************
1429 * Get a new command buffer.
1430 *
1431 * This may return NULL in low-memory cases.
1432 *
1433 * If possible, we recycle a command buffer that's been used before.
1434 */
1435struct amr_command *
1436amr_alloccmd(struct amr_softc *sc)
1437{
1438 struct amr_command *ac;
1439
1440 debug_called(3);
1441
1442 ac = amr_dequeue_free(sc);
1443 if (ac == NULL) {
1444 amr_alloccmd_cluster(sc);
1445 ac = amr_dequeue_free(sc);
1446 }
1447 if (ac == NULL)
1448 return(NULL);
1449
1450 /* clear out significant fields */
1451 ac->ac_slot = 0;
1452 ac->ac_status = 0;
1453 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox));
1454 ac->ac_flags = 0;
1455 ac->ac_bio = NULL;
1456 ac->ac_data = NULL;
1457 ac->ac_ccb_data = NULL;
1458 ac->ac_complete = NULL;
1459 return(ac);
1460}
1461
1462/********************************************************************************
1463 * Release a command buffer for recycling.
1464 */
1465void
1466amr_releasecmd(struct amr_command *ac)
1467{
1468 debug_called(3);
1469
1470 amr_enqueue_free(ac);
1471}
1472
1473/********************************************************************************
1474 * Allocate a new command cluster and initialise it.
1475 */
1476static void
1477amr_alloccmd_cluster(struct amr_softc *sc)
1478{
1479 struct amr_command_cluster *acc;
1480 struct amr_command *ac;
7f2216bc 1481 int i;
984263bc 1482
efda3bd0 1483 acc = kmalloc(AMR_CMD_CLUSTERSIZE, M_DEVBUF, M_INTWAIT);
7f2216bc 1484 crit_enter();
076ae0ab 1485 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link);
7f2216bc 1486 crit_exit();
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1487 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
1488 ac = &acc->acc_command[i];
1489 bzero(ac, sizeof(*ac));
1490 ac->ac_sc = sc;
1491 if (!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap) &&
1492 !bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_ccb_dmamap))
1493 amr_releasecmd(ac);
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1494 }
1495}
1496
1497/********************************************************************************
1498 * Free a command cluster
1499 */
1500static void
1501amr_freecmd_cluster(struct amr_command_cluster *acc)
1502{
1503 struct amr_softc *sc = acc->acc_command[0].ac_sc;
1504 int i;
1505
1506 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++)
1507 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap);
efda3bd0 1508 kfree(acc, M_DEVBUF);
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1509}
1510
1511/********************************************************************************
1512 ********************************************************************************
1513 Interface-specific Shims
1514 ********************************************************************************
1515 ********************************************************************************/
1516
1517/********************************************************************************
1518 * Tell the controller that the mailbox contains a valid command
1519 */
1520static int
1521amr_quartz_submit_command(struct amr_softc *sc)
1522{
1523 debug_called(3);
1524
1525 if (AMR_QGET_IDB(sc) & AMR_QIDB_SUBMIT)
1526 return(EBUSY);
1527 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1528 return(0);
1529}
1530
1531static int
1532amr_std_submit_command(struct amr_softc *sc)
1533{
1534 debug_called(3);
1535
1536 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG)
1537 return(EBUSY);
1538 AMR_SPOST_COMMAND(sc);
1539 return(0);
1540}
1541
1542/********************************************************************************
1543 * Claim any work that the controller has completed; acknowledge completion,
1544 * save details of the completion in (mbsave)
1545 */
1546static int
1547amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1548{
7f2216bc 1549 int worked;
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1550 u_int32_t outd;
1551
1552 debug_called(3);
1553
1554 worked = 0;
7f2216bc 1555 crit_enter();
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1556
1557 /* work waiting for us? */
1558 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) {
1559
1560 /* save mailbox, which contains a list of completed commands */
1561 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1562
1563 /* acknowledge interrupt */
1564 AMR_QPUT_ODB(sc, AMR_QODB_READY);
1565
1566 /* acknowledge that we have the commands */
1567 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1568
1569#ifndef AMR_QUARTZ_GOFASTER
1570 /*
1571 * This waits for the controller to notice that we've taken the
1572 * command from it. It's very inefficient, and we shouldn't do it,
1573 * but if we remove this code, we stop completing commands under
1574 * load.
1575 *
1576 * Peter J says we shouldn't do this. The documentation says we
1577 * should. Who is right?
1578 */
1579 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
1580 ; /* XXX aiee! what if it dies? */
1581#endif
1582
1583 worked = 1; /* got some work */
1584 }
1585
7f2216bc 1586 crit_exit();
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1587 return(worked);
1588}
1589
1590static int
1591amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1592{
7f2216bc 1593 int worked;
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MD
1594 u_int8_t istat;
1595
1596 debug_called(3);
1597
1598 worked = 0;
7f2216bc 1599 crit_enter();
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MD
1600
1601 /* check for valid interrupt status */
1602 istat = AMR_SGET_ISTAT(sc);
1603 if ((istat & AMR_SINTR_VALID) != 0) {
1604 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */
1605
1606 /* save mailbox, which contains a list of completed commands */
1607 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1608
1609 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */
1610 worked = 1;
1611 }
1612
7f2216bc 1613 crit_exit();
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1614 return(worked);
1615}
1616
1617/********************************************************************************
1618 * Notify the controller of the mailbox location.
1619 */
1620static void
1621amr_std_attach_mailbox(struct amr_softc *sc)
1622{
1623
1624 /* program the mailbox physical address */
1625 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff);
1626 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff);
1627 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff);
1628 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff);
1629 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR);
1630
1631 /* clear any outstanding interrupt and enable interrupts proper */
1632 AMR_SACK_INTERRUPT(sc);
1633 AMR_SENABLE_INTR(sc);
1634}
1635
1636#ifdef AMR_BOARD_INIT
1637/********************************************************************************
1638 * Initialise the controller
1639 */
1640static int
1641amr_quartz_init(struct amr_softc *sc)
1642{
1643 int status, ostatus;
1644
1645 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc));
1646
1647 AMR_QRESET(sc);
1648
1649 ostatus = 0xff;
1650 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) {
1651 if (status != ostatus) {
1652 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status));
1653 ostatus = status;
1654 }
1655 switch (status) {
1656 case AMR_QINIT_NOMEM:
1657 return(ENOMEM);
1658
1659 case AMR_QINIT_SCAN:
1660 /* XXX we could print channel/target here */
1661 break;
1662 }
1663 }
1664 return(0);
1665}
1666
1667static int
1668amr_std_init(struct amr_softc *sc)
1669{
1670 int status, ostatus;
1671
1672 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc));
1673
1674 AMR_SRESET(sc);
1675
1676 ostatus = 0xff;
1677 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) {
1678 if (status != ostatus) {
1679 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status));
1680 ostatus = status;
1681 }
1682 switch (status) {
1683 case AMR_SINIT_NOMEM:
1684 return(ENOMEM);
1685
1686 case AMR_SINIT_INPROG:
1687 /* XXX we could print channel/target here? */
1688 break;
1689 }
1690 }
1691 return(0);
1692}
1693#endif
1694
1695/********************************************************************************
1696 ********************************************************************************
1697 Debugging
1698 ********************************************************************************
1699 ********************************************************************************/
1700
1701/********************************************************************************
1702 * Identify the controller and print some information about it.
1703 */
1704static void
1705amr_describe_controller(struct amr_softc *sc)
1706{
1707 struct amr_prodinfo *ap;
1708 struct amr_enquiry *ae;
1709 char *prod;
1710
1711 /*
1712 * Try to get 40LD product info, which tells us what the card is labelled as.
1713 */
1714 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) != NULL) {
1715 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n",
1716 ap->ap_product, ap->ap_firmware, ap->ap_bios,
1717 ap->ap_memsize);
1718
efda3bd0 1719 kfree(ap, M_DEVBUF);
984263bc
MD
1720 return;
1721 }
1722
1723 /*
1724 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table.
1725 */
1726 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) != NULL) {
1727 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature);
1728
1729 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) != NULL) {
1730
1731 /*
1732 * Try to work it out based on the PCI signatures.
1733 */
1734 switch (pci_get_device(sc->amr_dev)) {
1735 case 0x9010:
1736 prod = "Series 428";
1737 break;
1738 case 0x9060:
1739 prod = "Series 434";
1740 break;
1741 default:
1742 prod = "unknown controller";
1743 break;
1744 }
1745 } else {
1746 prod = "unsupported controller";
1747 }
1748
1749 /*
1750 * HP NetRaid controllers have a special encoding of the firmware and
1751 * BIOS versions. The AMI version seems to have it as strings whereas
1752 * the HP version does it with a leading uppercase character and two
1753 * binary numbers.
1754 */
1755
1756 if(ae->ae_adapter.aa_firmware[2] >= 'A' &&
1757 ae->ae_adapter.aa_firmware[2] <= 'Z' &&
1758 ae->ae_adapter.aa_firmware[1] < ' ' &&
1759 ae->ae_adapter.aa_firmware[0] < ' ' &&
1760 ae->ae_adapter.aa_bios[2] >= 'A' &&
1761 ae->ae_adapter.aa_bios[2] <= 'Z' &&
1762 ae->ae_adapter.aa_bios[1] < ' ' &&
1763 ae->ae_adapter.aa_bios[0] < ' ') {
1764
1765 /* this looks like we have an HP NetRaid version of the MegaRaid */
1766
1767 if(ae->ae_signature == AMR_SIG_438) {
1768 /* the AMI 438 is a NetRaid 3si in HP-land */
1769 prod = "HP NetRaid 3si";
1770 }
1771
1772 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n",
1773 prod, ae->ae_adapter.aa_firmware[2],
1774 ae->ae_adapter.aa_firmware[1],
1775 ae->ae_adapter.aa_firmware[0],
1776 ae->ae_adapter.aa_bios[2],
1777 ae->ae_adapter.aa_bios[1],
1778 ae->ae_adapter.aa_bios[0],
1779 ae->ae_adapter.aa_memorysize);
1780 } else {
1781 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n",
1782 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios,
1783 ae->ae_adapter.aa_memorysize);
1784 }
efda3bd0 1785 kfree(ae, M_DEVBUF);
984263bc
MD
1786}
1787
510931cd
HP
1788int
1789amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks)
1790{
1791
1792 struct amr_command *ac;
1793 int error = 1;
1794
1795 debug_called(1);
1796
1797 sc->amr_state &= ~AMR_STATE_INTEN;
1798
1799 /* get ourselves a command buffer */
1800 if ((ac = amr_alloccmd(sc)) == NULL)
1801 goto out;
1802 /* set command flags */
1803 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
1804
1805 /* point the command at our data */
1806 ac->ac_data = data;
1807 ac->ac_length = blks * AMR_BLKSIZE;
1808
1809 /* build the command proper */
1810 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE;
1811 ac->ac_mailbox.mb_blkcount = blks;
1812 ac->ac_mailbox.mb_lba = lba;
1813 ac->ac_mailbox.mb_drive = unit;
1814
1815 /* can't assume that interrupts are going to work here, so play it safe */
1816 if (sc->amr_poll_command(ac))
1817 goto out;
1818 error = ac->ac_status;
1819
1820 out:
1821 if (ac != NULL)
1822 amr_releasecmd(ac);
1823
1824 sc->amr_state |= AMR_STATE_INTEN;
1825
1826 return (error);
1827}
1828
1829
984263bc
MD
1830#ifdef AMR_DEBUG
1831/********************************************************************************
1832 * Print the command (ac) in human-readable format
1833 */
1834#if 0
1835static void
1836amr_printcommand(struct amr_command *ac)
1837{
1838 struct amr_softc *sc = ac->ac_sc;
1839 struct amr_sgentry *sg;
1840 int i;
1841
1842 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n",
1843 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive);
1844 device_printf(sc->amr_dev, "blkcount %d lba %d\n",
1845 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba);
1846 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length);
1847 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n",
1848 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem);
1849 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio);
1850
1851 /* get base address of s/g table */
1852 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1853 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++)
1854 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count);
1855}
1856#endif
1857#endif