Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / dev / raid / ida / ida.c
CommitLineData
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1/*-
2 * Copyright (c) 1999,2000 Jonathan Lemon
3 * All rights reserved.
4 *
5 # Derived from the original IDA Compaq RAID driver, which is
6 * Copyright (c) 1996, 1997, 1998, 1999
7 * Mark Dawson and David James. All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: src/sys/dev/ida/ida.c,v 1.7.2.3 2001/03/01 01:57:32 ps Exp $
1f7ab7c9 31 * $DragonFly: src/sys/dev/raid/ida/ida.c,v 1.14 2006/10/25 20:56:01 dillon Exp $
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32 */
33
34/*
35 * Generic driver for Compaq SMART RAID adapters.
36 *
37 * Specific probe routines are in:
38 * pci/ida_pci.c
39 * i386/eisa/ida_eisa.c
40 */
41
1f2de5d4 42#include <use_pci.h>
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43
44#include <sys/param.h>
45#include <sys/kernel.h>
46#include <sys/systm.h>
47#include <sys/malloc.h>
48#include <sys/kernel.h>
41c20dac 49#include <sys/proc.h>
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50#include <sys/buf.h>
51#include <sys/bus.h>
52#include <sys/devicestat.h>
53#include <sys/disk.h>
984263bc 54#include <sys/rman.h>
41c20dac 55#include <sys/buf2.h>
73c4645c 56#include <sys/thread2.h>
984263bc 57
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58#include <machine/clock.h>
59
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60#include "idareg.h"
61#include "idavar.h"
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62
63/* prototypes */
64static void ida_alloc_qcb(struct ida_softc *ida);
65static void ida_construct_qcb(struct ida_softc *ida);
66static void ida_start(struct ida_softc *ida);
67static void ida_done(struct ida_softc *ida, struct ida_qcb *qcb);
68static int ida_wait(struct ida_softc *ida, struct ida_qcb *qcb);
69
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70DECLARE_DUMMY_MODULE(ida);
71
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72void
73ida_free(struct ida_softc *ida)
74{
75 int i;
76
77 for (i = 0; i < ida->num_qcbs; i++)
78 bus_dmamap_destroy(ida->buffer_dmat, ida->qcbs[i].dmamap);
79
80 if (ida->hwqcb_busaddr)
81 bus_dmamap_unload(ida->hwqcb_dmat, ida->hwqcb_dmamap);
82
83 if (ida->hwqcbs)
84 bus_dmamem_free(ida->hwqcb_dmat, ida->hwqcbs,
85 ida->hwqcb_dmamap);
86
87 if (ida->buffer_dmat)
88 bus_dma_tag_destroy(ida->buffer_dmat);
89
90 if (ida->hwqcb_dmat)
91 bus_dma_tag_destroy(ida->hwqcb_dmat);
92
93 if (ida->qcbs != NULL)
efda3bd0 94 kfree(ida->qcbs, M_DEVBUF);
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95
96 if (ida->ih != NULL)
97 bus_teardown_intr(ida->dev, ida->irq, ida->ih);
98
99 if (ida->irq != NULL)
100 bus_release_resource(ida->dev, ida->irq_res_type,
101 0, ida->irq);
102
103 if (ida->parent_dmat != NULL)
104 bus_dma_tag_destroy(ida->parent_dmat);
105
106 if (ida->regs != NULL)
107 bus_release_resource(ida->dev, ida->regs_res_type,
108 ida->regs_res_id, ida->regs);
109}
110
111/*
112 * record bus address from bus_dmamap_load
113 */
114static void
115ida_dma_map_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
116{
117 bus_addr_t *baddr;
118
119 baddr = (bus_addr_t *)arg;
120 *baddr = segs->ds_addr;
121}
122
123static __inline struct ida_qcb *
124ida_get_qcb(struct ida_softc *ida)
125{
126 struct ida_qcb *qcb;
127
128 if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) {
129 SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
130 } else {
131 ida_alloc_qcb(ida);
132 if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL)
133 SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
134 }
135 return (qcb);
136}
137
138static __inline bus_addr_t
139idahwqcbvtop(struct ida_softc *ida, struct ida_hardware_qcb *hwqcb)
140{
141 return (ida->hwqcb_busaddr +
142 ((bus_addr_t)hwqcb - (bus_addr_t)ida->hwqcbs));
143}
144
145static __inline struct ida_qcb *
146idahwqcbptov(struct ida_softc *ida, bus_addr_t hwqcb_addr)
147{
148 struct ida_hardware_qcb *hwqcb;
149
150 hwqcb = (struct ida_hardware_qcb *)
151 ((bus_addr_t)ida->hwqcbs + (hwqcb_addr - ida->hwqcb_busaddr));
152 return (hwqcb->qcb);
153}
154
155/*
156 * XXX
157 * since we allocate all QCB space up front during initialization, then
158 * why bother with this routine?
159 */
160static void
161ida_alloc_qcb(struct ida_softc *ida)
162{
163 struct ida_qcb *qcb;
164 int error;
165
166 if (ida->num_qcbs >= IDA_QCB_MAX)
167 return;
168
169 qcb = &ida->qcbs[ida->num_qcbs];
170
171 error = bus_dmamap_create(ida->buffer_dmat, /*flags*/0, &qcb->dmamap);
172 if (error != 0)
173 return;
174
175 qcb->flags = QCB_FREE;
176 qcb->hwqcb = &ida->hwqcbs[ida->num_qcbs];
177 qcb->hwqcb->qcb = qcb;
178 qcb->hwqcb_busaddr = idahwqcbvtop(ida, qcb->hwqcb);
179 SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
180 ida->num_qcbs++;
181}
182
183int
184ida_init(struct ida_softc *ida)
185{
186 int error;
187
188 ida->unit = device_get_unit(ida->dev);
189 ida->tag = rman_get_bustag(ida->regs);
190 ida->bsh = rman_get_bushandle(ida->regs);
191
192 SLIST_INIT(&ida->free_qcbs);
193 STAILQ_INIT(&ida->qcb_queue);
81b5c339 194 bioq_init(&ida->bio_queue);
984263bc 195
77652cad 196 ida->qcbs = kmalloc(IDA_QCB_MAX * sizeof(struct ida_qcb),
076ae0ab 197 M_DEVBUF, M_INTWAIT|M_ZERO);
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198
199 /*
200 * Create our DMA tags
201 */
202
203 /* DMA tag for our hardware QCB structures */
204 error = bus_dma_tag_create(ida->parent_dmat,
205 /*alignment*/1, /*boundary*/0,
206 /*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
207 /*filter*/NULL, /*filterarg*/NULL,
208 IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
209 /*nsegments*/1, /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
210 /*flags*/0, &ida->hwqcb_dmat);
211 if (error)
212 return (ENOMEM);
213
214 /* DMA tag for mapping buffers into device space */
215 error = bus_dma_tag_create(ida->parent_dmat,
216 /*alignment*/1, /*boundary*/0,
217 /*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
218 /*filter*/NULL, /*filterarg*/NULL,
219 /*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG,
220 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, &ida->buffer_dmat);
221 if (error)
222 return (ENOMEM);
223
224 /* Allocation of hardware QCBs */
225 /* XXX allocation is rounded to hardware page size */
226 error = bus_dmamem_alloc(ida->hwqcb_dmat,
227 (void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
228 if (error)
229 return (ENOMEM);
230
231 /* And permanently map them in */
232 bus_dmamap_load(ida->hwqcb_dmat, ida->hwqcb_dmamap,
233 ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
234 ida_dma_map_cb, &ida->hwqcb_busaddr, /*flags*/0);
235
236 bzero(ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb));
237
238 ida_alloc_qcb(ida); /* allocate an initial qcb */
239
240 return (0);
241}
242
243void
244ida_attach(struct ida_softc *ida)
245{
246 struct ida_controller_info cinfo;
247 int error, i;
248
249 ida->cmd.int_enable(ida, 0);
250
251 error = ida_command(ida, CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo),
252 IDA_CONTROLLER, 0, DMA_DATA_IN);
253 if (error) {
254 device_printf(ida->dev, "CMD_GET_CTRL_INFO failed.\n");
255 return;
256 }
257
258 device_printf(ida->dev, "drives=%d firm_rev=%c%c%c%c\n",
259 cinfo.num_drvs, cinfo.firm_rev[0], cinfo.firm_rev[1],
260 cinfo.firm_rev[2], cinfo.firm_rev[3]);
261
262 if (ida->flags & IDA_FIRMWARE) {
263 int data;
264
265 error = ida_command(ida, CMD_START_FIRMWARE,
266 &data, sizeof(data), IDA_CONTROLLER, 0, DMA_DATA_IN);
267 if (error) {
268 device_printf(ida->dev, "CMD_START_FIRMWARE failed.\n");
269 return;
270 }
271 }
272
273 ida->num_drives = 0;
274 for (i = 0; i < cinfo.num_drvs; i++)
275 device_add_child(ida->dev, /*"idad"*/NULL, -1);
276
277 bus_generic_attach(ida->dev);
278
279 ida->cmd.int_enable(ida, 1);
280}
281
282int
283ida_detach(device_t dev)
284{
285 struct ida_softc *ida;
286 int error = 0;
287
288 ida = (struct ida_softc *)device_get_softc(dev);
289
290 /*
291 * XXX
292 * before detaching, we must make sure that the system is
293 * quiescent; nothing mounted, no pending activity.
294 */
295
296 /*
297 * XXX
298 * now, how are we supposed to maintain a list of our drives?
299 * iterate over our "child devices"?
300 */
301
302
303 ida_free(ida);
304 return (error);
305}
306
307static void
308ida_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
309{
310 struct ida_hardware_qcb *hwqcb = (struct ida_hardware_qcb *)arg;
311 int i;
312
313 hwqcb->hdr.size = (sizeof(struct ida_req) +
314 sizeof(struct ida_sgb) * IDA_NSEG) >> 2;
315
316 for (i = 0; i < nsegments; i++) {
317 hwqcb->seg[i].addr = segs[i].ds_addr;
318 hwqcb->seg[i].length = segs[i].ds_len;
319 }
320 hwqcb->req.sgcount = nsegments;
321}
322
323int
324ida_command(struct ida_softc *ida, int command, void *data, int datasize,
325 int drive, u_int32_t pblkno, int flags)
326{
327 struct ida_hardware_qcb *hwqcb;
328 struct ida_qcb *qcb;
329 bus_dmasync_op_t op;
73c4645c 330 int error;
984263bc 331
73c4645c 332 crit_enter();
984263bc 333 qcb = ida_get_qcb(ida);
73c4645c 334 crit_exit();
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335
336 if (qcb == NULL) {
337 printf("ida_command: out of QCBs");
338 return (EAGAIN);
339 }
340
341 hwqcb = qcb->hwqcb;
342 bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
343
344 bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
345 (void *)data, datasize, ida_setup_dmamap, hwqcb, 0);
346 op = qcb->flags & DMA_DATA_IN ?
347 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
348 bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
349
350 hwqcb->hdr.drive = drive;
351 hwqcb->req.blkno = pblkno;
352 hwqcb->req.bcount = howmany(datasize, DEV_BSIZE);
353 hwqcb->req.command = command;
354
355 qcb->flags = flags | IDA_COMMAND;
356
73c4645c 357 crit_enter();
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358 STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
359 ida_start(ida);
360 error = ida_wait(ida, qcb);
73c4645c 361 crit_exit();
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362
363 /* XXX should have status returned here? */
364 /* XXX have "status pointer" area in QCB? */
365
366 return (error);
367}
368
369void
81b5c339 370ida_submit_buf(struct ida_softc *ida, struct bio *bio)
984263bc 371{
81b5c339 372 bioq_insert_tail(&ida->bio_queue, bio);
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373 ida_construct_qcb(ida);
374 ida_start(ida);
375}
376
377static void
378ida_construct_qcb(struct ida_softc *ida)
379{
380 struct ida_hardware_qcb *hwqcb;
381 struct ida_qcb *qcb;
382 bus_dmasync_op_t op;
383 struct buf *bp;
81b5c339 384 struct bio *bio;
984263bc 385
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386 bio = bioq_first(&ida->bio_queue);
387 if (bio == NULL)
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388 return; /* no more buffers */
389
390 qcb = ida_get_qcb(ida);
391 if (qcb == NULL)
392 return; /* out of resources */
393
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394 bioq_remove(&ida->bio_queue, bio);
395 qcb->bio = bio;
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396 qcb->flags = 0;
397
398 hwqcb = qcb->hwqcb;
399 bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
400
81b5c339 401 bp = bio->bio_buf;
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402 bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
403 (void *)bp->b_data, bp->b_bcount, ida_setup_dmamap, hwqcb, 0);
404 op = qcb->flags & DMA_DATA_IN ?
405 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
406 bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
407
408 {
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409 struct idad_softc *drv;
410
411 drv = (struct idad_softc *)bio->bio_driver_info;
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412 hwqcb->hdr.drive = drv->drive;
413 }
414
54078292 415 hwqcb->req.blkno = bio->bio_offset >> DEV_BSHIFT;
984263bc 416 hwqcb->req.bcount = howmany(bp->b_bcount, DEV_BSIZE);
10f3fee5 417 hwqcb->req.command = (bp->b_cmd == BUF_CMD_READ) ? CMD_READ : CMD_WRITE;
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418
419 STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
420}
421
422/*
423 * This routine will be called from ida_intr in order to queue up more
424 * I/O, meaning that we may be in an interrupt context. Hence, we should
425 * not muck around with spl() in this routine.
426 */
427static void
428ida_start(struct ida_softc *ida)
429{
430 struct ida_qcb *qcb;
431
432 while ((qcb = STAILQ_FIRST(&ida->qcb_queue)) != NULL) {
433 if (ida->cmd.fifo_full(ida))
434 break;
435 STAILQ_REMOVE_HEAD(&ida->qcb_queue, link.stqe);
436 /*
437 * XXX
438 * place the qcb on an active list and set a timeout?
439 */
440 qcb->state = QCB_ACTIVE;
441 ida->cmd.submit(ida, qcb);
442 }
443}
444
445static int
446ida_wait(struct ida_softc *ida, struct ida_qcb *qcb)
447{
448 struct ida_qcb *qcb_done = NULL;
449 bus_addr_t completed;
450 int delay;
451
452 if (ida->flags & IDA_INTERRUPTS) {
377d4740 453 if (tsleep((caddr_t)qcb, 0, "idacmd", 5 * hz))
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454 return (ETIMEDOUT);
455 return (0);
456 }
457
458again:
459 delay = 5 * 1000 * 100; /* 5 sec delay */
460 while ((completed = ida->cmd.done(ida)) == 0) {
461 if (delay-- == 0)
462 return (ETIMEDOUT);
463 DELAY(10);
464 }
465
466 qcb_done = idahwqcbptov(ida, completed & ~3);
467 if (qcb_done != qcb)
468 goto again;
469 ida_done(ida, qcb);
470 return (0);
471}
472
473void
474ida_intr(void *data)
475{
476 struct ida_softc *ida;
477 struct ida_qcb *qcb;
478 bus_addr_t completed;
479
480 ida = (struct ida_softc *)data;
481
482 if (ida->cmd.int_pending(ida) == 0)
483 return; /* not our interrupt */
484
485 while ((completed = ida->cmd.done(ida)) != 0) {
486 qcb = idahwqcbptov(ida, completed & ~3);
487
488 if (qcb == NULL || qcb->state != QCB_ACTIVE) {
489 device_printf(ida->dev,
490 "ignoring completion %x\n", completed);
491 continue;
492 }
493 ida_done(ida, qcb);
494 }
495 ida_start(ida);
496}
497
498/*
499 * should switch out command type; may be status, not just I/O.
500 */
501static void
502ida_done(struct ida_softc *ida, struct ida_qcb *qcb)
503{
504 int error = 0;
505
506 /*
507 * finish up command
508 */
509 if (qcb->flags & DMA_DATA_TRANSFER) {
510 bus_dmasync_op_t op;
511
512 op = qcb->flags & DMA_DATA_IN ?
513 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE;
514 bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
515 bus_dmamap_unload(ida->buffer_dmat, qcb->dmamap);
516 }
517
518 if (qcb->hwqcb->req.error & SOFT_ERROR)
519 device_printf(ida->dev, "soft error\n");
520 if (qcb->hwqcb->req.error & HARD_ERROR) {
521 error = 1;
522 device_printf(ida->dev, "hard error\n");
523 }
524 if (qcb->hwqcb->req.error & CMD_REJECTED) {
525 error = 1;
526 device_printf(ida->dev, "invalid request\n");
527 }
528
529 if (qcb->flags & IDA_COMMAND) {
530 if (ida->flags & IDA_INTERRUPTS)
531 wakeup(qcb);
532 } else {
533 if (error)
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534 qcb->bio->bio_buf->b_flags |= B_ERROR;
535 idad_intr(qcb->bio);
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536 }
537
538 qcb->state = QCB_FREE;
539 SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
540 ida_construct_qcb(ida);
541}