SILI - Increase hard -> soft PM target delay to 5 seconds
[dragonfly.git] / sys / dev / disk / sili / sili_pm.c
CommitLineData
1ac8d5ba
MD
1/*
2 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#include "sili.h"
36
37static void sili_pm_dummy_done(struct ata_xfer *xa);
38static void sili_pm_empty_done(struct sili_ccb *ccb);
39
40/*
a35ddbb4
MD
41 * This is called for PM attachments and hot-plug insertion events, and
42 * typically not called again until after an unplug/replug sequence.
43 *
44 * We just fall through to the hard-reset code, we don't need to
45 * set up any initial conditions.
46 */
47int
48sili_pm_port_init(struct sili_port *ap, struct ata_port *at)
49{
50 at->at_probe = ATA_PROBE_NEED_HARD_RESET;
51 return (0);
52}
53
54/*
55 * This is called from the port hardreset code.
56 */
57int
58sili_pm_port_probe(struct sili_port *ap, int orig_error)
59{
60 struct ata_port *at;
61 int error;
62 int i;
63
64 /*
65 * Clean up the port state machine
66 */
67 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_PMA);
68 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_INIT);
69 if (sili_pwait_clr_to(ap, 5000, SILI_PREG_STATUS, SILI_PREG_CTL_INIT)) {
70 kprintf("%s: PM probe: unable to init port\n",
71 PORTNAME(ap));
72 return (EBUSY);
73 }
74 if (sili_pwait_set(ap, SILI_PREG_STATUS, SILI_PREG_STATUS_READY)) {
75 kprintf("%s: PM probe: port will not come ready\n",
76 PORTNAME(ap));
77 return (EBUSY);
78 }
79
80 /*
81 * Issue a soft-reset of target 15
82 */
83 ap->ap_state = AP_S_NORMAL;
84 sili_pwrite(ap, SILI_PREG_SERR, -1);
85 error = sili_pm_softreset(ap, 15);
86
87 if (error == 0)
88 error = sili_pm_identify(ap);
89
90 /*
91 * Finalize. If the softreset failed. Re-init the port
92 * state machine again so the normal non-PM softreset does
93 * not bog down.
94 */
95 if (error == 0) {
96 for (i = 0; i < SILI_MAX_PMPORTS; ++i) {
97 at = &ap->ap_ata[i];
98 at->at_probe = ATA_PROBE_NEED_INIT;
99 at->at_features |= ATA_PORT_F_RESCAN;
100 at->at_features &= ~ATA_PORT_F_READLOG;
101 }
102 ap->ap_type = ATA_PORT_T_PM;
103 return (0);
104 }
105
106 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA);
107 sili_port_init(ap);
108 if (orig_error == 0) {
109 if (sili_pwait_set_to(ap, 5000, SILI_PREG_STATUS,
110 SILI_PREG_STATUS_READY)) {
111 kprintf("%s: PM probe: port will not come ready\n",
112 PORTNAME(ap));
113 orig_error = EBUSY;
114 }
115 }
116 return (orig_error);
117
118#if 0
119 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME);
120 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA);
121 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_INIT);
122 if (sili_pwait_clr_to(ap, 5000, SILI_PREG_STATUS, SILI_PREG_CTL_INIT)) {
123 kprintf("%s: PM probe: unable to init port\n",
124 PORTNAME(ap));
125 orig_error = EBUSY;
126 }
127 if (sili_pwait_set(ap, SILI_PREG_STATUS, SILI_PREG_STATUS_READY)) {
128 kprintf("%s: PM probe: port will not come ready\n",
129 PORTNAME(ap));
130 orig_error = EBUSY;
131 }
132 kprintf("ORIG ERROR %d\n", orig_error);
133 if (orig_error)
134 return (orig_error);
135
136 /*
137 * If we originally detected a device redo the device reset to
138 * try to clear the mess.
139 */
140 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_DEVRESET);
141 if (sili_pwait_clr(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_DEVRESET)) {
142 kprintf("%s: PM probe: unable to reset\n", PORTNAME(ap));
143 orig_error = EBUSY;
144 }
145 if (sili_pwait_set(ap, SILI_PREG_STATUS, SILI_PREG_STATUS_READY)) {
146 kprintf("%s: PM probe: port will not come ready\n",
147 PORTNAME(ap));
148 orig_error = EBUSY;
149 }
150 return (orig_error);
151#endif
152}
153
154/*
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155 * Identify the port multiplier
156 */
157int
158sili_pm_identify(struct sili_port *ap)
159{
160 u_int32_t chipid;
161 u_int32_t rev;
162 u_int32_t nports;
163 u_int32_t data1;
164 u_int32_t data2;
165
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166 ap->ap_probe = ATA_PROBE_FAILED;
167 if (sili_pm_read(ap, 15, 0, &chipid))
168 goto err;
169 if (sili_pm_read(ap, 15, 1, &rev))
170 goto err;
171 if (sili_pm_read(ap, 15, 2, &nports))
172 goto err;
173 nports &= 0x0000000F; /* only the low 4 bits */
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MD
174 ap->ap_probe = ATA_PROBE_GOOD;
175 kprintf("%s: Port multiplier: chip=%08x rev=0x%b nports=%d\n",
176 PORTNAME(ap),
177 chipid,
178 rev, SATA_PFMT_PM_REV,
179 nports);
180 ap->ap_pmcount = nports;
181
182 if (sili_pm_read(ap, 15, SATA_PMREG_FEA, &data1)) {
183 kprintf("%s: Port multiplier: Warning, "
184 "cannot read feature register\n", PORTNAME(ap));
185 } else {
186 kprintf("%s: Port multiplier features: 0x%b\n",
187 PORTNAME(ap),
188 data1,
189 SATA_PFMT_PM_FEA);
190 }
191 if (sili_pm_read(ap, 15, SATA_PMREG_FEAEN, &data2) == 0) {
192 kprintf("%s: Port multiplier defaults: 0x%b\n",
193 PORTNAME(ap),
194 data2,
195 SATA_PFMT_PM_FEA);
196 }
197
198 /*
199 * Turn on async notification if we support and the PM supports it.
200 * This allows the PM to forward async notification events to us and
201 * it will also generate an event for target 15 for hot-plug events
202 * (or is supposed to anyway).
203 */
204 if ((ap->ap_sc->sc_flags & SILI_F_SSNTF) &&
205 (data1 & SATA_PMFEA_ASYNCNOTIFY)) {
206 u_int32_t serr_bits = SATA_PM_SERR_DIAG_N |
207 SATA_PM_SERR_DIAG_X;
208 data2 |= SATA_PMFEA_ASYNCNOTIFY;
209 if (sili_pm_write(ap, 15, SATA_PMREG_FEAEN, data2)) {
210 kprintf("%s: Port multiplier: AsyncNotify cannot be "
211 "enabled\n", PORTNAME(ap));
212 } else if (sili_pm_write(ap, 15, SATA_PMREG_EEENA, serr_bits)) {
213 kprintf("%s: Port mulltiplier: AsyncNotify unable "
214 "to enable error info bits\n", PORTNAME(ap));
215 } else {
216 kprintf("%s: Port multiplier: AsyncNotify enabled\n",
217 PORTNAME(ap));
218 }
219 }
220
221 return (0);
222err:
223 kprintf("%s: Port multiplier cannot be identified\n", PORTNAME(ap));
224 return (EIO);
225}
226
227/*
228 * Do a COMRESET sequence on the target behind a port multiplier.
229 *
230 * If hard is 2 we also cycle the phy on the target.
231 *
232 * This must be done prior to any softreset or probe attempts on
233 * targets behind the port multiplier.
234 *
235 * Returns 0 on success or an error.
236 */
237int
238sili_pm_hardreset(struct sili_port *ap, int target, int hard)
239{
240 struct ata_port *at;
241 u_int32_t data;
242 int loop;
243 int error = EIO;
244
245 at = &ap->ap_ata[target];
246
247 /*
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MD
248 * Ensure that no other commands are pending. Our HW reset of
249 * the PM target can skewer the port overall!
250 */
251 sili_exclusive_access(ap);
252
253 /*
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MD
254 * Turn off power management and kill the phy on the target
255 * if requested. Hold state for 10ms.
256 */
257 data = SATA_PM_SCTL_IPM_DISABLED;
187cac04 258#if 0
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259 if (hard == 2)
260 data |= SATA_PM_SCTL_DET_DISABLE;
187cac04 261#endif
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262 if (sili_pm_write(ap, target, SATA_PMREG_SERR, -1))
263 goto err;
264 if (sili_pm_write(ap, target, SATA_PMREG_SCTL, data))
265 goto err;
266 sili_os_sleep(10);
267
268 /*
269 * Start transmitting COMRESET. COMRESET must be sent for at
270 * least 1ms.
187cac04
MD
271 *
272 * It takes about 100ms for the DET logic to settle down,
273 * from trial and error testing. If this is too short
274 * the softreset code will fail.
275 *
276 * It is very important to allow the logic to settle before
277 * we issue any additional commands or the target will interfere
278 * with our PM commands.
1ac8d5ba
MD
279 */
280 at->at_probe = ATA_PROBE_FAILED;
281 at->at_type = ATA_PORT_T_NONE;
282 data = SATA_PM_SCTL_IPM_DISABLED | SATA_PM_SCTL_DET_INIT;
283 if (SiliForceGen1 & (1 << ap->ap_num)) {
284 kprintf("%s.%d: Force 1.5GBits\n", PORTNAME(ap), target);
285 data |= SATA_PM_SCTL_SPD_GEN1;
286 } else {
287 data |= SATA_PM_SCTL_SPD_ANY;
288 }
289 if (sili_pm_write(ap, target, SATA_PMREG_SCTL, data))
290 goto err;
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MD
291 sili_os_sleep(100);
292
293 if (sili_pm_phy_status(ap, target, &data)) {
294 kprintf("%s: (A)Cannot clear phy status\n",
295 ATANAME(ap ,at));
296 }
297
298 /*
299 * Flush any status, then clear DET to initiate negotiation.
3c6bae9d 300 *
187cac04
MD
301 * It is very important to allow the negotiation to settle before
302 * we issue any additional commands or the target will interfere
303 * with our PM commands.
1ac8d5ba
MD
304 */
305 sili_pm_write(ap, target, SATA_PMREG_SERR, -1);
306 data = SATA_PM_SCTL_IPM_DISABLED | SATA_PM_SCTL_DET_NONE;
307 if (sili_pm_write(ap, target, SATA_PMREG_SCTL, data))
308 goto err;
187cac04 309 sili_os_sleep(100);
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MD
310
311 /*
312 * Try to determine if there is a device on the port.
313 *
314 * Give the device 3/10 second to at least be detected.
315 * If we fail clear any pending status since we may have
316 * cycled the phy and probably caused another PRCS interrupt.
317 */
318 for (loop = 3; loop; --loop) {
319 if (sili_pm_read(ap, target, SATA_PMREG_SSTS, &data))
320 goto err;
321 if (data & SATA_PM_SSTS_DET)
322 break;
323 sili_os_sleep(100);
324 }
325 if (loop == 0) {
326 kprintf("%s.%d: Port appears to be unplugged\n",
327 PORTNAME(ap), target);
328 error = ENODEV;
329 goto err;
330 }
331
332 /*
333 * There is something on the port. Give the device 3 seconds
334 * to fully negotiate.
335 */
336 for (loop = 30; loop; --loop) {
337 if (sili_pm_read(ap, target, SATA_PMREG_SSTS, &data))
338 goto err;
339 if ((data & SATA_PM_SSTS_DET) == SATA_PM_SSTS_DET_DEV)
340 break;
341 sili_os_sleep(100);
342 }
343
344 /*
345 * Device not detected
346 */
347 if (loop == 0) {
348 kprintf("%s: Device may be powered down\n",
349 PORTNAME(ap));
350 error = ENODEV;
351 goto err;
352 }
353
354 /*
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MD
355 * Device detected.
356 *
357 * Wait 200ms to give the device time to send its first D2H FIS.
358 * If we do not wait long enough our softreset sequence can collide
187cac04
MD
359 * with the end of the device's reset sequence and brick the port.
360 * Some devices may need longer and we handle those cases in the
361 * pm softreset code.
3c6bae9d 362 *
203d6575
MD
363 * XXX Looks like we have to wait a lot longer. If the Sili chip's
364 * softreset fails due to a collision with the D2H FIS or the
365 * unbusying it bricks the port.
366 *
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MD
367 * XXX how do we poll that particular target's BSY status via the
368 * PM?
1ac8d5ba 369 */
187cac04 370 kprintf("%s.%d: PM Device detected ssts=%08x\n",
1ac8d5ba 371 PORTNAME(ap), target, data);
203d6575 372 sili_os_sleep(5000);
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MD
373
374 error = 0;
375err:
376 at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_SOFT_RESET;
377 return (error);
378}
379
380/*
381 * SILI soft reset through port multiplier.
382 *
187cac04
MD
383 * This function generates a soft reset through the port multiplier,
384 * keeping port communications intact.
1ac8d5ba 385 *
187cac04
MD
386 * The SII chip will do the whole mess for us. However, the command
387 * can brick the port if the target is still busy from the previous
388 * COMRESET.
1ac8d5ba
MD
389 */
390int
391sili_pm_softreset(struct sili_port *ap, int target)
392{
393 struct ata_port *at;
394 struct sili_ccb *ccb;
395 struct sili_prb *prb;
396 int error;
397 u_int32_t data;
398 u_int32_t sig;
a35ddbb4 399 int timeout;
1ac8d5ba
MD
400
401 error = EIO;
402 at = &ap->ap_ata[target];
403
187cac04 404 kprintf("%s: PM softreset\n", ATANAME(ap, at));
1ac8d5ba
MD
405
406 /*
407 * Prep the special soft-reset SII command.
408 */
409 ccb = sili_get_err_ccb(ap);
410 ccb->ccb_done = sili_pm_empty_done;
4383d440 411 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE;
1ac8d5ba
MD
412 ccb->ccb_xa.complete = sili_pm_dummy_done;
413 ccb->ccb_xa.at = at;
414
415 prb = ccb->ccb_prb;
416 bzero(&prb->prb_h2d, sizeof(prb->prb_h2d));
417 prb->prb_h2d.flags = at->at_target;
418 prb->prb_control = SILI_PRB_CTRL_SOFTRESET;
419 prb->prb_override = 0;
420 prb->prb_xfer_count = 0;
421
422 ccb->ccb_xa.state = ATA_S_PENDING;
1ac8d5ba 423
a35ddbb4
MD
424 timeout = (target == 15) ? 1000 : 8000;
425
426 /*
427 * NOTE: Must use sili_quick_timeout() because we hold the err_ccb
428 */
429 if (sili_poll(ccb, timeout, sili_quick_timeout) != ATA_S_COMPLETE) {
430 if (target != 15) {
431 kprintf("%s: (PM) Softreset FIS failed\n",
432 ATANAME(ap, at));
433 }
1ac8d5ba
MD
434 sili_put_err_ccb(ccb);
435 goto err;
436 }
437
438 sig = (prb->prb_d2h.lba_high << 24) |
439 (prb->prb_d2h.lba_mid << 16) |
440 (prb->prb_d2h.lba_low << 8) |
441 (prb->prb_d2h.sector_count);
442 kprintf("%s: PM SOFTRESET SIGNATURE %08x\n", ATANAME(ap, at), sig);
443
444 sili_put_err_ccb(ccb);
445
446 /*
447 * Clear the phy status of the target so we can get a new event.
448 *
449 * Target 15 is the PM itself and these registers have
450 * different meanings.
451 */
452 if (target != 15) {
453 if (sili_pm_phy_status(ap, target, &data)) {
454 kprintf("%s: (C)Cannot clear phy status\n",
455 ATANAME(ap ,at));
456 }
457 sili_pm_write(ap, target, SATA_PMREG_SERR, -1);
458 }
459
460 /*
461 * If the softreset is trying to clear a BSY condition after a
462 * normal portreset we assign the port type.
463 *
464 * If the softreset is being run first as part of the ccb error
465 * processing code then report if the device signature changed
466 * unexpectedly.
467 */
468 if (at->at_type == ATA_PORT_T_NONE) {
469 at->at_type = sili_port_signature(ap, at, sig);
470 } else {
471 if (sili_port_signature(ap, at, sig) != at->at_type) {
472 kprintf("%s: device signature unexpectedly "
473 "changed\n", ATANAME(ap, at));
474 error = EBUSY; /* XXX */
475 }
476 }
477 error = 0;
478err:
479 /*
480 * Clear error status so we can detect removal.
481 *
482 * Target 15 is the PM itself and these registers have
483 * different meanings.
484 */
187cac04 485 kprintf("%s: PM softreset done error %d\n", ATANAME(ap, at), error);
1ac8d5ba
MD
486 if (error == 0 && target != 15) {
487 if (sili_pm_write(ap, target, SATA_PMREG_SERR, -1)) {
488 kprintf("%s: sili_pm_softreset unable to clear SERR\n",
489 ATANAME(ap, at));
490 ap->ap_flags &= ~AP_F_IGNORE_IFS;
491 }
492 }
493
494 at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_IDENT;
495 return (error);
496}
497
498
499/*
500 * Return the phy status for a target behind a port multiplier and
501 * reset SATA_PMREG_SERR.
502 *
503 * Returned bits follow SILI_PREG_SSTS bits. The SILI_PREG_SSTS_SPD
504 * bits can be used to determine the link speed and will be 0 if there
505 * is no link.
506 *
507 * 0 is returned if any communications error occurs.
508 */
509int
510sili_pm_phy_status(struct sili_port *ap, int target, u_int32_t *datap)
511{
512 int error;
513
514 error = sili_pm_read(ap, target, SATA_PMREG_SSTS, datap);
515 if (error == 0)
516 error = sili_pm_write(ap, target, SATA_PMREG_SERR, -1);
517 if (error)
518 *datap = 0;
519 return(error);
520}
521
522int
523sili_pm_set_feature(struct sili_port *ap, int feature, int enable)
524{
525 struct ata_xfer *xa;
526 int error;
527
528 xa = sili_ata_get_xfer(ap, &ap->ap_ata[15]);
529
530 xa->fis->type = ATA_FIS_TYPE_H2D;
531 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15;
532 xa->fis->command = enable ? ATA_C_SATA_FEATURE_ENA :
533 ATA_C_SATA_FEATURE_DIS;
534 xa->fis->sector_count = feature;
535 xa->fis->control = ATA_FIS_CONTROL_4BIT;
536
537 xa->complete = sili_pm_dummy_done;
538 xa->datalen = 0;
4383d440 539 xa->flags = ATA_F_POLL | ATA_F_EXCLUSIVE;
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MD
540 xa->timeout = 1000;
541
542 if (sili_ata_cmd(xa) == ATA_S_COMPLETE)
543 error = 0;
544 else
545 error = EIO;
546 sili_ata_put_xfer(xa);
547 return(error);
548}
549
550/*
551 * Check that a target is still good.
552 */
553void
554sili_pm_check_good(struct sili_port *ap, int target)
555{
556 struct ata_port *at;
557 u_int32_t data;
558
559 /*
560 * It looks like we might have to read the EINFO register
561 * to allow the PM to generate a new event.
562 */
563 if (sili_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) {
564 kprintf("%s: Port multiplier EINFO could not be read\n",
565 PORTNAME(ap));
566 }
567
568 if (sili_pm_write(ap, target, SATA_PMREG_SERR, -1)) {
569 kprintf("%s: Port multiplier: SERR could not be cleared\n",
570 PORTNAME(ap));
571 }
572
573 if (target == CAM_TARGET_WILDCARD || target >= ap->ap_pmcount)
574 return;
575 at = &ap->ap_ata[target];
576
577 /*
578 * If the device needs an init or hard reset also make sure the
579 * PHY is turned on.
580 */
581 if (at->at_probe <= ATA_PROBE_NEED_HARD_RESET) {
582 /*kprintf("%s DOHARD\n", ATANAME(ap, at));*/
583 sili_pm_hardreset(ap, target, 1);
584 }
585
586 /*
587 * Read the detect status
588 */
589 if (sili_pm_read(ap, target, SATA_PMREG_SSTS, &data)) {
590 kprintf("%s: Unable to access PM SSTS register target %d\n",
591 PORTNAME(ap), target);
592 return;
593 }
594 if ((data & SATA_PM_SSTS_DET) != SATA_PM_SSTS_DET_DEV) {
595 /*kprintf("%s: DETECT %08x\n", ATANAME(ap, at), data);*/
596 if (at->at_probe != ATA_PROBE_FAILED) {
597 at->at_probe = ATA_PROBE_FAILED;
598 at->at_type = ATA_PORT_T_NONE;
599 at->at_features |= ATA_PORT_F_RESCAN;
600 kprintf("%s: HOTPLUG (PM) - Device removed\n",
601 ATANAME(ap, at));
602 }
603 } else {
604 if (at->at_probe == ATA_PROBE_FAILED) {
605 at->at_probe = ATA_PROBE_NEED_HARD_RESET;
606 at->at_features |= ATA_PORT_F_RESCAN;
607 kprintf("%s: HOTPLUG (PM) - Device inserted\n",
608 ATANAME(ap, at));
609 }
610 }
611}
612
613/*
614 * Read a PM register
615 */
616int
617sili_pm_read(struct sili_port *ap, int target, int which, u_int32_t *datap)
618{
619 struct ata_xfer *xa;
620 int error;
621
622 xa = sili_ata_get_xfer(ap, &ap->ap_ata[15]);
623
624 xa->fis->type = ATA_FIS_TYPE_H2D;
625 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15;
626 xa->fis->command = ATA_C_READ_PM;
627 xa->fis->features = which;
628 xa->fis->device = target | ATA_H2D_DEVICE_LBA;
629 xa->fis->control = ATA_FIS_CONTROL_4BIT;
630
631 xa->complete = sili_pm_dummy_done;
632 xa->datalen = 0;
4383d440 633 xa->flags = ATA_F_POLL | ATA_F_AUTOSENSE;
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634 xa->timeout = 1000;
635
636 if (sili_ata_cmd(xa) == ATA_S_COMPLETE) {
637 *datap = xa->rfis->sector_count | (xa->rfis->lba_low << 8) |
638 (xa->rfis->lba_mid << 16) | (xa->rfis->lba_high << 24);
639 error = 0;
640 } else {
641 kprintf("%s.%d pm_read SCA[%d] failed\n",
642 PORTNAME(ap), target, which);
643 *datap = 0;
644 error = EIO;
645 }
646 sili_ata_put_xfer(xa);
647 return (error);
648}
649
650/*
651 * Write a PM register
652 */
653int
654sili_pm_write(struct sili_port *ap, int target, int which, u_int32_t data)
655{
656 struct ata_xfer *xa;
657 int error;
658
659 xa = sili_ata_get_xfer(ap, &ap->ap_ata[15]);
660
661 xa->fis->type = ATA_FIS_TYPE_H2D;
662 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15;
663 xa->fis->command = ATA_C_WRITE_PM;
664 xa->fis->features = which;
665 xa->fis->device = target | ATA_H2D_DEVICE_LBA;
666 xa->fis->sector_count = (u_int8_t)data;
667 xa->fis->lba_low = (u_int8_t)(data >> 8);
668 xa->fis->lba_mid = (u_int8_t)(data >> 16);
669 xa->fis->lba_high = (u_int8_t)(data >> 24);
670 xa->fis->control = ATA_FIS_CONTROL_4BIT;
671
672 xa->complete = sili_pm_dummy_done;
673 xa->datalen = 0;
4383d440 674 xa->flags = ATA_F_POLL | ATA_F_EXCLUSIVE;
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675 xa->timeout = 1000;
676
677 if (sili_ata_cmd(xa) == ATA_S_COMPLETE)
678 error = 0;
679 else
680 error = EIO;
681 sili_ata_put_xfer(xa);
682 return(error);
683}
684
685/*
686 * Dummy done callback for xa.
687 */
688static void
689sili_pm_dummy_done(struct ata_xfer *xa)
690{
691}
692
693static void
694sili_pm_empty_done(struct sili_ccb *ccb)
695{
696}