intr: Nuke count_registered_ints()
[dragonfly.git] / sys / kern / kern_intr.c
CommitLineData
984263bc 1/*
033a4603 2 * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved.
ef0fdad1 3 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved.
984263bc
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4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
27 *
28 */
29
984263bc
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30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/malloc.h>
33#include <sys/kernel.h>
34#include <sys/sysctl.h>
ef0fdad1
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35#include <sys/thread.h>
36#include <sys/proc.h>
7e071e7a 37#include <sys/random.h>
477d3c1c 38#include <sys/serialize.h>
a7231bde 39#include <sys/interrupt.h>
477d3c1c 40#include <sys/bus.h>
37e7efec 41#include <sys/machintr.h>
984263bc 42
477d3c1c 43#include <machine/frame.h>
984263bc 44
684a93c4
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45#include <sys/thread2.h>
46#include <sys/mplock2.h>
47
9d522d14
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48struct info_info;
49
ef0fdad1
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50typedef struct intrec {
51 struct intrec *next;
9d522d14 52 struct intr_info *info;
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53 inthand2_t *handler;
54 void *argument;
477d3c1c 55 char *name;
ef0fdad1 56 int intr;
477d3c1c
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57 int intr_flags;
58 struct lwkt_serialize *serializer;
59} *intrec_t;
60
61struct intr_info {
62 intrec_t i_reclist;
63 struct thread i_thread;
64 struct random_softc i_random;
65 int i_running;
862f2618
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66 long i_count; /* interrupts dispatched */
67 int i_mplock_required;
477d3c1c
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68 int i_fast;
69 int i_slow;
f33e9c1c 70 int i_state;
b560de96
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71 int i_errorticks;
72 unsigned long i_straycount;
5f456c40
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73} intr_info_ary[MAX_INTS];
74
75int max_installed_hard_intr;
76int max_installed_soft_intr;
477d3c1c 77
a9d00ec1
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78#define EMERGENCY_INTR_POLLING_FREQ_MAX 20000
79
250ce837
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80/*
81 * Assert that callers into interrupt handlers don't return with
82 * dangling tokens, spinlocks, or mp locks.
83 */
3933a3ab 84#ifdef INVARIANTS
149a3d9e
VS
85
86#define TD_INVARIANTS_DECLARE \
149a3d9e
VS
87 int spincount; \
88 lwkt_tokref_t curstop
89
90#define TD_INVARIANTS_GET(td) \
91 do { \
149a3d9e
VS
92 spincount = (td)->td_gd->gd_spinlocks_wr; \
93 curstop = (td)->td_toks_stop; \
94 } while(0)
95
96#define TD_INVARIANTS_TEST(td, name) \
97 do { \
98 KASSERT(spincount == (td)->td_gd->gd_spinlocks_wr, \
99 ("spincount mismatch after interrupt handler %s", \
100 name)); \
101 KASSERT(curstop == (td)->td_toks_stop, \
102 ("token count mismatch after interrupt handler %s", \
103 name)); \
149a3d9e 104 } while(0)
250ce837
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105
106#else
107
b5d16701 108/* !INVARIANTS */
3933a3ab
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109
110#define TD_INVARIANTS_DECLARE
111#define TD_INVARIANTS_GET(td)
149a3d9e 112#define TD_INVARIANTS_TEST(td, name)
3933a3ab 113
149a3d9e 114#endif /* ndef INVARIANTS */
3933a3ab 115
a9d00ec1
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116static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS);
117static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS);
96d52ac8 118static void emergency_intr_timer_callback(systimer_t, int, struct intrframe *);
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119static void ithread_handler(void *arg);
120static void ithread_emergency(void *arg);
b560de96 121static void report_stray_interrupt(int intr, struct intr_info *info);
6355d931 122static void int_moveto_destcpu(int *, int);
4c846371 123static void int_moveto_origcpu(int, int);
a9d00ec1 124
c157ff7a 125int intr_info_size = NELEM(intr_info_ary);
37d44089 126
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127static struct systimer emergency_intr_timer;
128static struct thread emergency_intr_thread;
129
f33e9c1c
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130#define ISTATE_NOTHREAD 0
131#define ISTATE_NORMAL 1
132#define ISTATE_LIVELOCKED 2
37d44089 133
b560de96 134static int livelock_limit = 40000;
0e6beaa3 135static int livelock_lowater = 20000;
b560de96 136static int livelock_debug = -1;
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137SYSCTL_INT(_kern, OID_AUTO, livelock_limit,
138 CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit");
f33e9c1c
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139SYSCTL_INT(_kern, OID_AUTO, livelock_lowater,
140 CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore");
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141SYSCTL_INT(_kern, OID_AUTO, livelock_debug,
142 CTLFLAG_RW, &livelock_debug, 0, "Livelock debug intr#");
984263bc 143
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144static int emergency_intr_enable = 0; /* emergency interrupt polling */
145TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable);
146SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW,
147 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable");
148
149static int emergency_intr_freq = 10; /* emergency polling frequency */
150TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq);
151SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW,
152 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency");
153
154/*
155 * Sysctl support routines
156 */
157static int
158sysctl_emergency_enable(SYSCTL_HANDLER_ARGS)
159{
160 int error, enabled;
161
162 enabled = emergency_intr_enable;
163 error = sysctl_handle_int(oidp, &enabled, 0, req);
164 if (error || req->newptr == NULL)
165 return error;
166 emergency_intr_enable = enabled;
167 if (emergency_intr_enable) {
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168 systimer_adjust_periodic(&emergency_intr_timer,
169 emergency_intr_freq);
a9d00ec1 170 } else {
ba39e2e0 171 systimer_adjust_periodic(&emergency_intr_timer, 1);
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172 }
173 return 0;
174}
175
176static int
177sysctl_emergency_freq(SYSCTL_HANDLER_ARGS)
178{
179 int error, phz;
180
181 phz = emergency_intr_freq;
182 error = sysctl_handle_int(oidp, &phz, 0, req);
183 if (error || req->newptr == NULL)
184 return error;
185 if (phz <= 0)
186 return EINVAL;
187 else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX)
188 phz = EMERGENCY_INTR_POLLING_FREQ_MAX;
189
190 emergency_intr_freq = phz;
191 if (emergency_intr_enable) {
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192 systimer_adjust_periodic(&emergency_intr_timer,
193 emergency_intr_freq);
a9d00ec1 194 } else {
ba39e2e0 195 systimer_adjust_periodic(&emergency_intr_timer, 1);
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196 }
197 return 0;
198}
984263bc 199
45d76888
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200/*
201 * Register an SWI or INTerrupt handler.
45d76888 202 */
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203void *
204register_swi(int intr, inthand2_t *handler, void *arg, const char *name,
1da8d52f 205 struct lwkt_serialize *serializer, int cpuid)
984263bc 206{
5f456c40 207 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
ef0fdad1 208 panic("register_swi: bad intr %d", intr);
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209
210 if (cpuid < 0)
211 cpuid = intr % ncpus;
212 return(register_int(intr, handler, arg, name, serializer, 0, cpuid));
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213}
214
8619d09d
AH
215void *
216register_swi_mp(int intr, inthand2_t *handler, void *arg, const char *name,
1da8d52f 217 struct lwkt_serialize *serializer, int cpuid)
8619d09d
AH
218{
219 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
220 panic("register_swi: bad intr %d", intr);
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221
222 if (cpuid < 0)
223 cpuid = intr % ncpus;
224 return(register_int(intr, handler, arg, name, serializer,
225 INTR_MPSAFE, cpuid));
8619d09d
AH
226}
227
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228void *
229register_int(int intr, inthand2_t *handler, void *arg, const char *name,
6355d931 230 struct lwkt_serialize *serializer, int intr_flags, int cpuid)
984263bc 231{
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MD
232 struct intr_info *info;
233 struct intrec **list;
234 intrec_t rec;
6355d931
SZ
235 int orig_cpuid;
236
237 KKASSERT(cpuid >= 0 && cpuid < ncpus);
ef0fdad1 238
5f456c40 239 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 240 panic("register_int: bad intr %d", intr);
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241 if (name == NULL)
242 name = "???";
243 info = &intr_info_ary[intr];
244
9d522d14
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245 /*
246 * Construct an interrupt handler record
247 */
efda3bd0
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248 rec = kmalloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT);
249 rec->name = kmalloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT);
477d3c1c 250 strcpy(rec->name, name);
ef0fdad1 251
9d522d14 252 rec->info = info;
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253 rec->handler = handler;
254 rec->argument = arg;
ef0fdad1 255 rec->intr = intr;
477d3c1c 256 rec->intr_flags = intr_flags;
ef0fdad1 257 rec->next = NULL;
477d3c1c 258 rec->serializer = serializer;
ef0fdad1 259
a9d00ec1
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260 /*
261 * Create an emergency polling thread and set up a systimer to wake
262 * it up.
263 */
264 if (emergency_intr_thread.td_kstack == NULL) {
fdce8919 265 lwkt_create(ithread_emergency, NULL, NULL, &emergency_intr_thread,
4643740a 266 TDF_NOSTART | TDF_INTTHREAD, ncpus - 1, "ithread emerg");
a9d00ec1
MD
267 systimer_init_periodic_nq(&emergency_intr_timer,
268 emergency_intr_timer_callback, &emergency_intr_thread,
269 (emergency_intr_enable ? emergency_intr_freq : 1));
270 }
271
6355d931 272 int_moveto_destcpu(&orig_cpuid, cpuid);
db958607 273
ef0fdad1
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274 /*
275 * Create an interrupt thread if necessary, leave it in an unscheduled
45d76888 276 * state.
ef0fdad1 277 */
f33e9c1c
MD
278 if (info->i_state == ISTATE_NOTHREAD) {
279 info->i_state = ISTATE_NORMAL;
fdce8919 280 lwkt_create(ithread_handler, (void *)(intptr_t)intr, NULL,
4643740a 281 &info->i_thread, TDF_NOSTART | TDF_INTTHREAD, cpuid,
fdce8919 282 "ithread %d", intr);
5f456c40 283 if (intr >= FIRST_SOFTINT)
477d3c1c 284 lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM);
4b5f931b 285 else
477d3c1c
MD
286 lwkt_setpri(&info->i_thread, TDPRI_INT_MED);
287 info->i_thread.td_preemptable = lwkt_preempt;
ef0fdad1
MD
288 }
289
9d522d14
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290 list = &info->i_reclist;
291
ef0fdad1 292 /*
9d522d14 293 * Keep track of how many fast and slow interrupts we have.
862f2618
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294 * Set i_mplock_required if any handler in the chain requires
295 * the MP lock to operate.
ef0fdad1 296 */
862f2618
MD
297 if ((intr_flags & INTR_MPSAFE) == 0)
298 info->i_mplock_required = 1;
f8a09be1 299 if (intr_flags & INTR_CLOCK)
9d522d14
MD
300 ++info->i_fast;
301 else
302 ++info->i_slow;
303
8b3ec75a
MD
304 /*
305 * Enable random number generation keying off of this interrupt.
306 */
307 if ((intr_flags & INTR_NOENTROPY) == 0 && info->i_random.sc_enabled == 0) {
308 info->i_random.sc_enabled = 1;
309 info->i_random.sc_intr = intr;
310 }
311
9d522d14
MD
312 /*
313 * Add the record to the interrupt list.
314 */
315 crit_enter();
ef0fdad1
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316 while (*list != NULL)
317 list = &(*list)->next;
318 *list = rec;
319 crit_exit();
5f456c40
MD
320
321 /*
322 * Update max_installed_hard_intr to make the emergency intr poll
323 * a bit more efficient.
324 */
325 if (intr < FIRST_SOFTINT) {
326 if (max_installed_hard_intr <= intr)
327 max_installed_hard_intr = intr + 1;
328 } else {
329 if (max_installed_soft_intr <= intr)
330 max_installed_soft_intr = intr + 1;
331 }
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MD
332
333 /*
334 * Setup the machine level interrupt vector
335 */
f416026e
SZ
336 if (intr < FIRST_SOFTINT && info->i_slow + info->i_fast == 1)
337 machintr_intr_setup(intr, intr_flags);
9d522d14 338
4c846371 339 int_moveto_origcpu(orig_cpuid, cpuid);
db958607 340
477d3c1c 341 return(rec);
ef0fdad1 342}
984263bc 343
9d522d14 344void
1da8d52f 345unregister_swi(void *id, int intr, int cpuid)
ef0fdad1 346{
1da8d52f
SZ
347 if (cpuid < 0)
348 cpuid = intr % ncpus;
349
350 unregister_int(id, cpuid);
984263bc
MD
351}
352
9d522d14 353void
6355d931 354unregister_int(void *id, int cpuid)
984263bc 355{
477d3c1c
MD
356 struct intr_info *info;
357 struct intrec **list;
358 intrec_t rec;
6355d931
SZ
359 int intr, orig_cpuid;
360
361 KKASSERT(cpuid >= 0 && cpuid < ncpus);
477d3c1c
MD
362
363 intr = ((intrec_t)id)->intr;
ef0fdad1 364
5f456c40 365 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 366 panic("register_int: bad intr %d", intr);
477d3c1c
MD
367
368 info = &intr_info_ary[intr];
369
6355d931 370 int_moveto_destcpu(&orig_cpuid, cpuid);
4c846371 371
477d3c1c 372 /*
9d522d14
MD
373 * Remove the interrupt descriptor, adjust the descriptor count,
374 * and teardown the machine level vector if this was the last interrupt.
477d3c1c 375 */
ef0fdad1 376 crit_enter();
477d3c1c 377 list = &info->i_reclist;
ef0fdad1 378 while ((rec = *list) != NULL) {
9d522d14 379 if (rec == id)
ef0fdad1 380 break;
ef0fdad1
MD
381 list = &rec->next;
382 }
9d522d14 383 if (rec) {
acf7409e
SZ
384 intrec_t rec0;
385
9d522d14 386 *list = rec->next;
f8a09be1 387 if (rec->intr_flags & INTR_CLOCK)
9d522d14
MD
388 --info->i_fast;
389 else
390 --info->i_slow;
e8727dce 391 if (intr < FIRST_SOFTINT && info->i_fast + info->i_slow == 0)
f416026e 392 machintr_intr_teardown(intr);
862f2618 393
acf7409e
SZ
394 /*
395 * Clear i_mplock_required if no handlers in the chain require the
396 * MP lock.
397 */
398 for (rec0 = info->i_reclist; rec0; rec0 = rec0->next) {
399 if ((rec0->intr_flags & INTR_MPSAFE) == 0)
400 break;
401 }
402 if (rec0 == NULL)
862f2618 403 info->i_mplock_required = 0;
acf7409e 404 }
862f2618 405
ef0fdad1 406 crit_exit();
477d3c1c 407
4c846371
SZ
408 int_moveto_origcpu(orig_cpuid, cpuid);
409
477d3c1c 410 /*
9d522d14 411 * Free the record.
477d3c1c 412 */
ef0fdad1 413 if (rec != NULL) {
efda3bd0
MD
414 kfree(rec->name, M_DEVBUF);
415 kfree(rec, M_DEVBUF);
ef0fdad1 416 } else {
6ea70f76 417 kprintf("warning: unregister_int: int %d handler for %s not found\n",
477d3c1c 418 intr, ((intrec_t)id)->name);
ef0fdad1 419 }
477d3c1c
MD
420}
421
477d3c1c
MD
422long
423get_interrupt_counter(int intr)
424{
425 struct intr_info *info;
426
5f456c40 427 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
428 panic("register_int: bad intr %d", intr);
429 info = &intr_info_ary[intr];
430 return(info->i_count);
431}
432
7e071e7a
MD
433void
434register_randintr(int intr)
435{
477d3c1c
MD
436 struct intr_info *info;
437
5f456c40 438 if (intr < 0 || intr >= MAX_INTS)
417c990a 439 panic("register_randintr: bad intr %d", intr);
477d3c1c
MD
440 info = &intr_info_ary[intr];
441 info->i_random.sc_intr = intr;
442 info->i_random.sc_enabled = 1;
7e071e7a
MD
443}
444
445void
446unregister_randintr(int intr)
447{
477d3c1c
MD
448 struct intr_info *info;
449
5f456c40 450 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
451 panic("register_swi: bad intr %d", intr);
452 info = &intr_info_ary[intr];
8b3ec75a 453 info->i_random.sc_enabled = -1;
7e071e7a
MD
454}
455
5f456c40
MD
456int
457next_registered_randintr(int intr)
458{
459 struct intr_info *info;
460
461 if (intr < 0 || intr >= MAX_INTS)
462 panic("register_swi: bad intr %d", intr);
463 while (intr < MAX_INTS) {
464 info = &intr_info_ary[intr];
8b3ec75a 465 if (info->i_random.sc_enabled > 0)
5f456c40
MD
466 break;
467 ++intr;
468 }
469 return(intr);
470}
471
ef0fdad1 472/*
b68b7282
MD
473 * Dispatch an interrupt. If there's nothing to do we have a stray
474 * interrupt and can just return, leaving the interrupt masked.
96728c05 475 *
477d3c1c 476 * We need to schedule the interrupt and set its i_running bit. If
96728c05
MD
477 * we are not on the interrupt thread's cpu we have to send a message
478 * to the correct cpu that will issue the desired action (interlocking
f33e9c1c
MD
479 * with the interrupt thread's critical section). We do NOT attempt to
480 * reschedule interrupts whos i_running bit is already set because
481 * this would prematurely wakeup a livelock-limited interrupt thread.
482 *
483 * i_running is only tested/set on the same cpu as the interrupt thread.
96728c05
MD
484 *
485 * We are NOT in a critical section, which will allow the scheduled
71ef2f5c 486 * interrupt to preempt us. The MP lock might *NOT* be held here.
ef0fdad1 487 */
b8a98473
MD
488#ifdef SMP
489
96728c05
MD
490static void
491sched_ithd_remote(void *arg)
492{
bfc09ba0 493 sched_ithd((int)(intptr_t)arg);
96728c05
MD
494}
495
b8a98473
MD
496#endif
497
ef0fdad1
MD
498void
499sched_ithd(int intr)
500{
477d3c1c 501 struct intr_info *info;
ef0fdad1 502
477d3c1c
MD
503 info = &intr_info_ary[intr];
504
505 ++info->i_count;
f33e9c1c 506 if (info->i_state != ISTATE_NOTHREAD) {
477d3c1c 507 if (info->i_reclist == NULL) {
b560de96 508 report_stray_interrupt(intr, info);
b68b7282 509 } else {
b8a98473 510#ifdef SMP
477d3c1c 511 if (info->i_thread.td_gd == mycpu) {
f33e9c1c
MD
512 if (info->i_running == 0) {
513 info->i_running = 1;
514 if (info->i_state != ISTATE_LIVELOCKED)
515 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
516 }
96728c05 517 } else {
477d3c1c 518 lwkt_send_ipiq(info->i_thread.td_gd,
bfc09ba0 519 sched_ithd_remote, (void *)(intptr_t)intr);
96728c05 520 }
b8a98473 521#else
f33e9c1c
MD
522 if (info->i_running == 0) {
523 info->i_running = 1;
524 if (info->i_state != ISTATE_LIVELOCKED)
525 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
526 }
b8a98473 527#endif
b68b7282 528 }
ef0fdad1 529 } else {
b560de96 530 report_stray_interrupt(intr, info);
ef0fdad1
MD
531 }
532}
533
b560de96
MD
534static void
535report_stray_interrupt(int intr, struct intr_info *info)
536{
537 ++info->i_straycount;
538 if (info->i_straycount < 10) {
539 if (info->i_errorticks == ticks)
540 return;
541 info->i_errorticks = ticks;
542 kprintf("sched_ithd: stray interrupt %d on cpu %d\n",
543 intr, mycpuid);
7e88c0e6 544 } else if (info->i_straycount == 10) {
b560de96
MD
545 kprintf("sched_ithd: %ld stray interrupts %d on cpu %d - "
546 "there will be no further reports\n",
547 info->i_straycount, intr, mycpuid);
548 }
549}
550
37d44089
MD
551/*
552 * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL
553 * might not be held).
554 */
555static void
96d52ac8
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556ithread_livelock_wakeup(systimer_t st, int in_ipi __unused,
557 struct intrframe *frame __unused)
37d44089 558{
477d3c1c 559 struct intr_info *info;
37d44089 560
973c11b9 561 info = &intr_info_ary[(int)(intptr_t)st->data];
f33e9c1c 562 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 563 lwkt_schedule(&info->i_thread);
37d44089
MD
564}
565
729e15a8
SZ
566/*
567 * Schedule ithread within fast intr handler
568 *
569 * XXX Protect sched_ithd() call with gd_intr_nesting_level?
570 * Interrupts aren't enabled, but still...
571 */
572static __inline void
573ithread_fast_sched(int intr, thread_t td)
574{
575 ++td->td_nest_count;
576
577 /*
578 * We are already in critical section, exit it now to
579 * allow preemption.
580 */
581 crit_exit_quick(td);
582 sched_ithd(intr);
583 crit_enter_quick(td);
584
585 --td->td_nest_count;
586}
587
67b9bb39 588/*
7bd34050 589 * This function is called directly from the ICU or APIC vector code assembly
477d3c1c
MD
590 * to process an interrupt. The critical section and interrupt deferral
591 * checks have already been done but the function is entered WITHOUT
592 * a critical section held. The BGL may or may not be held.
593 *
594 * Must return non-zero if we do not want the vector code to re-enable
595 * the interrupt (which we don't if we have to schedule the interrupt)
67b9bb39 596 */
c7eb0589 597int ithread_fast_handler(struct intrframe *frame);
477d3c1c
MD
598
599int
c7eb0589 600ithread_fast_handler(struct intrframe *frame)
477d3c1c
MD
601{
602 int intr;
603 struct intr_info *info;
604 struct intrec **list;
605 int must_schedule;
606#ifdef SMP
607 int got_mplock;
608#endif
3933a3ab 609 TD_INVARIANTS_DECLARE;
c24c20c0 610 intrec_t rec, nrec;
477d3c1c 611 globaldata_t gd;
729e15a8 612 thread_t td;
477d3c1c 613
c7eb0589 614 intr = frame->if_vec;
477d3c1c 615 gd = mycpu;
729e15a8
SZ
616 td = curthread;
617
618 /* We must be in critical section. */
f9235b6d 619 KKASSERT(td->td_critcount);
477d3c1c
MD
620
621 info = &intr_info_ary[intr];
622
623 /*
624 * If we are not processing any FAST interrupts, just schedule the thing.
477d3c1c
MD
625 */
626 if (info->i_fast == 0) {
3848f1c7 627 ++gd->gd_cnt.v_intr;
729e15a8 628 ithread_fast_sched(intr, td);
477d3c1c
MD
629 return(1);
630 }
631
632 /*
633 * This should not normally occur since interrupts ought to be
634 * masked if the ithread has been scheduled or is running.
635 */
636 if (info->i_running)
637 return(1);
638
639 /*
640 * Bump the interrupt nesting level to process any FAST interrupts.
641 * Obtain the MP lock as necessary. If the MP lock cannot be obtained,
642 * schedule the interrupt thread to deal with the issue instead.
643 *
644 * To reduce overhead, just leave the MP lock held once it has been
645 * obtained.
646 */
477d3c1c
MD
647 ++gd->gd_intr_nesting_level;
648 ++gd->gd_cnt.v_intr;
649 must_schedule = info->i_slow;
650#ifdef SMP
651 got_mplock = 0;
652#endif
653
3933a3ab 654 TD_INVARIANTS_GET(td);
477d3c1c 655 list = &info->i_reclist;
3933a3ab 656
c24c20c0
MD
657 for (rec = *list; rec; rec = nrec) {
658 /* rec may be invalid after call */
659 nrec = rec->next;
477d3c1c 660
f8a09be1 661 if (rec->intr_flags & INTR_CLOCK) {
477d3c1c
MD
662#ifdef SMP
663 if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) {
664 if (try_mplock() == 0) {
f5c2d910
SZ
665 /* Couldn't get the MP lock; just schedule it. */
666 must_schedule = 1;
477d3c1c
MD
667 break;
668 }
669 got_mplock = 1;
670 }
671#endif
672 if (rec->serializer) {
673 must_schedule += lwkt_serialize_handler_try(
674 rec->serializer, rec->handler,
c7eb0589 675 rec->argument, frame);
477d3c1c 676 } else {
c7eb0589 677 rec->handler(rec->argument, frame);
477d3c1c 678 }
3933a3ab 679 TD_INVARIANTS_TEST(td, rec->name);
477d3c1c
MD
680 }
681 }
682
683 /*
684 * Cleanup
685 */
686 --gd->gd_intr_nesting_level;
687#ifdef SMP
688 if (got_mplock)
689 rel_mplock();
690#endif
477d3c1c
MD
691
692 /*
729e15a8
SZ
693 * If we had a problem, or mixed fast and slow interrupt handlers are
694 * registered, schedule the ithread to catch the missed records (it
695 * will just re-run all of them). A return value of 0 indicates that
696 * all handlers have been run and the interrupt can be re-enabled, and
697 * a non-zero return indicates that the interrupt thread controls
698 * re-enablement.
477d3c1c 699 */
afd7b1c0 700 if (must_schedule > 0)
729e15a8 701 ithread_fast_sched(intr, td);
afd7b1c0 702 else if (must_schedule == 0)
477d3c1c
MD
703 ++info->i_count;
704 return(must_schedule);
705}
706
b68b7282 707/*
45d76888
MD
708 * Interrupt threads run this as their main loop.
709 *
68b3ccd4 710 * The handler begins execution outside a critical section and no MP lock.
37d44089 711 *
477d3c1c 712 * The i_running state starts at 0. When an interrupt occurs, the hardware
37d44089
MD
713 * interrupt is disabled and sched_ithd() The HW interrupt remains disabled
714 * until all routines have run. We then call ithread_done() to reenable
45d76888
MD
715 * the HW interrupt and deschedule us until the next interrupt.
716 *
477d3c1c 717 * We are responsible for atomically checking i_running and ithread_done()
45d76888 718 * is responsible for atomically checking for platform-specific delayed
477d3c1c 719 * interrupts. i_running for our irq is only set in the context of our cpu,
45d76888 720 * so a critical section is a sufficient interlock.
b68b7282 721 */
93781523
MD
722#define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */
723
ef0fdad1
MD
724static void
725ithread_handler(void *arg)
726{
477d3c1c 727 struct intr_info *info;
f33e9c1c 728 int use_limit;
b560de96 729 __uint32_t lseconds;
477d3c1c 730 int intr;
9d522d14 731 int mpheld;
477d3c1c
MD
732 struct intrec **list;
733 intrec_t rec, nrec;
f33e9c1c 734 globaldata_t gd;
67b9bb39 735 struct systimer ill_timer; /* enforced freq. timer */
f33e9c1c 736 u_int ill_count; /* interrupt livelock counter */
3933a3ab 737 TD_INVARIANTS_DECLARE;
45d76888 738
f33e9c1c 739 ill_count = 0;
973c11b9 740 intr = (int)(intptr_t)arg;
477d3c1c
MD
741 info = &intr_info_ary[intr];
742 list = &info->i_reclist;
477d3c1c 743
45d76888 744 /*
862f2618 745 * The loop must be entered with one critical section held. The thread
fdce8919 746 * does not hold the mplock on startup.
45d76888 747 */
e381e77c
MD
748 gd = mycpu;
749 lseconds = gd->gd_time_seconds;
45d76888 750 crit_enter_gd(gd);
862f2618 751 mpheld = 0;
ef0fdad1 752
ef0fdad1 753 for (;;) {
862f2618
MD
754 /*
755 * The chain is only considered MPSAFE if all its interrupt handlers
756 * are MPSAFE. However, if intr_mpsafe has been turned off we
757 * always operate with the BGL.
758 */
0e6beaa3 759#ifdef SMP
c9e9fb21 760 if (info->i_mplock_required != mpheld) {
862f2618
MD
761 if (info->i_mplock_required) {
762 KKASSERT(mpheld == 0);
c9e9fb21 763 get_mplock();
862f2618
MD
764 mpheld = 1;
765 } else {
766 KKASSERT(mpheld != 0);
767 rel_mplock();
768 mpheld = 0;
769 }
770 }
0e6beaa3 771#endif
862f2618 772
3933a3ab
MD
773 TD_INVARIANTS_GET(gd->gd_curthread);
774
93781523 775 /*
f33e9c1c
MD
776 * If an interrupt is pending, clear i_running and execute the
777 * handlers. Note that certain types of interrupts can re-trigger
778 * and set i_running again.
45d76888 779 *
f33e9c1c 780 * Each handler is run in a critical section. Note that we run both
862f2618 781 * FAST and SLOW designated service routines.
93781523 782 */
f33e9c1c
MD
783 if (info->i_running) {
784 ++ill_count;
785 info->i_running = 0;
9d522d14 786
b560de96
MD
787 if (*list == NULL)
788 report_stray_interrupt(intr, info);
789
f33e9c1c 790 for (rec = *list; rec; rec = nrec) {
c24c20c0 791 /* rec may be invalid after call */
f33e9c1c
MD
792 nrec = rec->next;
793 if (rec->serializer) {
794 lwkt_serialize_handler_call(rec->serializer, rec->handler,
795 rec->argument, NULL);
796 } else {
797 rec->handler(rec->argument, NULL);
798 }
3933a3ab 799 TD_INVARIANTS_TEST(gd->gd_curthread, rec->name);
477d3c1c 800 }
ef0fdad1 801 }
37d44089
MD
802
803 /*
804 * This is our interrupt hook to add rate randomness to the random
805 * number generator.
806 */
8b3ec75a 807 if (info->i_random.sc_enabled > 0)
96728c05 808 add_interrupt_randomness(intr);
37d44089
MD
809
810 /*
f33e9c1c
MD
811 * Unmask the interrupt to allow it to trigger again. This only
812 * applies to certain types of interrupts (typ level interrupts).
813 * This can result in the interrupt retriggering, but the retrigger
814 * will not be processed until we cycle our critical section.
363d922a
MD
815 *
816 * Only unmask interrupts while handlers are installed. It is
817 * possible to hit a situation where no handlers are installed
818 * due to a device driver livelocking and then tearing down its
819 * interrupt on close (the parallel bus being a good example).
37d44089 820 */
6d164b20 821 if (intr < FIRST_SOFTINT && *list)
35b2edcb 822 machintr_intr_enable(intr);
f33e9c1c
MD
823
824 /*
825 * Do a quick exit/enter to catch any higher-priority interrupt
826 * sources, such as the statclock, so thread time accounting
827 * will still work. This may also cause an interrupt to re-trigger.
828 */
829 crit_exit_gd(gd);
830 crit_enter_gd(gd);
831
832 /*
833 * LIVELOCK STATE MACHINE
834 */
835 switch(info->i_state) {
836 case ISTATE_NORMAL:
837 /*
b560de96 838 * Reset the count each second.
f33e9c1c 839 */
b560de96
MD
840 if (lseconds != gd->gd_time_seconds) {
841 lseconds = gd->gd_time_seconds;
842 ill_count = 0;
f33e9c1c
MD
843 }
844
845 /*
846 * If we did not exceed the frequency limit, we are done.
847 * If the interrupt has not retriggered we deschedule ourselves.
848 */
849 if (ill_count <= livelock_limit) {
850 if (info->i_running == 0) {
851 lwkt_deschedule_self(gd->gd_curthread);
852 lwkt_switch();
853 }
37d44089 854 break;
f33e9c1c
MD
855 }
856
857 /*
858 * Otherwise we are livelocked. Set up a periodic systimer
859 * to wake the thread up at the limit frequency.
860 */
b560de96 861 kprintf("intr %d at %d/%d hz, livelocked limit engaged!\n",
59d9413f 862 intr, ill_count, livelock_limit);
f33e9c1c
MD
863 info->i_state = ISTATE_LIVELOCKED;
864 if ((use_limit = livelock_limit) < 100)
865 use_limit = 100;
866 else if (use_limit > 500000)
867 use_limit = 500000;
79b38af2 868 systimer_init_periodic_nq(&ill_timer, ithread_livelock_wakeup,
973c11b9 869 (void *)(intptr_t)intr, use_limit);
37d44089 870 /* fall through */
f33e9c1c 871 case ISTATE_LIVELOCKED:
37d44089 872 /*
f33e9c1c
MD
873 * Wait for our periodic timer to go off. Since the interrupt
874 * has re-armed it can still set i_running, but it will not
875 * reschedule us while we are in a livelocked state.
37d44089 876 */
f33e9c1c 877 lwkt_deschedule_self(gd->gd_curthread);
37d44089 878 lwkt_switch();
93781523 879
37d44089 880 /*
b560de96
MD
881 * Check once a second to see if the livelock condition no
882 * longer applies.
37d44089 883 */
b560de96
MD
884 if (lseconds != gd->gd_time_seconds) {
885 lseconds = gd->gd_time_seconds;
f33e9c1c 886 if (ill_count < livelock_lowater) {
b560de96
MD
887 info->i_state = ISTATE_NORMAL;
888 systimer_del(&ill_timer);
889 kprintf("intr %d at %d/%d hz, livelock removed\n",
890 intr, ill_count, livelock_lowater);
891 } else if (livelock_debug == intr ||
892 (bootverbose && cold)) {
893 kprintf("intr %d at %d/%d hz, in livelock\n",
894 intr, ill_count, livelock_lowater);
f33e9c1c 895 }
b560de96 896 ill_count = 0;
37d44089
MD
897 }
898 break;
899 }
ef0fdad1 900 }
eccb255f 901 /* NOT REACHED */
ef0fdad1
MD
902}
903
a9d00ec1
MD
904/*
905 * Emergency interrupt polling thread. The thread begins execution
906 * outside a critical section with the BGL held.
907 *
908 * If emergency interrupt polling is enabled, this thread will
909 * execute all system interrupts not marked INTR_NOPOLL at the
910 * specified polling frequency.
911 *
912 * WARNING! This thread runs *ALL* interrupt service routines that
913 * are not marked INTR_NOPOLL, which basically means everything except
914 * the 8254 clock interrupt and the ATA interrupt. It has very high
915 * overhead and should only be used in situations where the machine
916 * cannot otherwise be made to work. Due to the severe performance
917 * degredation, it should not be enabled on production machines.
918 */
919static void
920ithread_emergency(void *arg __unused)
921{
eccb255f 922 globaldata_t gd = mycpu;
a9d00ec1
MD
923 struct intr_info *info;
924 intrec_t rec, nrec;
925 int intr;
3933a3ab 926 TD_INVARIANTS_DECLARE;
a9d00ec1 927
c9e9fb21 928 get_mplock();
eccb255f
MD
929 crit_enter_gd(gd);
930 TD_INVARIANTS_GET(gd->gd_curthread);
c9e9fb21 931
a9d00ec1 932 for (;;) {
5f456c40 933 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
a9d00ec1
MD
934 info = &intr_info_ary[intr];
935 for (rec = info->i_reclist; rec; rec = nrec) {
c24c20c0
MD
936 /* rec may be invalid after call */
937 nrec = rec->next;
a9d00ec1
MD
938 if ((rec->intr_flags & INTR_NOPOLL) == 0) {
939 if (rec->serializer) {
c24c20c0 940 lwkt_serialize_handler_try(rec->serializer,
a9d00ec1
MD
941 rec->handler, rec->argument, NULL);
942 } else {
943 rec->handler(rec->argument, NULL);
944 }
eccb255f 945 TD_INVARIANTS_TEST(gd->gd_curthread, rec->name);
a9d00ec1 946 }
a9d00ec1
MD
947 }
948 }
eccb255f 949 lwkt_deschedule_self(gd->gd_curthread);
a9d00ec1
MD
950 lwkt_switch();
951 }
eccb255f 952 /* NOT REACHED */
a9d00ec1
MD
953}
954
955/*
956 * Systimer callback - schedule the emergency interrupt poll thread
957 * if emergency polling is enabled.
958 */
959static
960void
96d52ac8
SZ
961emergency_intr_timer_callback(systimer_t info, int in_ipi __unused,
962 struct intrframe *frame __unused)
a9d00ec1
MD
963{
964 if (emergency_intr_enable)
965 lwkt_schedule(info->data);
966}
967
9db4b353
SZ
968int
969ithread_cpuid(int intr)
970{
971 const struct intr_info *info;
972
973 KKASSERT(intr >= 0 && intr < MAX_INTS);
974 info = &intr_info_ary[intr];
975
976 if (info->i_state == ISTATE_NOTHREAD)
977 return -1;
978 return info->i_thread.td_gd->gd_cpuid;
979}
980
984263bc
MD
981/*
982 * Sysctls used by systat and others: hw.intrnames and hw.intrcnt.
983 * The data for this machine dependent, and the declarations are in machine
984 * dependent code. The layout of intrnames and intrcnt however is machine
985 * independent.
986 *
987 * We do not know the length of intrcnt and intrnames at compile time, so
988 * calculate things at run time.
989 */
477d3c1c 990
984263bc
MD
991static int
992sysctl_intrnames(SYSCTL_HANDLER_ARGS)
993{
477d3c1c
MD
994 struct intr_info *info;
995 intrec_t rec;
996 int error = 0;
997 int len;
998 int intr;
999 char buf[64];
1000
5f456c40 1001 for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) {
477d3c1c
MD
1002 info = &intr_info_ary[intr];
1003
1004 len = 0;
1005 buf[0] = 0;
1006 for (rec = info->i_reclist; rec; rec = rec->next) {
f8c7a42d 1007 ksnprintf(buf + len, sizeof(buf) - len, "%s%s",
477d3c1c
MD
1008 (len ? "/" : ""), rec->name);
1009 len += strlen(buf + len);
1010 }
1011 if (len == 0) {
f8c7a42d 1012 ksnprintf(buf, sizeof(buf), "irq%d", intr);
477d3c1c
MD
1013 len = strlen(buf);
1014 }
1015 error = SYSCTL_OUT(req, buf, len + 1);
1016 }
1017 return (error);
984263bc
MD
1018}
1019
477d3c1c 1020
984263bc
MD
1021SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD,
1022 NULL, 0, sysctl_intrnames, "", "Interrupt Names");
1023
1024static int
1025sysctl_intrcnt(SYSCTL_HANDLER_ARGS)
1026{
477d3c1c
MD
1027 struct intr_info *info;
1028 int error = 0;
1029 int intr;
1030
5f456c40 1031 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
477d3c1c
MD
1032 info = &intr_info_ary[intr];
1033
1034 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
1035 if (error)
5f456c40
MD
1036 goto failed;
1037 }
1038 for (intr = FIRST_SOFTINT; intr < max_installed_soft_intr; ++intr) {
1039 info = &intr_info_ary[intr];
1040
1041 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
1042 if (error)
1043 goto failed;
477d3c1c 1044 }
5f456c40 1045failed:
477d3c1c 1046 return(error);
984263bc
MD
1047}
1048
1049SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD,
1050 NULL, 0, sysctl_intrcnt, "", "Interrupt Counts");
477d3c1c 1051
3242c748
SZ
1052static int
1053sysctl_intrcnt_all(SYSCTL_HANDLER_ARGS)
1054{
1055 struct intr_info *info;
1056 int error = 0;
1057 int intr;
1058
1059 for (intr = 0; intr < MAX_INTS; ++intr) {
1060 info = &intr_info_ary[intr];
1061
1062 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
1063 if (error)
1064 goto failed;
1065 }
1066failed:
1067 return(error);
1068}
1069
1070SYSCTL_PROC(_hw, OID_AUTO, intrcnt_all, CTLTYPE_OPAQUE | CTLFLAG_RD,
1071 NULL, 0, sysctl_intrcnt_all, "", "Interrupt Counts");
1072
4c846371 1073static void
6355d931 1074int_moveto_destcpu(int *orig_cpuid0, int cpuid)
4c846371 1075{
6355d931 1076 int orig_cpuid = mycpuid;
4c846371
SZ
1077
1078 if (cpuid != orig_cpuid)
1079 lwkt_migratecpu(cpuid);
1080
1081 *orig_cpuid0 = orig_cpuid;
4c846371
SZ
1082}
1083
1084static void
1085int_moveto_origcpu(int orig_cpuid, int cpuid)
1086{
1087 if (cpuid != orig_cpuid)
1088 lwkt_migratecpu(orig_cpuid);
1089}