Add some comments to the upcall test code.
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
a722be49 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.45 2003/11/21 05:29:07 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
57#include "opt_user_ldt.h"
58#include "opt_userconfig.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/sysproto.h>
63#include <sys/signalvar.h>
64#include <sys/kernel.h>
65#include <sys/linker.h>
66#include <sys/malloc.h>
67#include <sys/proc.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/mbuf.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
a722be49 77#include <sys/upcall.h>
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78
79#include <vm/vm.h>
80#include <vm/vm_param.h>
81#include <sys/lock.h>
82#include <vm/vm_kern.h>
83#include <vm/vm_object.h>
84#include <vm/vm_page.h>
85#include <vm/vm_map.h>
86#include <vm/vm_pager.h>
87#include <vm/vm_extern.h>
88
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89#include <sys/thread2.h>
90
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91#include <sys/user.h>
92#include <sys/exec.h>
93#include <sys/cons.h>
94
95#include <ddb/ddb.h>
96
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97#include <machine/cpu.h>
98#include <machine/reg.h>
99#include <machine/clock.h>
100#include <machine/specialreg.h>
101#include <machine/bootinfo.h>
102#include <machine/ipl.h>
103#include <machine/md_var.h>
104#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 105#include <machine/globaldata.h> /* CPU_prvspace */
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106#ifdef SMP
107#include <machine/smp.h>
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108#endif
109#ifdef PERFMON
110#include <machine/perfmon.h>
111#endif
112#include <machine/cputypes.h>
113
114#ifdef OLD_BUS_ARCH
1f2de5d4 115#include <bus/isa/i386/isa_device.h>
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116#endif
117#include <i386/isa/intr_machdep.h>
1f2de5d4 118#include <bus/isa/rtc.h>
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119#include <machine/vm86.h>
120#include <sys/random.h>
121#include <sys/ptrace.h>
122#include <machine/sigframe.h>
123
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124extern void init386 (int first);
125extern void dblfault_handler (void);
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126
127extern void printcpuinfo(void); /* XXX header file */
128extern void finishidentcpu(void);
129extern void panicifcpuunsupported(void);
130extern void initializecpu(void);
131
3ae0cd58 132static void cpu_startup (void *);
642a6e88 133#ifndef CPU_DISABLE_SSE
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134static void set_fpregs_xmm (struct save87 *, struct savexmm *);
135static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 136#endif /* CPU_DISABLE_SSE */
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137#ifdef DIRECTIO
138extern void ffs_rawread_setup(void);
139#endif /* DIRECTIO */
8a8d5d85 140static void init_locks(void);
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141
142SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143
144static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
145
146int _udatasel, _ucodesel;
147u_int atdevbase;
148
149#if defined(SWTCH_OPTIM_STATS)
150extern int swtch_optim_stats;
151SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
152 CTLFLAG_RD, &swtch_optim_stats, 0, "");
153SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
154 CTLFLAG_RD, &tlb_flush_count, 0, "");
155#endif
156
157#ifdef PC98
158static int ispc98 = 1;
159#else
160static int ispc98 = 0;
161#endif
162SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
163
164int physmem = 0;
165int cold = 1;
166
167static int
168sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
169{
170 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
171 return (error);
172}
173
174SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
175 0, 0, sysctl_hw_physmem, "IU", "");
176
177static int
178sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
179{
180 int error = sysctl_handle_int(oidp, 0,
12e4aaff 181 ctob(physmem - vmstats.v_wire_count), req);
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182 return (error);
183}
184
185SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
186 0, 0, sysctl_hw_usermem, "IU", "");
187
188static int
189sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
190{
191 int error = sysctl_handle_int(oidp, 0,
192 i386_btop(avail_end - avail_start), req);
193 return (error);
194}
195
196SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
197 0, 0, sysctl_hw_availpages, "I", "");
198
199static int
200sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
201{
202 int error;
203
204 /* Unwind the buffer, so that it's linear (possibly starting with
205 * some initial nulls).
206 */
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
208 msgbufp->msg_size-msgbufp->msg_bufr,req);
209 if(error) return(error);
210 if(msgbufp->msg_bufr>0) {
211 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
212 msgbufp->msg_bufr,req);
213 }
214 return(error);
215}
216
217SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
218 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
219
220static int msgbuf_clear;
221
222static int
223sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
224{
225 int error;
226 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
227 req);
228 if (!error && req->newptr) {
229 /* Clear the buffer and reset write pointer */
230 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
231 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
232 msgbuf_clear=0;
233 }
234 return (error);
235}
236
237SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
238 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
239 "Clear kernel message buffer");
240
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241int bootverbose = 0;
242vm_paddr_t Maxmem = 0;
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243long dumplo;
244
6ef943a3 245vm_paddr_t phys_avail[10];
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246
247/* must be 2 less so 0 0 can signal end of chunks */
248#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
249
250static vm_offset_t buffer_sva, buffer_eva;
251vm_offset_t clean_sva, clean_eva;
252static vm_offset_t pager_sva, pager_eva;
253static struct trapframe proc0_tf;
254
255static void
256cpu_startup(dummy)
257 void *dummy;
258{
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259 unsigned i;
260 caddr_t v;
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261 vm_offset_t maxaddr;
262 vm_size_t size = 0;
263 int firstaddr;
264 vm_offset_t minaddr;
265
266 if (boothowto & RB_VERBOSE)
267 bootverbose++;
268
269 /*
270 * Good {morning,afternoon,evening,night}.
271 */
272 printf("%s", version);
273 startrtclock();
274 printcpuinfo();
275 panicifcpuunsupported();
276#ifdef PERFMON
277 perfmon_init();
278#endif
6ef943a3 279 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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280 /*
281 * Display any holes after the first chunk of extended memory.
282 */
283 if (bootverbose) {
284 int indx;
285
286 printf("Physical memory chunk(s):\n");
287 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 288 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 289
6ef943a3 290 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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291 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
292 size1 / PAGE_SIZE);
293 }
294 }
295
296 /*
297 * Calculate callout wheel size
298 */
299 for (callwheelsize = 1, callwheelbits = 0;
300 callwheelsize < ncallout;
301 callwheelsize <<= 1, ++callwheelbits)
302 ;
303 callwheelmask = callwheelsize - 1;
304
305 /*
306 * Allocate space for system data structures.
307 * The first available kernel virtual address is in "v".
308 * As pages of kernel virtual memory are allocated, "v" is incremented.
309 * As pages of memory are allocated and cleared,
310 * "firstaddr" is incremented.
311 * An index into the kernel page table corresponding to the
312 * virtual memory address maintained in "v" is kept in "mapaddr".
313 */
314
315 /*
316 * Make two passes. The first pass calculates how much memory is
317 * needed and allocates it. The second pass assigns virtual
318 * addresses to the various data structures.
319 */
320 firstaddr = 0;
321again:
322 v = (caddr_t)firstaddr;
323
324#define valloc(name, type, num) \
325 (name) = (type *)v; v = (caddr_t)((name)+(num))
326#define valloclim(name, type, num, lim) \
327 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
328
329 valloc(callout, struct callout, ncallout);
330 valloc(callwheel, struct callout_tailq, callwheelsize);
331
332 /*
333 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
334 * For the first 64MB of ram nominally allocate sufficient buffers to
335 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
336 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
337 * the buffer cache we limit the eventual kva reservation to
338 * maxbcache bytes.
339 *
340 * factor represents the 1/4 x ram conversion.
341 */
342 if (nbuf == 0) {
343 int factor = 4 * BKVASIZE / 1024;
344 int kbytes = physmem * (PAGE_SIZE / 1024);
345
346 nbuf = 50;
347 if (kbytes > 4096)
348 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
349 if (kbytes > 65536)
350 nbuf += (kbytes - 65536) * 2 / (factor * 5);
351 if (maxbcache && nbuf > maxbcache / BKVASIZE)
352 nbuf = maxbcache / BKVASIZE;
353 }
354
355 /*
356 * Do not allow the buffer_map to be more then 1/2 the size of the
357 * kernel_map.
358 */
359 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
360 (BKVASIZE * 2)) {
361 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
362 (BKVASIZE * 2);
363 printf("Warning: nbufs capped at %d\n", nbuf);
364 }
365
366 nswbuf = max(min(nbuf/4, 256), 16);
367#ifdef NSWBUF_MIN
368 if (nswbuf < NSWBUF_MIN)
369 nswbuf = NSWBUF_MIN;
370#endif
371#ifdef DIRECTIO
372 ffs_rawread_setup();
373#endif
374
375 valloc(swbuf, struct buf, nswbuf);
376 valloc(buf, struct buf, nbuf);
377 v = bufhashinit(v);
378
379 /*
380 * End of first pass, size has been calculated so allocate memory
381 */
382 if (firstaddr == 0) {
383 size = (vm_size_t)(v - firstaddr);
384 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
385 if (firstaddr == 0)
386 panic("startup: no room for tables");
387 goto again;
388 }
389
390 /*
391 * End of second pass, addresses have been assigned
392 */
393 if ((vm_size_t)(v - firstaddr) != size)
394 panic("startup: table size inconsistency");
395
396 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
397 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
398 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
399 (nbuf*BKVASIZE));
400 buffer_map->system_map = 1;
401 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
402 (nswbuf*MAXPHYS) + pager_map_size);
403 pager_map->system_map = 1;
404 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
405 (16*(ARG_MAX+(PAGE_SIZE*3))));
406
407 /*
408 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
409 * we use the more space efficient malloc in place of kmem_alloc.
410 */
411 {
412 vm_offset_t mb_map_size;
413
414 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
415 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
416 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
417 bzero(mclrefcnt, mb_map_size / MCLBYTES);
ce634264 418 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
03aa8d99 419 &maxaddr, mb_map_size);
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420 mb_map->system_map = 1;
421 }
422
423 /*
424 * Initialize callouts
425 */
426 SLIST_INIT(&callfree);
427 for (i = 0; i < ncallout; i++) {
428 callout_init(&callout[i]);
429 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
430 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
431 }
432
433 for (i = 0; i < callwheelsize; i++) {
434 TAILQ_INIT(&callwheel[i]);
435 }
436
437#if defined(USERCONFIG)
438 userconfig();
439 cninit(); /* the preferred console may have changed */
440#endif
441
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442 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
443 ptoa(vmstats.v_free_count) / 1024);
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444
445 /*
446 * Set up buffers, so they can be used to read disk labels.
447 */
448 bufinit();
449 vm_pager_bufferinit();
450
451#ifdef SMP
452 /*
453 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
454 */
455 mp_start(); /* fire up the APs and APICs */
456 mp_announce();
457#endif /* SMP */
458 cpu_setregs();
459}
460
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461/*
462 * Send an interrupt to process.
463 *
464 * Stack is set up to allow sigcode stored
465 * at top to call routine, followed by kcall
466 * to sigreturn routine below. After sigreturn
467 * resets the signal mask, the stack, and the
468 * frame pointer, it returns to the user
469 * specified pc, psl.
470 */
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471void
472sendsig(catcher, sig, mask, code)
473 sig_t catcher;
474 int sig;
475 sigset_t *mask;
476 u_long code;
477{
478 struct proc *p = curproc;
479 struct trapframe *regs;
480 struct sigacts *psp = p->p_sigacts;
481 struct sigframe sf, *sfp;
482 int oonstack;
483
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484 regs = p->p_md.md_regs;
485 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
486
487 /* save user context */
488 bzero(&sf, sizeof(struct sigframe));
489 sf.sf_uc.uc_sigmask = *mask;
490 sf.sf_uc.uc_stack = p->p_sigstk;
491 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
492 sf.sf_uc.uc_mcontext.mc_gs = rgs();
493 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
494
495 /* Allocate and validate space for the signal handler context. */
496 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
497 SIGISMEMBER(psp->ps_sigonstack, sig)) {
498 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
499 p->p_sigstk.ss_size - sizeof(struct sigframe));
500 p->p_sigstk.ss_flags |= SS_ONSTACK;
501 }
502 else
503 sfp = (struct sigframe *)regs->tf_esp - 1;
504
505 /* Translate the signal is appropriate */
506 if (p->p_sysent->sv_sigtbl) {
507 if (sig <= p->p_sysent->sv_sigsize)
508 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
509 }
510
511 /* Build the argument list for the signal handler. */
512 sf.sf_signum = sig;
513 sf.sf_ucontext = (register_t)&sfp->sf_uc;
514 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
515 /* Signal handler installed with SA_SIGINFO. */
516 sf.sf_siginfo = (register_t)&sfp->sf_si;
517 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
518
519 /* fill siginfo structure */
520 sf.sf_si.si_signo = sig;
521 sf.sf_si.si_code = code;
522 sf.sf_si.si_addr = (void*)regs->tf_err;
523 }
524 else {
525 /* Old FreeBSD-style arguments. */
526 sf.sf_siginfo = code;
527 sf.sf_addr = regs->tf_err;
528 sf.sf_ahu.sf_handler = catcher;
529 }
530
531 /*
532 * If we're a vm86 process, we want to save the segment registers.
533 * We also change eflags to be our emulated eflags, not the actual
534 * eflags.
535 */
536 if (regs->tf_eflags & PSL_VM) {
537 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 538 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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539
540 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
541 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
542 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
543 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
544
545 if (vm86->vm86_has_vme == 0)
546 sf.sf_uc.uc_mcontext.mc_eflags =
547 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
548 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
549
550 /*
551 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
552 * syscalls made by the signal handler. This just avoids
553 * wasting time for our lazy fixup of such faults. PSL_NT
554 * does nothing in vm86 mode, but vm86 programs can set it
555 * almost legitimately in probes for old cpu types.
556 */
557 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
558 }
559
560 /*
561 * Copy the sigframe out to the user's stack.
562 */
563 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
564 /*
565 * Something is wrong with the stack pointer.
566 * ...Kill the process.
567 */
568 sigexit(p, SIGILL);
569 }
570
571 regs->tf_esp = (int)sfp;
572 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
573 regs->tf_eflags &= ~PSL_T;
574 regs->tf_cs = _ucodesel;
575 regs->tf_ds = _udatasel;
576 regs->tf_es = _udatasel;
577 regs->tf_fs = _udatasel;
578 load_gs(_udatasel);
579 regs->tf_ss = _udatasel;
580}
581
582/*
65957d54 583 * sigreturn(ucontext_t *sigcntxp)
41c20dac 584 *
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585 * System call to cleanup state after a signal
586 * has been taken. Reset signal mask and
587 * stack state from context left by sendsig (above).
588 * Return to previous pc and psl as specified by
589 * context left by sendsig. Check carefully to
590 * make sure that the user has not modified the
591 * state to gain improper privileges.
592 */
593#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
594#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
595
984263bc 596int
41c20dac 597sigreturn(struct sigreturn_args *uap)
984263bc 598{
41c20dac 599 struct proc *p = curproc;
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600 struct trapframe *regs;
601 ucontext_t *ucp;
602 int cs, eflags;
603
604 ucp = uap->sigcntxp;
605
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606 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
607 return (EFAULT);
608
609 regs = p->p_md.md_regs;
610 eflags = ucp->uc_mcontext.mc_eflags;
611
612 if (eflags & PSL_VM) {
613 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
614 struct vm86_kernel *vm86;
615
616 /*
617 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
618 * set up the vm86 area, and we can't enter vm86 mode.
619 */
b7c628e4 620 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 621 return (EINVAL);
b7c628e4 622 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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623 if (vm86->vm86_inited == 0)
624 return (EINVAL);
625
626 /* go back to user mode if both flags are set */
627 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
628 trapsignal(p, SIGBUS, 0);
629
630 if (vm86->vm86_has_vme) {
631 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
632 (eflags & VME_USERCHANGE) | PSL_VM;
633 } else {
634 vm86->vm86_eflags = eflags; /* save VIF, VIP */
635 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
636 }
637 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
638 tf->tf_eflags = eflags;
639 tf->tf_vm86_ds = tf->tf_ds;
640 tf->tf_vm86_es = tf->tf_es;
641 tf->tf_vm86_fs = tf->tf_fs;
642 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
643 tf->tf_ds = _udatasel;
644 tf->tf_es = _udatasel;
645 tf->tf_fs = _udatasel;
646 } else {
647 /*
648 * Don't allow users to change privileged or reserved flags.
649 */
650 /*
651 * XXX do allow users to change the privileged flag PSL_RF.
652 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
653 * should sometimes set it there too. tf_eflags is kept in
654 * the signal context during signal handling and there is no
655 * other place to remember it, so the PSL_RF bit may be
656 * corrupted by the signal handler without us knowing.
657 * Corruption of the PSL_RF bit at worst causes one more or
658 * one less debugger trap, so allowing it is fairly harmless.
659 */
660 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
661 printf("sigreturn: eflags = 0x%x\n", eflags);
662 return(EINVAL);
663 }
664
665 /*
666 * Don't allow users to load a valid privileged %cs. Let the
667 * hardware check for invalid selectors, excess privilege in
668 * other selectors, invalid %eip's and invalid %esp's.
669 */
670 cs = ucp->uc_mcontext.mc_cs;
671 if (!CS_SECURE(cs)) {
672 printf("sigreturn: cs = 0x%x\n", cs);
673 trapsignal(p, SIGBUS, T_PROTFLT);
674 return(EINVAL);
675 }
676 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
677 }
678
679 if (ucp->uc_mcontext.mc_onstack & 1)
680 p->p_sigstk.ss_flags |= SS_ONSTACK;
681 else
682 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
683
684 p->p_sigmask = ucp->uc_sigmask;
685 SIG_CANTMASK(p->p_sigmask);
686 return(EJUSTRETURN);
687}
688
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689/*
690 * Stack frame on entry to function. %eax will contain the function vector,
691 * %ecx will contain the function data. flags, ecx, and eax will have
692 * already been pushed on the stack.
693 */
694struct upc_frame {
695 register_t eax;
696 register_t ecx;
697 register_t flags;
698 register_t oldip;
699};
700
701void
702sendupcall(struct vmupcall *vu, int morepending)
703{
704 struct proc *p = curproc;
705 struct trapframe *regs;
706 struct upcall upcall;
707 struct upc_frame upc_frame;
708
709 /*
710 * Get the upcall data structure
711 */
712 if (copyin(p->p_upcall, &upcall, sizeof(upcall))) {
713 vu->vu_pending = 0;
714 printf("bad upcall address\n");
715 return;
716 }
717
718 /*
719 * If the data structure is already marked pending or has a critical
720 * section count, mark the data structure as pending and return
721 * without doing an upcall. vu_pending is left set.
722 */
723 if (upcall.pending || upcall.crit_count) {
724 if (upcall.pending == 0) {
725 upcall.pending = 1;
726 copyout(&upcall.pending, &p->p_upcall->pending,
727 sizeof(upcall.pending));
728 }
729 return;
730 }
731
732 /*
733 * We can run this upcall now, clear vu_pending.
734 *
735 * Bump our critical section count and set or clear the
736 * user pending flag depending on whether more upcalls are
737 * pending. The user will be responsible for calling
738 * upc_dispatch(-1) to process remaining upcalls.
739 */
740 vu->vu_pending = 0;
741 upcall.pending = morepending;
742 upcall.crit_count += TDPRI_CRIT;
743 copyout(&upcall, p->p_upcall, sizeof(upcall));
744
745 /*
746 * Construct a stack frame and issue the upcall
747 */
748 regs = p->p_md.md_regs;
749 upc_frame.eax = regs->tf_eax;
750 upc_frame.ecx = regs->tf_ecx;
751 upc_frame.flags = regs->tf_eflags;
752 upc_frame.oldip = regs->tf_eip;
753 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
754 sizeof(upc_frame)) != 0) {
755 printf("bad stack on upcall\n");
756 } else {
757 regs->tf_eax = (register_t)vu->vu_func;
758 regs->tf_ecx = (register_t)vu->vu_data;
759 regs->tf_eip = (register_t)vu->vu_ctx;
760 regs->tf_esp -= sizeof(upc_frame);
761 }
762}
763
764/*
765 * fetchupcall occurs in the context of a system call, which means that
766 * regs->tf_eax and regs->tf_edx are overritten by res[0] and res[1].
767 *
768 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
769 * and the function pointer in %eax.
770 */
771int
772fetchupcall (struct vmupcall *vu, int morepending, int *res, void *rsp)
773{
774 struct upc_frame upc_frame;
775 struct proc *p;
776 struct trapframe *regs;
777 int error;
778
779 p = curproc;
780 regs = p->p_md.md_regs;
781
782 error = copyout(&morepending, &p->p_upcall->pending, sizeof(int));
783 if (error == 0) {
784 if (vu) {
785 /*
786 * This jumps us to the next ready context.
787 */
788 vu->vu_pending = 0;
789 error = copyin(&p->p_upcall->crit_count, &morepending, sizeof(int));
790 morepending += TDPRI_CRIT;
791 if (error == 0)
792 error = copyout(&morepending, &p->p_upcall->crit_count, sizeof(int));
793 regs->tf_eax = (register_t)vu->vu_func;
794 regs->tf_ecx = (register_t)vu->vu_data;
795 regs->tf_eip = (register_t)vu->vu_ctx;
796 regs->tf_esp = (register_t)rsp;
797 } else {
798 /*
799 * This returns us to the originally interrupted code.
800 */
801 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
802 regs->tf_eax = upc_frame.eax;
803 regs->tf_ecx = upc_frame.ecx;
804 regs->tf_eflags = upc_frame.flags;
805 regs->tf_eip = upc_frame.oldip;
806 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
807 }
808 }
809 if (error == 0)
810 error = EJUSTRETURN;
811 return(error);
812}
813
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814/*
815 * Machine dependent boot() routine
816 *
817 * I haven't seen anything to put here yet
818 * Possibly some stuff might be grafted back here from boot()
819 */
820void
821cpu_boot(int howto)
822{
823}
824
825/*
826 * Shutdown the CPU as much as possible
827 */
828void
829cpu_halt(void)
830{
831 for (;;)
832 __asm__ ("hlt");
833}
834
835/*
8ad65e08
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836 * cpu_idle() represents the idle LWKT. You cannot return from this function
837 * (unless you want to blow things up!). Instead we look for runnable threads
838 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 839 *
26a0694b 840 * The main loop is entered with a critical section held, we must release
a2a5ad0d
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841 * the critical section before doing anything else. lwkt_switch() will
842 * check for pending interrupts due to entering and exiting its own
843 * critical section.
26a0694b 844 *
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845 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
846 * to wake a HLTed cpu up. However, there are cases where the idlethread
847 * will be entered with the possibility that no IPI will occur and in such
848 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 849 */
96728c05 850static int cpu_idle_hlt = 1;
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851SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
852 &cpu_idle_hlt, 0, "Idle loop HLT enable");
853
854void
855cpu_idle(void)
856{
a2a5ad0d
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857 struct thread *td = curthread;
858
26a0694b 859 crit_exit();
a2a5ad0d 860 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 861 for (;;) {
a2a5ad0d
MD
862 /*
863 * See if there are any LWKTs ready to go.
864 */
8ad65e08 865 lwkt_switch();
a2a5ad0d
MD
866
867 /*
868 * If we are going to halt call splz unconditionally after
869 * CLIing to catch any interrupt races. Note that we are
870 * at SPL0 and interrupts are enabled.
871 */
872 if (cpu_idle_hlt && !lwkt_runnable() &&
873 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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874 /*
875 * We must guarentee that hlt is exactly the instruction
876 * following the sti.
877 */
a2a5ad0d
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878 __asm __volatile("cli");
879 splz();
8ad65e08
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880 __asm __volatile("sti; hlt");
881 } else {
a2a5ad0d 882 td->td_flags &= ~TDF_IDLE_NOHLT;
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883 __asm __volatile("sti");
884 }
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MD
885 }
886}
887
888/*
889 * Clear registers on exec
890 */
891void
892setregs(p, entry, stack, ps_strings)
893 struct proc *p;
894 u_long entry;
895 u_long stack;
896 u_long ps_strings;
897{
898 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 899 struct pcb *pcb = p->p_thread->td_pcb;
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900
901 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
902 pcb->pcb_gs = _udatasel;
903 load_gs(_udatasel);
904
905#ifdef USER_LDT
906 /* was i386_user_cleanup() in NetBSD */
907 user_ldt_free(pcb);
908#endif
909
910 bzero((char *)regs, sizeof(struct trapframe));
911 regs->tf_eip = entry;
912 regs->tf_esp = stack;
913 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
914 regs->tf_ss = _udatasel;
915 regs->tf_ds = _udatasel;
916 regs->tf_es = _udatasel;
917 regs->tf_fs = _udatasel;
918 regs->tf_cs = _ucodesel;
919
920 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
921 regs->tf_ebx = ps_strings;
922
923 /*
924 * Reset the hardware debug registers if they were in use.
925 * They won't have any meaning for the newly exec'd process.
926 */
927 if (pcb->pcb_flags & PCB_DBREGS) {
928 pcb->pcb_dr0 = 0;
929 pcb->pcb_dr1 = 0;
930 pcb->pcb_dr2 = 0;
931 pcb->pcb_dr3 = 0;
932 pcb->pcb_dr6 = 0;
933 pcb->pcb_dr7 = 0;
b7c628e4 934 if (pcb == curthread->td_pcb) {
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MD
935 /*
936 * Clear the debug registers on the running
937 * CPU, otherwise they will end up affecting
938 * the next process we switch to.
939 */
940 reset_dbregs();
941 }
942 pcb->pcb_flags &= ~PCB_DBREGS;
943 }
944
945 /*
946 * Initialize the math emulator (if any) for the current process.
947 * Actually, just clear the bit that says that the emulator has
948 * been initialized. Initialization is delayed until the process
949 * traps to the emulator (if it is done at all) mainly because
950 * emulators don't provide an entry point for initialization.
951 */
b7c628e4 952 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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MD
953
954 /*
955 * Arrange to trap the next npx or `fwait' instruction (see npx.c
956 * for why fwait must be trapped at least if there is an npx or an
957 * emulator). This is mainly to handle the case where npx0 is not
958 * configured, since the npx routines normally set up the trap
959 * otherwise. It should be done only at boot time, but doing it
960 * here allows modifying `npx_exists' for testing the emulator on
961 * systems with an npx.
962 */
963 load_cr0(rcr0() | CR0_MP | CR0_TS);
964
965#if NNPX > 0
966 /* Initialize the npx (if any) for the current process. */
967 npxinit(__INITIAL_NPXCW__);
968#endif
969
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970 /*
971 * note: linux emulator needs edx to be 0x0 on entry, which is
c0510e9a
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972 * handled in execve simply by setting the 64 bit syscall
973 * return value to 0.
90b9818c 974 */
984263bc
MD
975}
976
977void
978cpu_setregs(void)
979{
980 unsigned int cr0;
981
982 cr0 = rcr0();
983 cr0 |= CR0_NE; /* Done by npxinit() */
984 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
985#ifdef I386_CPU
986 if (cpu_class != CPUCLASS_386)
987#endif
988 cr0 |= CR0_WP | CR0_AM;
989 load_cr0(cr0);
990 load_gs(_udatasel);
991}
992
993static int
994sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
995{
996 int error;
997 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
998 req);
999 if (!error && req->newptr)
1000 resettodr();
1001 return (error);
1002}
1003
1004SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1005 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1006
1007SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1008 CTLFLAG_RW, &disable_rtc_set, 0, "");
1009
1010SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1011 CTLFLAG_RD, &bootinfo, bootinfo, "");
1012
1013SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1014 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1015
1016extern u_long bootdev; /* not a dev_t - encoding is different */
1017SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1018 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1019
1020/*
1021 * Initialize 386 and configure to run kernel
1022 */
1023
1024/*
1025 * Initialize segments & interrupt table
1026 */
1027
1028int _default_ldt;
1029union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1030static struct gate_descriptor idt0[NIDT];
1031struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1032union descriptor ldt[NLDT]; /* local descriptor table */
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MD
1033
1034/* table descriptors - used to load tables by cpu */
984263bc 1035struct region_descriptor r_gdt, r_idt;
984263bc 1036
984263bc
MD
1037#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1038extern int has_f00f_bug;
1039#endif
1040
1041static struct i386tss dblfault_tss;
1042static char dblfault_stack[PAGE_SIZE];
1043
1044extern struct user *proc0paddr;
1045
1046
1047/* software prototypes -- in more palatable form */
1048struct soft_segment_descriptor gdt_segs[] = {
1049/* GNULL_SEL 0 Null Descriptor */
1050{ 0x0, /* segment base address */
1051 0x0, /* length */
1052 0, /* segment type */
1053 0, /* segment descriptor priority level */
1054 0, /* segment descriptor present */
1055 0, 0,
1056 0, /* default 32 vs 16 bit size */
1057 0 /* limit granularity (byte/page units)*/ },
1058/* GCODE_SEL 1 Code Descriptor for kernel */
1059{ 0x0, /* segment base address */
1060 0xfffff, /* length - all address space */
1061 SDT_MEMERA, /* segment type */
1062 0, /* segment descriptor priority level */
1063 1, /* segment descriptor present */
1064 0, 0,
1065 1, /* default 32 vs 16 bit size */
1066 1 /* limit granularity (byte/page units)*/ },
1067/* GDATA_SEL 2 Data Descriptor for kernel */
1068{ 0x0, /* segment base address */
1069 0xfffff, /* length - all address space */
1070 SDT_MEMRWA, /* segment type */
1071 0, /* segment descriptor priority level */
1072 1, /* segment descriptor present */
1073 0, 0,
1074 1, /* default 32 vs 16 bit size */
1075 1 /* limit granularity (byte/page units)*/ },
1076/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1077{ 0x0, /* segment base address */
1078 0xfffff, /* length - all address space */
1079 SDT_MEMRWA, /* segment type */
1080 0, /* segment descriptor priority level */
1081 1, /* segment descriptor present */
1082 0, 0,
1083 1, /* default 32 vs 16 bit size */
1084 1 /* limit granularity (byte/page units)*/ },
1085/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1086{
1087 0x0, /* segment base address */
1088 sizeof(struct i386tss)-1,/* length - all address space */
1089 SDT_SYS386TSS, /* segment type */
1090 0, /* segment descriptor priority level */
1091 1, /* segment descriptor present */
1092 0, 0,
1093 0, /* unused - default 32 vs 16 bit size */
1094 0 /* limit granularity (byte/page units)*/ },
1095/* GLDT_SEL 5 LDT Descriptor */
1096{ (int) ldt, /* segment base address */
1097 sizeof(ldt)-1, /* length - all address space */
1098 SDT_SYSLDT, /* segment type */
1099 SEL_UPL, /* segment descriptor priority level */
1100 1, /* segment descriptor present */
1101 0, 0,
1102 0, /* unused - default 32 vs 16 bit size */
1103 0 /* limit granularity (byte/page units)*/ },
1104/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1105{ (int) ldt, /* segment base address */
1106 (512 * sizeof(union descriptor)-1), /* length */
1107 SDT_SYSLDT, /* segment type */
1108 0, /* segment descriptor priority level */
1109 1, /* segment descriptor present */
1110 0, 0,
1111 0, /* unused - default 32 vs 16 bit size */
1112 0 /* limit granularity (byte/page units)*/ },
1113/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1114{ 0x0, /* segment base address */
1115 0x0, /* length - all address space */
1116 0, /* segment type */
1117 0, /* segment descriptor priority level */
1118 0, /* segment descriptor present */
1119 0, 0,
1120 0, /* default 32 vs 16 bit size */
1121 0 /* limit granularity (byte/page units)*/ },
1122/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1123{ 0x400, /* segment base address */
1124 0xfffff, /* length */
1125 SDT_MEMRWA, /* segment type */
1126 0, /* segment descriptor priority level */
1127 1, /* segment descriptor present */
1128 0, 0,
1129 1, /* default 32 vs 16 bit size */
1130 1 /* limit granularity (byte/page units)*/ },
1131/* GPANIC_SEL 9 Panic Tss Descriptor */
1132{ (int) &dblfault_tss, /* segment base address */
1133 sizeof(struct i386tss)-1,/* length - all address space */
1134 SDT_SYS386TSS, /* segment type */
1135 0, /* segment descriptor priority level */
1136 1, /* segment descriptor present */
1137 0, 0,
1138 0, /* unused - default 32 vs 16 bit size */
1139 0 /* limit granularity (byte/page units)*/ },
1140/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1141{ 0, /* segment base address (overwritten) */
1142 0xfffff, /* length */
1143 SDT_MEMERA, /* segment type */
1144 0, /* segment descriptor priority level */
1145 1, /* segment descriptor present */
1146 0, 0,
1147 0, /* default 32 vs 16 bit size */
1148 1 /* limit granularity (byte/page units)*/ },
1149/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1150{ 0, /* segment base address (overwritten) */
1151 0xfffff, /* length */
1152 SDT_MEMERA, /* segment type */
1153 0, /* segment descriptor priority level */
1154 1, /* segment descriptor present */
1155 0, 0,
1156 0, /* default 32 vs 16 bit size */
1157 1 /* limit granularity (byte/page units)*/ },
1158/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1159{ 0, /* segment base address (overwritten) */
1160 0xfffff, /* length */
1161 SDT_MEMRWA, /* segment type */
1162 0, /* segment descriptor priority level */
1163 1, /* segment descriptor present */
1164 0, 0,
1165 1, /* default 32 vs 16 bit size */
1166 1 /* limit granularity (byte/page units)*/ },
1167/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1168{ 0, /* segment base address (overwritten) */
1169 0xfffff, /* length */
1170 SDT_MEMRWA, /* segment type */
1171 0, /* segment descriptor priority level */
1172 1, /* segment descriptor present */
1173 0, 0,
1174 0, /* default 32 vs 16 bit size */
1175 1 /* limit granularity (byte/page units)*/ },
1176/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1177{ 0, /* segment base address (overwritten) */
1178 0xfffff, /* length */
1179 SDT_MEMRWA, /* segment type */
1180 0, /* segment descriptor priority level */
1181 1, /* segment descriptor present */
1182 0, 0,
1183 0, /* default 32 vs 16 bit size */
1184 1 /* limit granularity (byte/page units)*/ },
1185};
1186
1187static struct soft_segment_descriptor ldt_segs[] = {
1188 /* Null Descriptor - overwritten by call gate */
1189{ 0x0, /* segment base address */
1190 0x0, /* length - all address space */
1191 0, /* segment type */
1192 0, /* segment descriptor priority level */
1193 0, /* segment descriptor present */
1194 0, 0,
1195 0, /* default 32 vs 16 bit size */
1196 0 /* limit granularity (byte/page units)*/ },
1197 /* Null Descriptor - overwritten by call gate */
1198{ 0x0, /* segment base address */
1199 0x0, /* length - all address space */
1200 0, /* segment type */
1201 0, /* segment descriptor priority level */
1202 0, /* segment descriptor present */
1203 0, 0,
1204 0, /* default 32 vs 16 bit size */
1205 0 /* limit granularity (byte/page units)*/ },
1206 /* Null Descriptor - overwritten by call gate */
1207{ 0x0, /* segment base address */
1208 0x0, /* length - all address space */
1209 0, /* segment type */
1210 0, /* segment descriptor priority level */
1211 0, /* segment descriptor present */
1212 0, 0,
1213 0, /* default 32 vs 16 bit size */
1214 0 /* limit granularity (byte/page units)*/ },
1215 /* Code Descriptor for user */
1216{ 0x0, /* segment base address */
1217 0xfffff, /* length - all address space */
1218 SDT_MEMERA, /* segment type */
1219 SEL_UPL, /* segment descriptor priority level */
1220 1, /* segment descriptor present */
1221 0, 0,
1222 1, /* default 32 vs 16 bit size */
1223 1 /* limit granularity (byte/page units)*/ },
1224 /* Null Descriptor - overwritten by call gate */
1225{ 0x0, /* segment base address */
1226 0x0, /* length - all address space */
1227 0, /* segment type */
1228 0, /* segment descriptor priority level */
1229 0, /* segment descriptor present */
1230 0, 0,
1231 0, /* default 32 vs 16 bit size */
1232 0 /* limit granularity (byte/page units)*/ },
1233 /* Data Descriptor for user */
1234{ 0x0, /* segment base address */
1235 0xfffff, /* length - all address space */
1236 SDT_MEMRWA, /* segment type */
1237 SEL_UPL, /* segment descriptor priority level */
1238 1, /* segment descriptor present */
1239 0, 0,
1240 1, /* default 32 vs 16 bit size */
1241 1 /* limit granularity (byte/page units)*/ },
1242};
1243
1244void
1245setidt(idx, func, typ, dpl, selec)
1246 int idx;
1247 inthand_t *func;
1248 int typ;
1249 int dpl;
1250 int selec;
1251{
1252 struct gate_descriptor *ip;
1253
1254 ip = idt + idx;
1255 ip->gd_looffset = (int)func;
1256 ip->gd_selector = selec;
1257 ip->gd_stkcpy = 0;
1258 ip->gd_xx = 0;
1259 ip->gd_type = typ;
1260 ip->gd_dpl = dpl;
1261 ip->gd_p = 1;
1262 ip->gd_hioffset = ((int)func)>>16 ;
1263}
1264
1265#define IDTVEC(name) __CONCAT(X,name)
1266
1267extern inthand_t
1268 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1269 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1270 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1271 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1272 IDTVEC(xmm), IDTVEC(syscall),
1273 IDTVEC(rsvd0);
a64ba182
MD
1274extern inthand_t
1275 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1276
f7bc9806
MD
1277#ifdef DEBUG_INTERRUPTS
1278extern inthand_t *Xrsvdary[256];
1279#endif
1280
984263bc
MD
1281void
1282sdtossd(sd, ssd)
1283 struct segment_descriptor *sd;
1284 struct soft_segment_descriptor *ssd;
1285{
1286 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1287 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1288 ssd->ssd_type = sd->sd_type;
1289 ssd->ssd_dpl = sd->sd_dpl;
1290 ssd->ssd_p = sd->sd_p;
1291 ssd->ssd_def32 = sd->sd_def32;
1292 ssd->ssd_gran = sd->sd_gran;
1293}
1294
1295#define PHYSMAP_SIZE (2 * 8)
1296
1297/*
1298 * Populate the (physmap) array with base/bound pairs describing the
1299 * available physical memory in the system, then test this memory and
1300 * build the phys_avail array describing the actually-available memory.
1301 *
1302 * If we cannot accurately determine the physical memory map, then use
1303 * value from the 0xE801 call, and failing that, the RTC.
1304 *
1305 * Total memory size may be set by the kernel environment variable
1306 * hw.physmem or the compile-time define MAXMEM.
1307 */
1308static void
1309getmemsize(int first)
1310{
1311 int i, physmap_idx, pa_indx;
1312 int hasbrokenint12;
1313 u_int basemem, extmem;
1314 struct vm86frame vmf;
1315 struct vm86context vmc;
1316 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1317 pt_entry_t *pte;
984263bc
MD
1318 const char *cp;
1319 struct {
1320 u_int64_t base;
1321 u_int64_t length;
1322 u_int32_t type;
1323 } *smap;
1324
1325 hasbrokenint12 = 0;
1326 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1327 bzero(&vmf, sizeof(struct vm86frame));
1328 bzero(physmap, sizeof(physmap));
1329 basemem = 0;
1330
1331 /*
1332 * Some newer BIOSes has broken INT 12H implementation which cause
1333 * kernel panic immediately. In this case, we need to scan SMAP
1334 * with INT 15:E820 first, then determine base memory size.
1335 */
1336 if (hasbrokenint12) {
1337 goto int15e820;
1338 }
1339
1340 /*
1341 * Perform "base memory" related probes & setup
1342 */
1343 vm86_intcall(0x12, &vmf);
1344 basemem = vmf.vmf_ax;
1345 if (basemem > 640) {
1346 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1347 basemem);
1348 basemem = 640;
1349 }
1350
1351 /*
1352 * XXX if biosbasemem is now < 640, there is a `hole'
1353 * between the end of base memory and the start of
1354 * ISA memory. The hole may be empty or it may
1355 * contain BIOS code or data. Map it read/write so
1356 * that the BIOS can write to it. (Memory from 0 to
1357 * the physical end of the kernel is mapped read-only
1358 * to begin with and then parts of it are remapped.
1359 * The parts that aren't remapped form holes that
1360 * remain read-only and are unused by the kernel.
1361 * The base memory area is below the physical end of
1362 * the kernel and right now forms a read-only hole.
1363 * The part of it from PAGE_SIZE to
1364 * (trunc_page(biosbasemem * 1024) - 1) will be
1365 * remapped and used by the kernel later.)
1366 *
1367 * This code is similar to the code used in
1368 * pmap_mapdev, but since no memory needs to be
1369 * allocated we simply change the mapping.
1370 */
1371 for (pa = trunc_page(basemem * 1024);
1372 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1373 pte = vtopte(pa + KERNBASE);
984263bc
MD
1374 *pte = pa | PG_RW | PG_V;
1375 }
1376
1377 /*
1378 * if basemem != 640, map pages r/w into vm86 page table so
1379 * that the bios can scribble on it.
1380 */
b5b32410 1381 pte = vm86paddr;
984263bc
MD
1382 for (i = basemem / 4; i < 160; i++)
1383 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1384
1385int15e820:
1386 /*
1387 * map page 1 R/W into the kernel page table so we can use it
1388 * as a buffer. The kernel will unmap this page later.
1389 */
b5b32410 1390 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1391 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1392
1393 /*
1394 * get memory map with INT 15:E820
1395 */
1396#define SMAPSIZ sizeof(*smap)
1397#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1398
1399 vmc.npages = 0;
1400 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1401 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1402
1403 physmap_idx = 0;
1404 vmf.vmf_ebx = 0;
1405 do {
1406 vmf.vmf_eax = 0xE820;
1407 vmf.vmf_edx = SMAP_SIG;
1408 vmf.vmf_ecx = SMAPSIZ;
1409 i = vm86_datacall(0x15, &vmf, &vmc);
1410 if (i || vmf.vmf_eax != SMAP_SIG)
1411 break;
1412 if (boothowto & RB_VERBOSE)
1413 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1414 smap->type,
1415 *(u_int32_t *)((char *)&smap->base + 4),
1416 (u_int32_t)smap->base,
1417 *(u_int32_t *)((char *)&smap->length + 4),
1418 (u_int32_t)smap->length);
1419
1420 if (smap->type != 0x01)
1421 goto next_run;
1422
1423 if (smap->length == 0)
1424 goto next_run;
1425
1426 if (smap->base >= 0xffffffff) {
1427 printf("%uK of memory above 4GB ignored\n",
1428 (u_int)(smap->length / 1024));
1429 goto next_run;
1430 }
1431
1432 for (i = 0; i <= physmap_idx; i += 2) {
1433 if (smap->base < physmap[i + 1]) {
1434 if (boothowto & RB_VERBOSE)
1435 printf(
1436 "Overlapping or non-montonic memory region, ignoring second region\n");
1437 goto next_run;
1438 }
1439 }
1440
1441 if (smap->base == physmap[physmap_idx + 1]) {
1442 physmap[physmap_idx + 1] += smap->length;
1443 goto next_run;
1444 }
1445
1446 physmap_idx += 2;
1447 if (physmap_idx == PHYSMAP_SIZE) {
1448 printf(
1449 "Too many segments in the physical address map, giving up\n");
1450 break;
1451 }
1452 physmap[physmap_idx] = smap->base;
1453 physmap[physmap_idx + 1] = smap->base + smap->length;
1454next_run:
6b08710e 1455 ; /* fix GCC3.x warning */
984263bc
MD
1456 } while (vmf.vmf_ebx != 0);
1457
1458 /*
1459 * Perform "base memory" related probes & setup based on SMAP
1460 */
1461 if (basemem == 0) {
1462 for (i = 0; i <= physmap_idx; i += 2) {
1463 if (physmap[i] == 0x00000000) {
1464 basemem = physmap[i + 1] / 1024;
1465 break;
1466 }
1467 }
1468
1469 if (basemem == 0) {
1470 basemem = 640;
1471 }
1472
1473 if (basemem > 640) {
1474 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1475 basemem);
1476 basemem = 640;
1477 }
1478
1479 for (pa = trunc_page(basemem * 1024);
1480 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1481 pte = vtopte(pa + KERNBASE);
984263bc
MD
1482 *pte = pa | PG_RW | PG_V;
1483 }
1484
b5b32410 1485 pte = vm86paddr;
984263bc
MD
1486 for (i = basemem / 4; i < 160; i++)
1487 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1488 }
1489
1490 if (physmap[1] != 0)
1491 goto physmap_done;
1492
1493 /*
1494 * If we failed above, try memory map with INT 15:E801
1495 */
1496 vmf.vmf_ax = 0xE801;
1497 if (vm86_intcall(0x15, &vmf) == 0) {
1498 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1499 } else {
1500#if 0
1501 vmf.vmf_ah = 0x88;
1502 vm86_intcall(0x15, &vmf);
1503 extmem = vmf.vmf_ax;
1504#else
1505 /*
1506 * Prefer the RTC value for extended memory.
1507 */
1508 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1509#endif
1510 }
1511
1512 /*
1513 * Special hack for chipsets that still remap the 384k hole when
1514 * there's 16MB of memory - this really confuses people that
1515 * are trying to use bus mastering ISA controllers with the
1516 * "16MB limit"; they only have 16MB, but the remapping puts
1517 * them beyond the limit.
1518 *
1519 * If extended memory is between 15-16MB (16-17MB phys address range),
1520 * chop it to 15MB.
1521 */
1522 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1523 extmem = 15 * 1024;
1524
1525 physmap[0] = 0;
1526 physmap[1] = basemem * 1024;
1527 physmap_idx = 2;
1528 physmap[physmap_idx] = 0x100000;
1529 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1530
1531physmap_done:
1532 /*
1533 * Now, physmap contains a map of physical memory.
1534 */
1535
1536#ifdef SMP
17a9f566 1537 /* make hole for AP bootstrap code YYY */
984263bc
MD
1538 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1539
1540 /* look for the MP hardware - needed for apic addresses */
1541 mp_probe();
1542#endif
1543
1544 /*
1545 * Maxmem isn't the "maximum memory", it's one larger than the
1546 * highest page of the physical address space. It should be
1547 * called something like "Maxphyspage". We may adjust this
1548 * based on ``hw.physmem'' and the results of the memory test.
1549 */
1550 Maxmem = atop(physmap[physmap_idx + 1]);
1551
1552#ifdef MAXMEM
1553 Maxmem = MAXMEM / 4;
1554#endif
1555
1556 /*
eb7d35b8 1557 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1558 * for the appropriate modifiers. This overrides MAXMEM.
1559 */
1560 if ((cp = getenv("hw.physmem")) != NULL) {
1561 u_int64_t AllowMem, sanity;
1562 char *ep;
1563
1564 sanity = AllowMem = strtouq(cp, &ep, 0);
1565 if ((ep != cp) && (*ep != 0)) {
1566 switch(*ep) {
1567 case 'g':
1568 case 'G':
1569 AllowMem <<= 10;
1570 case 'm':
1571 case 'M':
1572 AllowMem <<= 10;
1573 case 'k':
1574 case 'K':
1575 AllowMem <<= 10;
1576 break;
1577 default:
1578 AllowMem = sanity = 0;
1579 }
1580 if (AllowMem < sanity)
1581 AllowMem = 0;
1582 }
1583 if (AllowMem == 0)
1584 printf("Ignoring invalid memory size of '%s'\n", cp);
1585 else
1586 Maxmem = atop(AllowMem);
1587 }
1588
1589 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1590 (boothowto & RB_VERBOSE))
6ef943a3 1591 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1592
1593 /*
1594 * If Maxmem has been increased beyond what the system has detected,
1595 * extend the last memory segment to the new limit.
1596 */
1597 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1598 physmap[physmap_idx + 1] = ptoa(Maxmem);
1599
1600 /* call pmap initialization to make new kernel address space */
1601 pmap_bootstrap(first, 0);
1602
1603 /*
1604 * Size up each available chunk of physical memory.
1605 */
1606 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1607 pa_indx = 0;
1608 phys_avail[pa_indx++] = physmap[0];
1609 phys_avail[pa_indx] = physmap[0];
b5b32410 1610 pte = CMAP1;
984263bc
MD
1611
1612 /*
1613 * physmap is in bytes, so when converting to page boundaries,
1614 * round up the start address and round down the end address.
1615 */
1616 for (i = 0; i <= physmap_idx; i += 2) {
1617 vm_offset_t end;
1618
1619 end = ptoa(Maxmem);
1620 if (physmap[i + 1] < end)
1621 end = trunc_page(physmap[i + 1]);
1622 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1623 int tmp, page_bad;
1624#if 0
1625 int *ptr = 0;
1626#else
1627 int *ptr = (int *)CADDR1;
1628#endif
1629
1630 /*
1631 * block out kernel memory as not available.
1632 */
1633 if (pa >= 0x100000 && pa < first)
1634 continue;
1635
1636 page_bad = FALSE;
1637
1638 /*
1639 * map page into kernel: valid, read/write,non-cacheable
1640 */
1641 *pte = pa | PG_V | PG_RW | PG_N;
1642 invltlb();
1643
1644 tmp = *(int *)ptr;
1645 /*
1646 * Test for alternating 1's and 0's
1647 */
1648 *(volatile int *)ptr = 0xaaaaaaaa;
1649 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1650 page_bad = TRUE;
1651 }
1652 /*
1653 * Test for alternating 0's and 1's
1654 */
1655 *(volatile int *)ptr = 0x55555555;
1656 if (*(volatile int *)ptr != 0x55555555) {
1657 page_bad = TRUE;
1658 }
1659 /*
1660 * Test for all 1's
1661 */
1662 *(volatile int *)ptr = 0xffffffff;
1663 if (*(volatile int *)ptr != 0xffffffff) {
1664 page_bad = TRUE;
1665 }
1666 /*
1667 * Test for all 0's
1668 */
1669 *(volatile int *)ptr = 0x0;
1670 if (*(volatile int *)ptr != 0x0) {
1671 page_bad = TRUE;
1672 }
1673 /*
1674 * Restore original value.
1675 */
1676 *(int *)ptr = tmp;
1677
1678 /*
1679 * Adjust array of valid/good pages.
1680 */
1681 if (page_bad == TRUE) {
1682 continue;
1683 }
1684 /*
1685 * If this good page is a continuation of the
1686 * previous set of good pages, then just increase
1687 * the end pointer. Otherwise start a new chunk.
1688 * Note that "end" points one higher than end,
1689 * making the range >= start and < end.
1690 * If we're also doing a speculative memory
1691 * test and we at or past the end, bump up Maxmem
1692 * so that we keep going. The first bad page
1693 * will terminate the loop.
1694 */
1695 if (phys_avail[pa_indx] == pa) {
1696 phys_avail[pa_indx] += PAGE_SIZE;
1697 } else {
1698 pa_indx++;
1699 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1700 printf("Too many holes in the physical address space, giving up\n");
1701 pa_indx--;
1702 break;
1703 }
1704 phys_avail[pa_indx++] = pa; /* start */
1705 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1706 }
1707 physmem++;
1708 }
1709 }
1710 *pte = 0;
1711 invltlb();
1712
1713 /*
1714 * XXX
1715 * The last chunk must contain at least one page plus the message
1716 * buffer to avoid complicating other code (message buffer address
1717 * calculation, etc.).
1718 */
1719 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1720 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1721 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1722 phys_avail[pa_indx--] = 0;
1723 phys_avail[pa_indx--] = 0;
1724 }
1725
1726 Maxmem = atop(phys_avail[pa_indx]);
1727
1728 /* Trim off space for the message buffer. */
1729 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1730
1731 avail_end = phys_avail[pa_indx];
1732}
1733
f7bc9806
MD
1734/*
1735 * IDT VECTORS:
1736 * 0 Divide by zero
1737 * 1 Debug
1738 * 2 NMI
1739 * 3 BreakPoint
1740 * 4 OverFlow
1741 * 5 Bound-Range
1742 * 6 Invalid OpCode
1743 * 7 Device Not Available (x87)
1744 * 8 Double-Fault
1745 * 9 Coprocessor Segment overrun (unsupported, reserved)
1746 * 10 Invalid-TSS
1747 * 11 Segment not present
1748 * 12 Stack
1749 * 13 General Protection
1750 * 14 Page Fault
1751 * 15 Reserved
1752 * 16 x87 FP Exception pending
1753 * 17 Alignment Check
1754 * 18 Machine Check
1755 * 19 SIMD floating point
1756 * 20-31 reserved
1757 * 32-255 INTn/external sources
1758 */
984263bc 1759void
17a9f566 1760init386(int first)
984263bc
MD
1761{
1762 struct gate_descriptor *gdp;
1763 int gsel_tss, metadata_missing, off, x;
85100692 1764 struct mdglobaldata *gd;
984263bc
MD
1765
1766 /*
1767 * Prevent lowering of the ipl if we call tsleep() early.
1768 */
85100692 1769 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1770 bzero(gd, sizeof(*gd));
984263bc 1771
85100692 1772 gd->mi.gd_curthread = &thread0;
984263bc
MD
1773
1774 atdevbase = ISA_HOLE_START + KERNBASE;
1775
1776 metadata_missing = 0;
1777 if (bootinfo.bi_modulep) {
1778 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1779 preload_bootstrap_relocate(KERNBASE);
1780 } else {
1781 metadata_missing = 1;
1782 }
1783 if (bootinfo.bi_envp)
1784 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1785
4e8e646b
MD
1786 /* start with one cpu */
1787 ncpus = 1;
984263bc
MD
1788 /* Init basic tunables, hz etc */
1789 init_param1();
1790
1791 /*
1792 * make gdt memory segments, the code segment goes up to end of the
1793 * page with etext in it, the data segment goes to the end of
1794 * the address space
1795 */
1796 /*
1797 * XXX text protection is temporarily (?) disabled. The limit was
1798 * i386_btop(round_page(etext)) - 1.
1799 */
1800 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1801 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1802
984263bc
MD
1803 gdt_segs[GPRIV_SEL].ssd_limit =
1804 atop(sizeof(struct privatespace) - 1);
8ad65e08 1805 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1806 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1807 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1808
85100692 1809 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1810
84b592ba
MD
1811 /*
1812 * Note: on both UP and SMP curthread must be set non-NULL
1813 * early in the boot sequence because the system assumes
1814 * that 'curthread' is never NULL.
1815 */
984263bc
MD
1816
1817 for (x = 0; x < NGDT; x++) {
1818#ifdef BDE_DEBUGGER
1819 /* avoid overwriting db entries with APM ones */
1820 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1821 continue;
1822#endif
1823 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1824 }
1825
1826 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1827 r_gdt.rd_base = (int) gdt;
1828 lgdt(&r_gdt);
1829
73e4f7b9
MD
1830 mi_gdinit(&gd->mi, 0);
1831 cpu_gdinit(gd, 0);
1832 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1833 lwkt_set_comm(&thread0, "thread0");
1834 proc0.p_addr = (void *)thread0.td_kstack;
1835 proc0.p_thread = &thread0;
a2a5ad0d 1836 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
98a7f915 1837 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1838 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1839 thread0.td_proc = &proc0;
1840 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1841 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1842
984263bc
MD
1843 /* make ldt memory segments */
1844 /*
1845 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1846 * should be spelled ...MAX_USER...
1847 */
1848 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1849 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1850 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1851 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1852
1853 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1854 lldt(_default_ldt);
1855#ifdef USER_LDT
17a9f566 1856 gd->gd_currentldt = _default_ldt;
984263bc 1857#endif
8a8d5d85
MD
1858 /* spinlocks and the BGL */
1859 init_locks();
984263bc
MD
1860
1861 /* exceptions */
f7bc9806
MD
1862 for (x = 0; x < NIDT; x++) {
1863#ifdef DEBUG_INTERRUPTS
1864 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1865#else
1866 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1867#endif
1868 }
984263bc
MD
1869 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1870 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1871 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1872 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1873 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1874 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1875 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1876 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1877 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1878 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1879 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1880 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1881 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1882 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1883 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1884 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1885 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1886 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1887 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1888 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1889 setidt(0x80, &IDTVEC(int0x80_syscall),
1890 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1891 setidt(0x81, &IDTVEC(int0x81_syscall),
1892 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1893
1894 r_idt.rd_limit = sizeof(idt0) - 1;
1895 r_idt.rd_base = (int) idt;
1896 lidt(&r_idt);
1897
1898 /*
1899 * Initialize the console before we print anything out.
1900 */
1901 cninit();
1902
1903 if (metadata_missing)
1904 printf("WARNING: loader(8) metadata is missing!\n");
1905
984263bc
MD
1906#if NISA >0
1907 isa_defaultirq();
1908#endif
1909 rand_initialize();
1910
1911#ifdef DDB
1912 kdb_init();
1913 if (boothowto & RB_KDB)
1914 Debugger("Boot flags requested debugger");
1915#endif
1916
1917 finishidentcpu(); /* Final stage of CPU initialization */
1918 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1919 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1920 initializecpu(); /* Initialize CPU registers */
1921
b7c628e4
MD
1922 /*
1923 * make an initial tss so cpu can get interrupt stack on syscall!
1924 * The 16 bytes is to save room for a VM86 context.
1925 */
17a9f566
MD
1926 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1927 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1928 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1929 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1930 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1931 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1932 ltr(gsel_tss);
1933
1934 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1935 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1936 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1937 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1938 dblfault_tss.tss_cr3 = (int)IdlePTD;
1939 dblfault_tss.tss_eip = (int) dblfault_handler;
1940 dblfault_tss.tss_eflags = PSL_KERNEL;
1941 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1942 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1943 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1944 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1945 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1946
1947 vm86_initialize();
1948 getmemsize(first);
1949 init_param2(physmem);
1950
1951 /* now running on new page tables, configured,and u/iom is accessible */
1952
1953 /* Map the message buffer. */
1954 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1955 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1956
1957 msgbufinit(msgbufp, MSGBUF_SIZE);
1958
1959 /* make a call gate to reenter kernel with */
1960 gdp = &ldt[LSYS5CALLS_SEL].gd;
1961
1962 x = (int) &IDTVEC(syscall);
1963 gdp->gd_looffset = x++;
1964 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1965 gdp->gd_stkcpy = 1;
1966 gdp->gd_type = SDT_SYS386CGT;
1967 gdp->gd_dpl = SEL_UPL;
1968 gdp->gd_p = 1;
1969 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1970
1971 /* XXX does this work? */
1972 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1973 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1974
1975 /* transfer to user mode */
1976
1977 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1978 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1979
1980 /* setup proc 0's pcb */
b7c628e4
MD
1981 thread0.td_pcb->pcb_flags = 0;
1982 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 1983 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
1984 proc0.p_md.md_regs = &proc0_tf;
1985}
1986
8ad65e08 1987/*
17a9f566
MD
1988 * Initialize machine-dependant portions of the global data structure.
1989 * Note that the global data area and cpu0's idlestack in the private
1990 * data space were allocated in locore.
ef0fdad1
MD
1991 *
1992 * Note: the idlethread's cpl is 0
73e4f7b9
MD
1993 *
1994 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
1995 */
1996void
85100692 1997cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
1998{
1999 char *sp;
8ad65e08 2000
7d0bac62 2001 if (cpu)
a2a5ad0d 2002 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2003
85100692 2004 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2005 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2006 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2007 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2008 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2009 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2010}
2011
12e4aaff
MD
2012struct globaldata *
2013globaldata_find(int cpu)
2014{
2015 KKASSERT(cpu >= 0 && cpu < ncpus);
2016 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2017}
2018
984263bc
MD
2019#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2020static void f00f_hack(void *unused);
2021SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2022
2023static void
17a9f566
MD
2024f00f_hack(void *unused)
2025{
984263bc 2026 struct gate_descriptor *new_idt;
984263bc
MD
2027 vm_offset_t tmp;
2028
2029 if (!has_f00f_bug)
2030 return;
2031
2032 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2033
2034 r_idt.rd_limit = sizeof(idt0) - 1;
2035
2036 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2037 if (tmp == 0)
2038 panic("kmem_alloc returned 0");
2039 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2040 panic("kmem_alloc returned non-page-aligned memory");
2041 /* Put the first seven entries in the lower page */
2042 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2043 bcopy(idt, new_idt, sizeof(idt0));
2044 r_idt.rd_base = (int)new_idt;
2045 lidt(&r_idt);
2046 idt = new_idt;
2047 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2048 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2049 panic("vm_map_protect failed");
2050 return;
2051}
2052#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2053
2054int
2055ptrace_set_pc(p, addr)
2056 struct proc *p;
2057 unsigned long addr;
2058{
2059 p->p_md.md_regs->tf_eip = addr;
2060 return (0);
2061}
2062
2063int
2064ptrace_single_step(p)
2065 struct proc *p;
2066{
2067 p->p_md.md_regs->tf_eflags |= PSL_T;
2068 return (0);
2069}
2070
2071int ptrace_read_u_check(p, addr, len)
2072 struct proc *p;
2073 vm_offset_t addr;
2074 size_t len;
2075{
2076 vm_offset_t gap;
2077
2078 if ((vm_offset_t) (addr + len) < addr)
2079 return EPERM;
2080 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2081 return 0;
2082
2083 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2084
2085 if ((vm_offset_t) addr < gap)
2086 return EPERM;
2087 if ((vm_offset_t) (addr + len) <=
2088 (vm_offset_t) (gap + sizeof(struct trapframe)))
2089 return 0;
2090 return EPERM;
2091}
2092
2093int ptrace_write_u(p, off, data)
2094 struct proc *p;
2095 vm_offset_t off;
2096 long data;
2097{
2098 struct trapframe frame_copy;
2099 vm_offset_t min;
2100 struct trapframe *tp;
2101
2102 /*
2103 * Privileged kernel state is scattered all over the user area.
2104 * Only allow write access to parts of regs and to fpregs.
2105 */
2106 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2107 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2108 tp = p->p_md.md_regs;
2109 frame_copy = *tp;
2110 *(int *)((char *)&frame_copy + (off - min)) = data;
2111 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2112 !CS_SECURE(frame_copy.tf_cs))
2113 return (EINVAL);
2114 *(int*)((char *)p->p_addr + off) = data;
2115 return (0);
2116 }
b7c628e4
MD
2117
2118 /*
2119 * The PCB is at the end of the user area YYY
2120 */
2121 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2122 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2123 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2124 *(int*)((char *)p->p_addr + off) = data;
2125 return (0);
2126 }
2127 return (EFAULT);
2128}
2129
2130int
2131fill_regs(p, regs)
2132 struct proc *p;
2133 struct reg *regs;
2134{
2135 struct pcb *pcb;
2136 struct trapframe *tp;
2137
2138 tp = p->p_md.md_regs;
2139 regs->r_fs = tp->tf_fs;
2140 regs->r_es = tp->tf_es;
2141 regs->r_ds = tp->tf_ds;
2142 regs->r_edi = tp->tf_edi;
2143 regs->r_esi = tp->tf_esi;
2144 regs->r_ebp = tp->tf_ebp;
2145 regs->r_ebx = tp->tf_ebx;
2146 regs->r_edx = tp->tf_edx;
2147 regs->r_ecx = tp->tf_ecx;
2148 regs->r_eax = tp->tf_eax;
2149 regs->r_eip = tp->tf_eip;
2150 regs->r_cs = tp->tf_cs;
2151 regs->r_eflags = tp->tf_eflags;
2152 regs->r_esp = tp->tf_esp;
2153 regs->r_ss = tp->tf_ss;
b7c628e4 2154 pcb = p->p_thread->td_pcb;
984263bc
MD
2155 regs->r_gs = pcb->pcb_gs;
2156 return (0);
2157}
2158
2159int
2160set_regs(p, regs)
2161 struct proc *p;
2162 struct reg *regs;
2163{
2164 struct pcb *pcb;
2165 struct trapframe *tp;
2166
2167 tp = p->p_md.md_regs;
2168 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2169 !CS_SECURE(regs->r_cs))
2170 return (EINVAL);
2171 tp->tf_fs = regs->r_fs;
2172 tp->tf_es = regs->r_es;
2173 tp->tf_ds = regs->r_ds;
2174 tp->tf_edi = regs->r_edi;
2175 tp->tf_esi = regs->r_esi;
2176 tp->tf_ebp = regs->r_ebp;
2177 tp->tf_ebx = regs->r_ebx;
2178 tp->tf_edx = regs->r_edx;
2179 tp->tf_ecx = regs->r_ecx;
2180 tp->tf_eax = regs->r_eax;
2181 tp->tf_eip = regs->r_eip;
2182 tp->tf_cs = regs->r_cs;
2183 tp->tf_eflags = regs->r_eflags;
2184 tp->tf_esp = regs->r_esp;
2185 tp->tf_ss = regs->r_ss;
b7c628e4 2186 pcb = p->p_thread->td_pcb;
984263bc
MD
2187 pcb->pcb_gs = regs->r_gs;
2188 return (0);
2189}
2190
642a6e88 2191#ifndef CPU_DISABLE_SSE
984263bc
MD
2192static void
2193fill_fpregs_xmm(sv_xmm, sv_87)
2194 struct savexmm *sv_xmm;
2195 struct save87 *sv_87;
2196{
c9faf524
RG
2197 struct env87 *penv_87 = &sv_87->sv_env;
2198 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2199 int i;
2200
2201 /* FPU control/status */
2202 penv_87->en_cw = penv_xmm->en_cw;
2203 penv_87->en_sw = penv_xmm->en_sw;
2204 penv_87->en_tw = penv_xmm->en_tw;
2205 penv_87->en_fip = penv_xmm->en_fip;
2206 penv_87->en_fcs = penv_xmm->en_fcs;
2207 penv_87->en_opcode = penv_xmm->en_opcode;
2208 penv_87->en_foo = penv_xmm->en_foo;
2209 penv_87->en_fos = penv_xmm->en_fos;
2210
2211 /* FPU registers */
2212 for (i = 0; i < 8; ++i)
2213 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2214
2215 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2216}
2217
2218static void
2219set_fpregs_xmm(sv_87, sv_xmm)
2220 struct save87 *sv_87;
2221 struct savexmm *sv_xmm;
2222{
c9faf524
RG
2223 struct env87 *penv_87 = &sv_87->sv_env;
2224 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2225 int i;
2226
2227 /* FPU control/status */
2228 penv_xmm->en_cw = penv_87->en_cw;
2229 penv_xmm->en_sw = penv_87->en_sw;
2230 penv_xmm->en_tw = penv_87->en_tw;
2231 penv_xmm->en_fip = penv_87->en_fip;
2232 penv_xmm->en_fcs = penv_87->en_fcs;
2233 penv_xmm->en_opcode = penv_87->en_opcode;
2234 penv_xmm->en_foo = penv_87->en_foo;
2235 penv_xmm->en_fos = penv_87->en_fos;
2236
2237 /* FPU registers */
2238 for (i = 0; i < 8; ++i)
2239 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2240
2241 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2242}
642a6e88 2243#endif /* CPU_DISABLE_SSE */
984263bc
MD
2244
2245int
2246fill_fpregs(p, fpregs)
2247 struct proc *p;
2248 struct fpreg *fpregs;
2249{
642a6e88 2250#ifndef CPU_DISABLE_SSE
984263bc 2251 if (cpu_fxsr) {
b7c628e4 2252 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2253 (struct save87 *)fpregs);
2254 return (0);
2255 }
642a6e88 2256#endif /* CPU_DISABLE_SSE */
b7c628e4 2257 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2258 return (0);
2259}
2260
2261int
2262set_fpregs(p, fpregs)
2263 struct proc *p;
2264 struct fpreg *fpregs;
2265{
642a6e88 2266#ifndef CPU_DISABLE_SSE
984263bc
MD
2267 if (cpu_fxsr) {
2268 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2269 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2270 return (0);
2271 }
642a6e88 2272#endif /* CPU_DISABLE_SSE */
b7c628e4 2273 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2274 return (0);
2275}
2276
2277int
2278fill_dbregs(p, dbregs)
2279 struct proc *p;
2280 struct dbreg *dbregs;
2281{
2282 struct pcb *pcb;
2283
2284 if (p == NULL) {
2285 dbregs->dr0 = rdr0();
2286 dbregs->dr1 = rdr1();
2287 dbregs->dr2 = rdr2();
2288 dbregs->dr3 = rdr3();
2289 dbregs->dr4 = rdr4();
2290 dbregs->dr5 = rdr5();
2291 dbregs->dr6 = rdr6();
2292 dbregs->dr7 = rdr7();
2293 }
2294 else {
b7c628e4 2295 pcb = p->p_thread->td_pcb;
984263bc
MD
2296 dbregs->dr0 = pcb->pcb_dr0;
2297 dbregs->dr1 = pcb->pcb_dr1;
2298 dbregs->dr2 = pcb->pcb_dr2;
2299 dbregs->dr3 = pcb->pcb_dr3;
2300 dbregs->dr4 = 0;
2301 dbregs->dr5 = 0;
2302 dbregs->dr6 = pcb->pcb_dr6;
2303 dbregs->dr7 = pcb->pcb_dr7;
2304 }
2305 return (0);
2306}
2307
2308int
2309set_dbregs(p, dbregs)
2310 struct proc *p;
2311 struct dbreg *dbregs;
2312{
2313 struct pcb *pcb;
2314 int i;
2315 u_int32_t mask1, mask2;
2316
2317 if (p == NULL) {
2318 load_dr0(dbregs->dr0);
2319 load_dr1(dbregs->dr1);
2320 load_dr2(dbregs->dr2);
2321 load_dr3(dbregs->dr3);
2322 load_dr4(dbregs->dr4);
2323 load_dr5(dbregs->dr5);
2324 load_dr6(dbregs->dr6);
2325 load_dr7(dbregs->dr7);
2326 }
2327 else {
2328 /*
2329 * Don't let an illegal value for dr7 get set. Specifically,
2330 * check for undefined settings. Setting these bit patterns
2331 * result in undefined behaviour and can lead to an unexpected
2332 * TRCTRAP.
2333 */
2334 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2335 i++, mask1 <<= 2, mask2 <<= 2)
2336 if ((dbregs->dr7 & mask1) == mask2)
2337 return (EINVAL);
2338
b7c628e4 2339 pcb = p->p_thread->td_pcb;
984263bc
MD
2340
2341 /*
2342 * Don't let a process set a breakpoint that is not within the
2343 * process's address space. If a process could do this, it
2344 * could halt the system by setting a breakpoint in the kernel
2345 * (if ddb was enabled). Thus, we need to check to make sure
2346 * that no breakpoints are being enabled for addresses outside
2347 * process's address space, unless, perhaps, we were called by
2348 * uid 0.
2349 *
2350 * XXX - what about when the watched area of the user's
2351 * address space is written into from within the kernel
2352 * ... wouldn't that still cause a breakpoint to be generated
2353 * from within kernel mode?
2354 */
2355
dadab5e9 2356 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2357 if (dbregs->dr7 & 0x3) {
2358 /* dr0 is enabled */
2359 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2360 return (EINVAL);
2361 }
2362
2363 if (dbregs->dr7 & (0x3<<2)) {
2364 /* dr1 is enabled */
2365 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2366 return (EINVAL);
2367 }
2368
2369 if (dbregs->dr7 & (0x3<<4)) {
2370 /* dr2 is enabled */
2371 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2372 return (EINVAL);
2373 }
2374
2375 if (dbregs->dr7 & (0x3<<6)) {
2376 /* dr3 is enabled */
2377 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2378 return (EINVAL);
2379 }
2380 }
2381
2382 pcb->pcb_dr0 = dbregs->dr0;
2383 pcb->pcb_dr1 = dbregs->dr1;
2384 pcb->pcb_dr2 = dbregs->dr2;
2385 pcb->pcb_dr3 = dbregs->dr3;
2386 pcb->pcb_dr6 = dbregs->dr6;
2387 pcb->pcb_dr7 = dbregs->dr7;
2388
2389 pcb->pcb_flags |= PCB_DBREGS;
2390 }
2391
2392 return (0);
2393}
2394
2395/*
2396 * Return > 0 if a hardware breakpoint has been hit, and the
2397 * breakpoint was in user space. Return 0, otherwise.
2398 */
2399int
2400user_dbreg_trap(void)
2401{
2402 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2403 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2404 int nbp; /* number of breakpoints that triggered */
2405 caddr_t addr[4]; /* breakpoint addresses */
2406 int i;
2407
2408 dr7 = rdr7();
2409 if ((dr7 & 0x000000ff) == 0) {
2410 /*
2411 * all GE and LE bits in the dr7 register are zero,
2412 * thus the trap couldn't have been caused by the
2413 * hardware debug registers
2414 */
2415 return 0;
2416 }
2417
2418 nbp = 0;
2419 dr6 = rdr6();
2420 bp = dr6 & 0x0000000f;
2421
2422 if (!bp) {
2423 /*
2424 * None of the breakpoint bits are set meaning this
2425 * trap was not caused by any of the debug registers
2426 */
2427 return 0;
2428 }
2429
2430 /*
2431 * at least one of the breakpoints were hit, check to see
2432 * which ones and if any of them are user space addresses
2433 */
2434
2435 if (bp & 0x01) {
2436 addr[nbp++] = (caddr_t)rdr0();
2437 }
2438 if (bp & 0x02) {
2439 addr[nbp++] = (caddr_t)rdr1();
2440 }
2441 if (bp & 0x04) {
2442 addr[nbp++] = (caddr_t)rdr2();
2443 }
2444 if (bp & 0x08) {
2445 addr[nbp++] = (caddr_t)rdr3();
2446 }
2447
2448 for (i=0; i<nbp; i++) {
2449 if (addr[i] <
2450 (caddr_t)VM_MAXUSER_ADDRESS) {
2451 /*
2452 * addr[i] is in user space
2453 */
2454 return nbp;
2455 }
2456 }
2457
2458 /*
2459 * None of the breakpoints are in user space.
2460 */
2461 return 0;
2462}
2463
2464
2465#ifndef DDB
2466void
2467Debugger(const char *msg)
2468{
2469 printf("Debugger(\"%s\") called.\n", msg);
2470}
2471#endif /* no DDB */
2472
2473#include <sys/disklabel.h>
2474
2475/*
2476 * Determine the size of the transfer, and make sure it is
2477 * within the boundaries of the partition. Adjust transfer
2478 * if needed, and signal errors or early completion.
2479 */
2480int
2481bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2482{
2483 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2484 int labelsect = lp->d_partitions[0].p_offset;
2485 int maxsz = p->p_size,
2486 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2487
2488 /* overwriting disk label ? */
2489 /* XXX should also protect bootstrap in first 8K */
2490 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2491#if LABELSECTOR != 0
2492 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2493#endif
2494 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2495 bp->b_error = EROFS;
2496 goto bad;
2497 }
2498
2499#if defined(DOSBBSECTOR) && defined(notyet)
2500 /* overwriting master boot record? */
2501 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2502 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2503 bp->b_error = EROFS;
2504 goto bad;
2505 }
2506#endif
2507
2508 /* beyond partition? */
2509 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2510 /* if exactly at end of disk, return an EOF */
2511 if (bp->b_blkno == maxsz) {
2512 bp->b_resid = bp->b_bcount;
2513 return(0);
2514 }
2515 /* or truncate if part of it fits */
2516 sz = maxsz - bp->b_blkno;
2517 if (sz <= 0) {
2518 bp->b_error = EINVAL;
2519 goto bad;
2520 }
2521 bp->b_bcount = sz << DEV_BSHIFT;
2522 }
2523
2524 bp->b_pblkno = bp->b_blkno + p->p_offset;
2525 return(1);
2526
2527bad:
2528 bp->b_flags |= B_ERROR;
2529 return(-1);
2530}
2531
2532#ifdef DDB
2533
2534/*
2535 * Provide inb() and outb() as functions. They are normally only
2536 * available as macros calling inlined functions, thus cannot be
2537 * called inside DDB.
2538 *
2539 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2540 */
2541
2542#undef inb
2543#undef outb
2544
2545/* silence compiler warnings */
2546u_char inb(u_int);
2547void outb(u_int, u_char);
2548
2549u_char
2550inb(u_int port)
2551{
2552 u_char data;
2553 /*
2554 * We use %%dx and not %1 here because i/o is done at %dx and not at
2555 * %edx, while gcc generates inferior code (movw instead of movl)
2556 * if we tell it to load (u_short) port.
2557 */
2558 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2559 return (data);
2560}
2561
2562void
2563outb(u_int port, u_char data)
2564{
2565 u_char al;
2566 /*
2567 * Use an unnecessary assignment to help gcc's register allocator.
2568 * This make a large difference for gcc-1.40 and a tiny difference
2569 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2570 * best results. gcc-2.6.0 can't handle this.
2571 */
2572 al = data;
2573 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2574}
2575
2576#endif /* DDB */
8a8d5d85
MD
2577
2578
2579
2580#include "opt_cpu.h"
2581#include "opt_htt.h"
2582#include "opt_user_ldt.h"
2583
2584
2585/*
2586 * initialize all the SMP locks
2587 */
2588
2589/* critical region around IO APIC, apic_imen */
2590struct spinlock imen_spinlock;
2591
2592/* Make FAST_INTR() routines sequential */
2593struct spinlock fast_intr_spinlock;
2594
2595/* critical region for old style disable_intr/enable_intr */
2596struct spinlock mpintr_spinlock;
2597
2598/* critical region around INTR() routines */
2599struct spinlock intr_spinlock;
2600
2601/* lock region used by kernel profiling */
2602struct spinlock mcount_spinlock;
2603
2604/* locks com (tty) data/hardware accesses: a FASTINTR() */
2605struct spinlock com_spinlock;
2606
2607/* locks kernel printfs */
2608struct spinlock cons_spinlock;
2609
2610/* lock regions around the clock hardware */
2611struct spinlock clock_spinlock;
2612
2613/* lock around the MP rendezvous */
2614struct spinlock smp_rv_spinlock;
2615
2616static void
2617init_locks(void)
2618{
2619 /*
2620 * mp_lock = 0; BSP already owns the MP lock
2621 */
2622 /*
2623 * Get the initial mp_lock with a count of 1 for the BSP.
2624 * This uses a LOGICAL cpu ID, ie BSP == 0.
2625 */
2626#ifdef SMP
2627 cpu_get_initial_mplock();
2628#endif
2629 spin_lock_init(&mcount_spinlock);
2630 spin_lock_init(&fast_intr_spinlock);
2631 spin_lock_init(&intr_spinlock);
2632 spin_lock_init(&mpintr_spinlock);
2633 spin_lock_init(&imen_spinlock);
2634 spin_lock_init(&smp_rv_spinlock);
2635 spin_lock_init(&com_spinlock);
2636 spin_lock_init(&clock_spinlock);
2637 spin_lock_init(&cons_spinlock);
2638}
2639