ath - Basic re-port, base code compile
[dragonfly.git] / sys / dev / netif / ath / ath_hal / ah_osdep.c
CommitLineData
345bb66d 1/*-
818ddf01 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
8982d733 3 * All rights reserved.
345bb66d 4 *
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5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
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15 *
16 * NO WARRANTY
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
345bb66d 28 *
572ff6f6 29 * $FreeBSD$
345bb66d 30 */
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31#include "opt_ath.h"
32#include "opt_inet.h"
33#include "opt_wlan.h"
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34#include "opt_ah.h"
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/sysctl.h>
818ddf01 41#include <sys/bus.h>
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42#include <sys/malloc.h>
43#include <sys/proc.h>
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44#include <sys/lock.h>
45#include <sys/mutex.h>
a311f6cd 46
345bb66d 47#include <machine/stdarg.h>
818ddf01 48
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49#include <net/if.h>
50#include <net/if_var.h>
51#include <net/if_media.h>
52#include <net/if_arp.h>
572ff6f6 53#include <net/ethernet.h> /* XXX for ether_sprintf */
a311f6cd 54
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55#include <netproto/802_11/ieee80211_var.h>
56
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57#include <dev/netif/ath/ath_hal/ah.h>
58#include <dev/netif/ath/ath_hal/ah_debug.h>
3f720b20 59
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60/*
61 * WiSoC boards overload the bus tag with information about the
62 * board layout. We must extract the bus space tag from that
63 * indirect structure. For everyone else the tag is passed in
64 * directly.
65 * XXX cache indirect ref privately
66 */
67#ifdef AH_SUPPORT_AR5312
68#define BUSTAG(ah) \
69 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
70#else
818ddf01 71#define BUSTAG(ah) ((ah)->ah_st)
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72#endif
73
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74/*
75 * This lock is used to seralise register access for chips which have
76 * problems w/ SMP CPUs issuing concurrent PCI transactions.
77 *
78 * XXX This is a global lock for now; it should be pushed to
79 * a per-device lock in some platform-independent fashion.
80 */
3133c5e3 81struct spinlock ah_regser_spin = SPINLOCK_INITIALIZER(ah_regser_spin);
572ff6f6 82
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83extern void ath_hal_printf(struct ath_hal *, const char*, ...)
84 __printflike(2,3);
85extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
86 __printflike(2, 0);
87extern const char* ath_hal_ether_sprintf(const u_int8_t *mac);
88extern void *ath_hal_malloc(size_t);
89extern void ath_hal_free(void *);
90#ifdef AH_ASSERT
91extern void ath_hal_assert_failed(const char* filename,
92 int lineno, const char* msg);
93#endif
94#ifdef AH_DEBUG
572ff6f6 95extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
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96#endif /* AH_DEBUG */
97
98/* NB: put this here instead of the driver to avoid circular references */
99SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
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100static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0,
101 "Atheros HAL parameters");
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102
103#ifdef AH_DEBUG
572ff6f6 104int ath_hal_debug = 0;
345bb66d 105SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
572ff6f6 106 0, "Atheros HAL debugging printfs");
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107TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
108#endif /* AH_DEBUG */
109
572ff6f6 110static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
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111
112void*
113ath_hal_malloc(size_t size)
114{
3133c5e3 115 return kmalloc(size, M_ATH_HAL, M_INTWAIT | M_ZERO);
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116}
117
118void
119ath_hal_free(void* p)
120{
3133c5e3 121 kfree(p, M_ATH_HAL);
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122}
123
124void
3133c5e3 125ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap)
345bb66d 126{
3133c5e3 127 kvprintf(fmt, ap);
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128}
129
130void
131ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
132{
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133 __va_list ap;
134 __va_start(ap, fmt);
345bb66d 135 ath_hal_vprintf(ah, fmt, ap);
3133c5e3 136 __va_end(ap);
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137}
138
139const char*
140ath_hal_ether_sprintf(const u_int8_t *mac)
141{
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142 static char etherbuf[18];
143
144 kether_ntoa(mac, etherbuf);
145
146 return etherbuf;
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147}
148
149#ifdef AH_DEBUG
572ff6f6 150
345bb66d 151void
572ff6f6 152DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
345bb66d 153{
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154 if ((mask == HAL_DEBUG_UNMASKABLE) ||
155 (ah != NULL && ah->ah_config.ah_debug & mask) ||
156 (ath_hal_debug & mask)) {
345bb66d 157 __va_list ap;
3133c5e3 158 __va_start(ap, fmt);
345bb66d 159 ath_hal_vprintf(ah, fmt, ap);
3133c5e3 160 __va_end(ap);
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161 }
162}
572ff6f6 163#undef HAL_DEBUG_UNMASKABLE
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164#endif /* AH_DEBUG */
165
166#ifdef AH_DEBUG_ALQ
167/*
168 * ALQ register tracing support.
169 *
170 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
171 * writes to the file /tmp/ath_hal.log. The file format is a simple
172 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
173 * and then decode the file with the arcode program (that is part of the
174 * HAL). If you start+stop tracing the data will be appended to an
175 * existing file.
176 *
177 * NB: doesn't handle multiple devices properly; only one DEVICE record
178 * is emitted and the different devices are not identified.
179 */
180#include <sys/alq.h>
5cd80a8c 181#include <dev/netif/ath/ath_hal/ah_decode.h>
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182
183static struct alq *ath_hal_alq;
184static int ath_hal_alq_emitdev; /* need to emit DEVICE record */
185static u_int ath_hal_alq_lost; /* count of lost records */
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186static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log";
187
188SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW,
189 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile");
190
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191static u_int ath_hal_alq_qsize = 64*1024;
192
193static int
194ath_hal_setlogging(int enable)
195{
196 int error;
197
198 if (enable) {
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199 error = alq_open(&ath_hal_alq, ath_hal_logfile,
200 curthread->td_ucred, ALQ_DEFAULT_CMODE,
201 sizeof (struct athregrec), ath_hal_alq_qsize);
202 ath_hal_alq_lost = 0;
203 ath_hal_alq_emitdev = 1;
3133c5e3 204 kprintf("ath_hal: logging to %s enabled\n",
818ddf01 205 ath_hal_logfile);
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206 } else {
207 if (ath_hal_alq)
208 alq_close(ath_hal_alq);
209 ath_hal_alq = NULL;
3133c5e3 210 kprintf("ath_hal: logging disabled\n");
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211 error = 0;
212 }
213 return (error);
214}
215
216static int
217sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
218{
219 int error, enable;
220
221 enable = (ath_hal_alq != NULL);
222 error = sysctl_handle_int(oidp, &enable, 0, req);
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223 if (error || !req->newptr)
224 return (error);
225 else
226 return (ath_hal_setlogging(enable));
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227}
228SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
229 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
230SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
231 &ath_hal_alq_qsize, 0, "In-memory log size (#records)");
232SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
233 &ath_hal_alq_lost, 0, "Register operations not logged");
234
235static struct ale *
236ath_hal_alq_get(struct ath_hal *ah)
237{
238 struct ale *ale;
239
240 if (ath_hal_alq_emitdev) {
241 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
242 if (ale) {
243 struct athregrec *r =
244 (struct athregrec *) ale->ae_data;
245 r->op = OP_DEVICE;
246 r->reg = 0;
247 r->val = ah->ah_devid;
248 alq_post(ath_hal_alq, ale);
249 ath_hal_alq_emitdev = 0;
250 } else
251 ath_hal_alq_lost++;
252 }
253 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
254 if (!ale)
255 ath_hal_alq_lost++;
256 return ale;
257}
258
259void
260ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
261{
8982d733 262 bus_space_tag_t tag = BUSTAG(ah);
818ddf01 263 bus_space_handle_t h = ah->ah_sh;
8982d733 264
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265 if (ath_hal_alq) {
266 struct ale *ale = ath_hal_alq_get(ah);
267 if (ale) {
268 struct athregrec *r = (struct athregrec *) ale->ae_data;
572ff6f6 269 r->threadid = curthread->td_tid;
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270 r->op = OP_WRITE;
271 r->reg = reg;
272 r->val = val;
273 alq_post(ath_hal_alq, ale);
274 }
275 }
572ff6f6 276 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 277 spin_lock(&ah_regser_spin);
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278 bus_space_write_4(tag, h, reg, val);
279 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 280 spin_unlock(&ah_regser_spin);
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281}
282
283u_int32_t
284ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
285{
8982d733 286 bus_space_tag_t tag = BUSTAG(ah);
818ddf01 287 bus_space_handle_t h = ah->ah_sh;
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288 u_int32_t val;
289
572ff6f6 290 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 291 spin_lock(&ah_regser_spin);
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292 val = bus_space_read_4(tag, h, reg);
293 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 294 spin_unlock(&ah_regser_spin);
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295 if (ath_hal_alq) {
296 struct ale *ale = ath_hal_alq_get(ah);
297 if (ale) {
298 struct athregrec *r = (struct athregrec *) ale->ae_data;
572ff6f6 299 r->threadid = curthread->td_tid;
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300 r->op = OP_READ;
301 r->reg = reg;
302 r->val = val;
303 alq_post(ath_hal_alq, ale);
304 }
305 }
306 return val;
307}
308
309void
310OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
311{
312 if (ath_hal_alq) {
313 struct ale *ale = ath_hal_alq_get(ah);
314 if (ale) {
315 struct athregrec *r = (struct athregrec *) ale->ae_data;
572ff6f6 316 r->threadid = curthread->td_tid;
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317 r->op = OP_MARK;
318 r->reg = id;
319 r->val = v;
320 alq_post(ath_hal_alq, ale);
321 }
322 }
323}
324#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
325/*
326 * Memory-mapped device register read/write. These are here
327 * as routines when debugging support is enabled and/or when
328 * explicitly configured to use function calls. The latter is
329 * for architectures that might need to do something before
330 * referencing memory (e.g. remap an i/o window).
331 *
332 * NB: see the comments in ah_osdep.h about byte-swapping register
333 * reads and writes to understand what's going on below.
334 */
335
336void
337ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
338{
8982d733 339 bus_space_tag_t tag = BUSTAG(ah);
818ddf01 340 bus_space_handle_t h = ah->ah_sh;
8982d733 341
572ff6f6 342 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 343 spin_lock(&ah_regser_spin);
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344 bus_space_write_4(tag, h, reg, val);
345 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 346 spin_unlock(&ah_regser_spin);
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347}
348
349u_int32_t
350ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
351{
8982d733 352 bus_space_tag_t tag = BUSTAG(ah);
818ddf01 353 bus_space_handle_t h = ah->ah_sh;
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354 u_int32_t val;
355
572ff6f6 356 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 357 spin_lock(&ah_regser_spin);
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358 val = bus_space_read_4(tag, h, reg);
359 if (ah->ah_config.ah_serialise_reg_war)
3133c5e3 360 spin_unlock(&ah_regser_spin);
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361 return val;
362}
363#endif /* AH_DEBUG || AH_REGOPS_FUNC */
364
365#ifdef AH_ASSERT
366void
367ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
368{
3133c5e3 369 kprintf("Atheros HAL assertion failure: %s: line %u: %s\n",
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370 filename, lineno, msg);
371 panic("ath_hal_assert");
372}
373#endif /* AH_ASSERT */
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374
375/*
376 * Module glue.
377 */
378static int
379ath_hal_modevent(module_t mod, int type, void *unused)
380{
381 int error;
382
383 wlan_serialize_enter();
384
385 switch (type) {
386 case MOD_LOAD:
387 error = 0;
388 break;
389 case MOD_UNLOAD:
390 error = 0;
391 break;
392 default:
393 error = EINVAL;
394 break;
395 }
396 wlan_serialize_exit();
397
398 return error;
399}
400
401static moduledata_t ath_hal_mod = {
402 "ath_hal",
403 ath_hal_modevent,
404 0
405};
406
407DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
408MODULE_VERSION(ath_hal, 1);