Fix a long-standing bug in the livelock code. An interrupt thread normally
[dragonfly.git] / sys / kern / lwkt_ipiq.c
CommitLineData
3b6b7bd1 1/*
8c10bfcf
MD
2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
3b6b7bd1
MD
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
8c10bfcf 10 *
3b6b7bd1
MD
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
8c10bfcf
MD
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3b6b7bd1 32 * SUCH DAMAGE.
8c10bfcf 33 *
b8a98473 34 * $DragonFly: src/sys/kern/lwkt_ipiq.c,v 1.16 2005/10/25 17:26:54 dillon Exp $
3b6b7bd1
MD
35 */
36
37/*
38 * This module implements IPI message queueing and the MI portion of IPI
39 * message processing.
40 */
41
42#ifdef _KERNEL
43
e8f15168
MD
44#include "opt_ddb.h"
45
3b6b7bd1
MD
46#include <sys/param.h>
47#include <sys/systm.h>
48#include <sys/kernel.h>
49#include <sys/proc.h>
50#include <sys/rtprio.h>
51#include <sys/queue.h>
52#include <sys/thread2.h>
53#include <sys/sysctl.h>
ac72c7f4 54#include <sys/ktr.h>
3b6b7bd1
MD
55#include <sys/kthread.h>
56#include <machine/cpu.h>
57#include <sys/lock.h>
58#include <sys/caps.h>
59
60#include <vm/vm.h>
61#include <vm/vm_param.h>
62#include <vm/vm_kern.h>
63#include <vm/vm_object.h>
64#include <vm/vm_page.h>
65#include <vm/vm_map.h>
66#include <vm/vm_pager.h>
67#include <vm/vm_extern.h>
68#include <vm/vm_zone.h>
69
70#include <machine/stdarg.h>
71#include <machine/ipl.h>
72#include <machine/smp.h>
73#include <machine/atomic.h>
74
75#define THREAD_STACK (UPAGES * PAGE_SIZE)
76
77#else
78
79#include <sys/stdint.h>
80#include <libcaps/thread.h>
81#include <sys/thread.h>
82#include <sys/msgport.h>
83#include <sys/errno.h>
84#include <libcaps/globaldata.h>
7e8303ad 85#include <machine/cpufunc.h>
3b6b7bd1
MD
86#include <sys/thread2.h>
87#include <sys/msgport2.h>
88#include <stdio.h>
89#include <stdlib.h>
90#include <string.h>
3b6b7bd1 91#include <machine/lock.h>
5e940450
MD
92#include <machine/cpu.h>
93#include <machine/atomic.h>
3b6b7bd1
MD
94
95#endif
96
97#ifdef SMP
4c9f5a7f
MD
98static __int64_t ipiq_count; /* total calls to lwkt_send_ipiq*() */
99static __int64_t ipiq_fifofull; /* number of fifo full conditions detected */
100static __int64_t ipiq_avoided; /* interlock with target avoids cpu ipi */
101static __int64_t ipiq_passive; /* passive IPI messages */
102static __int64_t ipiq_cscount; /* number of cpu synchronizations */
103static int ipiq_optimized = 1; /* XXX temporary sysctl */
e8f15168
MD
104#ifdef PANIC_DEBUG
105static int panic_ipiq_cpu = -1;
106static int panic_ipiq_count = 100;
107#endif
3b6b7bd1
MD
108#endif
109
110#ifdef _KERNEL
111
112#ifdef SMP
113SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_count, CTLFLAG_RW, &ipiq_count, 0, "");
114SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_fifofull, CTLFLAG_RW, &ipiq_fifofull, 0, "");
4c9f5a7f
MD
115SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_avoided, CTLFLAG_RW, &ipiq_avoided, 0, "");
116SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_passive, CTLFLAG_RW, &ipiq_passive, 0, "");
0f7a3396 117SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_cscount, CTLFLAG_RW, &ipiq_cscount, 0, "");
4c9f5a7f 118SYSCTL_INT(_lwkt, OID_AUTO, ipiq_optimized, CTLFLAG_RW, &ipiq_optimized, 0, "");
e8f15168
MD
119#ifdef PANIC_DEBUG
120SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_cpu, CTLFLAG_RW, &panic_ipiq_cpu, 0, "");
121SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_count, CTLFLAG_RW, &panic_ipiq_count, 0, "");
122#endif
3b6b7bd1 123
ac72c7f4
MD
124#define IPIQ_STRING "func=%p arg=%p scpu=%d dcpu=%d"
125#define IPIQ_ARG_SIZE (sizeof(void *) * 2 + sizeof(int) * 2)
126
127#if !defined(KTR_IPIQ)
128#define KTR_IPIQ KTR_ALL
3b6b7bd1 129#endif
ac72c7f4
MD
130KTR_INFO_MASTER(ipiq);
131KTR_INFO(KTR_IPIQ, ipiq, send_norm, 0, IPIQ_STRING, IPIQ_ARG_SIZE);
132KTR_INFO(KTR_IPIQ, ipiq, send_pasv, 1, IPIQ_STRING, IPIQ_ARG_SIZE);
133KTR_INFO(KTR_IPIQ, ipiq, send_nbio, 2, IPIQ_STRING, IPIQ_ARG_SIZE);
134KTR_INFO(KTR_IPIQ, ipiq, send_fail, 3, IPIQ_STRING, IPIQ_ARG_SIZE);
135KTR_INFO(KTR_IPIQ, ipiq, receive, 4, IPIQ_STRING, IPIQ_ARG_SIZE);
136
137#define logipiq(name, func, arg, sgd, dgd) \
138 KTR_LOG(ipiq_ ## name, func, arg, sgd->gd_cpuid, dgd->gd_cpuid)
139
140#endif /* SMP */
141#endif /* KERNEL */
3b6b7bd1
MD
142
143#ifdef SMP
144
b8a98473
MD
145static int lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
146 struct intrframe *frame);
3b6b7bd1
MD
147static void lwkt_cpusync_remote1(lwkt_cpusync_t poll);
148static void lwkt_cpusync_remote2(lwkt_cpusync_t poll);
149
150/*
151 * Send a function execution request to another cpu. The request is queued
152 * on the cpu<->cpu ipiq matrix. Each cpu owns a unique ipiq FIFO for every
153 * possible target cpu. The FIFO can be written.
154 *
4c9f5a7f
MD
155 * If the FIFO fills up we have to enable interrupts to avoid an APIC
156 * deadlock and process pending IPIQs while waiting for it to empty.
157 * Otherwise we may soft-deadlock with another cpu whos FIFO is also full.
3b6b7bd1
MD
158 *
159 * We can safely bump gd_intr_nesting_level because our crit_exit() at the
160 * end will take care of any pending interrupts.
161 *
4c9f5a7f
MD
162 * The actual hardware IPI is avoided if the target cpu is already processing
163 * the queue from a prior IPI. It is possible to pipeline IPI messages
164 * very quickly between cpus due to the FIFO hysteresis.
165 *
166 * Need not be called from a critical section.
3b6b7bd1
MD
167 */
168int
b8a98473 169lwkt_send_ipiq3(globaldata_t target, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1
MD
170{
171 lwkt_ipiq_t ip;
172 int windex;
173 struct globaldata *gd = mycpu;
174
ac72c7f4
MD
175 logipiq(send_norm, func, arg, gd, target);
176
3b6b7bd1 177 if (target == gd) {
b8a98473 178 func(arg1, arg2, NULL);
3b6b7bd1
MD
179 return(0);
180 }
181 crit_enter();
182 ++gd->gd_intr_nesting_level;
183#ifdef INVARIANTS
184 if (gd->gd_intr_nesting_level > 20)
185 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
186#endif
187 KKASSERT(curthread->td_pri >= TDPRI_CRIT);
188 ++ipiq_count;
189 ip = &gd->gd_ipiq[target->gd_cpuid];
190
191 /*
4c9f5a7f
MD
192 * Do not allow the FIFO to become full. Interrupts must be physically
193 * enabled while we liveloop to avoid deadlocking the APIC.
194 */
195 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
196 unsigned int eflags = read_eflags();
197
198 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0)
199 cpu_send_ipiq(target->gd_cpuid);
200 cpu_enable_intr();
201 ++ipiq_fifofull;
202 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
203 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
204 lwkt_process_ipiq();
205 }
206 write_eflags(eflags);
207 }
208
209 /*
210 * Queue the new message
3b6b7bd1 211 */
3b6b7bd1 212 windex = ip->ip_windex & MAXCPUFIFO_MASK;
b8a98473
MD
213 ip->ip_func[windex] = func;
214 ip->ip_arg1[windex] = arg1;
215 ip->ip_arg2[windex] = arg2;
35238fa5 216 cpu_sfence();
3b6b7bd1 217 ++ip->ip_windex;
4c9f5a7f
MD
218 --gd->gd_intr_nesting_level;
219
220 /*
221 * signal the target cpu that there is work pending.
222 */
223 if (atomic_poll_acquire_int(&ip->ip_npoll)) {
224 cpu_send_ipiq(target->gd_cpuid);
225 } else {
226 if (ipiq_optimized == 0)
227 cpu_send_ipiq(target->gd_cpuid);
228 ++ipiq_avoided;
229 }
230 crit_exit();
231 return(ip->ip_windex);
232}
233
234/*
235 * Similar to lwkt_send_ipiq() but this function does not actually initiate
236 * the IPI to the target cpu unless the FIFO has become too full, so it is
237 * very fast.
238 *
239 * This function is used for non-critical IPI messages, such as memory
240 * deallocations. The queue will typically be flushed by the target cpu at
241 * the next clock interrupt.
242 *
243 * Need not be called from a critical section.
244 */
245int
b8a98473
MD
246lwkt_send_ipiq3_passive(globaldata_t target, ipifunc3_t func,
247 void *arg1, int arg2)
4c9f5a7f
MD
248{
249 lwkt_ipiq_t ip;
250 int windex;
251 struct globaldata *gd = mycpu;
252
253 KKASSERT(target != gd);
254 crit_enter();
ac72c7f4 255 logipiq(send_pasv, func, arg, gd, target);
4c9f5a7f
MD
256 ++gd->gd_intr_nesting_level;
257#ifdef INVARIANTS
258 if (gd->gd_intr_nesting_level > 20)
259 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
260#endif
261 KKASSERT(curthread->td_pri >= TDPRI_CRIT);
262 ++ipiq_count;
263 ++ipiq_passive;
264 ip = &gd->gd_ipiq[target->gd_cpuid];
265
266 /*
267 * Do not allow the FIFO to become full. Interrupts must be physically
268 * enabled while we liveloop to avoid deadlocking the APIC.
269 */
3b6b7bd1
MD
270 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
271 unsigned int eflags = read_eflags();
4c9f5a7f
MD
272
273 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0)
274 cpu_send_ipiq(target->gd_cpuid);
3b6b7bd1
MD
275 cpu_enable_intr();
276 ++ipiq_fifofull;
277 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
278 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
279 lwkt_process_ipiq();
280 }
281 write_eflags(eflags);
282 }
4c9f5a7f
MD
283
284 /*
285 * Queue the new message
286 */
287 windex = ip->ip_windex & MAXCPUFIFO_MASK;
b8a98473
MD
288 ip->ip_func[windex] = func;
289 ip->ip_arg1[windex] = arg1;
290 ip->ip_arg2[windex] = arg2;
35238fa5 291 cpu_sfence();
4c9f5a7f 292 ++ip->ip_windex;
3b6b7bd1 293 --gd->gd_intr_nesting_level;
4c9f5a7f
MD
294
295 /*
296 * Do not signal the target cpu, it will pick up the IPI when it next
297 * polls (typically on the next tick).
298 */
3b6b7bd1
MD
299 crit_exit();
300 return(ip->ip_windex);
301}
302
41a01a4d 303/*
4c9f5a7f
MD
304 * Send an IPI request without blocking, return 0 on success, ENOENT on
305 * failure. The actual queueing of the hardware IPI may still force us
306 * to spin and process incoming IPIs but that will eventually go away
307 * when we've gotten rid of the other general IPIs.
41a01a4d
MD
308 */
309int
b8a98473
MD
310lwkt_send_ipiq3_nowait(globaldata_t target, ipifunc3_t func,
311 void *arg1, int arg2)
41a01a4d
MD
312{
313 lwkt_ipiq_t ip;
314 int windex;
315 struct globaldata *gd = mycpu;
316
ac72c7f4 317 logipiq(send_nbio, func, arg, gd, target);
41a01a4d
MD
318 KKASSERT(curthread->td_pri >= TDPRI_CRIT);
319 if (target == gd) {
b8a98473 320 func(arg1, arg2, NULL);
41a01a4d
MD
321 return(0);
322 }
323 ++ipiq_count;
324 ip = &gd->gd_ipiq[target->gd_cpuid];
325
ac72c7f4
MD
326 if (ip->ip_windex - ip->ip_rindex >= MAXCPUFIFO * 2 / 3) {
327 logipiq(send_fail, func, arg, gd, target);
41a01a4d 328 return(ENOENT);
ac72c7f4 329 }
41a01a4d 330 windex = ip->ip_windex & MAXCPUFIFO_MASK;
b8a98473
MD
331 ip->ip_func[windex] = func;
332 ip->ip_arg1[windex] = arg1;
333 ip->ip_arg2[windex] = arg2;
35238fa5 334 cpu_sfence();
41a01a4d 335 ++ip->ip_windex;
4c9f5a7f 336
41a01a4d 337 /*
4c9f5a7f 338 * This isn't a passive IPI, we still have to signal the target cpu.
41a01a4d 339 */
4c9f5a7f
MD
340 if (atomic_poll_acquire_int(&ip->ip_npoll)) {
341 cpu_send_ipiq(target->gd_cpuid);
342 } else {
343 if (ipiq_optimized == 0)
344 cpu_send_ipiq(target->gd_cpuid);
728f6208
MD
345 else
346 ++ipiq_avoided;
4c9f5a7f 347 }
41a01a4d
MD
348 return(0);
349}
350
3b6b7bd1
MD
351/*
352 * deprecated, used only by fast int forwarding.
353 */
354int
b8a98473 355lwkt_send_ipiq3_bycpu(int dcpu, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1 356{
b8a98473 357 return(lwkt_send_ipiq3(globaldata_find(dcpu), func, arg1, arg2));
3b6b7bd1
MD
358}
359
360/*
361 * Send a message to several target cpus. Typically used for scheduling.
362 * The message will not be sent to stopped cpus.
363 */
364int
b8a98473 365lwkt_send_ipiq3_mask(u_int32_t mask, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1
MD
366{
367 int cpuid;
368 int count = 0;
369
370 mask &= ~stopped_cpus;
371 while (mask) {
372 cpuid = bsfl(mask);
b8a98473 373 lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
3b6b7bd1
MD
374 mask &= ~(1 << cpuid);
375 ++count;
376 }
377 return(count);
378}
379
380/*
381 * Wait for the remote cpu to finish processing a function.
382 *
383 * YYY we have to enable interrupts and process the IPIQ while waiting
384 * for it to empty or we may deadlock with another cpu. Create a CPU_*()
385 * function to do this! YYY we really should 'block' here.
386 *
387 * MUST be called from a critical section. This routine may be called
388 * from an interrupt (for example, if an interrupt wakes a foreign thread
389 * up).
390 */
391void
392lwkt_wait_ipiq(globaldata_t target, int seq)
393{
394 lwkt_ipiq_t ip;
395 int maxc = 100000000;
396
397 if (target != mycpu) {
398 ip = &mycpu->gd_ipiq[target->gd_cpuid];
399 if ((int)(ip->ip_xindex - seq) < 0) {
400 unsigned int eflags = read_eflags();
401 cpu_enable_intr();
402 while ((int)(ip->ip_xindex - seq) < 0) {
41a01a4d 403 crit_enter();
3b6b7bd1 404 lwkt_process_ipiq();
41a01a4d 405 crit_exit();
3b6b7bd1
MD
406 if (--maxc == 0)
407 printf("LWKT_WAIT_IPIQ WARNING! %d wait %d (%d)\n", mycpu->gd_cpuid, target->gd_cpuid, ip->ip_xindex - seq);
408 if (maxc < -1000000)
409 panic("LWKT_WAIT_IPIQ");
35238fa5
MD
410 /*
411 * xindex may be modified by another cpu, use a load fence
412 * to ensure that the loop does not use a speculative value
413 * (which may improve performance).
414 */
415 cpu_lfence();
3b6b7bd1
MD
416 }
417 write_eflags(eflags);
418 }
419 }
420}
421
41a01a4d
MD
422int
423lwkt_seq_ipiq(globaldata_t target)
424{
425 lwkt_ipiq_t ip;
426
427 ip = &mycpu->gd_ipiq[target->gd_cpuid];
428 return(ip->ip_windex);
429}
430
3b6b7bd1
MD
431/*
432 * Called from IPI interrupt (like a fast interrupt), which has placed
433 * us in a critical section. The MP lock may or may not be held.
434 * May also be called from doreti or splz, or be reentrantly called
435 * indirectly through the ip_func[] we run.
436 *
437 * There are two versions, one where no interrupt frame is available (when
438 * called from the send code and from splz, and one where an interrupt
439 * frame is available.
440 */
441void
442lwkt_process_ipiq(void)
443{
444 globaldata_t gd = mycpu;
ac72c7f4 445 globaldata_t sgd;
3b6b7bd1
MD
446 lwkt_ipiq_t ip;
447 int n;
448
449again:
450 for (n = 0; n < ncpus; ++n) {
451 if (n != gd->gd_cpuid) {
ac72c7f4
MD
452 sgd = globaldata_find(n);
453 ip = sgd->gd_ipiq;
3b6b7bd1 454 if (ip != NULL) {
b8a98473 455 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], NULL))
3b6b7bd1
MD
456 ;
457 }
458 }
459 }
460 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
b8a98473 461 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL)) {
0f7a3396
MD
462 if (gd->gd_curthread->td_cscount == 0)
463 goto again;
464 need_ipiq();
465 }
3b6b7bd1
MD
466 }
467}
468
469#ifdef _KERNEL
470void
471lwkt_process_ipiq_frame(struct intrframe frame)
472{
473 globaldata_t gd = mycpu;
ac72c7f4 474 globaldata_t sgd;
3b6b7bd1
MD
475 lwkt_ipiq_t ip;
476 int n;
477
478again:
479 for (n = 0; n < ncpus; ++n) {
480 if (n != gd->gd_cpuid) {
ac72c7f4
MD
481 sgd = globaldata_find(n);
482 ip = sgd->gd_ipiq;
3b6b7bd1 483 if (ip != NULL) {
b8a98473 484 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], &frame))
3b6b7bd1
MD
485 ;
486 }
487 }
488 }
489 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
b8a98473 490 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, &frame)) {
0f7a3396
MD
491 if (gd->gd_curthread->td_cscount == 0)
492 goto again;
493 need_ipiq();
494 }
3b6b7bd1
MD
495 }
496}
497#endif
498
499static int
b8a98473
MD
500lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
501 struct intrframe *frame)
3b6b7bd1
MD
502{
503 int ri;
35238fa5 504 int wi;
b8a98473
MD
505 ipifunc3_t copy_func;
506 void *copy_arg1;
507 int copy_arg2;
35238fa5
MD
508
509 /*
510 * Obtain the current write index, which is modified by a remote cpu.
511 * Issue a load fence to prevent speculative reads of e.g. data written
512 * by the other cpu prior to it updating the index.
513 */
728f6208 514 KKASSERT(curthread->td_pri >= TDPRI_CRIT);
35238fa5
MD
515 wi = ip->ip_windex;
516 cpu_lfence();
517
3b6b7bd1
MD
518 /*
519 * Note: xindex is only updated after we are sure the function has
520 * finished execution. Beware lwkt_process_ipiq() reentrancy! The
521 * function may send an IPI which may block/drain.
d64a7617
MD
522 *
523 * Note: due to additional IPI operations that the callback function
524 * may make, it is possible for both rindex and windex to advance and
525 * thus for rindex to advance passed our cached windex.
3b6b7bd1 526 */
d64a7617 527 while (wi - (ri = ip->ip_rindex) > 0) {
3b6b7bd1 528 ri &= MAXCPUFIFO_MASK;
728f6208 529 copy_func = ip->ip_func[ri];
b8a98473
MD
530 copy_arg1 = ip->ip_arg1[ri];
531 copy_arg2 = ip->ip_arg2[ri];
728f6208
MD
532 cpu_mfence();
533 ++ip->ip_rindex;
534 KKASSERT((ip->ip_rindex & MAXCPUFIFO_MASK) == ((ri + 1) & MAXCPUFIFO_MASK));
b8a98473
MD
535 logipiq(receive, copy_func, copy_arg1, sgd, mycpu);
536 copy_func(copy_arg1, copy_arg2, frame);
35238fa5 537 cpu_sfence();
3b6b7bd1 538 ip->ip_xindex = ip->ip_rindex;
e8f15168
MD
539
540#ifdef PANIC_DEBUG
541 /*
542 * Simulate panics during the processing of an IPI
543 */
544 if (mycpu->gd_cpuid == panic_ipiq_cpu && panic_ipiq_count) {
545 if (--panic_ipiq_count == 0) {
546#ifdef DDB
547 Debugger("PANIC_DEBUG");
548#else
549 panic("PANIC_DEBUG");
550#endif
551 }
552 }
553#endif
3b6b7bd1 554 }
4c9f5a7f
MD
555
556 /*
557 * Return non-zero if there are more IPI messages pending on this
558 * ipiq. ip_npoll is left set as long as possible to reduce the
559 * number of IPIs queued by the originating cpu, but must be cleared
560 * *BEFORE* checking windex.
561 */
562 atomic_poll_release_int(&ip->ip_npoll);
3b6b7bd1
MD
563 return(wi != ip->ip_windex);
564}
565
0f7a3396
MD
566#endif
567
3b6b7bd1
MD
568/*
569 * CPU Synchronization Support
5c71a36a
MD
570 *
571 * lwkt_cpusync_simple()
572 *
573 * The function is executed synchronously before return on remote cpus.
574 * A lwkt_cpusync_t pointer is passed as an argument. The data can
575 * be accessed via arg->cs_data.
576 *
577 * XXX should I just pass the data as an argument to be consistent?
3b6b7bd1
MD
578 */
579
580void
5c71a36a
MD
581lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *data)
582{
583 struct lwkt_cpusync cmd;
584
585 cmd.cs_run_func = NULL;
586 cmd.cs_fin1_func = func;
587 cmd.cs_fin2_func = NULL;
588 cmd.cs_data = data;
589 lwkt_cpusync_start(mask & mycpu->gd_other_cpus, &cmd);
590 if (mask & (1 << mycpu->gd_cpuid))
591 func(&cmd);
592 lwkt_cpusync_finish(&cmd);
593}
594
595/*
596 * lwkt_cpusync_fastdata()
597 *
598 * The function is executed in tandem with return on remote cpus.
599 * The data is directly passed as an argument. Do not pass pointers to
600 * temporary storage as the storage might have
601 * gone poof by the time the target cpu executes
602 * the function.
603 *
604 * At the moment lwkt_cpusync is declared on the stack and we must wait
605 * for all remote cpus to ack in lwkt_cpusync_finish(), but as a future
606 * optimization we should be able to put a counter in the globaldata
607 * structure (if it is not otherwise being used) and just poke it and
608 * return without waiting. XXX
609 */
610void
611lwkt_cpusync_fastdata(cpumask_t mask, cpusync_func2_t func, void *data)
3b6b7bd1
MD
612{
613 struct lwkt_cpusync cmd;
3b6b7bd1
MD
614
615 cmd.cs_run_func = NULL;
616 cmd.cs_fin1_func = NULL;
617 cmd.cs_fin2_func = func;
5c71a36a
MD
618 cmd.cs_data = NULL;
619 lwkt_cpusync_start(mask & mycpu->gd_other_cpus, &cmd);
3b6b7bd1
MD
620 if (mask & (1 << mycpu->gd_cpuid))
621 func(data);
5c71a36a 622 lwkt_cpusync_finish(&cmd);
3b6b7bd1
MD
623}
624
625/*
5c71a36a
MD
626 * lwkt_cpusync_start()
627 *
628 * Start synchronization with a set of target cpus, return once they are
629 * known to be in a synchronization loop. The target cpus will execute
630 * poll->cs_run_func() IN TANDEM WITH THE RETURN.
631 *
632 * XXX future: add lwkt_cpusync_start_quick() and require a call to
633 * lwkt_cpusync_add() or lwkt_cpusync_wait(), allowing the caller to
634 * potentially absorb the IPI latency doing something useful.
3b6b7bd1 635 */
5c71a36a 636void
3b6b7bd1
MD
637lwkt_cpusync_start(cpumask_t mask, lwkt_cpusync_t poll)
638{
0f7a3396
MD
639 globaldata_t gd = mycpu;
640
3b6b7bd1 641 poll->cs_count = 0;
5c71a36a 642 poll->cs_mask = mask;
0f7a3396
MD
643#ifdef SMP
644 poll->cs_maxcount = lwkt_send_ipiq_mask(
645 mask & gd->gd_other_cpus & smp_active_mask,
b8a98473 646 (ipifunc1_t)lwkt_cpusync_remote1, poll);
0f7a3396 647#endif
fda1ad89 648 if (mask & gd->gd_cpumask) {
5c71a36a
MD
649 if (poll->cs_run_func)
650 poll->cs_run_func(poll);
651 }
0f7a3396
MD
652#ifdef SMP
653 if (poll->cs_maxcount) {
654 ++ipiq_cscount;
655 ++gd->gd_curthread->td_cscount;
656 while (poll->cs_count != poll->cs_maxcount) {
657 crit_enter();
658 lwkt_process_ipiq();
659 crit_exit();
660 }
5c71a36a 661 }
0f7a3396 662#endif
5c71a36a
MD
663}
664
665void
666lwkt_cpusync_add(cpumask_t mask, lwkt_cpusync_t poll)
667{
0f7a3396 668 globaldata_t gd = mycpu;
41a01a4d 669#ifdef SMP
0f7a3396 670 int count;
41a01a4d 671#endif
0f7a3396 672
5c71a36a
MD
673 mask &= ~poll->cs_mask;
674 poll->cs_mask |= mask;
0f7a3396
MD
675#ifdef SMP
676 count = lwkt_send_ipiq_mask(
677 mask & gd->gd_other_cpus & smp_active_mask,
b8a98473 678 (ipifunc1_t)lwkt_cpusync_remote1, poll);
0f7a3396 679#endif
fda1ad89 680 if (mask & gd->gd_cpumask) {
5c71a36a
MD
681 if (poll->cs_run_func)
682 poll->cs_run_func(poll);
683 }
0f7a3396
MD
684#ifdef SMP
685 poll->cs_maxcount += count;
686 if (poll->cs_maxcount) {
687 if (poll->cs_maxcount == count)
688 ++gd->gd_curthread->td_cscount;
689 while (poll->cs_count != poll->cs_maxcount) {
690 crit_enter();
691 lwkt_process_ipiq();
692 crit_exit();
693 }
3b6b7bd1 694 }
0f7a3396 695#endif
3b6b7bd1
MD
696}
697
698/*
699 * Finish synchronization with a set of target cpus. The target cpus will
700 * execute cs_fin1_func(poll) prior to this function returning, and will
701 * execute cs_fin2_func(data) IN TANDEM WITH THIS FUNCTION'S RETURN.
0f7a3396
MD
702 *
703 * If cs_maxcount is non-zero then we are mastering a cpusync with one or
704 * more remote cpus and must account for it in our thread structure.
3b6b7bd1
MD
705 */
706void
5c71a36a 707lwkt_cpusync_finish(lwkt_cpusync_t poll)
3b6b7bd1 708{
0f7a3396 709 globaldata_t gd = mycpu;
5c71a36a 710
3b6b7bd1 711 poll->cs_count = -1;
fda1ad89 712 if (poll->cs_mask & gd->gd_cpumask) {
5c71a36a
MD
713 if (poll->cs_fin1_func)
714 poll->cs_fin1_func(poll);
715 if (poll->cs_fin2_func)
716 poll->cs_fin2_func(poll->cs_data);
717 }
0f7a3396
MD
718#ifdef SMP
719 if (poll->cs_maxcount) {
720 while (poll->cs_count != -(poll->cs_maxcount + 1)) {
721 crit_enter();
722 lwkt_process_ipiq();
723 crit_exit();
724 }
725 --gd->gd_curthread->td_cscount;
3b6b7bd1 726 }
0f7a3396 727#endif
3b6b7bd1
MD
728}
729
0f7a3396
MD
730#ifdef SMP
731
3b6b7bd1
MD
732/*
733 * helper IPI remote messaging function.
734 *
735 * Called on remote cpu when a new cpu synchronization request has been
736 * sent to us. Execute the run function and adjust cs_count, then requeue
737 * the request so we spin on it.
738 */
739static void
740lwkt_cpusync_remote1(lwkt_cpusync_t poll)
741{
742 atomic_add_int(&poll->cs_count, 1);
743 if (poll->cs_run_func)
744 poll->cs_run_func(poll);
745 lwkt_cpusync_remote2(poll);
746}
747
748/*
749 * helper IPI remote messaging function.
750 *
751 * Poll for the originator telling us to finish. If it hasn't, requeue
752 * our request so we spin on it. When the originator requests that we
753 * finish we execute cs_fin1_func(poll) synchronously and cs_fin2_func(data)
754 * in tandem with the release.
755 */
756static void
757lwkt_cpusync_remote2(lwkt_cpusync_t poll)
758{
759 if (poll->cs_count < 0) {
760 cpusync_func2_t savef;
761 void *saved;
762
763 if (poll->cs_fin1_func)
764 poll->cs_fin1_func(poll);
765 if (poll->cs_fin2_func) {
766 savef = poll->cs_fin2_func;
767 saved = poll->cs_data;
768 atomic_add_int(&poll->cs_count, -1);
769 savef(saved);
770 } else {
771 atomic_add_int(&poll->cs_count, -1);
772 }
773 } else {
774 globaldata_t gd = mycpu;
775 lwkt_ipiq_t ip;
776 int wi;
777
778 ip = &gd->gd_cpusyncq;
779 wi = ip->ip_windex & MAXCPUFIFO_MASK;
b8a98473
MD
780 ip->ip_func[wi] = (ipifunc3_t)(ipifunc1_t)lwkt_cpusync_remote2;
781 ip->ip_arg1[wi] = poll;
782 ip->ip_arg2[wi] = 0;
35238fa5 783 cpu_sfence();
3b6b7bd1
MD
784 ++ip->ip_windex;
785 }
786}
787
3b6b7bd1 788#endif