remove __P() from this directory
[dragonfly.git] / sys / dev / disk / nsp / nsp.c
CommitLineData
984263bc 1/* $FreeBSD: src/sys/dev/nsp/nsp.c,v 1.1.2.6 2001/12/17 13:30:18 non Exp $ */
38e94a25 2/* $DragonFly: src/sys/dev/disk/nsp/nsp.c,v 1.5 2003/08/27 10:35:17 rob Exp $ */
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3/* $NecBSD: nsp.c,v 1.21.12.6 2001/06/29 06:27:52 honda Exp $ */
4/* $NetBSD$ */
5
6#define NSP_DEBUG
7#define NSP_STATICS
8#define NSP_IO_CONTROL_FLAGS \
9 (NSP_READ_SUSPEND_IO | NSP_WRITE_SUSPEND_IO | \
10 NSP_READ_FIFO_INTERRUPTS | NSP_WRITE_FIFO_INTERRUPTS | \
11 NSP_USE_MEMIO | NSP_WAIT_FOR_SELECT)
12
13/*
14 * Copyright (c) 1998, 1999, 2000, 2001
15 * NetBSD/pc98 porting staff. All rights reserved.
16 *
17 * Copyright (c) 1998, 1999, 2000, 2001
18 * Naofumi HONDA. All rights reserved.
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * 3. The name of the author may not be used to endorse or promote products
29 * derived from this software without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
32 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
35 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
40 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 * POSSIBILITY OF SUCH DAMAGE.
42 */
43#include "opt_ddb.h"
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#if defined(__FreeBSD__) && __FreeBSD_version > 500001
49#include <sys/bio.h>
50#endif /* __ FreeBSD__ */
51#include <sys/buf.h>
52#include <sys/queue.h>
53#include <sys/malloc.h>
54#include <sys/errno.h>
55
56#ifdef __NetBSD__
57#include <sys/device.h>
58#include <machine/bus.h>
59#include <machine/intr.h>
60
61#include <dev/scsipi/scsi_all.h>
62#include <dev/scsipi/scsipi_all.h>
63#include <dev/scsipi/scsiconf.h>
64#include <dev/scsipi/scsi_disk.h>
65
66#include <machine/dvcfg.h>
67#include <machine/physio_proc.h>
68
69#include <i386/Cbus/dev/scsi_low.h>
70#include <i386/Cbus/dev/nspreg.h>
71#include <i386/Cbus/dev/nspvar.h>
72#endif /* __NetBSD__ */
73
74#ifdef __FreeBSD__
75#include <machine/clock.h>
76#include <machine/cpu.h>
77#include <machine/bus_pio.h>
78#include <machine/bus_memio.h>
79#include <machine/bus.h>
80
81#include <machine/dvcfg.h>
82#include <machine/physio_proc.h>
83
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84#include <bus/cam/scsi/scsi_low.h>
85#include "nspreg.h"
86#include "nspvar.h"
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87#endif /* __FreeBSD__ */
88
89/***************************************************
90 * USER SETTINGS
91 ***************************************************/
92/* DEVICE CONFIGURATION FLAGS (MINOR)
93 *
94 * 0x01 DISCONECT OFF
95 * 0x02 PARITY LINE OFF
96 * 0x04 IDENTIFY MSG OFF ( = single lun)
97 * 0x08 SYNC TRANSFER OFF
98 */
99
100/***************************************************
101 * PARAMS
102 ***************************************************/
103#define NSP_NTARGETS 8
104#define NSP_NLUNS 8
105
106#define NSP_MAX_DATA_SIZE (64 * 1024)
107#define NSP_SELTIMEOUT (200)
108#define NSP_DELAY_MAX (2 * 1000 * 1000)
109#define NSP_DELAY_INTERVAL (1)
110#define NSP_TIMER_1MS (1000 / 51)
111
112/***************************************************
113 * DEBUG
114 ***************************************************/
115#ifdef NSP_DEBUG
116int nsp_debug;
117#endif /* NSP_DEBUG */
118
119#ifdef NSP_STATICS
120struct nsp_statics {
121 int arbit_conflict_1;
122 int arbit_conflict_2;
123 int device_data_write;
124 int device_busy;
125 int disconnect;
126 int reselect;
127 int data_phase_bypass;
128} nsp_statics;
129#endif /* NSP_STATICS */
130
131/***************************************************
132 * IO control
133 ***************************************************/
134#define NSP_READ_SUSPEND_IO 0x0001
135#define NSP_WRITE_SUSPEND_IO 0x0002
136#define NSP_USE_MEMIO 0x0004
137#define NSP_READ_FIFO_INTERRUPTS 0x0010
138#define NSP_WRITE_FIFO_INTERRUPTS 0x0020
139#define NSP_WAIT_FOR_SELECT 0x0100
140
141u_int nsp_io_control = NSP_IO_CONTROL_FLAGS;
142int nsp_read_suspend_bytes = DEV_BSIZE;
143int nsp_write_suspend_bytes = DEV_BSIZE;
144int nsp_read_interrupt_bytes = 4096;
145int nsp_write_interrupt_bytes = 4096;
146
147/***************************************************
148 * DEVICE STRUCTURE
149 ***************************************************/
150extern struct cfdriver nsp_cd;
151
152/**************************************************************
153 * DECLARE
154 **************************************************************/
155#define NSP_FIFO_ON 1
156#define NSP_FIFO_OFF 0
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157static void nsp_pio_read (struct nsp_softc *, int);
158static void nsp_pio_write (struct nsp_softc *, int);
159static int nsp_xfer (struct nsp_softc *, u_int8_t *, int, int, int);
160static int nsp_msg (struct nsp_softc *, struct targ_info *, u_int);
161static int nsp_reselected (struct nsp_softc *);
162static int nsp_disconnected (struct nsp_softc *, struct targ_info *);
163static void nsp_pdma_end (struct nsp_softc *, struct targ_info *);
164static void nsphw_init (struct nsp_softc *);
165static int nsp_target_nexus_establish (struct nsp_softc *);
166static int nsp_lun_nexus_establish (struct nsp_softc *);
167static int nsp_ccb_nexus_establish (struct nsp_softc *);
168static int nsp_world_start (struct nsp_softc *, int);
169static int nsphw_start_selection (struct nsp_softc *sc, struct slccb *);
170static void nsphw_bus_reset (struct nsp_softc *);
171static void nsphw_attention (struct nsp_softc *);
172static u_int nsp_fifo_count (struct nsp_softc *);
173static u_int nsp_request_count (struct nsp_softc *);
174static int nsp_negate_signal (struct nsp_softc *, u_int8_t, u_char *);
175static int nsp_expect_signal (struct nsp_softc *, u_int8_t, u_int8_t);
176static void nsp_start_timer (struct nsp_softc *, int);
177static void nsp_setup_fifo (struct nsp_softc *, int, int, int);
178static int nsp_targ_init (struct nsp_softc *, struct targ_info *, int);
179static void nsphw_selection_done_and_expect_msgout (struct nsp_softc *);
180static void nsp_data_padding (struct nsp_softc *, int, u_int);
181static int nsp_timeout (struct nsp_softc *);
182static int nsp_read_fifo (struct nsp_softc *, int);
183static int nsp_write_fifo (struct nsp_softc *, int);
184static int nsp_phase_match (struct nsp_softc *, u_int8_t, u_int8_t);
185static int nsp_wait_interrupt (struct nsp_softc *);
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186
187struct scsi_low_funcs nspfuncs = {
188 SC_LOW_INIT_T nsp_world_start,
189 SC_LOW_BUSRST_T nsphw_bus_reset,
190 SC_LOW_TARG_INIT_T nsp_targ_init,
191 SC_LOW_LUN_INIT_T NULL,
192
193 SC_LOW_SELECT_T nsphw_start_selection,
194 SC_LOW_NEXUS_T nsp_lun_nexus_establish,
195 SC_LOW_NEXUS_T nsp_ccb_nexus_establish,
196
197 SC_LOW_ATTEN_T nsphw_attention,
198 SC_LOW_MSG_T nsp_msg,
199
200 SC_LOW_TIMEOUT_T nsp_timeout,
201 SC_LOW_POLL_T nspintr,
202
203 NULL,
204};
205
206/****************************************************
207 * hwfuncs
208 ****************************************************/
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209static __inline u_int8_t nsp_cr_read_1 (bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs);
210static __inline void nsp_cr_write_1 (bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs, u_int8_t va);
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211
212static __inline u_int8_t
213nsp_cr_read_1(bst, bsh, ofs)
214 bus_space_tag_t bst;
215 bus_space_handle_t bsh;
216 bus_addr_t ofs;
217{
218
219 bus_space_write_1(bst, bsh, nsp_idxr, ofs);
220 return bus_space_read_1(bst, bsh, nsp_datar);
221}
222
223static __inline void
224nsp_cr_write_1(bst, bsh, ofs, va)
225 bus_space_tag_t bst;
226 bus_space_handle_t bsh;
227 bus_addr_t ofs;
228 u_int8_t va;
229{
230
231 bus_space_write_1(bst, bsh, nsp_idxr, ofs);
232 bus_space_write_1(bst, bsh, nsp_datar, va);
233}
234
235static int
236nsp_expect_signal(sc, curphase, mask)
237 struct nsp_softc *sc;
238 u_int8_t curphase, mask;
239{
240 struct scsi_low_softc *slp = &sc->sc_sclow;
241 bus_space_tag_t bst = sc->sc_iot;
242 bus_space_handle_t bsh = sc->sc_ioh;
243 int wc;
244 u_int8_t ph, isrc;
245
246 for (wc = 0; wc < NSP_DELAY_MAX / NSP_DELAY_INTERVAL; wc ++)
247 {
248 ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
249 if (ph == (u_int8_t) -1)
250 return -1;
251
252 isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
253 if (isrc & IRQSR_SCSI)
254 return 0;
255
256 if ((ph & mask) != 0 && (ph & SCBUSMON_PHMASK) == curphase)
257 return 1;
258
259 SCSI_LOW_DELAY(NSP_DELAY_INTERVAL);
260 }
261
262 printf("%s: nsp_expect_signal timeout\n", slp->sl_xname);
263 return -1;
264}
265
266static void
267nsphw_init(sc)
268 struct nsp_softc *sc;
269{
270 bus_space_tag_t bst = sc->sc_iot;
271 bus_space_handle_t bsh = sc->sc_ioh;
272
273 /* block all interrupts */
274 bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_ALLMASK);
275
276 /* setup SCSI interface */
277 bus_space_write_1(bst, bsh, nsp_ifselr, IFSELR_IFSEL);
278
279 nsp_cr_write_1(bst, bsh, NSPR_SCIENR, 0);
280
281 nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_IO8);
282 nsp_cr_write_1(bst, bsh, NSPR_CLKDIVR, sc->sc_iclkdiv);
283
284 nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
285 nsp_cr_write_1(bst, bsh, NSPR_PARITYR, sc->sc_parr);
286 nsp_cr_write_1(bst, bsh, NSPR_PTCLRR,
287 PTCLRR_ACK | PTCLRR_REQ | PTCLRR_HOST | PTCLRR_RSS);
288
289 /* setup fifo asic */
290 bus_space_write_1(bst, bsh, nsp_ifselr, IFSELR_REGSEL);
291 nsp_cr_write_1(bst, bsh, NSPR_TERMPWRC, 0);
292 if ((nsp_cr_read_1(bst, bsh, NSPR_OCR) & OCR_TERMPWRS) == 0)
293 nsp_cr_write_1(bst, bsh, NSPR_TERMPWRC, TERMPWRC_POWON);
294
295 nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_IO8);
296 nsp_cr_write_1(bst, bsh, NSPR_CLKDIVR, sc->sc_clkdiv);
297 nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
298 nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
299
300 nsp_cr_write_1(bst, bsh, NSPR_SYNCR, 0);
301 nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, 0);
302
303 /* enable interrupts and ack them */
304 nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
305 bus_space_write_1(bst, bsh, nsp_irqcr, IRQSR_MASK);
306
307 nsp_setup_fifo(sc, NSP_FIFO_OFF, SCSI_LOW_READ, 0);
308}
309
310/****************************************************
311 * scsi low interface
312 ****************************************************/
313static void
314nsphw_attention(sc)
315 struct nsp_softc *sc;
316{
317 bus_space_tag_t bst = sc->sc_iot;
318 bus_space_handle_t bsh = sc->sc_ioh;
319 u_int8_t cr;
320
321 cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR)/* & ~SCBUSCR_ACK */;
322 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr | SCBUSCR_ATN);
323 SCSI_LOW_DELAY(10);
324}
325
326static void
327nsphw_bus_reset(sc)
328 struct nsp_softc *sc;
329{
330 bus_space_tag_t bst = sc->sc_iot;
331 bus_space_handle_t bsh = sc->sc_ioh;
332 int i;
333
334 bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_ALLMASK);
335
336 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, SCBUSCR_RST);
337 SCSI_LOW_DELAY(100 * 1000); /* 100ms */
338 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, 0);
339 for (i = 0; i < 5; i ++)
340 (void) nsp_cr_read_1(bst, bsh, NSPR_IRQPHS);
341
342 bus_space_write_1(bst, bsh, nsp_irqcr, IRQSR_MASK);
343}
344
345static void
346nsphw_selection_done_and_expect_msgout(sc)
347 struct nsp_softc *sc;
348{
349 struct scsi_low_softc *slp = &sc->sc_sclow;
350 bus_space_tag_t bst = sc->sc_iot;
351 bus_space_handle_t bsh = sc->sc_ioh;
352
353 /* clear ack counter */
354 sc->sc_cnt = 0;
355 nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
356 PTCLRR_REQ | PTCLRR_HOST);
357
358 /* deassert sel and assert atten */
359 sc->sc_seltout = 0;
360 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, sc->sc_busc);
361 SCSI_LOW_DELAY(1);
362 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
363 sc->sc_busc | SCBUSCR_ADIR | SCBUSCR_ACKEN);
364 SCSI_LOW_ASSERT_ATN(slp);
365}
366
367static int
368nsphw_start_selection(sc, cb)
369 struct nsp_softc *sc;
370 struct slccb *cb;
371{
372 struct scsi_low_softc *slp = &sc->sc_sclow;
373 bus_space_tag_t bst = sc->sc_iot;
374 bus_space_handle_t bsh = sc->sc_ioh;
375 struct targ_info *ti = cb->ti;
f96d6c88 376 u_int8_t arbs, ph;
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377 int s, wc;
378
379 wc = sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
380 sc->sc_dataout_timeout = 0;
381
382 /* check bus free */
383 s = splhigh();
384 ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
385 if (ph != SCBUSMON_FREE)
386 {
387 splx(s);
388#ifdef NSP_STATICS
389 nsp_statics.arbit_conflict_1 ++;
390#endif /* NSP_STATICS */
391 return SCSI_LOW_START_FAIL;
392 }
393
394 /* start arbitration */
395 nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_EXEC);
396 splx(s);
397
398 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
399 do
400 {
401 /* XXX: what a stupid chip! */
402 arbs = nsp_cr_read_1(bst, bsh, NSPR_ARBITS);
403 SCSI_LOW_DELAY(1);
404 }
405 while ((arbs & (ARBITS_WIN | ARBITS_FAIL)) == 0 && wc -- > 0);
406
407 if ((arbs & ARBITS_WIN) == 0)
408 {
409 nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_CLR);
410#ifdef NSP_STATICS
411 nsp_statics.arbit_conflict_2 ++;
412#endif /* NSP_STATICS */
413 return SCSI_LOW_START_FAIL;
414 }
415
416 /* assert select line */
417 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
418 scsi_low_arbit_win(slp);
419
420 s = splhigh();
421 SCSI_LOW_DELAY(3);
422 nsp_cr_write_1(bst, bsh, NSPR_DATA,
423 sc->sc_idbit | (1 << ti->ti_id));
424 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
425 SCBUSCR_SEL | SCBUSCR_BSY | sc->sc_busc);
426 SCSI_LOW_DELAY(3);
427 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, SCBUSCR_SEL |
428 SCBUSCR_BSY | SCBUSCR_DOUT | sc->sc_busc);
429 nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_CLR);
430 SCSI_LOW_DELAY(3);
431 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
432 SCBUSCR_SEL | SCBUSCR_DOUT | sc->sc_busc);
433 SCSI_LOW_DELAY(1);
434
435 if ((nsp_io_control & NSP_WAIT_FOR_SELECT) != 0)
436 {
437#define NSP_FIRST_SEL_WAIT 300
438#define NSP_SEL_CHECK_INTERVAL 10
439
440 /* wait for a selection response */
441 for (wc = 0; wc < NSP_FIRST_SEL_WAIT / NSP_SEL_CHECK_INTERVAL;
442 wc ++)
443 {
444 ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
445 if ((ph & SCBUSMON_BSY) == 0)
446 {
447 SCSI_LOW_DELAY(NSP_SEL_CHECK_INTERVAL);
448 continue;
449 }
450
451 SCSI_LOW_DELAY(1);
452 ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
453 if ((ph & SCBUSMON_BSY) != 0)
454 {
455 nsphw_selection_done_and_expect_msgout(sc);
456 splx(s);
457
458 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
459 return SCSI_LOW_START_OK;
460 }
461 }
462 }
463 splx(s);
464
465 /* check a selection timeout */
466 nsp_start_timer(sc, NSP_TIMER_1MS);
467 sc->sc_seltout = 1;
468 return SCSI_LOW_START_OK;
469}
470
471static int
472nsp_world_start(sc, fdone)
473 struct nsp_softc *sc;
474 int fdone;
475{
476 struct scsi_low_softc *slp = &sc->sc_sclow;
477
478 sc->sc_cnt = 0;
479 sc->sc_seltout = 0;
480
481 if ((slp->sl_cfgflags & CFG_NOATTEN) == 0)
482 sc->sc_busc = SCBUSCR_ATN;
483 else
484 sc->sc_busc = 0;
485
486 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
487 sc->sc_parr = PARITYR_ENABLE | PARITYR_CLEAR;
488 else
489 sc->sc_parr = 0;
490
491 sc->sc_icr = (SCIENR_SCCHG | SCIENR_RESEL | SCIENR_RST);
492
493 nsphw_init(sc);
494 scsi_low_bus_reset(slp);
495
496 SOFT_INTR_REQUIRED(slp);
497 return 0;
498}
499
500struct ncp_synch_data {
501 u_int min_period;
502 u_int max_period;
503 u_int chip_period;
504 u_int ack_width;
505};
506
507static struct ncp_synch_data ncp_sync_data_40M[] = {
508 {0x0c,0x0c,0x1,0}, /* 20MB 50ns*/
509 {0x19,0x19,0x3,1}, /* 10MB 100ns*/
510 {0x1a,0x25,0x5,2}, /* 7.5MB 150ns*/
511 {0x26,0x32,0x7,3}, /* 5MB 200ns*/
512 {0x0, 0, 0, 0}
513};
514
515static struct ncp_synch_data ncp_sync_data_20M[] = {
516 {0x19,0x19,0x1,0}, /* 10MB 100ns*/
517 {0x1a,0x25,0x2,0}, /* 7.5MB 150ns*/
518 {0x26,0x32,0x3,1}, /* 5MB 200ns*/
519 {0x0, 0, 0, 0}
520};
521
522static int
523nsp_msg(sc, ti, msg)
524 struct nsp_softc *sc;
525 struct targ_info *ti;
526 u_int msg;
527{
528 bus_space_tag_t bst = sc->sc_iot;
529 bus_space_handle_t bsh = sc->sc_ioh;
530 struct ncp_synch_data *sdp;
531 struct nsp_targ_info *nti = (void *) ti;
532 u_int period, offset;
533 int i, error;
534
535 if ((msg & SCSI_LOW_MSG_WIDE) != 0)
536 {
537 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
538 {
539 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
540 return EINVAL;
541 }
542 return 0;
543 }
544
545 if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
546 return 0;
547
548 period = ti->ti_maxsynch.period;
549 offset = ti->ti_maxsynch.offset;
550 if (sc->sc_iclkdiv == CLKDIVR_20M)
551 sdp = &ncp_sync_data_20M[0];
552 else
553 sdp = &ncp_sync_data_40M[0];
554
555 for (i = 0; sdp->max_period != 0; i ++, sdp ++)
556 {
557 if (period >= sdp->min_period && period <= sdp->max_period)
558 break;
559 }
560
561 if (period != 0 && sdp->max_period == 0)
562 {
563 /*
564 * NO proper period/offset found,
565 * Retry neg with the target.
566 */
567 ti->ti_maxsynch.period = 0;
568 ti->ti_maxsynch.offset = 0;
569 nti->nti_reg_syncr = 0;
570 nti->nti_reg_ackwidth = 0;
571 error = EINVAL;
572 }
573 else
574 {
575 nti->nti_reg_syncr = (sdp->chip_period << SYNCR_PERS) |
576 (offset & SYNCR_OFFM);
577 nti->nti_reg_ackwidth = sdp->ack_width;
578 error = 0;
579 }
580
581 nsp_cr_write_1(bst, bsh, NSPR_SYNCR, nti->nti_reg_syncr);
582 nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
583 return error;
584}
585
586static int
587nsp_targ_init(sc, ti, action)
588 struct nsp_softc *sc;
589 struct targ_info *ti;
590 int action;
591{
592 struct nsp_targ_info *nti = (void *) ti;
593
594 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
595 {
596 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
597 ti->ti_maxsynch.period = 100 / 4;
598 ti->ti_maxsynch.offset = 15;
599 nti->nti_reg_syncr = 0;
600 nti->nti_reg_ackwidth = 0;
601 }
602 return 0;
603}
604
605static void
606nsp_start_timer(sc, time)
607 struct nsp_softc *sc;
608 int time;
609{
610 bus_space_tag_t bst = sc->sc_iot;
611 bus_space_handle_t bsh = sc->sc_ioh;
612
613 sc->sc_timer = time;
614 nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, time);
615}
616
617/**************************************************************
618 * General probe attach
619 **************************************************************/
620int
621nspprobesubr(iot, ioh, dvcfg)
622 bus_space_tag_t iot;
623 bus_space_handle_t ioh;
624 u_int dvcfg;
625{
626 u_int8_t regv;
627
628 regv = bus_space_read_1(iot, ioh, nsp_fifosr);
629 if (regv < 0x11 || regv >= 0x20)
630 return 0;
631 return 1;
632}
633
634int
635nspprint(aux, name)
636 void *aux;
637 const char *name;
638{
639
640 if (name != NULL)
641 printf("%s: scsibus ", name);
642 return UNCONF;
643}
644
645void
646nspattachsubr(sc)
647 struct nsp_softc *sc;
648{
649 struct scsi_low_softc *slp = &sc->sc_sclow;
650
651 printf("\n");
652
653 sc->sc_idbit = (1 << slp->sl_hostid);
654 slp->sl_flags |= HW_READ_PADDING;
655 slp->sl_funcs = &nspfuncs;
656 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
657
658 (void) scsi_low_attach(slp, 0, NSP_NTARGETS, NSP_NLUNS,
659 sizeof(struct nsp_targ_info), 0);
660}
661
662/**************************************************************
663 * PDMA functions
664 **************************************************************/
665static u_int
666nsp_fifo_count(sc)
667 struct nsp_softc *sc;
668{
669 bus_space_tag_t bst = sc->sc_iot;
670 bus_space_handle_t bsh = sc->sc_ioh;
671 u_int count;
672
673 nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_RSS_ACK | PTCLRR_PT);
674 count = bus_space_read_1(bst, bsh, nsp_datar);
675 count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 8);
676 count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 16);
677 return count;
678}
679
680static u_int
681nsp_request_count(sc)
682 struct nsp_softc *sc;
683{
684 bus_space_tag_t bst = sc->sc_iot;
685 bus_space_handle_t bsh = sc->sc_ioh;
686 u_int count;
687
688 nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_RSS_REQ | PTCLRR_PT);
689 count = bus_space_read_1(bst, bsh, nsp_datar);
690 count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 8);
691 count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 16);
692 return count;
693}
694
695static void
696nsp_setup_fifo(sc, on, direction, datalen)
697 struct nsp_softc *sc;
698 int on;
699 int direction;
700 int datalen;
701{
702 u_int8_t xfermode;
703
704 sc->sc_suspendio = 0;
705 if (on == NSP_FIFO_OFF)
706 {
707 xfermode = XFERMR_IO8;
708 goto out;
709 }
710
711 /* check if suspend io OK ? */
712 if (datalen > 0)
713 {
714 if (direction == SCSI_LOW_READ)
715 {
716 if ((nsp_io_control & NSP_READ_SUSPEND_IO) != 0 &&
717 (datalen % nsp_read_suspend_bytes) == 0)
718 sc->sc_suspendio = nsp_read_suspend_bytes;
719 }
720 else
721 {
722 if ((nsp_io_control & NSP_WRITE_SUSPEND_IO) != 0 &&
723 (datalen % nsp_write_suspend_bytes) == 0)
724 sc->sc_suspendio = nsp_write_suspend_bytes;
725 }
726 }
727
728 /* determine a transfer type */
729 if (datalen < DEV_BSIZE || (datalen & 3) != 0)
730 {
731 if (sc->sc_memh != NULL &&
732 (nsp_io_control & NSP_USE_MEMIO) != 0)
733 xfermode = XFERMR_XEN | XFERMR_MEM8;
734 else
735 xfermode = XFERMR_XEN | XFERMR_IO8;
736 }
737 else
738 {
739 if (sc->sc_memh != NULL &&
740 (nsp_io_control & NSP_USE_MEMIO) != 0)
741 xfermode = XFERMR_XEN | XFERMR_MEM32;
742 else
743 xfermode = XFERMR_XEN | XFERMR_IO32;
744
745 if (sc->sc_suspendio > 0)
746 xfermode |= XFERMR_FIFOEN;
747 }
748
749out:
750 sc->sc_xfermr = xfermode;
751 nsp_cr_write_1(sc->sc_iot, sc->sc_ioh, NSPR_XFERMR, sc->sc_xfermr);
752}
753
754static void
755nsp_pdma_end(sc, ti)
756 struct nsp_softc *sc;
757 struct targ_info *ti;
758{
759 struct scsi_low_softc *slp = &sc->sc_sclow;
760 struct slccb *cb = slp->sl_Qnexus;
761 u_int len = 0, cnt;
762
763 sc->sc_dataout_timeout = 0;
764 slp->sl_flags &= ~HW_PDMASTART;
765 nsp_setup_fifo(sc, NSP_FIFO_OFF, SCSI_LOW_READ, 0);
766 if ((sc->sc_icr & SCIENR_FIFO) != 0)
767 {
768 sc->sc_icr &= ~SCIENR_FIFO;
769 nsp_cr_write_1(sc->sc_iot, sc->sc_ioh, NSPR_SCIENR, sc->sc_icr);
770 }
771
772 if (cb == NULL)
773 {
774 slp->sl_error |= PDMAERR;
775 return;
776 }
777
778 if (ti->ti_phase == PH_DATA)
779 {
780 cnt = nsp_fifo_count(sc);
781 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
782 {
783 len = sc->sc_cnt - cnt;
784 if (sc->sc_cnt >= cnt &&
785 slp->sl_scp.scp_datalen + len <=
786 cb->ccb_scp.scp_datalen)
787 {
788 slp->sl_scp.scp_data -= len;
789 slp->sl_scp.scp_datalen += len;
790 }
791 else
792 {
793 slp->sl_error |= PDMAERR;
794 printf("%s len %x >= datalen %x\n",
795 slp->sl_xname,
796 len, slp->sl_scp.scp_datalen);
797 }
798 }
799 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
800 {
801 if (sc->sc_cnt != cnt ||
802 sc->sc_cnt > cb->ccb_scp.scp_datalen)
803 {
804 slp->sl_error |= PDMAERR;
805 printf("%s: data read count error %x != %x (%x)\n",
806 slp->sl_xname, sc->sc_cnt, cnt,
807 cb->ccb_scp.scp_datalen);
808 }
809 }
810 sc->sc_cnt = cnt;
811 scsi_low_data_finish(slp);
812 }
813 else
814 {
815
816 printf("%s data phase miss\n", slp->sl_xname);
817 slp->sl_error |= PDMAERR;
818 }
819}
820
821#define RFIFO_CRIT 64
822#define WFIFO_CRIT 32
823
824static void
825nsp_data_padding(sc, direction, count)
826 struct nsp_softc *sc;
827 int direction;
828 u_int count;
829{
830 bus_space_tag_t bst = sc->sc_iot;
831 bus_space_handle_t bsh = sc->sc_ioh;
832
833 if (count > NSP_MAX_DATA_SIZE)
834 count = NSP_MAX_DATA_SIZE;
835
836 nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_XEN | XFERMR_IO8);
837 if (direction == SCSI_LOW_READ)
838 {
839 while (count -- > 0)
840 (void) bus_space_read_1(bst, bsh, nsp_fifodr);
841 }
842 else
843 {
844 while (count -- > 0)
845 (void) bus_space_write_1(bst, bsh, nsp_fifodr, 0);
846 }
847 nsp_cr_write_1(bst, bsh, NSPR_XFERMR, sc->sc_xfermr);
848}
849
850static int
851nsp_read_fifo(sc, suspendio)
852 struct nsp_softc *sc;
853 int suspendio;
854{
855 struct scsi_low_softc *slp = &sc->sc_sclow;
856 bus_space_tag_t bst = sc->sc_iot;
857 bus_space_handle_t bsh = sc->sc_ioh;
858 u_int res;
859
860 res = nsp_fifo_count(sc);
861 if (res == sc->sc_cnt)
862 return 0;
863
864#ifdef NSP_DEBUG
865 if (res < sc->sc_cnt || res == (u_int) -1)
866 {
867 printf("%s: strange fifo ack count 0x%x < 0x%x\n",
868 slp->sl_xname, res, sc->sc_cnt);
869 return 0;
870 }
871#endif /* NSP_DEBUG */
872
873 res = res - sc->sc_cnt;
874 if (res > slp->sl_scp.scp_datalen)
875 {
876 if ((slp->sl_error & PDMAERR) == 0)
877 {
878 printf("%s: data overrun 0x%x > 0x%x\n",
879 slp->sl_xname, res, slp->sl_scp.scp_datalen);
880 }
881
882 slp->sl_error |= PDMAERR;
883 slp->sl_scp.scp_datalen = 0;
884
885 if ((slp->sl_flags & HW_READ_PADDING) == 0)
886 {
887 printf("%s: read padding required\n", slp->sl_xname);
888 return 0;
889 }
890
891 nsp_data_padding(sc, SCSI_LOW_READ, res);
892 sc->sc_cnt += res;
893 return 1; /* padding start */
894 }
895
896 if (suspendio > 0 && slp->sl_scp.scp_datalen >= suspendio)
897 res = suspendio;
898
899 if ((sc->sc_xfermr & (XFERMR_MEM32 | XFERMR_MEM8)) != 0)
900 {
901 if ((sc->sc_xfermr & XFERMR_MEM32) != 0)
902 {
903 res &= ~3;
904 bus_space_read_region_4(sc->sc_memt, sc->sc_memh, 0,
905 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
906 }
907 else
908 {
909 bus_space_read_region_1(sc->sc_memt, sc->sc_memh, 0,
910 (u_int8_t *) slp->sl_scp.scp_data, res);
911 }
912 }
913 else
914 {
915 if ((sc->sc_xfermr & XFERMR_IO32) != 0)
916 {
917 res &= ~3;
918 bus_space_read_multi_4(bst, bsh, nsp_fifodr,
919 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
920 }
921 else
922 {
923 bus_space_read_multi_1(bst, bsh, nsp_fifodr,
924 (u_int8_t *) slp->sl_scp.scp_data, res);
925 }
926 }
927
928 if (nsp_cr_read_1(bst, bsh, NSPR_PARITYR) & PARITYR_PE)
929 {
930 nsp_cr_write_1(bst, bsh, NSPR_PARITYR,
931 PARITYR_ENABLE | PARITYR_CLEAR);
932 scsi_low_assert_msg(slp, slp->sl_Tnexus, SCSI_LOW_MSG_ERROR, 1);
933 }
934
935 slp->sl_scp.scp_data += res;
936 slp->sl_scp.scp_datalen -= res;
937 sc->sc_cnt += res;
938 return 0;
939}
940
941static int
942nsp_write_fifo(sc, suspendio)
943 struct nsp_softc *sc;
944 int suspendio;
945{
946 struct scsi_low_softc *slp = &sc->sc_sclow;
947 bus_space_tag_t bst = sc->sc_iot;
948 bus_space_handle_t bsh = sc->sc_ioh;
949 u_int res;
f96d6c88 950 u_int8_t stat;
984263bc
MD
951
952 if (suspendio > 0)
953 {
954#ifdef NSP_DEBUG
955 if ((slp->sl_scp.scp_datalen % WFIFO_CRIT) != 0)
956 {
957 printf("%s: strange write length 0x%x\n",
958 slp->sl_xname, slp->sl_scp.scp_datalen);
959 }
960#endif /* NSP_DEBUG */
961 res = slp->sl_scp.scp_datalen % suspendio;
962 if (res == 0)
963 {
964 res = suspendio;
965 }
966 }
967 else
968 {
969 res = WFIFO_CRIT;
970 }
971
972 if (res > slp->sl_scp.scp_datalen)
973 res = slp->sl_scp.scp_datalen;
974
975 /* XXX: reconfirm! */
976 stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
977 if (stat != PHASE_DATAOUT)
978 return 0;
979
980 if ((sc->sc_xfermr & (XFERMR_MEM32 | XFERMR_MEM8)) != 0)
981 {
982 if ((sc->sc_xfermr & XFERMR_MEM32) != 0)
983 {
984 bus_space_write_region_4(sc->sc_memt, sc->sc_memh, 0,
985 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
986 }
987 else
988 {
989 bus_space_write_region_1(sc->sc_memt, sc->sc_memh, 0,
990 (u_int8_t *) slp->sl_scp.scp_data, res);
991 }
992 }
993 else
994 {
995 if ((sc->sc_xfermr & XFERMR_IO32) != 0)
996 {
997 bus_space_write_multi_4(bst, bsh, nsp_fifodr,
998 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
999 }
1000 else
1001 {
1002 bus_space_write_multi_1(bst, bsh, nsp_fifodr,
1003 (u_int8_t *) slp->sl_scp.scp_data, res);
1004 }
1005 }
1006
1007 slp->sl_scp.scp_datalen -= res;
1008 slp->sl_scp.scp_data += res;
1009 sc->sc_cnt += res;
1010 return 0;
1011}
1012
1013static int
1014nsp_wait_interrupt(sc)
1015 struct nsp_softc *sc;
1016{
1017 bus_space_tag_t bst = sc->sc_iot;
1018 bus_space_handle_t bsh = sc->sc_ioh;
1019 int tout;
f96d6c88 1020 u_int8_t isrc;
984263bc
MD
1021
1022 for (tout = 0; tout < DEV_BSIZE / 10; tout ++)
1023 {
1024 isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
1025 if ((isrc & (IRQSR_SCSI | IRQSR_FIFO)) != 0)
1026 {
1027 if ((isrc & IRQSR_FIFO) != 0)
1028 {
1029 bus_space_write_1(bst, bsh,
1030 nsp_irqcr, IRQCR_FIFOCL);
1031 }
1032 return 1;
1033 }
1034 SCSI_LOW_DELAY(1);
1035 }
1036 return 0;
1037}
1038
1039static void
1040nsp_pio_read(sc, suspendio)
1041 struct nsp_softc *sc;
1042 int suspendio;
1043{
1044 struct scsi_low_softc *slp = &sc->sc_sclow;
1045 bus_space_tag_t bst = sc->sc_iot;
1046 bus_space_handle_t bsh = sc->sc_ioh;
1047 int tout, padding, datalen;
f96d6c88 1048 u_int8_t stat, fstat;
984263bc
MD
1049
1050 padding = 0;
1051 tout = sc->sc_tmaxcnt;
1052 slp->sl_flags |= HW_PDMASTART;
1053 datalen = slp->sl_scp.scp_datalen;
1054
1055ReadLoop:
1056 while (1)
1057 {
1058 stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
1059 if (stat == (u_int8_t) -1)
1060 return;
1061
1062 /* out of data phase */
1063 if ((stat & SCBUSMON_PHMASK) != PHASE_DATAIN)
1064 {
1065 nsp_read_fifo(sc, 0);
1066 return;
1067 }
1068
1069 /* data phase */
1070 fstat = bus_space_read_1(bst, bsh, nsp_fifosr);
1071 if ((fstat & FIFOSR_FULLEMP) != 0)
1072 {
1073 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1074 {
1075 bus_space_write_1(bst, bsh, nsp_irqcr,
1076 IRQCR_FIFOCL);
1077 }
1078
1079 if (suspendio > 0)
1080 {
1081 padding |= nsp_read_fifo(sc, suspendio);
1082 }
1083 else
1084 {
1085 padding |= nsp_read_fifo(sc, 0);
1086 }
1087
1088 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1089 break;
1090 }
1091 else
1092 {
1093 if (padding == 0 && slp->sl_scp.scp_datalen <= 0)
1094 return;
1095
1096 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1097 break;
1098
1099 SCSI_LOW_DELAY(1);
1100 }
1101
1102 if ((-- tout) <= 0)
1103 {
1104 printf("%s: nsp_pio_read: timeout\n", slp->sl_xname);
1105 return;
1106 }
1107 }
1108
1109
1110 if (slp->sl_scp.scp_datalen > 0 &&
1111 slp->sl_scp.scp_datalen > datalen - nsp_read_interrupt_bytes)
1112 {
1113 if (nsp_wait_interrupt(sc) != 0)
1114 goto ReadLoop;
1115 }
1116}
1117
1118static void
1119nsp_pio_write(sc, suspendio)
1120 struct nsp_softc *sc;
1121 int suspendio;
1122{
1123 struct scsi_low_softc *slp = &sc->sc_sclow;
1124 bus_space_tag_t bst = sc->sc_iot;
1125 bus_space_handle_t bsh = sc->sc_ioh;
1126 u_int rcount, acount;
1127 int tout, datalen;
f96d6c88 1128 u_int8_t stat, fstat;
984263bc
MD
1129
1130 tout = sc->sc_tmaxcnt;
1131 slp->sl_flags |= HW_PDMASTART;
1132 datalen = slp->sl_scp.scp_datalen;
1133
1134WriteLoop:
1135 while (1)
1136 {
1137 stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
1138 if (stat != PHASE_DATAOUT)
1139 return;
1140
1141 if (slp->sl_scp.scp_datalen <= 0)
1142 {
1143 if (sc->sc_dataout_timeout == 0)
1144 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1145 return;
1146 }
1147
1148 fstat = bus_space_read_1(bst, bsh, nsp_fifosr);
1149 if ((fstat & FIFOSR_FULLEMP) != 0)
1150 {
1151 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1152 {
1153 bus_space_write_1(bst, bsh, nsp_irqcr,
1154 IRQCR_FIFOCL);
1155 }
1156
1157 if (suspendio > 0)
1158 {
1159 /* XXX:IMPORTANT:
1160 * To avoid timeout of pcmcia bus
1161 * (not scsi bus!), we should check
1162 * the scsi device sends us request
1163 * signals, which means the scsi device
1164 * is ready to recieve data without
1165 * heavy delays.
1166 */
1167 if ((slp->sl_scp.scp_datalen % suspendio) == 0)
1168 {
1169 /* Step I:
1170 * fill the nsp fifo, and waiting for
1171 * the fifo empty.
1172 */
1173 nsp_write_fifo(sc, 0);
1174 }
1175 else
1176 {
1177 /* Step II:
1178 * check the request singals.
1179 */
1180 acount = nsp_fifo_count(sc);
1181 rcount = nsp_request_count(sc);
1182 if (rcount <= acount)
1183 {
1184 nsp_write_fifo(sc, 0);
1185#ifdef NSP_STATICS
1186 nsp_statics.device_busy ++;
1187#endif /* NSP_STATICS */
1188 }
1189 else
1190 {
1191 nsp_write_fifo(sc, suspendio);
1192#ifdef NSP_STATICS
1193 nsp_statics.device_data_write ++;
1194#endif /* NSP_STATICS */
1195 }
1196 }
1197 }
1198 else
1199 {
1200 nsp_write_fifo(sc, 0);
1201 }
1202
1203 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1204 break;
1205 }
1206 else
1207 {
1208 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1209 break;
1210
1211 SCSI_LOW_DELAY(1);
1212 }
1213
1214 if ((-- tout) <= 0)
1215 {
1216 printf("%s: nsp_pio_write: timeout\n", slp->sl_xname);
1217 return;
1218 }
1219 }
1220
1221 if (slp->sl_scp.scp_datalen > 0 &&
1222 slp->sl_scp.scp_datalen > datalen - nsp_write_interrupt_bytes)
1223 {
1224 if (nsp_wait_interrupt(sc) != 0)
1225 goto WriteLoop;
1226 }
1227}
1228
1229static int
1230nsp_negate_signal(sc, mask, s)
1231 struct nsp_softc *sc;
1232 u_int8_t mask;
1233 u_char *s;
1234{
1235 struct scsi_low_softc *slp = &sc->sc_sclow;
1236 bus_space_tag_t bst = sc->sc_iot;
1237 bus_space_handle_t bsh = sc->sc_ioh;
1238 int wc;
1239 u_int8_t regv;
1240
1241 for (wc = 0; wc < NSP_DELAY_MAX / NSP_DELAY_INTERVAL; wc ++)
1242 {
1243 regv = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
1244 if (regv == (u_int8_t) -1)
1245 return -1;
1246 if ((regv & mask) == 0)
1247 return 1;
1248 SCSI_LOW_DELAY(NSP_DELAY_INTERVAL);
1249 }
1250
1251 printf("%s: %s nsp_negate_signal timeout\n", slp->sl_xname, s);
1252 return -1;
1253}
1254
1255static int
1256nsp_xfer(sc, buf, len, phase, clear_atn)
1257 struct nsp_softc *sc;
1258 u_int8_t *buf;
1259 int len;
1260 int phase;
1261 int clear_atn;
1262{
1263 bus_space_tag_t bst = sc->sc_iot;
1264 bus_space_handle_t bsh = sc->sc_ioh;
1265 int ptr, rv;
1266
1267 for (ptr = 0; len > 0; len --, ptr ++)
1268 {
1269 rv = nsp_expect_signal(sc, phase, SCBUSMON_REQ);
1270 if (rv <= 0)
1271 goto out;
1272
1273 if (len == 1 && clear_atn != 0)
1274 {
1275 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
1276 SCBUSCR_ADIR | SCBUSCR_ACKEN);
1277 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
1278 }
1279
1280 if (phase & SCBUSMON_IO)
1281 {
1282 buf[ptr] = nsp_cr_read_1(bst, bsh, NSPR_DATAACK);
1283 }
1284 else
1285 {
1286 nsp_cr_write_1(bst, bsh, NSPR_DATAACK, buf[ptr]);
1287 }
1288 nsp_negate_signal(sc, SCBUSMON_ACK, "xfer<ACK>");
1289 }
1290
1291out:
1292 return len;
1293}
1294
1295/**************************************************************
1296 * disconnect & reselect (HW low)
1297 **************************************************************/
1298static int
1299nsp_reselected(sc)
1300 struct nsp_softc *sc;
1301{
1302 struct scsi_low_softc *slp = &sc->sc_sclow;
1303 bus_space_tag_t bst = sc->sc_iot;
1304 bus_space_handle_t bsh = sc->sc_ioh;
1305 struct targ_info *ti;
1306 u_int sid;
1307 u_int8_t cr;
1308
1309 sid = (u_int) nsp_cr_read_1(bst, bsh, NSPR_RESELR);
1310 sid &= ~sc->sc_idbit;
1311 sid = ffs(sid) - 1;
1312 if ((ti = scsi_low_reselected(slp, sid)) == NULL)
1313 return EJUSTRETURN;
1314
1315 nsp_negate_signal(sc, SCBUSMON_SEL, "reselect<SEL>");
1316
1317 cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR);
1318 cr &= ~(SCBUSCR_BSY | SCBUSCR_ATN);
1319 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
1320 cr |= SCBUSCR_ADIR | SCBUSCR_ACKEN;
1321 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
1322
1323#ifdef NSP_STATICS
1324 nsp_statics.reselect ++;
1325#endif /* NSP_STATCIS */
1326 return EJUSTRETURN;
1327}
1328
1329static int
1330nsp_disconnected(sc, ti)
1331 struct nsp_softc *sc;
1332 struct targ_info *ti;
1333{
1334 struct scsi_low_softc *slp = &sc->sc_sclow;
1335 bus_space_tag_t bst = sc->sc_iot;
1336 bus_space_handle_t bsh = sc->sc_ioh;
1337
1338 nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
1339 PTCLRR_REQ | PTCLRR_HOST);
1340 if ((sc->sc_icr & SCIENR_FIFO) != 0)
1341 {
1342 sc->sc_icr &= ~SCIENR_FIFO;
1343 nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
1344 }
1345 sc->sc_cnt = 0;
1346 sc->sc_dataout_timeout = 0;
1347#ifdef NSP_STATICS
1348 nsp_statics.disconnect ++;
1349#endif /* NSP_STATICS */
1350 scsi_low_disconnected(slp, ti);
1351 return 1;
1352}
1353
1354/**************************************************************
1355 * SEQUENCER
1356 **************************************************************/
38e94a25 1357static void nsp_error (struct nsp_softc *, u_char *, u_int8_t, u_int8_t, u_int8_t);
984263bc
MD
1358
1359static void
1360nsp_error(sc, s, isrc, ph, irqphs)
1361 struct nsp_softc *sc;
1362 u_char *s;
1363 u_int8_t isrc, ph, irqphs;
1364{
1365 struct scsi_low_softc *slp = &sc->sc_sclow;
1366
1367 printf("%s: %s\n", slp->sl_xname, s);
1368 printf("%s: isrc 0x%x scmon 0x%x irqphs 0x%x\n",
1369 slp->sl_xname, (u_int) isrc, (u_int) ph, (u_int) irqphs);
1370}
1371
1372static int
1373nsp_target_nexus_establish(sc)
1374 struct nsp_softc *sc;
1375{
1376 struct scsi_low_softc *slp = &sc->sc_sclow;
1377 bus_space_tag_t bst = sc->sc_iot;
1378 bus_space_handle_t bsh = sc->sc_ioh;
1379 struct targ_info *ti = slp->sl_Tnexus;
1380 struct nsp_targ_info *nti = (void *) ti;
1381
1382 /* setup synch transfer registers */
1383 nsp_cr_write_1(bst, bsh, NSPR_SYNCR, nti->nti_reg_syncr);
1384 nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
1385
1386 /* setup pdma fifo (minimum) */
1387 nsp_setup_fifo(sc, NSP_FIFO_ON, SCSI_LOW_READ, 0);
1388 return 0;
1389}
1390
1391static int
1392nsp_lun_nexus_establish(sc)
1393 struct nsp_softc *sc;
1394{
1395
1396 return 0;
1397}
1398
1399static int
1400nsp_ccb_nexus_establish(sc)
1401 struct nsp_softc *sc;
1402{
1403 struct scsi_low_softc *slp = &sc->sc_sclow;
1404 struct slccb *cb = slp->sl_Qnexus;
1405
1406 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
1407
1408 /* setup pdma fifo */
1409 nsp_setup_fifo(sc, NSP_FIFO_ON,
1410 slp->sl_scp.scp_direction, slp->sl_scp.scp_datalen);
1411
1412 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1413 {
1414 if (sc->sc_suspendio > 0 &&
1415 (nsp_io_control & NSP_READ_FIFO_INTERRUPTS) != 0)
1416 {
1417 sc->sc_icr |= SCIENR_FIFO;
1418 nsp_cr_write_1(sc->sc_iot, sc->sc_ioh,
1419 NSPR_SCIENR, sc->sc_icr);
1420 }
1421 }
1422 else
1423 {
1424 if (sc->sc_suspendio > 0 &&
1425 (nsp_io_control & NSP_WRITE_FIFO_INTERRUPTS) != 0)
1426 {
1427 sc->sc_icr |= SCIENR_FIFO;
1428 nsp_cr_write_1(sc->sc_iot, sc->sc_ioh,
1429 NSPR_SCIENR, sc->sc_icr);
1430 }
1431 }
1432 return 0;
1433}
1434
1435static int
1436nsp_phase_match(sc, phase, stat)
1437 struct nsp_softc *sc;
1438 u_int8_t phase;
1439 u_int8_t stat;
1440{
1441 struct scsi_low_softc *slp = &sc->sc_sclow;
1442
1443 if ((stat & SCBUSMON_PHMASK) != phase)
1444 {
1445 printf("%s: phase mismatch 0x%x != 0x%x\n",
1446 slp->sl_xname, (u_int) phase, (u_int) stat);
1447 return EINVAL;
1448 }
1449
1450 if ((stat & SCBUSMON_REQ) == 0)
1451 return EINVAL;
1452
1453 return 0;
1454}
1455
1456int
1457nspintr(arg)
1458 void *arg;
1459{
1460 struct nsp_softc *sc = arg;
1461 struct scsi_low_softc *slp = &sc->sc_sclow;
1462 bus_space_tag_t bst = sc->sc_iot;
1463 bus_space_handle_t bsh = sc->sc_ioh;
1464 struct targ_info *ti;
1465 struct physio_proc *pp;
1466 struct buf *bp;
1467 u_int derror, flags;
1468 int len, rv;
1469 u_int8_t isrc, ph, irqphs, cr, regv;
1470
1471 /*******************************************
1472 * interrupt check
1473 *******************************************/
1474 if (slp->sl_flags & HW_INACTIVE)
1475 return 0;
1476
1477 bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_IRQDIS);
1478 isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
1479 if (isrc == (u_int8_t) -1 || (isrc & IRQSR_MASK) == 0)
1480 {
1481 bus_space_write_1(bst, bsh, nsp_irqcr, 0);
1482 return 0;
1483 }
1484
1485 /* XXX: IMPORTANT
1486 * Do not read an irqphs register if no scsi phase interrupt.
1487 * Unless, you should lose a scsi phase interrupt.
1488 */
1489 ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
1490 if ((isrc & IRQSR_SCSI) != 0)
1491 {
1492 irqphs = nsp_cr_read_1(bst, bsh, NSPR_IRQPHS);
1493 }
1494 else
1495 irqphs = 0;
1496
1497 /*
1498 * timer interrupt handler (scsi vs timer interrupts)
1499 */
1500 if (sc->sc_timer != 0)
1501 {
1502 nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
1503 nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
1504 sc->sc_timer = 0;
1505 }
1506
1507 /* check a timer interrupt */
1508 regv = 0;
1509 if ((isrc & IRQSR_TIMER) != 0)
1510 {
1511 if ((isrc & IRQSR_MASK) == IRQSR_TIMER && sc->sc_seltout == 0)
1512 {
1513 bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_TIMERCL);
1514 return 1;
1515 }
1516 regv |= IRQCR_TIMERCL;
1517 }
1518
1519 /* check a fifo interrupt */
1520 if ((isrc & IRQSR_FIFO) != 0)
1521 {
1522 regv |= IRQCR_FIFOCL;
1523 }
1524
1525 /* OK. enable all interrupts */
1526 bus_space_write_1(bst, bsh, nsp_irqcr, regv);
1527
1528 /*******************************************
1529 * debug section
1530 *******************************************/
1531#ifdef NSP_DEBUG
1532 if (nsp_debug)
1533 {
1534 nsp_error(sc, "current status", isrc, ph, irqphs);
1535 scsi_low_print(slp, NULL);
1536#ifdef DDB
1537 if (nsp_debug > 1)
1538 SCSI_LOW_DEBUGGER("nsp");
1539#endif /* DDB */
1540 }
1541#endif /* NSP_DEBUG */
1542
1543 /*******************************************
1544 * Parse hardware SCSI irq reasons register
1545 *******************************************/
1546 if ((isrc & IRQSR_SCSI) != 0)
1547 {
1548 if ((irqphs & IRQPHS_RST) != 0)
1549 {
1550 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
1551 "bus reset (power off?)");
1552 return 1;
1553 }
1554
1555 if ((irqphs & IRQPHS_RSEL) != 0)
1556 {
1557 bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_RESCL);
1558 if (nsp_reselected(sc) == EJUSTRETURN)
1559 return 1;
1560 }
1561
1562 if ((irqphs & (IRQPHS_PCHG | IRQPHS_LBF)) == 0)
1563 return 1;
1564 }
1565
1566 /*******************************************
1567 * nexus check
1568 *******************************************/
1569 if ((ti = slp->sl_Tnexus) == NULL)
1570 {
1571 /* unknown scsi phase changes */
1572 nsp_error(sc, "unknown scsi phase changes", isrc, ph, irqphs);
1573 return 0;
1574 }
1575
1576 /*******************************************
1577 * aribitration & selection
1578 *******************************************/
1579 switch (ti->ti_phase)
1580 {
1581 case PH_SELSTART:
1582 if ((ph & SCBUSMON_BSY) == 0)
1583 {
1584 if (sc->sc_seltout >= NSP_SELTIMEOUT)
1585 {
1586 sc->sc_seltout = 0;
1587 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, 0);
1588 return nsp_disconnected(sc, ti);
1589 }
1590 sc->sc_seltout ++;
1591 nsp_start_timer(sc, NSP_TIMER_1MS);
1592 return 1;
1593 }
1594
1595 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1596 nsphw_selection_done_and_expect_msgout(sc);
1597 return 1;
1598
1599 case PH_SELECTED:
1600 if ((isrc & IRQSR_SCSI) == 0)
1601 return 1;
1602
1603 nsp_target_nexus_establish(sc);
1604 break;
1605
1606 case PH_RESEL:
1607 if ((isrc & IRQSR_SCSI) == 0)
1608 return 1;
1609
1610 nsp_target_nexus_establish(sc);
1611 if ((ph & SCBUSMON_PHMASK) != PHASE_MSGIN)
1612 {
1613 printf("%s: unexpected phase after reselect\n",
1614 slp->sl_xname);
1615 slp->sl_error |= FATALIO;
1616 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1617 return 1;
1618 }
1619 break;
1620
1621 case PH_DATA:
1622 if ((isrc & IRQSR_SCSI) != 0)
1623 break;
1624 if ((isrc & IRQSR_FIFO) != 0)
1625 {
1626 if (NSP_IS_PHASE_DATA(ph) == 0)
1627 return 1;
1628 irqphs = (ph & IRQPHS_PHMASK);
1629 break;
1630 }
1631 return 1;
1632
1633 default:
1634 if ((isrc & IRQSR_SCSI) == 0)
1635 return 1;
1636 break;
1637 }
1638
1639 /*******************************************
1640 * data phase control
1641 *******************************************/
1642 if (slp->sl_flags & HW_PDMASTART)
1643 {
1644 if ((isrc & IRQSR_SCSI) != 0 &&
1645 NSP_IS_IRQPHS_DATA(irqphs) == 0)
1646 {
1647 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1648 nsp_pio_read(sc, 0);
1649 nsp_pdma_end(sc, ti);
1650 }
1651 }
1652
1653 /*******************************************
1654 * scsi seq
1655 *******************************************/
1656 if (slp->sl_msgphase != 0 && (irqphs & IRQPHS_LBF) != 0)
1657 return nsp_disconnected(sc, ti);
1658
1659 /* check unexpected bus free state */
1660 if (ph == 0)
1661 {
1662 nsp_error(sc, "unexpected bus free", isrc, ph, irqphs);
1663 return nsp_disconnected(sc, ti);
1664 }
1665
1666 /* check normal scsi phase */
1667 switch (irqphs & IRQPHS_PHMASK)
1668 {
1669 case IRQPHS_CMD:
1670 if (nsp_phase_match(sc, PHASE_CMD, ph) != 0)
1671 return 1;
1672
1673 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1674 if (scsi_low_cmd(slp, ti) != 0)
1675 {
1676 scsi_low_attention(slp);
1677 }
1678
1679 nsp_cr_write_1(bst, bsh, NSPR_CMDCR, CMDCR_PTCLR);
1680 for (len = 0; len < slp->sl_scp.scp_cmdlen; len ++)
1681 nsp_cr_write_1(bst, bsh, NSPR_CMDDR,
1682 slp->sl_scp.scp_cmd[len]);
1683
1684 nsp_cr_write_1(bst, bsh, NSPR_CMDCR, CMDCR_PTCLR | CMDCR_EXEC);
1685 break;
1686
1687 case IRQPHS_DATAOUT:
1688 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1689 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1690 {
1691 scsi_low_attention(slp);
1692 }
1693
1694 pp = physio_proc_enter(bp);
1695 nsp_pio_write(sc, sc->sc_suspendio);
1696 physio_proc_leave(pp);
1697 break;
1698
1699 case IRQPHS_DATAIN:
1700 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1701 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1702 {
1703 scsi_low_attention(slp);
1704 }
1705
1706 pp = physio_proc_enter(bp);
1707 nsp_pio_read(sc, sc->sc_suspendio);
1708 physio_proc_leave(pp);
1709 break;
1710
1711 case IRQPHS_STATUS:
1712 if (nsp_phase_match(sc, PHASE_STATUS, ph) != 0)
1713 return 1;
1714
1715 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1716 regv = nsp_cr_read_1(bst, bsh, NSPR_DATA);
1717 if (nsp_cr_read_1(bst, bsh, NSPR_PARITYR) & PARITYR_PE)
1718 {
1719 nsp_cr_write_1(bst, bsh, NSPR_PARITYR,
1720 PARITYR_ENABLE | PARITYR_CLEAR);
1721 derror = SCSI_LOW_DATA_PE;
1722 }
1723 else
1724 derror = 0;
1725
1726 /* assert ACK */
1727 cr = SCBUSCR_ACK | nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR);
1728 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
1729
1730 if (scsi_low_statusin(slp, ti, derror | regv) != 0)
1731 {
1732 scsi_low_attention(slp);
1733 }
1734
1735 /* check REQ nagated */
1736 nsp_negate_signal(sc, SCBUSMON_REQ, "statin<REQ>");
1737
1738 /* deassert ACK */
1739 cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
1740 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
1741 break;
1742
1743 case IRQPHS_MSGOUT:
1744 if (nsp_phase_match(sc, PHASE_MSGOUT, ph) != 0)
1745 return 1;
1746
1747#ifdef NSP_MSGOUT_SERIALIZE
1748 /*
1749 * XXX: NSP QUIRK
1750 * NSP invoke interrupts only in the case of scsi phase changes,
1751 * therefore we should poll the scsi phase here to catch
1752 * the next "msg out" if exists (no scsi phase changes).
1753 */
1754 rv = len = 16;
1755 do {
1756 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1757 flags = (ti->ti_ophase != ti->ti_phase) ?
1758 SCSI_LOW_MSGOUT_INIT : 0;
1759 len = scsi_low_msgout(slp, ti, flags);
1760
1761 if (len > 1 && slp->sl_atten == 0)
1762 {
1763 scsi_low_attention(slp);
1764 }
1765
1766 if (nsp_xfer(sc, ti->ti_msgoutstr, len, PHASE_MSGOUT,
1767 slp->sl_clear_atten) != 0)
1768 {
1769 slp->sl_error |= FATALIO;
1770 nsp_error(sc, "MSGOUT: xfer short",
1771 isrc, ph, irqphs);
1772 }
1773
1774 /* catch a next signal */
1775 rv = nsp_expect_signal(sc, PHASE_MSGOUT, SCBUSMON_REQ);
1776 }
1777 while (rv > 0 && len -- > 0);
1778
1779#else /* !NSP_MSGOUT_SERIALIZE */
1780 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1781 flags = SCSI_LOW_MSGOUT_UNIFY;
1782 if (ti->ti_ophase != ti->ti_phase)
1783 flags |= SCSI_LOW_MSGOUT_INIT;
1784 len = scsi_low_msgout(slp, ti, flags);
1785
1786 if (len > 1 && slp->sl_atten == 0)
1787 {
1788 scsi_low_attention(slp);
1789 }
1790
1791 if (nsp_xfer(sc, ti->ti_msgoutstr, len, PHASE_MSGOUT,
1792 slp->sl_clear_atten) != 0)
1793 {
1794 nsp_error(sc, "MSGOUT: xfer short", isrc, ph, irqphs);
1795 }
1796
1797#endif /* !NSP_MSGOUT_SERIALIZE */
1798 break;
1799
1800 case IRQPHS_MSGIN:
1801 if (nsp_phase_match(sc, PHASE_MSGIN, ph) != 0)
1802 return 1;
1803
1804 /*
1805 * XXX: NSP QUIRK
1806 * NSP invoke interrupts only in the case of scsi phase changes,
1807 * therefore we should poll the scsi phase here to catch
1808 * the next "msg in" if exists (no scsi phase changes).
1809 */
1810 rv = len = 16;
1811 do {
1812 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1813
1814 /* read a data */
1815 regv = nsp_cr_read_1(bst, bsh, NSPR_DATA);
1816 if (nsp_cr_read_1(bst, bsh, NSPR_PARITYR) & PARITYR_PE)
1817 {
1818 nsp_cr_write_1(bst, bsh,
1819 NSPR_PARITYR,
1820 PARITYR_ENABLE | PARITYR_CLEAR);
1821 derror = SCSI_LOW_DATA_PE;
1822 }
1823 else
1824 {
1825 derror = 0;
1826 }
1827
1828 /* assert ack */
1829 cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) | SCBUSCR_ACK;
1830 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
1831
1832 if (scsi_low_msgin(slp, ti, regv | derror) == 0)
1833 {
1834 if (scsi_low_is_msgout_continue(ti, 0) != 0)
1835 {
1836 scsi_low_attention(slp);
1837 }
1838 }
1839
1840 /* check REQ nagated */
1841 nsp_negate_signal(sc, SCBUSMON_REQ, "msgin<REQ>");
1842
1843 /* deassert ack */
1844 cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
1845 nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
1846
1847 /* catch a next signal */
1848 rv = nsp_expect_signal(sc, PHASE_MSGIN, SCBUSMON_REQ);
1849 }
1850 while (rv > 0 && len -- > 0);
1851 break;
1852
1853 default:
1854 slp->sl_error |= FATALIO;
1855 nsp_error(sc, "unknown scsi phase", isrc, ph, irqphs);
1856 break;
1857 }
1858
1859 return 1;
1860
1861#if 0
1862timerout:
1863 nsp_start_timer(sc, NSP_TIMER_1MS);
1864 return 0;
1865#endif
1866}
1867
1868static int
1869nsp_timeout(sc)
1870 struct nsp_softc *sc;
1871{
1872 struct scsi_low_softc *slp = &sc->sc_sclow;
1873 bus_space_tag_t iot = sc->sc_iot;
1874 bus_space_handle_t ioh = sc->sc_ioh;
1875 int tout;
1876 u_int8_t ph, regv;
1877
1878 if (slp->sl_Tnexus == NULL)
1879 return 0;
1880
1881 ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
1882 switch (ph & SCBUSMON_PHMASK)
1883 {
1884 case PHASE_DATAOUT:
1885 if (sc->sc_dataout_timeout == 0)
1886 break;
1887
1888 /* check a fifo empty */
1889 regv = bus_space_read_1(iot, ioh, nsp_fifosr);
1890 if ((regv & FIFOSR_FULLEMP) == 0)
1891 break;
1892 bus_space_write_1(iot, ioh, nsp_irqcr, IRQCR_FIFOCL);
1893
1894 /* check still requested */
1895 ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
1896 if ((ph & SCBUSMON_REQ) == 0)
1897 break;
1898 /* check timeout */
1899 if ((-- sc->sc_dataout_timeout) > 0)
1900 break;
1901
1902 slp->sl_error |= PDMAERR;
1903 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1904 {
1905 printf("%s: write padding required\n", slp->sl_xname);
1906 break;
1907 }
1908
1909 tout = NSP_DELAY_MAX;
1910 while (tout -- > 0)
1911 {
1912 ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
1913 if ((ph & SCBUSMON_PHMASK) != PHASE_DATAOUT)
1914 break;
1915 regv = bus_space_read_1(iot, ioh, nsp_fifosr);
1916 if ((regv & FIFOSR_FULLEMP) == 0)
1917 {
1918 SCSI_LOW_DELAY(1);
1919 continue;
1920 }
1921
1922 bus_space_write_1(iot, ioh, nsp_irqcr, IRQCR_FIFOCL);
1923 nsp_data_padding(sc, SCSI_LOW_WRITE, 32);
1924 }
1925 ph = nsp_cr_read_1(iot, ioh, NSPR_SCBUSMON);
1926 if ((ph & SCBUSMON_PHMASK) == PHASE_DATAOUT)
1927 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1928 break;
1929
1930 default:
1931 break;
1932 }
1933 return 0;
1934}