remove __P() from this directory
[dragonfly.git] / sys / dev / disk / stg / tmc18c30.c
CommitLineData
984263bc 1/* $FreeBSD: src/sys/dev/stg/tmc18c30.c,v 1.1.2.5 2001/12/17 13:30:19 non Exp $ */
38e94a25 2/* $DragonFly: src/sys/dev/disk/stg/tmc18c30.c,v 1.5 2003/08/27 10:35:17 rob Exp $ */
984263bc
MD
3/* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */
4/* $NetBSD$ */
5
6#define STG_DEBUG
7#define STG_STATICS
8#define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT)
9
10/*
11 * [NetBSD for NEC PC-98 series]
12 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
13 * NetBSD/pc98 porting staff. All rights reserved.
14 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
15 * Naofumi HONDA. All rights reserved.
16 * Copyright (c) 1996, 1997, 1998, 1999
17 * Kouichi Matsuda. All rights reserved.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 * 1. Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * 2. Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * 3. The name of the author may not be used to endorse or promote products
28 * derived from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
34 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
35 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
36 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
38 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42#include "opt_ddb.h"
43
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/kernel.h>
47#if defined(__FreeBSD__) && __FreeBSD_version >= 500001
48#include <sys/bio.h>
49#endif /* __FreeBSD__ */
50#include <sys/buf.h>
51#include <sys/queue.h>
52#include <sys/malloc.h>
53#include <sys/errno.h>
54
55#ifdef __NetBSD__
56#include <sys/device.h>
57#include <machine/bus.h>
58#include <machine/intr.h>
59
60#include <dev/scsipi/scsi_all.h>
61#include <dev/scsipi/scsipi_all.h>
62#include <dev/scsipi/scsiconf.h>
63#include <dev/scsipi/scsi_disk.h>
64
65#include <machine/dvcfg.h>
66#include <machine/physio_proc.h>
67
68#include <i386/Cbus/dev/scsi_low.h>
69#include <i386/Cbus/dev/tmc18c30reg.h>
70#include <i386/Cbus/dev/tmc18c30var.h>
71#endif /* __NetBSD__ */
72
73#ifdef __FreeBSD__
74#include <machine/clock.h>
75#include <machine/cpu.h>
76#include <machine/bus_pio.h>
77#include <machine/bus.h>
78
79#include <machine/dvcfg.h>
80#include <machine/physio_proc.h>
81
1f2de5d4
MD
82#include <bus/cam/scsi/scsi_low.h>
83#include "tmc18c30reg.h"
84#include "tmc18c30var.h"
984263bc
MD
85#endif /* __FreeBSD__ */
86
87/***************************************************
88 * USER SETTINGS
89 ***************************************************/
90/* DEVICE CONFIGURATION FLAGS (MINOR)
91 *
92 * 0x01 DISCONECT OFF
93 * 0x02 PARITY LINE OFF
94 * 0x04 IDENTIFY MSG OFF ( = single lun)
95 * 0x08 SYNC TRANSFER OFF
96 */
97/* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */
98
99/* For the 512 fifo type: change below */
100#define TMC18C30_FIFOSZ 0x800
101#define TMC18C30_FCBSZ 0x200
102#define TMC18C50_FIFOSZ 0x2000
103#define TMC18C50_FCBSZ 0x400
104
105#define STG_MAX_DATA_SIZE (64 * 1024)
106#define STG_DELAY_MAX (2 * 1000 * 1000)
107#define STG_DELAY_INTERVAL (1)
108#define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000)
109
110/***************************************************
111 * PARAMS
112 ***************************************************/
113#define STG_NTARGETS 8
114#define STG_NLUNS 8
115
116/***************************************************
117 * DEBUG
118 ***************************************************/
119#ifdef STG_DEBUG
120int stg_debug;
121#endif /* STG_DEBUG */
122
123#ifdef STG_STATICS
124struct stg_statics {
125 int arbit_fail_0;
126 int arbit_fail_1;
127 int disconnect;
128 int reselect;
129} stg_statics;
130#endif /* STG_STATICS */
131
132/***************************************************
133 * IO control flags
134 ***************************************************/
135#define STG_FIFO_INTERRUPTS 0x0001
136#define STG_WAIT_FOR_SELECT 0x0100
137
138int stg_io_control = STG_IO_CONTROL_FLAGS;
139
140/***************************************************
141 * DEVICE STRUCTURE
142 ***************************************************/
143extern struct cfdriver stg_cd;
144
145/**************************************************************
146 * DECLARE
147 **************************************************************/
148/* static */
38e94a25
RG
149static void stg_pio_read (struct stg_softc *, struct targ_info *, u_int);
150static void stg_pio_write (struct stg_softc *, struct targ_info *, u_int);
151static int stg_xfer (struct stg_softc *, u_int8_t *, int, int, int);
152static int stg_msg (struct stg_softc *, struct targ_info *, u_int);
153static int stg_reselected (struct stg_softc *);
154static int stg_disconnected (struct stg_softc *, struct targ_info *);
155static __inline void stg_pdma_end (struct stg_softc *, struct targ_info *);
156static int stghw_select_targ_wait (struct stg_softc *, int);
157static int stghw_check (struct stg_softc *);
158static void stghw_init (struct stg_softc *);
159static int stg_negate_signal (struct stg_softc *, u_int8_t, u_char *);
160static int stg_expect_signal (struct stg_softc *, u_int8_t, u_int8_t);
161static int stg_world_start (struct stg_softc *, int);
162static int stghw_start_selection (struct stg_softc *sc, struct slccb *);
163static void stghw_bus_reset (struct stg_softc *);
164static void stghw_attention (struct stg_softc *);
165static int stg_target_nexus_establish (struct stg_softc *);
166static int stg_lun_nexus_establish (struct stg_softc *);
167static int stg_ccb_nexus_establish (struct stg_softc *);
168static int stg_targ_init (struct stg_softc *, struct targ_info *, int);
169static __inline void stghw_bcr_write_1 (struct stg_softc *, u_int8_t);
170static int stg_timeout (struct stg_softc *);
171static void stg_selection_done_and_expect_msgout (struct stg_softc *);
984263bc
MD
172
173struct scsi_low_funcs stgfuncs = {
174 SC_LOW_INIT_T stg_world_start,
175 SC_LOW_BUSRST_T stghw_bus_reset,
176 SC_LOW_TARG_INIT_T stg_targ_init,
177 SC_LOW_LUN_INIT_T NULL,
178
179 SC_LOW_SELECT_T stghw_start_selection,
180 SC_LOW_NEXUS_T stg_lun_nexus_establish,
181 SC_LOW_NEXUS_T stg_ccb_nexus_establish,
182
183 SC_LOW_ATTEN_T stghw_attention,
184 SC_LOW_MSG_T stg_msg,
185
186 SC_LOW_TIMEOUT_T stg_timeout,
187 SC_LOW_POLL_T stgintr,
188
189 NULL,
190};
191
192/****************************************************
193 * hwfuncs
194 ****************************************************/
195static __inline void
196stghw_bcr_write_1(sc, bcv)
197 struct stg_softc *sc;
198 u_int8_t bcv;
199{
200
201 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv);
202 sc->sc_busimg = bcv;
203}
204
205static int
206stghw_check(sc)
207 struct stg_softc *sc;
208{
209 struct scsi_low_softc *slp = &sc->sc_sclow;
210 bus_space_tag_t iot = sc->sc_iot;
211 bus_space_handle_t ioh = sc->sc_ioh;
212 u_int fcbsize, fcb;
213 u_int16_t lsb, msb;
214
215 lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
216 msb = bus_space_read_1(iot, ioh, tmc_idmsb);
217 switch (msb << 8 | lsb)
218 {
219 case 0x6127:
220 /* TMCCHIP_1800 not supported. (it's my policy) */
221 sc->sc_chip = TMCCHIP_1800;
222 return EINVAL;
223
224 case 0x60e9:
225 if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02)
226 {
227 sc->sc_chip = TMCCHIP_18C30;
228 sc->sc_fsz = TMC18C30_FIFOSZ;
229 fcbsize = TMC18C30_FCBSZ;
230 }
231 else
232 {
233 sc->sc_chip = TMCCHIP_18C50;
234 sc->sc_fsz = TMC18C50_FIFOSZ;
235 fcbsize = TMC18C50_FCBSZ;
236 }
237 break;
238
239 default:
240 sc->sc_chip = TMCCHIP_UNK;
241 return ENODEV;
242 }
243
244 sc->sc_fcRinit = FCTL_INTEN;
245 sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
246
247 if (slp->sl_cfgflags & CFG_NOATTEN)
248 sc->sc_imsg = 0;
249 else
250 sc->sc_imsg = BCTL_ATN;
251 sc->sc_busc = BCTL_BUSEN;
252
253 sc->sc_wthold = fcbsize + 256;
254 sc->sc_rthold = fcbsize - 256;
255 sc->sc_maxwsize = sc->sc_fsz;
256
257 fcb = fcbsize / (sc->sc_fsz / 16);
258 sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb;
259 return 0;
260}
261
262static void
263stghw_init(sc)
264 struct stg_softc *sc;
265{
266 bus_space_tag_t iot = sc->sc_iot;
267 bus_space_handle_t ioh = sc->sc_ioh;
268
269 bus_space_write_1(iot, ioh, tmc_ictl, 0);
270 stghw_bcr_write_1(sc, BCTL_BUSFREE);
271 bus_space_write_1(iot, ioh, tmc_fctl,
272 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
273 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
274 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
275
276 bus_space_write_1(iot, ioh, tmc_ssctl, 0);
277}
278
279static int
280stg_targ_init(sc, ti, action)
281 struct stg_softc *sc;
282 struct targ_info *ti;
283 int action;
284{
285 struct stg_targ_info *sti = (void *) ti;
286
287 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
288 {
289 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
290 ti->ti_maxsynch.period = 0;
291 ti->ti_maxsynch.offset = 0;
292 sti->sti_reg_synch = 0;
293 }
294 return 0;
295}
296
297/****************************************************
298 * scsi low interface
299 ****************************************************/
300static void
301stghw_attention(sc)
302 struct stg_softc *sc;
303{
304
305 sc->sc_busc |= BCTL_ATN;
306 sc->sc_busimg |= BCTL_ATN;
307 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg);
308 SCSI_LOW_DELAY(10);
309}
310
311static void
312stghw_bus_reset(sc)
313 struct stg_softc *sc;
314{
315 bus_space_tag_t iot = sc->sc_iot;
316 bus_space_handle_t ioh = sc->sc_ioh;
317
318 bus_space_write_1(iot, ioh, tmc_ictl, 0);
319 bus_space_write_1(iot, ioh, tmc_fctl, 0);
320 stghw_bcr_write_1(sc, BCTL_RST);
321 SCSI_LOW_DELAY(100000);
322 stghw_bcr_write_1(sc, BCTL_BUSFREE);
323}
324
325static int
326stghw_start_selection(sc, cb)
327 struct stg_softc *sc;
328 struct slccb *cb;
329{
330 bus_space_tag_t iot = sc->sc_iot;
331 bus_space_handle_t ioh = sc->sc_ioh;
332 struct targ_info *ti = cb->ti;
f96d6c88 333 u_int8_t stat;
984263bc
MD
334 int s;
335
336 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
337 sc->sc_dataout_timeout = 0;
338 sc->sc_ubf_timeout = 0;
339 stghw_bcr_write_1(sc, BCTL_BUSFREE);
340 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
341
342 s = splhigh();
343 stat = bus_space_read_1(iot, ioh, tmc_astat);
344 if ((stat & ASTAT_INT) != 0)
345 {
346 splx(s);
347 return SCSI_LOW_START_FAIL;
348 }
349
350 bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit);
351 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
352 splx(s);
353
354 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
355 return SCSI_LOW_START_OK;
356}
357
358static int
359stg_world_start(sc, fdone)
360 struct stg_softc *sc;
361 int fdone;
362{
363 struct scsi_low_softc *slp = &sc->sc_sclow;
364 int error;
365
366 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
367 sc->sc_fcRinit |= FCTL_PARENB;
368 else
369 sc->sc_fcRinit &= ~FCTL_PARENB;
370
371 if ((error = stghw_check(sc)) != 0)
372 return error;
373
374 stghw_init(sc);
375 scsi_low_bus_reset(slp);
376 stghw_init(sc);
377
378 SOFT_INTR_REQUIRED(slp);
379 return 0;
380}
381
382static int
383stg_msg(sc, ti, msg)
384 struct stg_softc *sc;
385 struct targ_info *ti;
386 u_int msg;
387{
388 bus_space_tag_t iot = sc->sc_iot;
389 bus_space_handle_t ioh = sc->sc_ioh;
390 struct stg_targ_info *sti = (void *) ti;
391 u_int period, offset;
392
393 if ((msg & SCSI_LOW_MSG_WIDE) != 0)
394 {
395 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
396 {
397 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
398 return EINVAL;
399 }
400 return 0;
401 }
402
403 if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
404 return 0;
405
406 period = ti->ti_maxsynch.period;
407 offset = ti->ti_maxsynch.offset;
408 period = period << 2;
409 if (period >= 200)
410 {
411 sti->sti_reg_synch = (period - 200) / 50;
412 if (period % 50)
413 sti->sti_reg_synch ++;
414 sti->sti_reg_synch |= SSCTL_SYNCHEN;
415 }
416 else if (period >= 100)
417 {
418 sti->sti_reg_synch = (period - 100) / 50;
419 if (period % 50)
420 sti->sti_reg_synch ++;
421 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
422 }
423 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
424 return 0;
425}
426
427/**************************************************************
428 * General probe attach
429 **************************************************************/
430int
431stgprobesubr(iot, ioh, dvcfg)
432 bus_space_tag_t iot;
433 bus_space_handle_t ioh;
434 u_int dvcfg;
435{
436 u_int16_t lsb, msb;
437
438 lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
439 msb = bus_space_read_1(iot, ioh, tmc_idmsb);
440 switch (msb << 8 | lsb)
441 {
442 default:
443 return 0;
444 case 0x6127:
445 /* not support! */
446 return 0;
447 case 0x60e9:
448 return 1;
449 }
450 return 0;
451}
452
453int
454stgprint(aux, name)
455 void *aux;
456 const char *name;
457{
458
459 if (name != NULL)
460 printf("%s: scsibus ", name);
461 return UNCONF;
462}
463
464void
465stgattachsubr(sc)
466 struct stg_softc *sc;
467{
468 struct scsi_low_softc *slp = &sc->sc_sclow;
469
470 printf("\n");
471
472 sc->sc_idbit = (1 << slp->sl_hostid);
473 slp->sl_funcs = &stgfuncs;
474 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
475
476 slp->sl_flags |= HW_READ_PADDING;
477 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */
478
479 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS,
480 sizeof(struct stg_targ_info), 0);
481}
482
483/**************************************************************
484 * PDMA functions
485 **************************************************************/
486static __inline void
487stg_pdma_end(sc, ti)
488 struct stg_softc *sc;
489 struct targ_info *ti;
490{
491 struct scsi_low_softc *slp = &sc->sc_sclow;
492 bus_space_tag_t iot = sc->sc_iot;
493 bus_space_handle_t ioh = sc->sc_ioh;
494 struct slccb *cb = slp->sl_Qnexus;
495 u_int len, tres;
496
497 slp->sl_flags &= ~HW_PDMASTART;
498 sc->sc_icinit &= ~ICTL_FIFO;
499 sc->sc_dataout_timeout = 0;
500
501 if (cb == NULL)
502 {
503 slp->sl_error |= PDMAERR;
504 goto out;
505 }
506
507 if (ti->ti_phase == PH_DATA)
508 {
509 len = bus_space_read_2(iot, ioh, tmc_fdcnt);
510 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
511 {
512 if (len != 0)
513 {
514 tres = len + slp->sl_scp.scp_datalen;
515 if (tres <= (u_int) cb->ccb_scp.scp_datalen)
516 {
517 slp->sl_scp.scp_data -= len;
518 slp->sl_scp.scp_datalen = tres;
519 }
520 else
521 {
522 slp->sl_error |= PDMAERR;
523 printf("%s len %x >= datalen %x\n",
524 slp->sl_xname,
525 len, slp->sl_scp.scp_datalen);
526 }
527 }
528 }
529 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
530 {
531 if (len != 0)
532 {
533 slp->sl_error |= PDMAERR;
534 printf("%s: len %x left in fifo\n",
535 slp->sl_xname, len);
536 }
537 }
538 scsi_low_data_finish(slp);
539 }
540 else
541 {
542
543 printf("%s data phase miss\n", slp->sl_xname);
544 slp->sl_error |= PDMAERR;
545 }
546
547out:
548 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
549}
550
551static void
552stg_pio_read(sc, ti, thold)
553 struct stg_softc *sc;
554 struct targ_info *ti;
555 u_int thold;
556{
557 struct scsi_low_softc *slp = &sc->sc_sclow;
558 bus_space_tag_t iot = sc->sc_iot;
559 bus_space_handle_t ioh = sc->sc_ioh;
560 struct sc_p *sp = &slp->sl_scp;
561 int s, tout;
562 u_int res;
563 u_int8_t stat;
564
565 if ((slp->sl_flags & HW_PDMASTART) == 0)
566 {
567 bus_space_write_1(iot, ioh, tmc_fctl,
568 sc->sc_fcRinit | FCTL_FIFOEN);
569 slp->sl_flags |= HW_PDMASTART;
570 }
571
572 tout = sc->sc_tmaxcnt;
573 while (tout -- > 0)
574 {
575 if (thold > 0)
576 {
577 s = splhigh();
578 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
579 if (res < thold)
580 {
581 bus_space_write_1(iot, ioh, tmc_ictl,
582 sc->sc_icinit);
583 splx(s);
584 break;
585 }
586 splx(s);
587 }
588 else
589 {
590 stat = bus_space_read_1(iot, ioh, tmc_bstat);
591 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
592 if (res == 0)
593 {
594 if ((stat & PHASE_MASK) != DATA_IN_PHASE)
595 break;
596 if (sp->scp_datalen <= 0)
597 break;
598 SCSI_LOW_DELAY(1);
599 continue;
600 }
601 }
602
603 /* The assumtion res != 0 is valid here */
604 if (res > sp->scp_datalen)
605 {
606 if (res == (u_int) -1)
607 break;
608
609 slp->sl_error |= PDMAERR;
610 if ((slp->sl_flags & HW_READ_PADDING) == 0)
611 {
612 printf("%s: read padding required\n",
613 slp->sl_xname);
614 break;
615 }
616
617 sp->scp_datalen = 0;
618 if (res > STG_MAX_DATA_SIZE)
619 res = STG_MAX_DATA_SIZE;
620 while (res -- > 0)
621 {
622 (void) bus_space_read_1(iot, ioh, tmc_rfifo);
623 }
624 continue;
625 }
626
627 sp->scp_datalen -= res;
628 if (res & 1)
629 {
630 *sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo);
631 sp->scp_data ++;
632 res --;
633 }
634
635 bus_space_read_multi_2(iot, ioh, tmc_rfifo,
636 (u_int16_t *) sp->scp_data, res >> 1);
637 sp->scp_data += res;
638 }
639
640 if (tout <= 0)
641 printf("%s: pio read timeout\n", slp->sl_xname);
642}
643
644static void
645stg_pio_write(sc, ti, thold)
646 struct stg_softc *sc;
647 struct targ_info *ti;
648 u_int thold;
649{
650 struct scsi_low_softc *slp = &sc->sc_sclow;
651 bus_space_tag_t iot = sc->sc_iot;
652 bus_space_handle_t ioh = sc->sc_ioh;
653 struct sc_p *sp = &slp->sl_scp;
654 u_int res;
655 int s, tout;
f96d6c88 656 u_int8_t stat;
984263bc
MD
657
658 if ((slp->sl_flags & HW_PDMASTART) == 0)
659 {
660 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
661 bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO);
662 bus_space_write_1(iot, ioh, tmc_fctl, stat);
663 slp->sl_flags |= HW_PDMASTART;
664 }
665
666 tout = sc->sc_tmaxcnt;
667 while (tout -- > 0)
668 {
669 stat = bus_space_read_1(iot, ioh, tmc_bstat);
670 if ((stat & PHASE_MASK) != DATA_OUT_PHASE)
671 break;
672
673 if (sp->scp_datalen <= 0)
674 {
675 if (sc->sc_dataout_timeout == 0)
676 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
677 break;
678 }
679
680 if (thold > 0)
681 {
682 s = splhigh();
683 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
684 if (res > thold)
685 {
686 bus_space_write_1(iot, ioh, tmc_ictl,
687 sc->sc_icinit);
688 splx(s);
689 break;
690 }
691 splx(s);
692 }
693 else
694 {
695 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
696 if (res > sc->sc_maxwsize / 2)
697 {
698 SCSI_LOW_DELAY(1);
699 continue;
700 }
701 }
702
703 if (res == (u_int) -1)
704 break;
705 res = sc->sc_maxwsize - res;
706 if (res > sp->scp_datalen)
707 res = sp->scp_datalen;
708
709 sp->scp_datalen -= res;
710 if ((res & 0x1) != 0)
711 {
712 bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data);
713 sp->scp_data ++;
714 res --;
715 }
716
717 bus_space_write_multi_2(iot, ioh, tmc_wfifo,
718 (u_int16_t *) sp->scp_data, res >> 1);
719 sp->scp_data += res;
720 }
721
722 if (tout <= 0)
723 printf("%s: pio write timeout\n", slp->sl_xname);
724}
725
726static int
727stg_negate_signal(sc, mask, s)
728 struct stg_softc *sc;
729 u_int8_t mask;
730 u_char *s;
731{
732 struct scsi_low_softc *slp = &sc->sc_sclow;
733 bus_space_tag_t bst = sc->sc_iot;
734 bus_space_handle_t bsh = sc->sc_ioh;
735 int wc;
736 u_int8_t regv;
737
738 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
739 {
740 regv = bus_space_read_1(bst, bsh, tmc_bstat);
741 if (regv == (u_int8_t) -1)
742 return -1;
743 if ((regv & mask) == 0)
744 return 1;
745
746 SCSI_LOW_DELAY(STG_DELAY_INTERVAL);
747 }
748
749 printf("%s: %s stg_negate_signal timeout\n", slp->sl_xname, s);
750 return -1;
751}
752
753static int
754stg_expect_signal(sc, phase, mask)
755 struct stg_softc *sc;
756 u_int8_t phase, mask;
757{
758 struct scsi_low_softc *slp = &sc->sc_sclow;
759 bus_space_tag_t bst = sc->sc_iot;
760 bus_space_handle_t bsh = sc->sc_ioh;
761 int wc;
762 u_int8_t ph;
763
764 phase &= PHASE_MASK;
765 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
766 {
767 ph = bus_space_read_1(bst, bsh, tmc_bstat);
768 if (ph == (u_int8_t) -1)
769 return -1;
770 if ((ph & PHASE_MASK) != phase)
771 return 0;
772 if ((ph & mask) != 0)
773 return 1;
774
775 SCSI_LOW_DELAY(STG_DELAY_INTERVAL);
776 }
777
778 printf("%s: stg_expect_signal timeout\n", slp->sl_xname);
779 return -1;
780}
781
782static int
783stg_xfer(sc, buf, len, phase, clear_atn)
784 struct stg_softc *sc;
785 u_int8_t *buf;
786 int len;
787 int phase;
788 int clear_atn;
789{
790 bus_space_tag_t iot = sc->sc_iot;
791 bus_space_handle_t ioh = sc->sc_ioh;
792 int rv, ptr;
793
794 if (phase & BSTAT_IO)
795 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
796 else
797 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
798
799 for (ptr = 0; len > 0; len --)
800 {
801 rv = stg_expect_signal(sc, phase, BSTAT_REQ);
802 if (rv <= 0)
803 goto bad;
804
805 if (len == 1 && clear_atn != 0)
806 {
807 sc->sc_busc &= ~BCTL_ATN;
808 stghw_bcr_write_1(sc, sc->sc_busc);
809 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
810 }
811
812 if (phase & BSTAT_IO)
813 {
814 buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata);
815 }
816 else
817 {
818 bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]);
819 }
820
821 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
822 }
823
824bad:
825 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
826 return len;
827}
828
829/**************************************************************
830 * disconnect & reselect (HW low)
831 **************************************************************/
832static int
833stg_reselected(sc)
834 struct stg_softc *sc;
835{
836 struct scsi_low_softc *slp = &sc->sc_sclow;
837 bus_space_tag_t iot = sc->sc_iot;
838 bus_space_handle_t ioh = sc->sc_ioh;
839 int tout;
840 u_int sid;
841 u_int8_t regv;
842
843 if (slp->sl_selid != NULL)
844 {
845 /* XXX:
846 * Selection vs Reselection conflicts.
847 */
848 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
849 stghw_bcr_write_1(sc, BCTL_BUSFREE);
850 }
851 else if (slp->sl_Tnexus != NULL)
852 {
853 printf("%s: unexpected termination\n", slp->sl_xname);
854 stg_disconnected(sc, slp->sl_Tnexus);
855 }
856
857 /* XXX:
858 * We should ack the reselection as soon as possible,
859 * becuase the target would abort the current reselection seq
860 * due to reselection timeout.
861 */
862 tout = STG_DELAY_SELECT_POLLING_MAX;
863 while (tout -- > 0)
864 {
865 regv = bus_space_read_1(iot, ioh, tmc_bstat);
866 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
867 (BSTAT_IO | BSTAT_SEL))
868 {
869 SCSI_LOW_DELAY(1);
870 regv = bus_space_read_1(iot, ioh, tmc_bstat);
871 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
872 (BSTAT_IO | BSTAT_SEL))
873 goto reselect_start;
874 }
875 SCSI_LOW_DELAY(1);
876 }
877 printf("%s: reselction timeout I\n", slp->sl_xname);
878 return EJUSTRETURN;
879
880reselect_start:
881 sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid);
882 if ((sid & sc->sc_idbit) == 0)
883 {
884 /* not us */
885 return EJUSTRETURN;
886 }
887
888 bus_space_write_1(iot, ioh, tmc_fctl,
889 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
890 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
891 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
892
893 while (tout -- > 0)
894 {
895 regv = bus_space_read_1(iot, ioh, tmc_bstat);
896 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY)
897 goto reselected;
898 SCSI_LOW_DELAY(1);
899 }
900 printf("%s: reselction timeout II\n", slp->sl_xname);
901 return EJUSTRETURN;
902
903reselected:
904 sid &= ~sc->sc_idbit;
905 sid = ffs(sid) - 1;
906 if (scsi_low_reselected(slp, sid) == NULL)
907 return EJUSTRETURN;
908
909#ifdef STG_STATICS
910 stg_statics.reselect ++;
911#endif /* STG_STATICS */
912 return EJUSTRETURN;
913}
914
915static int
916stg_disconnected(sc, ti)
917 struct stg_softc *sc;
918 struct targ_info *ti;
919{
920 struct scsi_low_softc *slp = &sc->sc_sclow;
921 bus_space_tag_t iot = sc->sc_iot;
922 bus_space_handle_t ioh = sc->sc_ioh;
923
924 /* clear bus status & fifo */
925 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
926 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
927 stghw_bcr_write_1(sc, BCTL_BUSFREE);
928 sc->sc_icinit &= ~ICTL_FIFO;
929 sc->sc_busc &= ~BCTL_ATN;
930 sc->sc_dataout_timeout = 0;
931 sc->sc_ubf_timeout = 0;
932
933#ifdef STG_STATICS
934 stg_statics.disconnect ++;
935#endif /* STG_STATICS */
936 scsi_low_disconnected(slp, ti);
937 return 1;
938}
939
940/**************************************************************
941 * SEQUENCER
942 **************************************************************/
943static int
944stg_target_nexus_establish(sc)
945 struct stg_softc *sc;
946{
947 struct scsi_low_softc *slp = &sc->sc_sclow;
948 bus_space_tag_t iot = sc->sc_iot;
949 bus_space_handle_t ioh = sc->sc_ioh;
950 struct targ_info *ti = slp->sl_Tnexus;
951 struct stg_targ_info *sti = (void *) ti;
952
953 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
954 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0)
955 {
956 sc->sc_icinit |= ICTL_FIFO;
957 }
958 return 0;
959}
960
961static int
962stg_lun_nexus_establish(sc)
963 struct stg_softc *sc;
964{
965
966 return 0;
967}
968
969static int
970stg_ccb_nexus_establish(sc)
971 struct stg_softc *sc;
972{
973 struct scsi_low_softc *slp = &sc->sc_sclow;
974 struct slccb *cb = slp->sl_Qnexus;
975
976 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
977 return 0;
978}
979
980#define STGHW_SELECT_INTERVAL 10
981
982static int
983stghw_select_targ_wait(sc, mu)
984 struct stg_softc *sc;
985 int mu;
986{
987 bus_space_tag_t iot = sc->sc_iot;
988 bus_space_handle_t ioh = sc->sc_ioh;
989
990 mu = mu / STGHW_SELECT_INTERVAL;
991 while (mu -- > 0)
992 {
993 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0)
994 {
995 SCSI_LOW_DELAY(STGHW_SELECT_INTERVAL);
996 continue;
997 }
998 SCSI_LOW_DELAY(1);
999 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0)
1000 {
1001 return 0;
1002 }
1003 }
1004 return ENXIO;
1005}
1006
1007static void
1008stg_selection_done_and_expect_msgout(sc)
1009 struct stg_softc *sc;
1010{
1011 struct scsi_low_softc *slp = &sc->sc_sclow;
1012 bus_space_tag_t iot = sc->sc_iot;
1013 bus_space_handle_t ioh = sc->sc_ioh;
1014
1015 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
1016 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1017 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
1018 SCSI_LOW_ASSERT_ATN(slp);
1019}
1020
1021int
1022stgintr(arg)
1023 void *arg;
1024{
1025 struct stg_softc *sc = arg;
1026 struct scsi_low_softc *slp = &sc->sc_sclow;
1027 bus_space_tag_t iot = sc->sc_iot;
1028 bus_space_handle_t ioh = sc->sc_ioh;
1029 struct targ_info *ti;
1030 struct physio_proc *pp;
1031 struct buf *bp;
1032 u_int derror, flags;
1033 int len, s;
1034 u_int8_t status, astatus, regv;
1035
1036 /*******************************************
1037 * interrupt check
1038 *******************************************/
1039 if (slp->sl_flags & HW_INACTIVE)
1040 return 0;
1041
1042 astatus = bus_space_read_1(iot, ioh, tmc_astat);
1043 status = bus_space_read_1(iot, ioh, tmc_bstat);
1044
1045 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1)
1046 return 0;
1047
1048 bus_space_write_1(iot, ioh, tmc_ictl, 0);
1049 if (astatus & ASTAT_SCSIRST)
1050 {
1051 bus_space_write_1(iot, ioh, tmc_fctl,
1052 sc->sc_fcRinit | FCTL_CLRFIFO);
1053 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1054 bus_space_write_1(iot, ioh, tmc_ictl, 0);
1055
1056 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
1057 "bus reset (power off?)");
1058 return 1;
1059 }
1060
1061 /*******************************************
1062 * debug section
1063 *******************************************/
1064#ifdef STG_DEBUG
1065 if (stg_debug)
1066 {
1067 scsi_low_print(slp, NULL);
1068 printf("%s: st %x ist %x\n\n", slp->sl_xname,
1069 status, astatus);
1070#ifdef DDB
1071 if (stg_debug > 1)
1072 SCSI_LOW_DEBUGGER("stg");
1073#endif /* DDB */
1074 }
1075#endif /* STG_DEBUG */
1076
1077 /*******************************************
1078 * reselection & nexus
1079 *******************************************/
1080 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
1081 {
1082 if (stg_reselected(sc) == EJUSTRETURN)
1083 goto out;
1084 }
1085
1086 if ((ti = slp->sl_Tnexus) == NULL)
1087 return 0;
1088
1089 derror = 0;
1090 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
1091 (sc->sc_fcRinit & FCTL_PARENB) != 0)
1092 {
1093 slp->sl_error |= PARITYERR;
1094 derror = SCSI_LOW_DATA_PE;
1095 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE)
1096 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0);
1097 else
1098 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
1099 }
1100
1101 /*******************************************
1102 * aribitration & selection
1103 *******************************************/
1104 switch (ti->ti_phase)
1105 {
1106 case PH_ARBSTART:
1107 if ((astatus & ASTAT_ARBIT) == 0)
1108 {
1109#ifdef STG_STATICS
1110 stg_statics.arbit_fail_0 ++;
1111#endif /* STG_STATICS */
1112 goto arb_fail;
1113 }
1114
1115 status = bus_space_read_1(iot, ioh, tmc_bstat);
1116 if ((status & BSTAT_IO) != 0)
1117 {
1118 /* XXX:
1119 * Selection vs Reselection conflicts.
1120 */
1121#ifdef STG_STATICS
1122 stg_statics.arbit_fail_1 ++;
1123#endif /* STG_STATICS */
1124arb_fail:
1125 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1126 stghw_bcr_write_1(sc, BCTL_BUSFREE);
1127 scsi_low_arbit_fail(slp, slp->sl_Qnexus);
1128 goto out;
1129 }
1130
1131 /*
1132 * selection assert start.
1133 */
1134 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
1135 scsi_low_arbit_win(slp);
1136
1137 s = splhigh();
1138 bus_space_write_1(iot, ioh, tmc_scsiid,
1139 sc->sc_idbit | (1 << ti->ti_id));
1140 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
1141 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
1142 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0)
1143 {
1144 /* selection abort delay 200 + 100 micro sec */
1145 if (stghw_select_targ_wait(sc, 300) == 0)
1146 {
1147 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1148 stg_selection_done_and_expect_msgout(sc);
1149 }
1150 }
1151 splx(s);
1152 goto out;
1153
1154 case PH_SELSTART:
1155 if ((status & BSTAT_BSY) == 0)
1156 {
1157 /* selection timeout delay 250 ms */
1158 if (stghw_select_targ_wait(sc, 250 * 1000) != 0)
1159 {
1160 stg_disconnected(sc, ti);
1161 goto out;
1162 }
1163 }
1164
1165 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1166 stg_selection_done_and_expect_msgout(sc);
1167 goto out;
1168
1169 case PH_SELECTED:
1170 if ((status & BSTAT_REQ) == 0)
1171 goto out;
1172 stg_target_nexus_establish(sc);
1173 break;
1174
1175 case PH_RESEL:
1176 if ((status & BSTAT_REQ) == 0)
1177 goto out;
1178
1179 /* clear a busy line */
1180 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1181 stghw_bcr_write_1(sc, sc->sc_busc);
1182 stg_target_nexus_establish(sc);
1183 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
1184 {
1185 printf("%s: unexpected phase after reselect\n",
1186 slp->sl_xname);
1187 slp->sl_error |= FATALIO;
1188 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1189 goto out;
1190 }
1191 break;
1192 }
1193
1194 /*******************************************
1195 * data phase
1196 *******************************************/
1197 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0)
1198 {
1199 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1200 stg_pio_read(sc, ti, 0);
1201
1202 stg_pdma_end(sc, ti);
1203 }
1204
1205 /*******************************************
1206 * scsi seq
1207 *******************************************/
1208 switch (status & PHASE_MASK)
1209 {
1210 case COMMAND_PHASE:
1211 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0)
1212 break;
1213
1214 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1215 if (scsi_low_cmd(slp, ti) != 0)
1216 {
1217 scsi_low_attention(slp);
1218 }
1219
1220 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen,
1221 COMMAND_PHASE, 0) != 0)
1222 {
1223 printf("%s: CMDOUT short\n", slp->sl_xname);
1224 }
1225 break;
1226
1227 case DATA_OUT_PHASE:
1228 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1229 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1230 {
1231 scsi_low_attention(slp);
1232 }
1233
1234 pp = physio_proc_enter(bp);
1235 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1236 stg_pio_write(sc, ti, sc->sc_wthold);
1237 else
1238 stg_pio_write(sc, ti, 0);
1239 physio_proc_leave(pp);
1240 break;
1241
1242 case DATA_IN_PHASE:
1243 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1244 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1245 {
1246 scsi_low_attention(slp);
1247 }
1248
1249 pp = physio_proc_enter(bp);
1250 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1251 stg_pio_read(sc, ti, sc->sc_rthold);
1252 else
1253 stg_pio_read(sc, ti, 0);
1254 physio_proc_leave(pp);
1255 break;
1256
1257 case STATUS_PHASE:
1258 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ);
1259 if (regv <= 0)
1260 break;
1261
1262 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1263 regv = bus_space_read_1(iot, ioh, tmc_sdna);
1264 if (scsi_low_statusin(slp, ti, regv | derror) != 0)
1265 {
1266 scsi_low_attention(slp);
1267 }
1268 if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
1269 {
1270 printf("%s: STATIN: data mismatch\n", slp->sl_xname);
1271 }
1272 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>");
1273 break;
1274
1275 case MESSAGE_OUT_PHASE:
1276 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0)
1277 break;
1278
1279 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1280 flags = (ti->ti_ophase != ti->ti_phase) ?
1281 SCSI_LOW_MSGOUT_INIT : 0;
1282 len = scsi_low_msgout(slp, ti, flags);
1283
1284 if (len > 1 && slp->sl_atten == 0)
1285 {
1286 scsi_low_attention(slp);
1287 }
1288
1289 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE,
1290 slp->sl_clear_atten) != 0)
1291 {
1292 printf("%s: MSGOUT short\n", slp->sl_xname);
1293 }
1294 else
1295 {
1296 if (slp->sl_msgphase >= MSGPH_ABORT)
1297 {
1298 stg_disconnected(sc, ti);
1299 }
1300 }
1301 break;
1302
1303 case MESSAGE_IN_PHASE:
1304 /* confirm phase and req signal */
1305 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0)
1306 break;
1307
1308 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1309
1310 /* read data with NOACK */
1311 regv = bus_space_read_1(iot, ioh, tmc_sdna);
1312
1313 if (scsi_low_msgin(slp, ti, derror | regv) == 0)
1314 {
1315 if (scsi_low_is_msgout_continue(ti, 0) != 0)
1316 {
1317 scsi_low_attention(slp);
1318 }
1319 }
1320
1321 /* read data with ACK */
1322 if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
1323 {
1324 printf("%s: MSGIN: data mismatch\n", slp->sl_xname);
1325 }
1326
1327 /* wait for the ack negated */
1328 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>");
1329
1330 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT)
1331 {
1332 stg_disconnected(sc, ti);
1333 }
1334 break;
1335
1336 case BUSFREE_PHASE:
1337 printf("%s: unexpected disconnect\n", slp->sl_xname);
1338 stg_disconnected(sc, ti);
1339 break;
1340
1341 default:
1342 slp->sl_error |= FATALIO;
1343 printf("%s: unknown phase bus %x intr %x\n",
1344 slp->sl_xname, status, astatus);
1345 break;
1346 }
1347
1348out:
1349 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
1350 return 1;
1351}
1352
1353static int
1354stg_timeout(sc)
1355 struct stg_softc *sc;
1356{
1357 struct scsi_low_softc *slp = &sc->sc_sclow;
1358 bus_space_tag_t iot = sc->sc_iot;
1359 bus_space_handle_t ioh = sc->sc_ioh;
1360 int tout, count;
1361 u_int8_t status;
1362
1363 if (slp->sl_Tnexus == NULL)
1364 return 0;
1365
1366 status = bus_space_read_1(iot, ioh, tmc_bstat);
1367 if ((status & PHASE_MASK) == 0)
1368 {
1369 if (sc->sc_ubf_timeout ++ == 0)
1370 return 0;
1371
1372 printf("%s: unexpected bus free detected\n", slp->sl_xname);
1373 slp->sl_error |= FATALIO;
1374 scsi_low_print(slp, slp->sl_Tnexus);
1375 stg_disconnected(sc, slp->sl_Tnexus);
1376 return 0;
1377 }
1378
1379 switch (status & PHASE_MASK)
1380 {
1381 case DATA_OUT_PHASE:
1382 if (sc->sc_dataout_timeout == 0)
1383 break;
1384 if ((status & BSTAT_REQ) == 0)
1385 break;
1386 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
1387 break;
1388 if ((-- sc->sc_dataout_timeout) > 0)
1389 break;
1390
1391 slp->sl_error |= PDMAERR;
1392 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1393 {
1394 printf("%s: write padding required\n",
1395 slp->sl_xname);
1396 break;
1397 }
1398
1399 bus_space_write_1(iot, ioh, tmc_ictl, 0);
1400
1401 tout = STG_DELAY_MAX;
1402 while (tout --)
1403 {
1404 status = bus_space_read_1(iot, ioh, tmc_bstat);
1405 if ((status & PHASE_MASK) != DATA_OUT_PHASE)
1406 break;
1407
1408 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
1409 {
1410 SCSI_LOW_DELAY(1);
1411 continue;
1412 }
1413
1414 for (count = sc->sc_maxwsize; count > 0; count --)
1415 bus_space_write_1(iot, ioh, tmc_wfifo, 0);
1416 }
1417
1418 status = bus_space_read_1(iot, ioh, tmc_bstat);
1419 if ((status & PHASE_MASK) == DATA_OUT_PHASE)
1420 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1421
1422 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
1423 break;
1424
1425 default:
1426 break;
1427 }
1428 return 0;
1429}