what the heck one last one before i go take a nap...
[dragonfly.git] / sys / cpu / i386 / include / pmap.h
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1/*
2 * Copyright (c) 1991 Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * the Systems Programming Group of the University of Utah Computer
7 * Science Department and William Jolitz of UUNET Technologies Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * Derived from hp300 version by Mike Hibler, this version by William
38 * Jolitz uses a recursive map [a pde points to the page directory] to
39 * map the page tables using the pagetables themselves. This is done to
40 * reduce the impact on kernel virtual memory for lots of sparse address
41 * space, and to reduce the cost of memory to each process.
42 *
43 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
44 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
45 * $FreeBSD: src/sys/i386/include/pmap.h,v 1.65.2.3 2001/10/03 07:15:37 peter Exp $
3ae0cd58 46 * $DragonFly: src/sys/cpu/i386/include/pmap.h,v 1.4 2003/08/26 21:42:18 rob Exp $
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47 */
48
49#ifndef _MACHINE_PMAP_H_
50#define _MACHINE_PMAP_H_
51
52/*
53 * Page-directory and page-table entires follow this format, with a few
54 * of the fields not present here and there, depending on a lot of things.
55 */
56 /* ---- Intel Nomenclature ---- */
57#define PG_V 0x001 /* P Valid */
58#define PG_RW 0x002 /* R/W Read/Write */
59#define PG_U 0x004 /* U/S User/Supervisor */
60#define PG_NC_PWT 0x008 /* PWT Write through */
61#define PG_NC_PCD 0x010 /* PCD Cache disable */
62#define PG_A 0x020 /* A Accessed */
63#define PG_M 0x040 /* D Dirty */
64#define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */
65#define PG_G 0x100 /* G Global */
66#define PG_AVAIL1 0x200 /* / Available for system */
67#define PG_AVAIL2 0x400 /* < programmers use */
68#define PG_AVAIL3 0x800 /* \ */
69
70
71/* Our various interpretations of the above */
72#define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
73#define PG_MANAGED PG_AVAIL2
74#define PG_FRAME (~PAGE_MASK)
75#define PG_PROT (PG_RW|PG_U) /* all protection bits . */
76#define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */
77
78/*
79 * Page Protection Exception bits
80 */
81
82#define PGEX_P 0x01 /* Protection violation vs. not present */
83#define PGEX_W 0x02 /* during a Write cycle */
84#define PGEX_U 0x04 /* access from User mode (UPL) */
85
86/*
87 * Size of Kernel address space. This is the number of page table pages
88 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte.
89 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
90 */
91#ifndef KVA_PAGES
92#define KVA_PAGES 256
93#endif
94
95/*
96 * Pte related macros
97 */
98#define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT)))
99
100#ifndef NKPT
101#define NKPT 30 /* actual number of kernel page tables */
102#endif
103#ifndef NKPDE
984263bc 104#define NKPDE (KVA_PAGES - 2) /* addressable number of page tables/pde's */
984263bc 105#endif
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106#if NKPDE > KVA_PAGES - 2
107#error "Maximum NKPDE is KVA_PAGES - 2"
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108#endif
109
110/*
111 * The *PTDI values control the layout of virtual memory
112 *
113 * XXX This works for now, but I am not real happy with it, I'll fix it
114 * right after I fix locore.s and the magic 28K hole
115 *
116 * SMP_PRIVPAGES: The per-cpu address space is 0xff80000 -> 0xffbfffff
117 */
118#define APTDPTDI (NPDEPG-1) /* alt ptd entry that points to APTD */
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119#define MPPTDI (APTDPTDI-1) /* per cpu ptd entry */
120#define KPTDI (MPPTDI-NKPDE) /* start of kernel virtual pde's */
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121#define PTDPTDI (KPTDI-1) /* ptd entry that points to ptd! */
122#define UMAXPTDI (PTDPTDI-1) /* ptd entry for user space end */
123#define UMAXPTEOFF (NPTEPG) /* pte entry for user space end */
124
125/*
126 * XXX doesn't really belong here I guess...
127 */
128#define ISA_HOLE_START 0xa0000
129#define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
130
131#ifndef LOCORE
132
133#include <sys/queue.h>
134
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135#define PDESIZE sizeof(pd_entry_t) /* for assembly files */
136#define PTESIZE sizeof(pt_entry_t) /* for assembly files */
137
138/*
139 * Address of current and alternate address space page table maps
140 * and directories.
141 */
142#ifdef _KERNEL
143extern pt_entry_t PTmap[], APTmap[], Upte;
144extern pd_entry_t PTD[], APTD[], PTDpde, APTDpde, Upde;
145
146extern pd_entry_t IdlePTD; /* physical address of "Idle" state directory */
147#endif
148
149#ifdef _KERNEL
150/*
151 * virtual address to page table entry and
152 * to physical address. Likewise for alternate address space.
153 * Note: these work recursively, thus vtopte of a pte will give
154 * the corresponding pde that in turn maps it.
155 */
156#define vtopte(va) (PTmap + i386_btop(va))
157
158#define avtopte(va) (APTmap + i386_btop(va))
159
160/*
161 * Routine: pmap_kextract
162 * Function:
163 * Extract the physical page address associated
164 * kernel virtual address.
165 */
166static __inline vm_offset_t
167pmap_kextract(vm_offset_t va)
168{
169 vm_offset_t pa;
170 if ((pa = (vm_offset_t) PTD[va >> PDRSHIFT]) & PG_PS) {
171 pa = (pa & ~(NBPDR - 1)) | (va & (NBPDR - 1));
172 } else {
173 pa = *(vm_offset_t *)vtopte(va);
174 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
175 }
176 return pa;
177}
178
179#if 0
180#define vtophys(va) (((vm_offset_t) (*vtopte(va))&PG_FRAME) | ((vm_offset_t)(va) & PAGE_MASK))
181#else
182#define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
183#endif
184
185#define avtophys(va) (((vm_offset_t) (*avtopte(va))&PG_FRAME) | ((vm_offset_t)(va) & PAGE_MASK))
186
187#endif
188
189/*
190 * Pmap stuff
191 */
192struct pv_entry;
193
194struct md_page {
195 int pv_list_count;
196 TAILQ_HEAD(,pv_entry) pv_list;
197};
198
199struct pmap {
200 pd_entry_t *pm_pdir; /* KVA of page directory */
201 vm_object_t pm_pteobj; /* Container for pte's */
202 TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */
203 int pm_count; /* reference count */
204 int pm_active; /* active on cpus */
205 struct pmap_statistics pm_stats; /* pmap statistics */
206 struct vm_page *pm_ptphint; /* pmap ptp hint */
207};
208
209#define pmap_resident_count(pmap) (pmap)->pm_stats.resident_count
210
211typedef struct pmap *pmap_t;
212
213#ifdef _KERNEL
214extern pmap_t kernel_pmap;
215#endif
216
217/*
218 * For each vm_page_t, there is a list of all currently valid virtual
219 * mappings of that page. An entry is a pv_entry_t, the list is pv_table.
220 */
221typedef struct pv_entry {
222 pmap_t pv_pmap; /* pmap where mapping lies */
223 vm_offset_t pv_va; /* virtual address for mapping */
224 TAILQ_ENTRY(pv_entry) pv_list;
225 TAILQ_ENTRY(pv_entry) pv_plist;
226 vm_page_t pv_ptem; /* VM page for pte */
227} *pv_entry_t;
228
229#define PV_ENTRY_NULL ((pv_entry_t) 0)
230
231#define PV_CI 0x01 /* all entries must be cache inhibited */
232#define PV_PTPAGE 0x02 /* entry maps a page table page */
233
234#ifdef _KERNEL
235
236#define NPPROVMTRR 8
237#define PPRO_VMTRRphysBase0 0x200
238#define PPRO_VMTRRphysMask0 0x201
239struct ppro_vmtrr {
240 u_int64_t base, mask;
241};
242extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR];
243
244extern caddr_t CADDR1;
245extern pt_entry_t *CMAP1;
246extern vm_offset_t avail_end;
247extern vm_offset_t avail_start;
248extern vm_offset_t clean_eva;
249extern vm_offset_t clean_sva;
250extern vm_offset_t phys_avail[];
251extern char *ptvmmap; /* poor name! */
252extern vm_offset_t virtual_avail;
253extern vm_offset_t virtual_end;
254
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255void pmap_bootstrap ( vm_offset_t, vm_offset_t);
256pmap_t pmap_kernel (void);
257void *pmap_mapdev (vm_offset_t, vm_size_t);
258void pmap_unmapdev (vm_offset_t, vm_size_t);
259unsigned *pmap_pte (pmap_t, vm_offset_t) __pure2;
260vm_page_t pmap_use_pt (pmap_t, vm_offset_t);
984263bc 261#ifdef SMP
3ae0cd58 262void pmap_set_opt (void);
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263#endif
264
265#endif /* _KERNEL */
266
267#endif /* !LOCORE */
268
269#endif /* !_MACHINE_PMAP_H_ */