Revert "rename amd64 architecture to x86_64"
[dragonfly.git] / sys / platform / pc64 / amd64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
48ffc236
JG
5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
d7f50089 9 * All rights reserved.
c8fe38ae
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10 *
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
14 *
d7f50089
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15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
d7f50089
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18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
c8fe38ae
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21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 41 * SUCH DAMAGE.
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42 *
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
d7f50089 44 * $FreeBSD: src/sys/i386/i386/pmap.c,v 1.250.2.18 2002/03/06 22:48:53 silby Exp $
3f3709c3 45 * $DragonFly: src/sys/platform/pc64/amd64/pmap.c,v 1.3 2008/08/29 17:07:10 dillon Exp $
d7f50089 46 */
c8fe38ae 47
d7f50089 48/*
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49 * Manages physical address maps.
50 *
51 * In addition to hardware address maps, this
52 * module is called upon to provide software-use-only
53 * maps which may or may not be stored in the same
54 * form as hardware maps. These pseudo-maps are
55 * used to store intermediate results from copy
56 * operations to and from address spaces.
57 *
58 * Since the information managed by this module is
59 * also stored by the logical address mapping module,
60 * this module may throw away valid virtual-to-physical
61 * mappings at almost any time. However, invalidations
62 * of virtual-to-physical mappings must be done as
63 * requested.
64 *
65 * In order to cope with hardware architectures which
66 * make virtual-to-physical map invalidates expensive,
67 * this module may delay invalidate or reduced protection
68 * operations until such time as they are actually
69 * necessary. This module is given full information as
70 * to which processors are currently using which maps,
71 * and to when physical maps must be made correct.
72 */
73
74#if JG
75#include "opt_disable_pse.h"
76#include "opt_pmap.h"
77#endif
78#include "opt_msgbuf.h"
d7f50089 79
c8fe38ae 80#include <sys/param.h>
d7f50089
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81#include <sys/systm.h>
82#include <sys/kernel.h>
d7f50089 83#include <sys/proc.h>
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84#include <sys/msgbuf.h>
85#include <sys/vmmeter.h>
86#include <sys/mman.h>
d7f50089 87
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88#include <vm/vm.h>
89#include <vm/vm_param.h>
90#include <sys/sysctl.h>
91#include <sys/lock.h>
d7f50089 92#include <vm/vm_kern.h>
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93#include <vm/vm_page.h>
94#include <vm/vm_map.h>
d7f50089 95#include <vm/vm_object.h>
c8fe38ae 96#include <vm/vm_extern.h>
d7f50089 97#include <vm/vm_pageout.h>
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98#include <vm/vm_pager.h>
99#include <vm/vm_zone.h>
100
101#include <sys/user.h>
102#include <sys/thread2.h>
103#include <sys/sysref2.h>
d7f50089 104
c8fe38ae 105#include <machine/cputypes.h>
d7f50089 106#include <machine/md_var.h>
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107#include <machine/specialreg.h>
108#include <machine/smp.h>
109#include <machine_base/apic/apicreg.h>
d7f50089 110#include <machine/globaldata.h>
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111#include <machine/pmap.h>
112#include <machine/pmap_inval.h>
113
48ffc236
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114#include <ddb/ddb.h>
115
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116#define PMAP_KEEP_PDIRS
117#ifndef PMAP_SHPGPERPROC
118#define PMAP_SHPGPERPROC 200
119#endif
120
121#if defined(DIAGNOSTIC)
122#define PMAP_DIAGNOSTIC
123#endif
124
125#define MINPV 2048
126
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127/*
128 * Get PDEs and PTEs for user/kernel address space
129 */
48ffc236 130static pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va);
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131#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
132
133#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
134#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
135#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
136#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
137#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
138
139
140/*
141 * Given a map and a machine independent protection code,
142 * convert to a vax protection code.
143 */
144#define pte_prot(m, p) \
145 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
146static int protection_codes[8];
d7f50089
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147
148struct pmap kernel_pmap;
c8fe38ae 149static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 150
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151vm_paddr_t avail_start; /* PA of first available physical page */
152vm_paddr_t avail_end; /* PA of last available physical page */
153vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
154vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
155vm_offset_t KvaStart; /* VA start of KVA space */
156vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
157vm_offset_t KvaSize; /* max size of kernel virtual address space */
158static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
159static int pgeflag; /* PG_G or-in */
160static int pseflag; /* PG_PS or-in */
d7f50089 161
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162static vm_object_t kptobj;
163
48ffc236
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164static int ndmpdp;
165static vm_paddr_t dmaplimit;
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166static int nkpt;
167vm_offset_t kernel_vm_end;
d7f50089 168
48ffc236
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169static uint64_t KPDphys; /* phys addr of kernel level 2 */
170uint64_t KPDPphys; /* phys addr of kernel level 3 */
171uint64_t KPML4phys; /* phys addr of kernel level 4 */
172
173static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
174static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
175
d7f50089 176/*
c8fe38ae 177 * Data for the pv entry allocation mechanism
d7f50089 178 */
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179static vm_zone_t pvzone;
180static struct vm_zone pvzone_store;
181static struct vm_object pvzone_obj;
182static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0;
183static int pmap_pagedaemon_waken = 0;
184static struct pv_entry *pvinit;
d7f50089
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185
186/*
c8fe38ae 187 * All those kernel PT submaps that BSD is so fond of
d7f50089 188 */
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189pt_entry_t *CMAP1 = 0, *ptmmap;
190caddr_t CADDR1 = 0, ptvmmap = 0;
191static pt_entry_t *msgbufmap;
192struct msgbuf *msgbufp=0;
d7f50089 193
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194/*
195 * Crashdump maps.
d7f50089 196 */
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197static pt_entry_t *pt_crashdumpmap;
198static caddr_t crashdumpmap;
199
200extern uint64_t KPTphys;
201extern pt_entry_t *SMPpt;
202extern uint64_t SMPptpa;
203
204#define DISABLE_PSE
205
c8fe38ae 206static pv_entry_t get_pv_entry (void);
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207static void i386_protection_init (void);
208static void create_pagetables(vm_paddr_t *firstaddr);
209static void pmap_remove_all (vm_page_t m);
210static void pmap_enter_quick (pmap_t pmap, vm_offset_t va, vm_page_t m);
211static int pmap_remove_pte (struct pmap *pmap, pt_entry_t *ptq,
c8fe38ae
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212 vm_offset_t sva, pmap_inval_info_t info);
213static void pmap_remove_page (struct pmap *pmap,
214 vm_offset_t va, pmap_inval_info_t info);
bfc09ba0 215static int pmap_remove_entry (struct pmap *pmap, vm_page_t m,
c8fe38ae
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216 vm_offset_t va, pmap_inval_info_t info);
217static boolean_t pmap_testbit (vm_page_t m, int bit);
218static void pmap_insert_entry (pmap_t pmap, vm_offset_t va,
bfc09ba0 219 vm_page_t mpte, vm_page_t m);
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220
221static vm_page_t pmap_allocpte (pmap_t pmap, vm_offset_t va);
222
223static int pmap_release_free_page (pmap_t pmap, vm_page_t p);
224static vm_page_t _pmap_allocpte (pmap_t pmap, vm_pindex_t ptepindex);
225static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
226static vm_page_t pmap_page_lookup (vm_object_t object, vm_pindex_t pindex);
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227static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
228 pmap_inval_info_t info);
c8fe38ae
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229static int pmap_unuse_pt (pmap_t, vm_offset_t, vm_page_t, pmap_inval_info_t);
230static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
231
232static unsigned pdir4mb;
d7f50089
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233
234/*
c8fe38ae 235 * Move the kernel virtual free pointer to the next
f9cc0f15
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236 * 2MB. This is used to help improve performance
237 * by using a large (2MB) page for much of the kernel
c8fe38ae 238 * (.text, .data, .bss)
d7f50089 239 */
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MD
240static
241vm_offset_t
c8fe38ae 242pmap_kmem_choose(vm_offset_t addr)
d7f50089 243{
c8fe38ae 244 vm_offset_t newaddr = addr;
f9cc0f15
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245
246 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 247 return newaddr;
d7f50089
YY
248}
249
d7f50089 250/*
c8fe38ae 251 * pmap_pte_quick:
d7f50089 252 *
c8fe38ae
MD
253 * Super fast pmap_pte routine best used when scanning the pv lists.
254 * This eliminates many course-grained invltlb calls. Note that many of
255 * the pv list scans are across different pmaps and it is very wasteful
256 * to do an entire invltlb when checking a single mapping.
257 *
258 * Should only be called while in a critical section.
259 */
48ffc236
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260static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
261
bfc09ba0
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262static
263pt_entry_t *
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264pmap_pte_quick(pmap_t pmap, vm_offset_t va)
265{
48ffc236
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266 return pmap_pte(pmap, va);
267}
268
269/* Return a non-clipped PD index for a given VA */
bfc09ba0
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270static __inline
271vm_pindex_t
48ffc236 272pmap_pde_pindex(vm_offset_t va)
48ffc236
JG
273{
274 return va >> PDRSHIFT;
275}
276
277/* Return various clipped indexes for a given VA */
bfc09ba0
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278static __inline
279vm_pindex_t
48ffc236 280pmap_pte_index(vm_offset_t va)
48ffc236
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281{
282
283 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
284}
285
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286static __inline
287vm_pindex_t
48ffc236 288pmap_pde_index(vm_offset_t va)
48ffc236
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289{
290
291 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
292}
293
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294static __inline
295vm_pindex_t
48ffc236 296pmap_pdpe_index(vm_offset_t va)
48ffc236
JG
297{
298
299 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
300}
301
bfc09ba0
MD
302static __inline
303vm_pindex_t
48ffc236 304pmap_pml4e_index(vm_offset_t va)
48ffc236
JG
305{
306
307 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
308}
309
310/* Return a pointer to the PML4 slot that corresponds to a VA */
bfc09ba0
MD
311static __inline
312pml4_entry_t *
48ffc236 313pmap_pml4e(pmap_t pmap, vm_offset_t va)
48ffc236
JG
314{
315
316 return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
317}
318
319/* Return a pointer to the PDP slot that corresponds to a VA */
bfc09ba0
MD
320static __inline
321pdp_entry_t *
48ffc236 322pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
48ffc236
JG
323{
324 pdp_entry_t *pdpe;
325
326 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
327 return (&pdpe[pmap_pdpe_index(va)]);
328}
329
330/* Return a pointer to the PDP slot that corresponds to a VA */
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MD
331static __inline
332pdp_entry_t *
48ffc236 333pmap_pdpe(pmap_t pmap, vm_offset_t va)
48ffc236
JG
334{
335 pml4_entry_t *pml4e;
336
337 pml4e = pmap_pml4e(pmap, va);
338 if ((*pml4e & PG_V) == 0)
339 return NULL;
340 return (pmap_pml4e_to_pdpe(pml4e, va));
341}
342
343/* Return a pointer to the PD slot that corresponds to a VA */
bfc09ba0
MD
344static __inline
345pd_entry_t *
48ffc236 346pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
48ffc236
JG
347{
348 pd_entry_t *pde;
349
350 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
351 return (&pde[pmap_pde_index(va)]);
352}
353
354/* Return a pointer to the PD slot that corresponds to a VA */
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MD
355static __inline
356pd_entry_t *
48ffc236 357pmap_pde(pmap_t pmap, vm_offset_t va)
48ffc236
JG
358{
359 pdp_entry_t *pdpe;
360
361 pdpe = pmap_pdpe(pmap, va);
362 if (pdpe == NULL || (*pdpe & PG_V) == 0)
363 return NULL;
364 return (pmap_pdpe_to_pde(pdpe, va));
365}
366
367/* Return a pointer to the PT slot that corresponds to a VA */
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MD
368static __inline
369pt_entry_t *
48ffc236 370pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
48ffc236
JG
371{
372 pt_entry_t *pte;
373
374 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
375 return (&pte[pmap_pte_index(va)]);
376}
377
378/* Return a pointer to the PT slot that corresponds to a VA */
bfc09ba0
MD
379static __inline
380pt_entry_t *
48ffc236 381pmap_pte(pmap_t pmap, vm_offset_t va)
48ffc236
JG
382{
383 pd_entry_t *pde;
384
385 pde = pmap_pde(pmap, va);
386 if (pde == NULL || (*pde & PG_V) == 0)
387 return NULL;
388 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
389 return ((pt_entry_t *)pde);
390 return (pmap_pde_to_pte(pde, va));
391}
392
bfc09ba0
MD
393static __inline
394pt_entry_t *
48ffc236 395vtopte(vm_offset_t va)
48ffc236
JG
396{
397 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
398
399 return (PTmap + ((va >> PAGE_SHIFT) & mask));
c8fe38ae 400}
d7f50089 401
bfc09ba0
MD
402static __inline
403pd_entry_t *
48ffc236 404vtopde(vm_offset_t va)
48ffc236
JG
405{
406 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
407
408 return (PDmap + ((va >> PDRSHIFT) & mask));
409}
c8fe38ae 410
48ffc236 411static uint64_t
c8fe38ae 412allocpages(vm_paddr_t *firstaddr, int n)
d7f50089 413{
48ffc236 414 uint64_t ret;
c8fe38ae
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415
416 ret = *firstaddr;
417 bzero((void *)ret, n * PAGE_SIZE);
418 *firstaddr += n * PAGE_SIZE;
419 return (ret);
d7f50089
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420}
421
bfc09ba0 422static
c8fe38ae
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423void
424create_pagetables(vm_paddr_t *firstaddr)
425{
426 int i;
c8fe38ae
MD
427
428 /* we are running (mostly) V=P at this point */
429
48ffc236
JG
430 /* Allocate pages */
431 KPTphys = allocpages(firstaddr, NKPT);
432 KPML4phys = allocpages(firstaddr, 1);
433 KPDPphys = allocpages(firstaddr, NKPML4E);
434 KPDphys = allocpages(firstaddr, NKPDPE);
435
436 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
437 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
438 ndmpdp = 4;
439 DMPDPphys = allocpages(firstaddr, NDMPML4E);
440 if ((amd_feature & AMDID_PAGE1GB) == 0)
441 DMPDphys = allocpages(firstaddr, ndmpdp);
442 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
443
444 /* Fill in the underlying page table pages */
445 /* Read-only from zero to physfree */
446 /* XXX not fully used, underneath 2M pages */
447 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
448 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
449 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
450 }
451
452 /* Now map the page tables at their location within PTmap */
453 for (i = 0; i < NKPT; i++) {
454 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
455 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
456 }
457
458 /* Map from zero to end of allocations under 2M pages */
459 /* This replaces some of the KPTphys entries above */
460 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
461 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
462 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
463 }
464
465 /* And connect up the PD to the PDP */
466 for (i = 0; i < NKPDPE; i++) {
467 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys +
468 (i << PAGE_SHIFT);
469 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
470 }
471
472 /* Now set up the direct map space using either 2MB or 1GB pages */
473 /* Preset PG_M and PG_A because demotion expects it */
474 if ((amd_feature & AMDID_PAGE1GB) == 0) {
475 for (i = 0; i < NPDEPG * ndmpdp; i++) {
476 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
477 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
478 PG_G | PG_M | PG_A;
479 }
480 /* And the direct map space's PDP */
481 for (i = 0; i < ndmpdp; i++) {
482 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
483 (i << PAGE_SHIFT);
484 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
485 }
486 } else {
487 for (i = 0; i < ndmpdp; i++) {
488 ((pdp_entry_t *)DMPDPphys)[i] =
489 (vm_paddr_t)i << PDPSHIFT;
490 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
491 PG_G | PG_M | PG_A;
492 }
493 }
494
495 /* And recursively map PML4 to itself in order to get PTmap */
496 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
497 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
498
499 /* Connect the Direct Map slot up to the PML4 */
500 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
501 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
502
503 /* Connect the KVA slot up to the PML4 */
504 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
505 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
c8fe38ae
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506}
507
508void
f81851b8
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509init_paging(vm_paddr_t *firstaddr)
510{
c8fe38ae 511 create_pagetables(firstaddr);
d7f50089
YY
512}
513
514/*
c8fe38ae
MD
515 * Bootstrap the system enough to run with virtual memory.
516 *
517 * On the i386 this is called after mapping has already been enabled
518 * and just syncs the pmap module with what has already been done.
519 * [We can't call it easily with mapping off since the kernel is not
520 * mapped with PA == VA, hence we would have to relocate every address
521 * from the linked base (virtual) address "KERNBASE" to the actual
522 * (physical) address starting relative to 0]
d7f50089
YY
523 */
524void
48ffc236 525pmap_bootstrap(vm_paddr_t *firstaddr)
c8fe38ae
MD
526{
527 vm_offset_t va;
528 pt_entry_t *pte;
529 struct mdglobaldata *gd;
c8fe38ae
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530 int pg;
531
48ffc236
JG
532 KvaStart = VM_MIN_KERNEL_ADDRESS;
533 KvaEnd = VM_MAX_KERNEL_ADDRESS;
534 KvaSize = KvaEnd - KvaStart;
535
c8fe38ae
MD
536 avail_start = *firstaddr;
537
538 /*
48ffc236 539 * Create an initial set of page tables to run the kernel in.
c8fe38ae 540 */
48ffc236
JG
541 create_pagetables(firstaddr);
542
c8fe38ae
MD
543 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
544 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
545
546 virtual_end = VM_MAX_KERNEL_ADDRESS;
547
548 /* XXX do %cr0 as well */
549 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
550 load_cr3(KPML4phys);
c8fe38ae
MD
551
552 /*
553 * Initialize protection array.
554 */
555 i386_protection_init();
556
557 /*
558 * The kernel's pmap is statically allocated so we don't have to use
559 * pmap_create, which is unlikely to work correctly at this part of
560 * the boot sequence (XXX and which no longer exists).
561 */
48ffc236 562 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
563 kernel_pmap.pm_count = 1;
564 kernel_pmap.pm_active = (cpumask_t)-1; /* don't allow deactivation */
565 TAILQ_INIT(&kernel_pmap.pm_pvlist);
566 nkpt = NKPT;
567
568 /*
569 * Reserve some special page table entries/VA space for temporary
570 * mapping of pages.
571 */
572#define SYSMAP(c, p, v, n) \
573 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
574
575 va = virtual_start;
48ffc236 576#ifdef JG
c8fe38ae 577 pte = (pt_entry_t *) pmap_pte(&kernel_pmap, va);
48ffc236
JG
578#else
579 pte = vtopte(va);
580#endif
c8fe38ae
MD
581
582 /*
583 * CMAP1/CMAP2 are used for zeroing and copying pages.
584 */
585 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
586
587 /*
588 * Crashdump maps.
589 */
590 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
591
592 /*
593 * ptvmmap is used for reading arbitrary physical pages via
594 * /dev/mem.
595 */
596 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
597
598 /*
599 * msgbufp is used to map the system message buffer.
600 * XXX msgbufmap is not used.
601 */
602 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
603 atop(round_page(MSGBUF_SIZE)))
604
605 virtual_start = va;
606
607 *CMAP1 = 0;
c8fe38ae
MD
608
609 /*
610 * PG_G is terribly broken on SMP because we IPI invltlb's in some
611 * cases rather then invl1pg. Actually, I don't even know why it
612 * works under UP because self-referential page table mappings
613 */
614#ifdef SMP
615 pgeflag = 0;
616#else
617 if (cpu_feature & CPUID_PGE)
618 pgeflag = PG_G;
619#endif
620
621/*
622 * Initialize the 4MB page size flag
623 */
624 pseflag = 0;
625/*
626 * The 4MB page version of the initial
627 * kernel page mapping.
628 */
629 pdir4mb = 0;
630
631#if !defined(DISABLE_PSE)
632 if (cpu_feature & CPUID_PSE) {
633 pt_entry_t ptditmp;
634 /*
635 * Note that we have enabled PSE mode
636 */
637 pseflag = PG_PS;
3f3709c3 638 ptditmp = *(PTmap + amd64_btop(KERNBASE));
c8fe38ae
MD
639 ptditmp &= ~(NBPDR - 1);
640 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
641 pdir4mb = ptditmp;
642
643#ifndef SMP
644 /*
645 * Enable the PSE mode. If we are SMP we can't do this
646 * now because the APs will not be able to use it when
647 * they boot up.
648 */
649 load_cr4(rcr4() | CR4_PSE);
650
651 /*
652 * We can do the mapping here for the single processor
653 * case. We simply ignore the old page table page from
654 * now on.
655 */
656 /*
657 * For SMP, we still need 4K pages to bootstrap APs,
658 * PSE will be enabled as soon as all APs are up.
659 */
660 PTD[KPTDI] = (pd_entry_t)ptditmp;
c8fe38ae
MD
661 cpu_invltlb();
662#endif
663 }
664#endif
665#ifdef SMP
666 if (cpu_apic_address == 0)
667 panic("pmap_bootstrap: no local apic!");
c8fe38ae
MD
668#endif
669
670 /*
671 * We need to finish setting up the globaldata page for the BSP.
672 * locore has already populated the page table for the mdglobaldata
673 * portion.
674 */
675 pg = MDGLOBALDATA_BASEALLOC_PAGES;
676 gd = &CPU_prvspace[0].mdglobaldata;
677 gd->gd_CMAP1 = &SMPpt[pg + 0];
678 gd->gd_CMAP2 = &SMPpt[pg + 1];
679 gd->gd_CMAP3 = &SMPpt[pg + 2];
680 gd->gd_PMAP1 = &SMPpt[pg + 3];
681 gd->gd_CADDR1 = CPU_prvspace[0].CPAGE1;
682 gd->gd_CADDR2 = CPU_prvspace[0].CPAGE2;
683 gd->gd_CADDR3 = CPU_prvspace[0].CPAGE3;
684 gd->gd_PADDR1 = (pt_entry_t *)CPU_prvspace[0].PPAGE1;
685
686 cpu_invltlb();
d7f50089
YY
687}
688
c8fe38ae 689#ifdef SMP
d7f50089 690/*
c8fe38ae 691 * Set 4mb pdir for mp startup
d7f50089
YY
692 */
693void
c8fe38ae
MD
694pmap_set_opt(void)
695{
696 if (pseflag && (cpu_feature & CPUID_PSE)) {
697 load_cr4(rcr4() | CR4_PSE);
698 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
c8fe38ae
MD
699 cpu_invltlb();
700 }
701 }
d7f50089 702}
c8fe38ae 703#endif
d7f50089 704
c8fe38ae
MD
705/*
706 * Initialize the pmap module.
707 * Called by vm_init, to initialize any structures that the pmap
708 * system needs to map virtual memory.
709 * pmap_init has been enhanced to support in a fairly consistant
710 * way, discontiguous physical memory.
d7f50089
YY
711 */
712void
c8fe38ae 713pmap_init(void)
d7f50089 714{
c8fe38ae
MD
715 int i;
716 int initial_pvs;
717
718 /*
719 * object for kernel page table pages
720 */
48ffc236
JG
721 /* JG I think the number can be arbitrary */
722 kptobj = vm_object_allocate(OBJT_DEFAULT, 5);
c8fe38ae
MD
723
724 /*
725 * Allocate memory for random pmap data structures. Includes the
726 * pv_head_table.
727 */
728
729 for(i = 0; i < vm_page_array_size; i++) {
730 vm_page_t m;
731
732 m = &vm_page_array[i];
733 TAILQ_INIT(&m->md.pv_list);
734 m->md.pv_list_count = 0;
735 }
736
737 /*
738 * init the pv free list
739 */
740 initial_pvs = vm_page_array_size;
741 if (initial_pvs < MINPV)
742 initial_pvs = MINPV;
743 pvzone = &pvzone_store;
744 pvinit = (struct pv_entry *) kmem_alloc(&kernel_map,
745 initial_pvs * sizeof (struct pv_entry));
746 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry), pvinit,
747 initial_pvs);
748
749 /*
750 * Now it is safe to enable pv_table recording.
751 */
752 pmap_initialized = TRUE;
d887674b 753#ifdef SMP
057877ac 754 lapic = pmap_mapdev_uncacheable(cpu_apic_address, sizeof(struct LAPIC));
d887674b 755#endif
d7f50089
YY
756}
757
c8fe38ae
MD
758/*
759 * Initialize the address space (zone) for the pv_entries. Set a
760 * high water mark so that the system can recover from excessive
761 * numbers of pv entries.
762 */
d7f50089 763void
c8fe38ae 764pmap_init2(void)
d7f50089 765{
c8fe38ae
MD
766 int shpgperproc = PMAP_SHPGPERPROC;
767
768 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
769 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
770 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
771 pv_entry_high_water = 9 * (pv_entry_max / 10);
772 zinitna(pvzone, &pvzone_obj, NULL, 0, pv_entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
773}
774
c8fe38ae
MD
775
776/***************************************************
777 * Low level helper routines.....
778 ***************************************************/
779
780#if defined(PMAP_DIAGNOSTIC)
d7f50089
YY
781
782/*
c8fe38ae
MD
783 * This code checks for non-writeable/modified pages.
784 * This should be an invalid condition.
d7f50089 785 */
bfc09ba0
MD
786static
787int
48ffc236 788pmap_nw_modified(pt_entry_t pte)
d7f50089 789{
c8fe38ae
MD
790 if ((pte & (PG_M|PG_RW)) == PG_M)
791 return 1;
792 else
793 return 0;
d7f50089 794}
c8fe38ae
MD
795#endif
796
d7f50089 797
c8fe38ae
MD
798/*
799 * this routine defines the region(s) of memory that should
800 * not be tested for the modified bit.
801 */
bfc09ba0
MD
802static __inline
803int
c8fe38ae 804pmap_track_modified(vm_offset_t va)
d7f50089 805{
c8fe38ae
MD
806 if ((va < clean_sva) || (va >= clean_eva))
807 return 1;
808 else
809 return 0;
d7f50089
YY
810}
811
d7f50089 812/*
c8fe38ae
MD
813 * pmap_extract:
814 *
815 * Extract the physical page address associated with the map/VA pair.
816 *
817 * This function may not be called from an interrupt if the pmap is
818 * not kernel_pmap.
d7f50089 819 */
c8fe38ae
MD
820vm_paddr_t
821pmap_extract(pmap_t pmap, vm_offset_t va)
d7f50089 822{
48ffc236
JG
823 vm_paddr_t rtval;
824 pt_entry_t *pte;
825 pd_entry_t pde, *pdep;
c8fe38ae 826
48ffc236
JG
827 rtval = 0;
828 pdep = pmap_pde(pmap, va);
829 if (pdep != NULL) {
830 pde = *pdep;
831 if (pde) {
832 if ((pde & PG_PS) != 0) {
833 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
834 } else {
835 pte = pmap_pde_to_pte(pdep, va);
836 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
837 }
c8fe38ae 838 }
c8fe38ae 839 }
48ffc236
JG
840 return rtval;
841}
842
843/*
844 * Routine: pmap_kextract
845 * Function:
846 * Extract the physical page address associated
847 * kernel virtual address.
848 */
849vm_paddr_t
850pmap_kextract(vm_offset_t va)
48ffc236
JG
851{
852 pd_entry_t pde;
853 vm_paddr_t pa;
854
855 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
856 pa = DMAP_TO_PHYS(va);
857 } else {
858 pde = *vtopde(va);
859 if (pde & PG_PS) {
860 pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
861 } else {
862 /*
863 * Beware of a concurrent promotion that changes the
864 * PDE at this point! For example, vtopte() must not
865 * be used to access the PTE because it would use the
866 * new PDE. It is, however, safe to use the old PDE
867 * because the page table page is preserved by the
868 * promotion.
869 */
870 pa = *pmap_pde_to_pte(&pde, va);
871 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
872 }
873 }
874 return pa;
d7f50089
YY
875}
876
c8fe38ae
MD
877/***************************************************
878 * Low level mapping routines.....
879 ***************************************************/
880
d7f50089 881/*
c8fe38ae
MD
882 * Routine: pmap_kenter
883 * Function:
884 * Add a wired page to the KVA
885 * NOTE! note that in order for the mapping to take effect -- you
886 * should do an invltlb after doing the pmap_kenter().
d7f50089 887 */
c8fe38ae 888void
d7f50089
YY
889pmap_kenter(vm_offset_t va, vm_paddr_t pa)
890{
c8fe38ae
MD
891 pt_entry_t *pte;
892 pt_entry_t npte;
893 pmap_inval_info info;
894
895 pmap_inval_init(&info);
896 npte = pa | PG_RW | PG_V | pgeflag;
897 pte = vtopte(va);
898 pmap_inval_add(&info, &kernel_pmap, va);
899 *pte = npte;
900 pmap_inval_flush(&info);
d7f50089
YY
901}
902
903/*
c8fe38ae
MD
904 * Routine: pmap_kenter_quick
905 * Function:
906 * Similar to pmap_kenter(), except we only invalidate the
907 * mapping on the current CPU.
d7f50089 908 */
c8fe38ae
MD
909void
910pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
911{
912 pt_entry_t *pte;
913 pt_entry_t npte;
914
915 npte = pa | PG_RW | PG_V | pgeflag;
916 pte = vtopte(va);
917 *pte = npte;
918 cpu_invlpg((void *)va);
919}
920
d7f50089
YY
921void
922pmap_kenter_sync(vm_offset_t va)
923{
c8fe38ae
MD
924 pmap_inval_info info;
925
926 pmap_inval_init(&info);
927 pmap_inval_add(&info, &kernel_pmap, va);
928 pmap_inval_flush(&info);
d7f50089
YY
929}
930
d7f50089
YY
931void
932pmap_kenter_sync_quick(vm_offset_t va)
933{
c8fe38ae 934 cpu_invlpg((void *)va);
d7f50089
YY
935}
936
d7f50089 937/*
c8fe38ae 938 * remove a page from the kernel pagetables
d7f50089
YY
939 */
940void
c8fe38ae 941pmap_kremove(vm_offset_t va)
d7f50089 942{
c8fe38ae
MD
943 pt_entry_t *pte;
944 pmap_inval_info info;
945
946 pmap_inval_init(&info);
947 pte = vtopte(va);
948 pmap_inval_add(&info, &kernel_pmap, va);
949 *pte = 0;
950 pmap_inval_flush(&info);
951}
952
953void
954pmap_kremove_quick(vm_offset_t va)
955{
956 pt_entry_t *pte;
957 pte = vtopte(va);
958 *pte = 0;
959 cpu_invlpg((void *)va);
d7f50089
YY
960}
961
962/*
c8fe38ae 963 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
964 */
965void
c8fe38ae 966pmap_kmodify_rw(vm_offset_t va)
d7f50089 967{
c8fe38ae
MD
968 *vtopte(va) |= PG_RW;
969 cpu_invlpg((void *)va);
d7f50089
YY
970}
971
c8fe38ae
MD
972void
973pmap_kmodify_nc(vm_offset_t va)
974{
975 *vtopte(va) |= PG_N;
976 cpu_invlpg((void *)va);
977}
d7f50089
YY
978
979/*
c8fe38ae
MD
980 * Used to map a range of physical addresses into kernel
981 * virtual address space.
982 *
983 * For now, VM is already on, we only need to map the
984 * specified memory.
d7f50089
YY
985 */
986vm_offset_t
987pmap_map(vm_offset_t virt, vm_paddr_t start, vm_paddr_t end, int prot)
988{
8fdd3267 989 return PHYS_TO_DMAP(start);
d7f50089
YY
990}
991
c8fe38ae 992
d7f50089 993/*
c8fe38ae
MD
994 * Add a list of wired pages to the kva
995 * this routine is only used for temporary
996 * kernel mappings that do not need to have
997 * page modification or references recorded.
998 * Note that old mappings are simply written
999 * over. The page *must* be wired.
d7f50089
YY
1000 */
1001void
c8fe38ae 1002pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
d7f50089 1003{
c8fe38ae
MD
1004 vm_offset_t end_va;
1005
1006 end_va = va + count * PAGE_SIZE;
1007
1008 while (va < end_va) {
1009 pt_entry_t *pte;
1010
1011 pte = vtopte(va);
1012 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1013 cpu_invlpg((void *)va);
1014 va += PAGE_SIZE;
1015 m++;
1016 }
1017#ifdef SMP
1018 smp_invltlb(); /* XXX */
1019#endif
1020}
1021
1022void
1023pmap_qenter2(vm_offset_t va, vm_page_t *m, int count, cpumask_t *mask)
1024{
1025 vm_offset_t end_va;
1026 cpumask_t cmask = mycpu->gd_cpumask;
1027
1028 end_va = va + count * PAGE_SIZE;
1029
1030 while (va < end_va) {
1031 pt_entry_t *pte;
1032 pt_entry_t pteval;
1033
1034 /*
1035 * Install the new PTE. If the pte changed from the prior
1036 * mapping we must reset the cpu mask and invalidate the page.
1037 * If the pte is the same but we have not seen it on the
1038 * current cpu, invlpg the existing mapping. Otherwise the
1039 * entry is optimal and no invalidation is required.
1040 */
1041 pte = vtopte(va);
1042 pteval = VM_PAGE_TO_PHYS(*m) | PG_A | PG_RW | PG_V | pgeflag;
1043 if (*pte != pteval) {
1044 *mask = 0;
1045 *pte = pteval;
1046 cpu_invlpg((void *)va);
1047 } else if ((*mask & cmask) == 0) {
1048 cpu_invlpg((void *)va);
1049 }
1050 va += PAGE_SIZE;
1051 m++;
1052 }
1053 *mask |= cmask;
d7f50089
YY
1054}
1055
1056/*
7155fc7d 1057 * This routine jerks page mappings from the
c8fe38ae 1058 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1059 *
1060 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1061 */
c8fe38ae
MD
1062void
1063pmap_qremove(vm_offset_t va, int count)
d7f50089 1064{
c8fe38ae
MD
1065 vm_offset_t end_va;
1066
48ffc236 1067 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1068
1069 while (va < end_va) {
1070 pt_entry_t *pte;
1071
1072 pte = vtopte(va);
1073 *pte = 0;
1074 cpu_invlpg((void *)va);
1075 va += PAGE_SIZE;
1076 }
1077#ifdef SMP
1078 smp_invltlb();
1079#endif
d7f50089
YY
1080}
1081
1082/*
c8fe38ae
MD
1083 * This routine works like vm_page_lookup() but also blocks as long as the
1084 * page is busy. This routine does not busy the page it returns.
1085 *
1086 * Unless the caller is managing objects whos pages are in a known state,
1087 * the call should be made with a critical section held so the page's object
1088 * association remains valid on return.
d7f50089 1089 */
bfc09ba0
MD
1090static
1091vm_page_t
c8fe38ae 1092pmap_page_lookup(vm_object_t object, vm_pindex_t pindex)
d7f50089 1093{
c8fe38ae
MD
1094 vm_page_t m;
1095
1096 do {
1097 m = vm_page_lookup(object, pindex);
1098 } while (m && vm_page_sleep_busy(m, FALSE, "pplookp"));
1099
1100 return(m);
d7f50089
YY
1101}
1102
1103/*
c8fe38ae
MD
1104 * Create a new thread and optionally associate it with a (new) process.
1105 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1106 */
1107void
c8fe38ae 1108pmap_init_thread(thread_t td)
d7f50089 1109{
c8fe38ae
MD
1110 /* enforce pcb placement */
1111 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
1112 td->td_savefpu = &td->td_pcb->pcb_save;
3f3709c3 1113 td->td_sp = (char *)td->td_pcb - 16; /* JG is -16 needed on amd64? */
d7f50089
YY
1114}
1115
1116/*
c8fe38ae 1117 * This routine directly affects the fork perf for a process.
d7f50089
YY
1118 */
1119void
c8fe38ae 1120pmap_init_proc(struct proc *p)
d7f50089
YY
1121{
1122}
1123
1124/*
c8fe38ae
MD
1125 * Dispose the UPAGES for a process that has exited.
1126 * This routine directly impacts the exit perf of a process.
d7f50089
YY
1127 */
1128void
c8fe38ae 1129pmap_dispose_proc(struct proc *p)
d7f50089 1130{
c8fe38ae 1131 KASSERT(p->p_lock == 0, ("attempt to dispose referenced proc! %p", p));
d7f50089
YY
1132}
1133
c8fe38ae
MD
1134/***************************************************
1135 * Page table page management routines.....
1136 ***************************************************/
1137
d7f50089 1138/*
c8fe38ae
MD
1139 * This routine unholds page table pages, and if the hold count
1140 * drops to zero, then it decrements the wire count.
d7f50089 1141 */
bfc09ba0
MD
1142static __inline
1143int
1144pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
1145 pmap_inval_info_t info)
1146{
1147 KKASSERT(m->hold_count > 0);
1148 if (m->hold_count > 1) {
1149 vm_page_unhold(m);
1150 return 0;
1151 } else {
1152 return _pmap_unwire_pte_hold(pmap, va, m, info);
1153 }
1154}
1155
1156static
1157int
1158_pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
1159 pmap_inval_info_t info)
c8fe38ae
MD
1160{
1161 /*
1162 * Wait until we can busy the page ourselves. We cannot have
700e22f7
MD
1163 * any active flushes if we block. We own one hold count on the
1164 * page so it cannot be freed out from under us.
c8fe38ae
MD
1165 */
1166 if (m->flags & PG_BUSY) {
1167 pmap_inval_flush(info);
1168 while (vm_page_sleep_busy(m, FALSE, "pmuwpt"))
1169 ;
1170 }
1171 KASSERT(m->queue == PQ_NONE,
1172 ("_pmap_unwire_pte_hold: %p->queue != PQ_NONE", m));
1173
700e22f7
MD
1174 /*
1175 * This case can occur if new references were acquired while
1176 * we were blocked.
1177 */
1178 if (m->hold_count > 1) {
1179 KKASSERT(m->hold_count > 1);
1180 vm_page_unhold(m);
1181 return 0;
1182 }
c8fe38ae 1183
700e22f7
MD
1184 /*
1185 * Unmap the page table page
1186 */
1187 KKASSERT(m->hold_count == 1);
1188 vm_page_busy(m);
1189 pmap_inval_add(info, pmap, -1);
c8fe38ae 1190
700e22f7
MD
1191 if (m->pindex >= (NUPDE + NUPDPE)) {
1192 /* PDP page */
1193 pml4_entry_t *pml4;
1194 pml4 = pmap_pml4e(pmap, va);
1195 *pml4 = 0;
1196 } else if (m->pindex >= NUPDE) {
1197 /* PD page */
1198 pdp_entry_t *pdp;
1199 pdp = pmap_pdpe(pmap, va);
1200 *pdp = 0;
1201 } else {
1202 /* PT page */
1203 pd_entry_t *pd;
1204 pd = pmap_pde(pmap, va);
1205 *pd = 0;
1206 }
c8fe38ae 1207
700e22f7
MD
1208 KKASSERT(pmap->pm_stats.resident_count > 0);
1209 --pmap->pm_stats.resident_count;
48ffc236 1210
700e22f7
MD
1211 if (pmap->pm_ptphint == m)
1212 pmap->pm_ptphint = NULL;
1213
1214 if (m->pindex < NUPDE) {
1215 /* We just released a PT, unhold the matching PD */
1216 vm_page_t pdpg;
1217
1218 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
1219 pmap_unwire_pte_hold(pmap, va, pdpg, info);
1220 }
1221 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
1222 /* We just released a PD, unhold the matching PDP */
1223 vm_page_t pdppg;
1224
1225 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
1226 pmap_unwire_pte_hold(pmap, va, pdppg, info);
c8fe38ae 1227 }
700e22f7
MD
1228
1229 /*
1230 * This was our last hold, the page had better be unwired
1231 * after we decrement wire_count.
1232 *
1233 * FUTURE NOTE: shared page directory page could result in
1234 * multiple wire counts.
1235 */
1236 vm_page_unhold(m);
1237 --m->wire_count;
1238 KKASSERT(m->wire_count == 0);
1239 --vmstats.v_wire_count;
1240 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1241 vm_page_flash(m);
1242 vm_page_free_zero(m);
1243
1244 return 1;
c8fe38ae
MD
1245}
1246
c8fe38ae
MD
1247/*
1248 * After removing a page table entry, this routine is used to
1249 * conditionally free the page, and manage the hold/wire counts.
d7f50089 1250 */
bfc09ba0
MD
1251static
1252int
c8fe38ae
MD
1253pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte,
1254 pmap_inval_info_t info)
1255{
1256 vm_pindex_t ptepindex;
700e22f7 1257
48ffc236 1258 if (va >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
1259 return 0;
1260
1261 if (mpte == NULL) {
48ffc236
JG
1262 ptepindex = pmap_pde_pindex(va);
1263#if JGHINT
c8fe38ae
MD
1264 if (pmap->pm_ptphint &&
1265 (pmap->pm_ptphint->pindex == ptepindex)) {
1266 mpte = pmap->pm_ptphint;
1267 } else {
48ffc236 1268#endif
c8fe38ae 1269 pmap_inval_flush(info);
48ffc236 1270 mpte = pmap_page_lookup(pmap->pm_pteobj, ptepindex);
c8fe38ae 1271 pmap->pm_ptphint = mpte;
48ffc236 1272#if JGHINT
c8fe38ae 1273 }
48ffc236 1274#endif
c8fe38ae 1275 }
48ffc236 1276 return pmap_unwire_pte_hold(pmap, va, mpte, info);
c8fe38ae 1277}
d7f50089
YY
1278
1279/*
c8fe38ae
MD
1280 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1281 * it, and IdlePTD, represents the template used to update all other pmaps.
1282 *
1283 * On architectures where the kernel pmap is not integrated into the user
1284 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1285 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1286 */
1287void
c8fe38ae 1288pmap_pinit0(struct pmap *pmap)
d7f50089 1289{
48ffc236 1290 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1291 pmap->pm_count = 1;
1292 pmap->pm_active = 0;
1293 pmap->pm_ptphint = NULL;
1294 TAILQ_INIT(&pmap->pm_pvlist);
1295 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1296}
1297
1298/*
c8fe38ae
MD
1299 * Initialize a preallocated and zeroed pmap structure,
1300 * such as one in a vmspace structure.
d7f50089
YY
1301 */
1302void
c8fe38ae 1303pmap_pinit(struct pmap *pmap)
d7f50089 1304{
c8fe38ae
MD
1305 vm_page_t ptdpg;
1306
1307 /*
1308 * No need to allocate page table space yet but we do need a valid
1309 * page directory table.
1310 */
48ffc236
JG
1311 if (pmap->pm_pml4 == NULL) {
1312 pmap->pm_pml4 =
1313 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1314 }
1315
1316 /*
1317 * Allocate an object for the ptes
1318 */
1319 if (pmap->pm_pteobj == NULL)
0a5c555b 1320 pmap->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, NUPDE + NUPDPE + PML4PML4I + 1);
c8fe38ae
MD
1321
1322 /*
1323 * Allocate the page directory page, unless we already have
1324 * one cached. If we used the cached page the wire_count will
1325 * already be set appropriately.
1326 */
1327 if ((ptdpg = pmap->pm_pdirm) == NULL) {
0a5c555b 1328 ptdpg = vm_page_grab(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I,
c8fe38ae
MD
1329 VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1330 pmap->pm_pdirm = ptdpg;
1331 vm_page_flag_clear(ptdpg, PG_MAPPED | PG_BUSY);
1332 ptdpg->valid = VM_PAGE_BITS_ALL;
700e22f7
MD
1333 if (ptdpg->wire_count == 0)
1334 ++vmstats.v_wire_count;
c8fe38ae 1335 ptdpg->wire_count = 1;
48ffc236 1336 pmap_kenter((vm_offset_t)pmap->pm_pml4, VM_PAGE_TO_PHYS(ptdpg));
c8fe38ae
MD
1337 }
1338 if ((ptdpg->flags & PG_ZERO) == 0)
48ffc236 1339 bzero(pmap->pm_pml4, PAGE_SIZE);
c8fe38ae 1340
48ffc236
JG
1341 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
1342 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
c8fe38ae
MD
1343
1344 /* install self-referential address mapping entry */
48ffc236 1345 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(ptdpg) | PG_V | PG_RW | PG_A | PG_M;
c8fe38ae
MD
1346
1347 pmap->pm_count = 1;
1348 pmap->pm_active = 0;
1349 pmap->pm_ptphint = NULL;
1350 TAILQ_INIT(&pmap->pm_pvlist);
1351 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1352 pmap->pm_stats.resident_count = 1;
d7f50089
YY
1353}
1354
1355/*
c8fe38ae
MD
1356 * Clean up a pmap structure so it can be physically freed. This routine
1357 * is called by the vmspace dtor function. A great deal of pmap data is
1358 * left passively mapped to improve vmspace management so we have a bit
1359 * of cleanup work to do here.
d7f50089
YY
1360 */
1361void
c8fe38ae 1362pmap_puninit(pmap_t pmap)
d7f50089 1363{
c8fe38ae
MD
1364 vm_page_t p;
1365
1366 KKASSERT(pmap->pm_active == 0);
1367 if ((p = pmap->pm_pdirm) != NULL) {
48ffc236 1368 KKASSERT(pmap->pm_pml4 != NULL);
bfc09ba0 1369 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236 1370 pmap_kremove((vm_offset_t)pmap->pm_pml4);
c8fe38ae
MD
1371 p->wire_count--;
1372 vmstats.v_wire_count--;
1373 KKASSERT((p->flags & PG_BUSY) == 0);
1374 vm_page_busy(p);
1375 vm_page_free_zero(p);
1376 pmap->pm_pdirm = NULL;
1377 }
48ffc236 1378 if (pmap->pm_pml4) {
bfc09ba0 1379 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236
JG
1380 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1381 pmap->pm_pml4 = NULL;
c8fe38ae
MD
1382 }
1383 if (pmap->pm_pteobj) {
1384 vm_object_deallocate(pmap->pm_pteobj);
1385 pmap->pm_pteobj = NULL;
1386 }
d7f50089
YY
1387}
1388
1389/*
c8fe38ae
MD
1390 * Wire in kernel global address entries. To avoid a race condition
1391 * between pmap initialization and pmap_growkernel, this procedure
1392 * adds the pmap to the master list (which growkernel scans to update),
1393 * then copies the template.
d7f50089
YY
1394 */
1395void
c8fe38ae 1396pmap_pinit2(struct pmap *pmap)
d7f50089 1397{
c8fe38ae
MD
1398 crit_enter();
1399 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
1400 /* XXX copies current process, does not fill in MPPTDI */
c8fe38ae 1401 crit_exit();
d7f50089
YY
1402}
1403
1404/*
c8fe38ae
MD
1405 * Attempt to release and free a vm_page in a pmap. Returns 1 on success,
1406 * 0 on failure (if the procedure had to sleep).
d7f50089 1407 *
c8fe38ae
MD
1408 * When asked to remove the page directory page itself, we actually just
1409 * leave it cached so we do not have to incur the SMP inval overhead of
1410 * removing the kernel mapping. pmap_puninit() will take care of it.
d7f50089 1411 */
bfc09ba0
MD
1412static
1413int
c8fe38ae 1414pmap_release_free_page(struct pmap *pmap, vm_page_t p)
d7f50089 1415{
c8fe38ae
MD
1416 /*
1417 * This code optimizes the case of freeing non-busy
1418 * page-table pages. Those pages are zero now, and
1419 * might as well be placed directly into the zero queue.
1420 */
1421 if (vm_page_sleep_busy(p, FALSE, "pmaprl"))
d7f50089 1422 return 0;
d7f50089 1423
c8fe38ae
MD
1424 vm_page_busy(p);
1425
1426 /*
1427 * Remove the page table page from the processes address space.
1428 */
4a4ea614
MD
1429 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1430 /*
1431 * We are the pml4 table itself.
1432 */
1433 /* XXX anything to do here? */
1434 } else if (p->pindex >= (NUPDE + NUPDPE)) {
1b2e0b92 1435 /*
700e22f7
MD
1436 * Remove a PDP page from the PML4. We do not maintain
1437 * hold counts on the PML4 page.
1b2e0b92 1438 */
700e22f7
MD
1439 pml4_entry_t *pml4;
1440 vm_page_t m4;
1441 int idx;
1442
1443 m4 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I);
1b2e0b92 1444 KKASSERT(m4 != NULL);
700e22f7
MD
1445 pml4 = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m4));
1446 idx = (p->pindex - (NUPDE + NUPDPE)) % NPML4EPG;
1b2e0b92
JG
1447 KKASSERT(pml4[idx] != 0);
1448 pml4[idx] = 0;
1b2e0b92
JG
1449 } else if (p->pindex >= NUPDE) {
1450 /*
700e22f7
MD
1451 * Remove a PD page from the PDP and drop the hold count
1452 * on the PDP. The PDP is left cached in the pmap if
1453 * the hold count drops to 0 so the wire count remains
1454 * intact.
1b2e0b92 1455 */
700e22f7
MD
1456 vm_page_t m3;
1457 pdp_entry_t *pdp;
1458 int idx;
1459
1460 m3 = vm_page_lookup(pmap->pm_pteobj,
1461 NUPDE + NUPDPE + (p->pindex - NUPDE) / NPDPEPG);
1b2e0b92 1462 KKASSERT(m3 != NULL);
700e22f7
MD
1463 pdp = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m3));
1464 idx = (p->pindex - NUPDE) % NPDPEPG;
1b2e0b92
JG
1465 KKASSERT(pdp[idx] != 0);
1466 pdp[idx] = 0;
1467 m3->hold_count--;
1b2e0b92 1468 } else {
700e22f7
MD
1469 /*
1470 * Remove a PT page from the PD and drop the hold count
1471 * on the PD. The PD is left cached in the pmap if
1472 * the hold count drops to 0 so the wire count remains
1473 * intact.
1b2e0b92 1474 */
700e22f7
MD
1475 vm_page_t m2;
1476 pd_entry_t *pd;
1477 int idx;
1478
1479 m2 = vm_page_lookup(pmap->pm_pteobj,
1480 NUPDE + p->pindex / NPDEPG);
1b2e0b92 1481 KKASSERT(m2 != NULL);
700e22f7
MD
1482 pd = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m2));
1483 idx = p->pindex % NPDEPG;
1b2e0b92
JG
1484 pd[idx] = 0;
1485 m2->hold_count--;
1b2e0b92 1486 }
700e22f7
MD
1487
1488 /*
1489 * One fewer mappings in the pmap. p's hold count had better
1490 * be zero.
1491 */
c8fe38ae
MD
1492 KKASSERT(pmap->pm_stats.resident_count > 0);
1493 --pmap->pm_stats.resident_count;
700e22f7 1494 if (p->hold_count)
c8fe38ae 1495 panic("pmap_release: freeing held page table page");
c8fe38ae
MD
1496 if (pmap->pm_ptphint && (pmap->pm_ptphint->pindex == p->pindex))
1497 pmap->pm_ptphint = NULL;
1498
1b2e0b92
JG
1499 /*
1500 * We leave the top-level page table page cached, wired, and mapped in
1501 * the pmap until the dtor function (pmap_puninit()) gets called.
1502 * However, still clean it up so we can set PG_ZERO.
1503 */
1504 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1505 bzero(pmap->pm_pml4, PAGE_SIZE);
1506 vm_page_flag_set(p, PG_ZERO);
1507 vm_page_wakeup(p);
1508 } else {
1509 p->wire_count--;
700e22f7 1510 KKASSERT(p->wire_count == 0);
1b2e0b92
JG
1511 vmstats.v_wire_count--;
1512 /* JG eventually revert to using vm_page_free_zero() */
1513 vm_page_free(p);
1514 }
c8fe38ae
MD
1515 return 1;
1516}
d7f50089
YY
1517
1518/*
e8510e54
MD
1519 * This routine is called when various levels in the page table need to
1520 * be populated. This routine cannot fail.
d7f50089 1521 */
bfc09ba0
MD
1522static
1523vm_page_t
c8fe38ae
MD
1524_pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex)
1525{
e8510e54 1526 vm_page_t m;
c8fe38ae
MD
1527
1528 /*
e8510e54 1529 * Find or fabricate a new pagetable page. This will busy the page.
c8fe38ae
MD
1530 */
1531 m = vm_page_grab(pmap->pm_pteobj, ptepindex,
700e22f7 1532 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
48ffc236
JG
1533 if ((m->flags & PG_ZERO) == 0) {
1534 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1535 }
1536
c8fe38ae
MD
1537 KASSERT(m->queue == PQ_NONE,
1538 ("_pmap_allocpte: %p->queue != PQ_NONE", m));
1539
1540 /*
1541 * Increment the hold count for the page we will be returning to
1542 * the caller.
1543 */
1544 m->hold_count++;
700e22f7 1545 if (m->wire_count++ == 0)
c8fe38ae 1546 vmstats.v_wire_count++;
c8fe38ae 1547
c8fe38ae
MD
1548 /*
1549 * Map the pagetable page into the process address space, if
1550 * it isn't already there.
e8510e54
MD
1551 *
1552 * It is possible that someone else got in and mapped the page
1553 * directory page while we were blocked, if so just unbusy and
1554 * return the held page.
c8fe38ae 1555 */
48ffc236 1556 if (ptepindex >= (NUPDE + NUPDPE)) {
e8510e54
MD
1557 /*
1558 * Wire up a new PDP page in the PML4
1559 */
48ffc236 1560 vm_pindex_t pml4index;
700e22f7 1561 pml4_entry_t *pml4;
48ffc236 1562
48ffc236
JG
1563 pml4index = ptepindex - (NUPDE + NUPDPE);
1564 pml4 = &pmap->pm_pml4[pml4index];
e8510e54 1565 if (*pml4 & PG_V) {
700e22f7
MD
1566 if (--m->wire_count == 0)
1567 --vmstats.v_wire_count;
e8510e54
MD
1568 vm_page_wakeup(m);
1569 return(m);
1570 }
48ffc236 1571 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
48ffc236 1572 } else if (ptepindex >= NUPDE) {
e8510e54
MD
1573 /*
1574 * Wire up a new PD page in the PDP
1575 */
48ffc236
JG
1576 vm_pindex_t pml4index;
1577 vm_pindex_t pdpindex;
e8510e54 1578 vm_page_t pdppg;
48ffc236
JG
1579 pml4_entry_t *pml4;
1580 pdp_entry_t *pdp;
1581
48ffc236
JG
1582 pdpindex = ptepindex - NUPDE;
1583 pml4index = pdpindex >> NPML4EPGSHIFT;
1584
1585 pml4 = &pmap->pm_pml4[pml4index];
1586 if ((*pml4 & PG_V) == 0) {
e8510e54
MD
1587 /*
1588 * Have to allocate a new PDP page, recurse.
1589 * This always succeeds. Returned page will
1590 * be held.
1591 */
1592 pdppg = _pmap_allocpte(pmap,
1593 NUPDE + NUPDPE + pml4index);
48ffc236 1594 } else {
e8510e54
MD
1595 /*
1596 * Add a held reference to the PDP page.
1597 */
48ffc236 1598 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
1b2e0b92 1599 pdppg->hold_count++;
48ffc236 1600 }
c8fe38ae 1601
e8510e54
MD
1602 /*
1603 * Now find the pdp_entry and map the PDP. If the PDP
1604 * has already been mapped unwind and return the
1605 * already-mapped PDP held.
700e22f7
MD
1606 *
1607 * pdppg is left held (hold_count is incremented for
1608 * each PD in the PDP).
e8510e54
MD
1609 */
1610 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
48ffc236 1611 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
e8510e54
MD
1612 if (*pdp & PG_V) {
1613 vm_page_unhold(pdppg);
700e22f7
MD
1614 if (--m->wire_count == 0)
1615 --vmstats.v_wire_count;
e8510e54
MD
1616 vm_page_wakeup(m);
1617 return(m);
1618 }
48ffc236 1619 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
48ffc236 1620 } else {
e8510e54
MD
1621 /*
1622 * Wire up the new PT page in the PD
1623 */
48ffc236
JG
1624 vm_pindex_t pml4index;
1625 vm_pindex_t pdpindex;
1626 pml4_entry_t *pml4;
1627 pdp_entry_t *pdp;
1628 pd_entry_t *pd;
e8510e54 1629 vm_page_t pdpg;
48ffc236 1630
48ffc236
JG
1631 pdpindex = ptepindex >> NPDPEPGSHIFT;
1632 pml4index = pdpindex >> NPML4EPGSHIFT;
1633
e8510e54
MD
1634 /*
1635 * Locate the PDP page in the PML4, then the PD page in
1636 * the PDP. If either does not exist we simply recurse
1637 * to allocate them.
1638 *
1639 * We can just recurse on the PD page as it will recurse
1640 * on the PDP if necessary.
1641 */
48ffc236
JG
1642 pml4 = &pmap->pm_pml4[pml4index];
1643 if ((*pml4 & PG_V) == 0) {
e8510e54 1644 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex);
48ffc236
JG
1645 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1646 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
c8fe38ae 1647 } else {
48ffc236
JG
1648 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1649 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1650 if ((*pdp & PG_V) == 0) {
e8510e54 1651 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex);
48ffc236 1652 } else {
48ffc236 1653 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1b2e0b92 1654 pdpg->hold_count++;
48ffc236 1655 }
c8fe38ae 1656 }
48ffc236 1657
e8510e54
MD
1658 /*
1659 * Now fill in the pte in the PD. If the pte already exists
1660 * (again, if we raced the grab), unhold pdpg and unwire
1661 * m, returning a held m.
700e22f7
MD
1662 *
1663 * pdpg is left held (hold_count is incremented for
1664 * each PT in the PD).
e8510e54
MD
1665 */
1666 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
48ffc236 1667 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
700e22f7 1668 if (*pd != 0) {
e8510e54 1669 vm_page_unhold(pdpg);
700e22f7
MD
1670 if (--m->wire_count == 0)
1671 --vmstats.v_wire_count;
e8510e54
MD
1672 vm_page_wakeup(m);
1673 return(m);
1674 }
700e22f7 1675 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
c8fe38ae
MD
1676 }
1677
48ffc236 1678 /*
e8510e54
MD
1679 * We successfully loaded a PDP, PD, or PTE. Set the page table hint,
1680 * valid bits, mapped flag, unbusy, and we're done.
48ffc236
JG
1681 */
1682 pmap->pm_ptphint = m;
700e22f7 1683 ++pmap->pm_stats.resident_count;
48ffc236 1684
c8fe38ae
MD
1685 m->valid = VM_PAGE_BITS_ALL;
1686 vm_page_flag_clear(m, PG_ZERO);
1687 vm_page_flag_set(m, PG_MAPPED);
1688 vm_page_wakeup(m);
1689
e8510e54 1690 return (m);
c8fe38ae
MD
1691}
1692
bfc09ba0
MD
1693static
1694vm_page_t
c8fe38ae 1695pmap_allocpte(pmap_t pmap, vm_offset_t va)
d7f50089 1696{
c8fe38ae 1697 vm_pindex_t ptepindex;
48ffc236 1698 pd_entry_t *pd;
c8fe38ae
MD
1699 vm_page_t m;
1700
1701 /*
1702 * Calculate pagetable page index
1703 */
48ffc236 1704 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
1705
1706 /*
1707 * Get the page directory entry
1708 */
48ffc236 1709 pd = pmap_pde(pmap, va);
c8fe38ae
MD
1710
1711 /*
48ffc236 1712 * This supports switching from a 2MB page to a
c8fe38ae
MD
1713 * normal 4K page.
1714 */
48ffc236 1715 if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
1b2e0b92 1716 panic("no promotion/demotion yet");
48ffc236
JG
1717 *pd = 0;
1718 pd = NULL;
c8fe38ae
MD
1719 cpu_invltlb();
1720 smp_invltlb();
1721 }
1722
1723 /*
1724 * If the page table page is mapped, we just increment the
1725 * hold count, and activate it.
1726 */
48ffc236
JG
1727 if (pd != NULL && (*pd & PG_V) != 0) {
1728 /* YYY hint is used here on i386 */
1729 m = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
1730 pmap->pm_ptphint = m;
c8fe38ae
MD
1731 m->hold_count++;
1732 return m;
1733 }
1734 /*
1735 * Here if the pte page isn't mapped, or if it has been deallocated.
1736 */
1737 return _pmap_allocpte(pmap, ptepindex);
d7f50089
YY
1738}
1739
c8fe38ae
MD
1740
1741/***************************************************
1742 * Pmap allocation/deallocation routines.
1743 ***************************************************/
1744
d7f50089 1745/*
c8fe38ae
MD
1746 * Release any resources held by the given physical map.
1747 * Called when a pmap initialized by pmap_pinit is being released.
1748 * Should only be called if the map contains no valid mappings.
d7f50089 1749 */
c8fe38ae 1750static int pmap_release_callback(struct vm_page *p, void *data);
d7f50089 1751
c8fe38ae
MD
1752void
1753pmap_release(struct pmap *pmap)
d7f50089 1754{
c8fe38ae
MD
1755 vm_object_t object = pmap->pm_pteobj;
1756 struct rb_vm_page_scan_info info;
1757
1758 KASSERT(pmap->pm_active == 0, ("pmap still active! %08x", pmap->pm_active));
1759#if defined(DIAGNOSTIC)
1760 if (object->ref_count != 1)
1761 panic("pmap_release: pteobj reference count != 1");
1762#endif
1763
1764 info.pmap = pmap;
1765 info.object = object;
1766 crit_enter();
1767 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1768 crit_exit();
1769
1770 do {
1771 crit_enter();
1772 info.error = 0;
1773 info.mpte = NULL;
1774 info.limit = object->generation;
1775
1776 vm_page_rb_tree_RB_SCAN(&object->rb_memq, NULL,
1777 pmap_release_callback, &info);
1778 if (info.error == 0 && info.mpte) {
1779 if (!pmap_release_free_page(pmap, info.mpte))
1780 info.error = 1;
1781 }
1782 crit_exit();
1783 } while (info.error);
d7f50089
YY
1784}
1785
bfc09ba0
MD
1786static
1787int
c8fe38ae 1788pmap_release_callback(struct vm_page *p, void *data)
d7f50089 1789{
c8fe38ae
MD
1790 struct rb_vm_page_scan_info *info = data;
1791
0a5c555b 1792 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
c8fe38ae
MD
1793 info->mpte = p;
1794 return(0);
1795 }
1796 if (!pmap_release_free_page(info->pmap, p)) {
1797 info->error = 1;
1798 return(-1);
1799 }
1800 if (info->object->generation != info->limit) {
1801 info->error = 1;
1802 return(-1);
1803 }
1804 return(0);
d7f50089
YY
1805}
1806
1807/*
c8fe38ae 1808 * Grow the number of kernel page table entries, if needed.
d7f50089 1809 */
c8fe38ae
MD
1810void
1811pmap_growkernel(vm_offset_t addr)
d7f50089 1812{
48ffc236 1813 vm_paddr_t paddr;
c8fe38ae
MD
1814 vm_offset_t ptppaddr;
1815 vm_page_t nkpg;
48ffc236
JG
1816 pd_entry_t *pde, newpdir;
1817 pdp_entry_t newpdp;
c8fe38ae
MD
1818
1819 crit_enter();
1820 if (kernel_vm_end == 0) {
1821 kernel_vm_end = KERNBASE;
1822 nkpt = 0;
48ffc236 1823 while ((*pmap_pde(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
c8fe38ae
MD
1824 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1825 nkpt++;
48ffc236
JG
1826 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1827 kernel_vm_end = kernel_map.max_offset;
1828 break;
1829 }
c8fe38ae
MD
1830 }
1831 }
48ffc236
JG
1832 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1833 if (addr - 1 >= kernel_map.max_offset)
1834 addr = kernel_map.max_offset;
c8fe38ae 1835 while (kernel_vm_end < addr) {
48ffc236
JG
1836 pde = pmap_pde(&kernel_pmap, kernel_vm_end);
1837 if (pde == NULL) {
1838 /* We need a new PDP entry */
1839 nkpg = vm_page_alloc(kptobj, nkpt,
1840 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM
1841 | VM_ALLOC_INTERRUPT);
1842 if (nkpg == NULL)
1843 panic("pmap_growkernel: no memory to grow kernel");
48ffc236 1844 paddr = VM_PAGE_TO_PHYS(nkpg);
7f2a2740
MD
1845 if ((nkpg->flags & PG_ZERO) == 0)
1846 pmap_zero_page(paddr);
1847 vm_page_flag_clear(nkpg, PG_ZERO);
48ffc236
JG
1848 newpdp = (pdp_entry_t)
1849 (paddr | PG_V | PG_RW | PG_A | PG_M);
1850 *pmap_pdpe(&kernel_pmap, kernel_vm_end) = newpdp;
7f2a2740 1851 nkpt++;
48ffc236
JG
1852 continue; /* try again */
1853 }
1854 if ((*pde & PG_V) != 0) {
c8fe38ae 1855 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
48ffc236
JG
1856 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1857 kernel_vm_end = kernel_map.max_offset;
1858 break;
1859 }
c8fe38ae
MD
1860 continue;
1861 }
1862
1863 /*
1864 * This index is bogus, but out of the way
1865 */
48ffc236 1866 nkpg = vm_page_alloc(kptobj, nkpt,
c8fe38ae
MD
1867 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM | VM_ALLOC_INTERRUPT);
1868 if (nkpg == NULL)
1869 panic("pmap_growkernel: no memory to grow kernel");
1870
1871 vm_page_wire(nkpg);
1872 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1873 pmap_zero_page(ptppaddr);
7f2a2740 1874 vm_page_flag_clear(nkpg, PG_ZERO);
c8fe38ae 1875 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
c8fe38ae
MD
1876 *pmap_pde(&kernel_pmap, kernel_vm_end) = newpdir;
1877 nkpt++;
1878
48ffc236
JG
1879 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1880 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1881 kernel_vm_end = kernel_map.max_offset;
1882 break;
c8fe38ae 1883 }
c8fe38ae
MD
1884 }
1885 crit_exit();
d7f50089
YY
1886}
1887
1888/*
c8fe38ae
MD
1889 * Retire the given physical map from service.
1890 * Should only be called if the map contains
1891 * no valid mappings.
d7f50089 1892 */
c8fe38ae
MD
1893void
1894pmap_destroy(pmap_t pmap)
d7f50089 1895{
c8fe38ae
MD
1896 int count;
1897
1898 if (pmap == NULL)
1899 return;
1900
1901 count = --pmap->pm_count;
1902 if (count == 0) {
1903 pmap_release(pmap);
1904 panic("destroying a pmap is not yet implemented");
1905 }
d7f50089
YY
1906}
1907
1908/*
c8fe38ae 1909 * Add a reference to the specified pmap.
d7f50089 1910 */
c8fe38ae
MD
1911void
1912pmap_reference(pmap_t pmap)
d7f50089 1913{
c8fe38ae
MD
1914 if (pmap != NULL) {
1915 pmap->pm_count++;
1916 }
d7f50089
YY
1917}
1918
c8fe38ae
MD
1919/***************************************************
1920* page management routines.
1921 ***************************************************/
d7f50089
YY
1922
1923/*
1924 * free the pv_entry back to the free list. This function may be
1925 * called from an interrupt.
1926 */
bfc09ba0
MD
1927static __inline
1928void
d7f50089
YY
1929free_pv_entry(pv_entry_t pv)
1930{
c8fe38ae 1931 pv_entry_count--;
48ffc236 1932 KKASSERT(pv_entry_count >= 0);
c8fe38ae 1933 zfree(pvzone, pv);
d7f50089
YY
1934}
1935
1936/*
1937 * get a new pv_entry, allocating a block from the system
1938 * when needed. This function may be called from an interrupt.
1939 */
bfc09ba0
MD
1940static
1941pv_entry_t
d7f50089
YY
1942get_pv_entry(void)
1943{
c8fe38ae
MD
1944 pv_entry_count++;
1945 if (pv_entry_high_water &&
48ffc236
JG
1946 (pv_entry_count > pv_entry_high_water) &&
1947 (pmap_pagedaemon_waken == 0)) {
c8fe38ae 1948 pmap_pagedaemon_waken = 1;
48ffc236 1949 wakeup(&vm_pages_needed);
c8fe38ae
MD
1950 }
1951 return zalloc(pvzone);
d7f50089
YY
1952}
1953
1954/*
1955 * This routine is very drastic, but can save the system
1956 * in a pinch.
1957 */
1958void
1959pmap_collect(void)
1960{
c8fe38ae
MD
1961 int i;
1962 vm_page_t m;
1963 static int warningdone=0;
1964
1965 if (pmap_pagedaemon_waken == 0)
1966 return;
1967
1968 if (warningdone < 5) {
1969 kprintf("pmap_collect: collecting pv entries -- suggest increasing PMAP_SHPGPERPROC\n");
1970 warningdone++;
1971 }
1972
1973 for(i = 0; i < vm_page_array_size; i++) {
1974 m = &vm_page_array[i];
1975 if (m->wire_count || m->hold_count || m->busy ||
1976 (m->flags & PG_BUSY))
1977 continue;
1978 pmap_remove_all(m);
1979 }
48ffc236 1980 pmap_pagedaemon_waken = 0;
d7f50089
YY
1981}
1982
c8fe38ae 1983
d7f50089
YY
1984/*
1985 * If it is the first entry on the list, it is actually
1986 * in the header and we must copy the following entry up
1987 * to the header. Otherwise we must search the list for
1988 * the entry. In either case we free the now unused entry.
1989 */
bfc09ba0
MD
1990static
1991int
c8fe38ae
MD
1992pmap_remove_entry(struct pmap *pmap, vm_page_t m,
1993 vm_offset_t va, pmap_inval_info_t info)
1994{
1995 pv_entry_t pv;
1996 int rtval;
1997
1998 crit_enter();
1999 if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
2000 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2001 if (pmap == pv->pv_pmap && va == pv->pv_va)
2002 break;
2003 }
2004 } else {
2005 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
2006 if (va == pv->pv_va)
2007 break;
2008 }
2009 }
2010
2011 rtval = 0;
48ffc236 2012 /* JGXXX When can 'pv' be NULL? */
c8fe38ae
MD
2013 if (pv) {
2014 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2015 m->md.pv_list_count--;
48ffc236 2016 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2017 if (TAILQ_EMPTY(&m->md.pv_list))
2018 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2019 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
2020 ++pmap->pm_generation;
2021 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem, info);
2022 free_pv_entry(pv);
2023 }
2024 crit_exit();
2025 return rtval;
d7f50089
YY
2026}
2027
2028/*
c8fe38ae
MD
2029 * Create a pv entry for page at pa for
2030 * (pmap, va).
d7f50089 2031 */
bfc09ba0
MD
2032static
2033void
d7f50089
YY
2034pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m)
2035{
c8fe38ae
MD
2036 pv_entry_t pv;
2037
2038 crit_enter();
2039 pv = get_pv_entry();
2040 pv->pv_va = va;
2041 pv->pv_pmap = pmap;
2042 pv->pv_ptem = mpte;
2043
2044 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
2045 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2046 m->md.pv_list_count++;
2047
2048 crit_exit();
d7f50089
YY
2049}
2050
2051/*
2052 * pmap_remove_pte: do the things to unmap a page in a process
2053 */
bfc09ba0
MD
2054static
2055int
c8fe38ae
MD
2056pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
2057 pmap_inval_info_t info)
2058{
2059 pt_entry_t oldpte;
2060 vm_page_t m;
2061
2062 pmap_inval_add(info, pmap, va);
2063 oldpte = pte_load_clear(ptq);
2064 if (oldpte & PG_W)
2065 pmap->pm_stats.wired_count -= 1;
2066 /*
2067 * Machines that don't support invlpg, also don't support
2068 * PG_G. XXX PG_G is disabled for SMP so don't worry about
2069 * the SMP case.
2070 */
2071 if (oldpte & PG_G)
2072 cpu_invlpg((void *)va);
2073 KKASSERT(pmap->pm_stats.resident_count > 0);
2074 --pmap->pm_stats.resident_count;
2075 if (oldpte & PG_MANAGED) {
2076 m = PHYS_TO_VM_PAGE(oldpte);
2077 if (oldpte & PG_M) {
2078#if defined(PMAP_DIAGNOSTIC)
2079 if (pmap_nw_modified((pt_entry_t) oldpte)) {
2080 kprintf(
48ffc236 2081 "pmap_remove: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2082 va, oldpte);
2083 }
2084#endif
2085 if (pmap_track_modified(va))
2086 vm_page_dirty(m);
2087 }
2088 if (oldpte & PG_A)
2089 vm_page_flag_set(m, PG_REFERENCED);
2090 return pmap_remove_entry(pmap, m, va, info);
2091 } else {
2092 return pmap_unuse_pt(pmap, va, NULL, info);
2093 }
2094
d7f50089
YY
2095 return 0;
2096}
2097
2098/*
2099 * pmap_remove_page:
2100 *
2101 * Remove a single page from a process address space.
2102 *
2103 * This function may not be called from an interrupt if the pmap is
2104 * not kernel_pmap.
2105 */
bfc09ba0
MD
2106static
2107void
c8fe38ae
MD
2108pmap_remove_page(struct pmap *pmap, vm_offset_t va, pmap_inval_info_t info)
2109{
48ffc236 2110 pt_entry_t *pte;
c8fe38ae 2111
48ffc236
JG
2112 pte = pmap_pte(pmap, va);
2113 if (pte == NULL)
2114 return;
2115 if ((*pte & PG_V) == 0)
2116 return;
2117 pmap_remove_pte(pmap, pte, va, info);
d7f50089
YY
2118}
2119
2120/*
2121 * pmap_remove:
2122 *
2123 * Remove the given range of addresses from the specified map.
2124 *
2125 * It is assumed that the start and end are properly
2126 * rounded to the page size.
2127 *
2128 * This function may not be called from an interrupt if the pmap is
2129 * not kernel_pmap.
2130 */
2131void
2132pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
2133{
48ffc236
JG
2134 vm_offset_t va_next;
2135 pml4_entry_t *pml4e;
2136 pdp_entry_t *pdpe;
2137 pd_entry_t ptpaddr, *pde;
2138 pt_entry_t *pte;
c8fe38ae
MD
2139 struct pmap_inval_info info;
2140
2141 if (pmap == NULL)
2142 return;
2143
2144 if (pmap->pm_stats.resident_count == 0)
2145 return;
2146
2147 pmap_inval_init(&info);
2148
2149 /*
2150 * special handling of removing one page. a very
2151 * common operation and easy to short circuit some
2152 * code.
2153 */
48ffc236
JG
2154 if (sva + PAGE_SIZE == eva) {
2155 pde = pmap_pde(pmap, sva);
2156 if (pde && (*pde & PG_PS) == 0) {
2157 pmap_remove_page(pmap, sva, &info);
2158 pmap_inval_flush(&info);
2159 return;
2160 }
c8fe38ae
MD
2161 }
2162
48ffc236
JG
2163 for (; sva < eva; sva = va_next) {
2164 pml4e = pmap_pml4e(pmap, sva);
2165 if ((*pml4e & PG_V) == 0) {
2166 va_next = (sva + NBPML4) & ~PML4MASK;
2167 if (va_next < sva)
2168 va_next = eva;
2169 continue;
2170 }
c8fe38ae 2171
48ffc236
JG
2172 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2173 if ((*pdpe & PG_V) == 0) {
2174 va_next = (sva + NBPDP) & ~PDPMASK;
2175 if (va_next < sva)
2176 va_next = eva;
2177 continue;
2178 }
c8fe38ae
MD
2179
2180 /*
2181 * Calculate index for next page table.
2182 */
48ffc236
JG
2183 va_next = (sva + NBPDR) & ~PDRMASK;
2184 if (va_next < sva)
2185 va_next = eva;
c8fe38ae 2186
48ffc236
JG
2187 pde = pmap_pdpe_to_pde(pdpe, sva);
2188 ptpaddr = *pde;
c8fe38ae
MD
2189
2190 /*
48ffc236 2191 * Weed out invalid mappings.
c8fe38ae
MD
2192 */
2193 if (ptpaddr == 0)
2194 continue;
2195
48ffc236
JG
2196 /*
2197 * Check for large page.
2198 */
2199 if ((ptpaddr & PG_PS) != 0) {
2200 /* JG FreeBSD has more complex treatment here */
2201 pmap_inval_add(&info, pmap, -1);
2202 *pde = 0;
2203 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2204 continue;
2205 }
2206
c8fe38ae
MD
2207 /*
2208 * Limit our scan to either the end of the va represented
2209 * by the current page table page, or to the end of the
2210 * range being removed.
2211 */
48ffc236
JG
2212 if (va_next > eva)
2213 va_next = eva;
c8fe38ae
MD
2214
2215 /*
2216 * NOTE: pmap_remove_pte() can block.
2217 */
48ffc236
JG
2218 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2219 sva += PAGE_SIZE) {
2220 if (*pte == 0)
c8fe38ae 2221 continue;
48ffc236 2222 if (pmap_remove_pte(pmap, pte, sva, &info))
c8fe38ae
MD
2223 break;
2224 }
2225 }
2226 pmap_inval_flush(&info);
d7f50089
YY
2227}
2228
2229/*
2230 * pmap_remove_all:
2231 *
c8fe38ae
MD
2232 * Removes this physical page from all physical maps in which it resides.
2233 * Reflects back modify bits to the pager.
d7f50089 2234 *
c8fe38ae 2235 * This routine may not be called from an interrupt.
d7f50089 2236 */
c8fe38ae 2237
bfc09ba0
MD
2238static
2239void
d7f50089
YY
2240pmap_remove_all(vm_page_t m)
2241{
c8fe38ae
MD
2242 struct pmap_inval_info info;
2243 pt_entry_t *pte, tpte;
2244 pv_entry_t pv;
2245
2246 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2247 return;
2248
2249 pmap_inval_init(&info);
2250 crit_enter();
2251 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2252 KKASSERT(pv->pv_pmap->pm_stats.resident_count > 0);
2253 --pv->pv_pmap->pm_stats.resident_count;
2254
2255 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
2256 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
2257 tpte = pte_load_clear(pte);
2258
2259 if (tpte & PG_W)
2260 pv->pv_pmap->pm_stats.wired_count--;
2261
2262 if (tpte & PG_A)
2263 vm_page_flag_set(m, PG_REFERENCED);
2264
2265 /*
2266 * Update the vm_page_t clean and reference bits.
2267 */
2268 if (tpte & PG_M) {
2269#if defined(PMAP_DIAGNOSTIC)
48ffc236 2270 if (pmap_nw_modified(tpte)) {
c8fe38ae 2271 kprintf(
48ffc236 2272 "pmap_remove_all: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2273 pv->pv_va, tpte);
2274 }
2275#endif
2276 if (pmap_track_modified(pv->pv_va))
2277 vm_page_dirty(m);
2278 }
2279 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2280 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist);
2281 ++pv->pv_pmap->pm_generation;
2282 m->md.pv_list_count--;
48ffc236 2283 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2284 if (TAILQ_EMPTY(&m->md.pv_list))
2285 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2286 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem, &info);
2287 free_pv_entry(pv);
2288 }
2289 crit_exit();
2290 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
2291 pmap_inval_flush(&info);
d7f50089
YY
2292}
2293
2294/*
2295 * pmap_protect:
2296 *
2297 * Set the physical protection on the specified range of this map
2298 * as requested.
2299 *
2300 * This function may not be called from an interrupt if the map is
2301 * not the kernel_pmap.
2302 */
2303void
2304pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2305{
48ffc236
JG
2306 vm_offset_t va_next;
2307 pml4_entry_t *pml4e;
2308 pdp_entry_t *pdpe;
2309 pd_entry_t ptpaddr, *pde;
2310 pt_entry_t *pte;
c8fe38ae
MD
2311 pmap_inval_info info;
2312
48ffc236
JG
2313 /* JG review for NX */
2314
c8fe38ae
MD
2315 if (pmap == NULL)
2316 return;
2317
2318 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2319 pmap_remove(pmap, sva, eva);
2320 return;
2321 }
2322
2323 if (prot & VM_PROT_WRITE)
2324 return;
2325
2326 pmap_inval_init(&info);
2327
48ffc236 2328 for (; sva < eva; sva = va_next) {
c8fe38ae 2329
48ffc236
JG
2330 pml4e = pmap_pml4e(pmap, sva);
2331 if ((*pml4e & PG_V) == 0) {
2332 va_next = (sva + NBPML4) & ~PML4MASK;
2333 if (va_next < sva)
2334 va_next = eva;
2335 continue;
2336 }
c8fe38ae 2337
48ffc236
JG
2338 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2339 if ((*pdpe & PG_V) == 0) {
2340 va_next = (sva + NBPDP) & ~PDPMASK;
2341 if (va_next < sva)
2342 va_next = eva;
2343 continue;
2344 }
c8fe38ae 2345
48ffc236
JG
2346 va_next = (sva + NBPDR) & ~PDRMASK;
2347 if (va_next < sva)
2348 va_next = eva;
c8fe38ae 2349
48ffc236
JG
2350 pde = pmap_pdpe_to_pde(pdpe, sva);
2351 ptpaddr = *pde;
c8fe38ae 2352
48ffc236
JG
2353 /*
2354 * Check for large page.
2355 */
2356 if ((ptpaddr & PG_PS) != 0) {
c8fe38ae 2357 pmap_inval_add(&info, pmap, -1);
48ffc236 2358 *pde &= ~(PG_M|PG_RW);
c8fe38ae
MD
2359 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2360 continue;
2361 }
2362
2363 /*
2364 * Weed out invalid mappings. Note: we assume that the page
2365 * directory table is always allocated, and in kernel virtual.
2366 */
2367 if (ptpaddr == 0)
2368 continue;
2369
48ffc236
JG
2370 if (va_next > eva)
2371 va_next = eva;
c8fe38ae 2372
48ffc236
JG
2373 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2374 sva += PAGE_SIZE) {
2375 pt_entry_t obits, pbits;
c8fe38ae
MD
2376 vm_page_t m;
2377
2378 /*
2379 * XXX non-optimal. Note also that there can be
2380 * no pmap_inval_flush() calls until after we modify
2381 * ptbase[sindex] (or otherwise we have to do another
2382 * pmap_inval_add() call).
2383 */
48ffc236
JG
2384 pmap_inval_add(&info, pmap, sva);
2385 obits = pbits = *pte;
2386 if ((pbits & PG_V) == 0)
2387 continue;
c8fe38ae
MD
2388 if (pbits & PG_MANAGED) {
2389 m = NULL;
2390 if (pbits & PG_A) {
48ffc236 2391 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2392 vm_page_flag_set(m, PG_REFERENCED);
2393 pbits &= ~PG_A;
2394 }
2395 if (pbits & PG_M) {
48ffc236 2396 if (pmap_track_modified(sva)) {
c8fe38ae 2397 if (m == NULL)
3cfe1a9f 2398 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2399 vm_page_dirty(m);
2400 pbits &= ~PG_M;
2401 }
2402 }
2403 }
2404
2405 pbits &= ~PG_RW;
2406
48ffc236
JG
2407 if (pbits != obits) {
2408 *pte = pbits;
c8fe38ae
MD
2409 }
2410 }
2411 }
2412 pmap_inval_flush(&info);
d7f50089
YY
2413}
2414
2415/*
c8fe38ae
MD
2416 * Insert the given physical page (p) at
2417 * the specified virtual address (v) in the
2418 * target physical map with the protection requested.
d7f50089 2419 *
c8fe38ae
MD
2420 * If specified, the page will be wired down, meaning
2421 * that the related pte can not be reclaimed.
d7f50089 2422 *
c8fe38ae
MD
2423 * NB: This is the only routine which MAY NOT lazy-evaluate
2424 * or lose information. That is, this routine must actually
2425 * insert this page into the given map NOW.
d7f50089
YY
2426 */
2427void
2428pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2429 boolean_t wired)
2430{
c8fe38ae 2431 vm_paddr_t pa;
48ffc236 2432 pd_entry_t *pde;
c8fe38ae
MD
2433 pt_entry_t *pte;
2434 vm_paddr_t opa;
48ffc236 2435 pt_entry_t origpte, newpte;
c8fe38ae
MD
2436 vm_page_t mpte;
2437 pmap_inval_info info;
2438
2439 if (pmap == NULL)
2440 return;
2441
48ffc236 2442 va = trunc_page(va);
c8fe38ae
MD
2443#ifdef PMAP_DIAGNOSTIC
2444 if (va >= KvaEnd)
2445 panic("pmap_enter: toobig");
2446 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
48ffc236 2447 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
c8fe38ae
MD
2448#endif
2449 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2450 kprintf("Warning: pmap_enter called on UVA with kernel_pmap\n");
48ffc236
JG
2451#ifdef DDB
2452 db_print_backtrace();
2453#endif
c8fe38ae
MD
2454 }
2455 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2456 kprintf("Warning: pmap_enter called on KVA without kernel_pmap\n");
48ffc236
JG
2457#ifdef DDB
2458 db_print_backtrace();
2459#endif
c8fe38ae
MD
2460 }
2461
2462 /*
2463 * In the case that a page table page is not
2464 * resident, we are creating it here.
2465 */
48ffc236 2466 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2467 mpte = pmap_allocpte(pmap, va);
2468 else
2469 mpte = NULL;
2470
2471 pmap_inval_init(&info);
48ffc236
JG
2472 pde = pmap_pde(pmap, va);
2473 if (pde != NULL && (*pde & PG_V) != 0) {
2474 if ((*pde & PG_PS) != 0)
2475 panic("pmap_enter: attempted pmap_enter on 2MB page");
2476 pte = pmap_pde_to_pte(pde, va);
2477 } else
2478 panic("pmap_enter: invalid page directory va=%#lx", va);
2479
2480 KKASSERT(pte != NULL);
2481 pa = VM_PAGE_TO_PHYS(m);
48ffc236 2482 origpte = *pte;
c8fe38ae
MD
2483 opa = origpte & PG_FRAME;
2484
c8fe38ae
MD
2485 /*
2486 * Mapping has not changed, must be protection or wiring change.
2487 */
2488 if (origpte && (opa == pa)) {
2489 /*
2490 * Wiring change, just update stats. We don't worry about
2491 * wiring PT pages as they remain resident as long as there
2492 * are valid mappings in them. Hence, if a user page is wired,
2493 * the PT page will be also.
2494 */
2495 if (wired && ((origpte & PG_W) == 0))
2496 pmap->pm_stats.wired_count++;
2497 else if (!wired && (origpte & PG_W))
2498 pmap->pm_stats.wired_count--;
2499
2500#if defined(PMAP_DIAGNOSTIC)
48ffc236 2501 if (pmap_nw_modified(origpte)) {
c8fe38ae 2502 kprintf(
48ffc236 2503 "pmap_enter: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2504 va, origpte);
2505 }
2506#endif
2507
2508 /*
2509 * Remove the extra pte reference. Note that we cannot
2510 * optimize the RO->RW case because we have adjusted the
2511 * wiring count above and may need to adjust the wiring
2512 * bits below.
2513 */
2514 if (mpte)
2515 mpte->hold_count--;
2516
2517 /*
2518 * We might be turning off write access to the page,
2519 * so we go ahead and sense modify status.
2520 */
2521 if (origpte & PG_MANAGED) {
2522 if ((origpte & PG_M) && pmap_track_modified(va)) {
2523 vm_page_t om;
2524 om = PHYS_TO_VM_PAGE(opa);
2525 vm_page_dirty(om);
2526 }
2527 pa |= PG_MANAGED;
2528 KKASSERT(m->flags & PG_MAPPED);
2529 }
2530 goto validate;
2531 }
2532 /*
2533 * Mapping has changed, invalidate old range and fall through to
2534 * handle validating new mapping.
2535 */
2536 if (opa) {
2537 int err;
2538 err = pmap_remove_pte(pmap, pte, va, &info);
2539 if (err)
48ffc236 2540 panic("pmap_enter: pte vanished, va: 0x%lx", va);
c8fe38ae
MD
2541 }
2542
2543 /*
2544 * Enter on the PV list if part of our managed memory. Note that we
2545 * raise IPL while manipulating pv_table since pmap_enter can be
2546 * called at interrupt time.
2547 */
2548 if (pmap_initialized &&
2549 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2550 pmap_insert_entry(pmap, va, mpte, m);
2551 pa |= PG_MANAGED;
2552 vm_page_flag_set(m, PG_MAPPED);
2553 }
2554
2555 /*
2556 * Increment counters
2557 */
2558 ++pmap->pm_stats.resident_count;
2559 if (wired)
2560 pmap->pm_stats.wired_count++;
2561
2562validate:
2563 /*
2564 * Now validate mapping with desired protection/wiring.
2565 */
48ffc236 2566 newpte = (pt_entry_t) (pa | pte_prot(pmap, prot) | PG_V);
c8fe38ae
MD
2567
2568 if (wired)
2569 newpte |= PG_W;
48ffc236 2570 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2571 newpte |= PG_U;
2572 if (pmap == &kernel_pmap)
2573 newpte |= pgeflag;
2574
2575 /*
2576 * if the mapping or permission bits are different, we need
2577 * to update the pte.
2578 */
2579 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2580 pmap_inval_add(&info, pmap, va);
2581 *pte = newpte | PG_A;
2582 if (newpte & PG_RW)
2583 vm_page_flag_set(m, PG_WRITEABLE);
2584 }
2585 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
2586 pmap_inval_flush(&info);
d7f50089
YY
2587}
2588
2589/*
c8fe38ae
MD
2590 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
2591 * This code also assumes that the pmap has no pre-existing entry for this
2592 * VA.
d7f50089 2593 *
c8fe38ae 2594 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 2595 */
bfc09ba0
MD
2596static
2597void
c8fe38ae 2598pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
d7f50089 2599{
c8fe38ae
MD
2600 pt_entry_t *pte;
2601 vm_paddr_t pa;
2602 vm_page_t mpte;
2603 vm_pindex_t ptepindex;
48ffc236 2604 pd_entry_t *ptepa;
c8fe38ae
MD
2605 pmap_inval_info info;
2606
2607 pmap_inval_init(&info);
2608
2609 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2610 kprintf("Warning: pmap_enter_quick called on UVA with kernel_pmap\n");
48ffc236
JG
2611#ifdef DDB
2612 db_print_backtrace();
2613#endif
c8fe38ae
MD
2614 }
2615 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2616 kprintf("Warning: pmap_enter_quick called on KVA without kernel_pmap\n");
48ffc236
JG
2617#ifdef DDB
2618 db_print_backtrace();
2619#endif
c8fe38ae
MD
2620 }
2621
2622 KKASSERT(va < UPT_MIN_ADDRESS); /* assert used on user pmaps only */
2623
2624 /*
2625 * Calculate the page table page (mpte), allocating it if necessary.
2626 *
2627 * A held page table page (mpte), or NULL, is passed onto the
2628 * section following.
2629 */
48ffc236 2630 if (va < VM_MAX_USER_ADDRESS) {
c8fe38ae
MD
2631 /*
2632 * Calculate pagetable page index
2633 */
48ffc236 2634 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
2635
2636 do {
2637 /*
2638 * Get the page directory entry
2639 */
48ffc236 2640 ptepa = pmap_pde(pmap, va);
c8fe38ae
MD
2641
2642 /*
2643 * If the page table page is mapped, we just increment
2644 * the hold count, and activate it.
2645 */
48ffc236
JG
2646 if (ptepa && (*ptepa & PG_V) != 0) {
2647 if (*ptepa & PG_PS)
2648 panic("pmap_enter_quick: unexpected mapping into 2MB page");
2649// if (pmap->pm_ptphint &&
2650// (pmap->pm_ptphint->pindex == ptepindex)) {
2651// mpte = pmap->pm_ptphint;
2652// } else {
c8fe38ae
MD
2653 mpte = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
2654 pmap->pm_ptphint = mpte;
48ffc236 2655// }
c8fe38ae
MD
2656 if (mpte)
2657 mpte->hold_count++;
2658 } else {
2659 mpte = _pmap_allocpte(pmap, ptepindex);
2660 }
2661 } while (mpte == NULL);
2662 } else {
2663 mpte = NULL;
2664 /* this code path is not yet used */
2665 }
2666
2667 /*
2668 * With a valid (and held) page directory page, we can just use
2669 * vtopte() to get to the pte. If the pte is already present
2670 * we do not disturb it.
2671 */
2672 pte = vtopte(va);
2673 if (*pte & PG_V) {
2674 if (mpte)
48ffc236 2675 pmap_unwire_pte_hold(pmap, va, mpte, &info);
c8fe38ae
MD
2676 pa = VM_PAGE_TO_PHYS(m);
2677 KKASSERT(((*pte ^ pa) & PG_FRAME) == 0);
2678 return;
2679 }
2680
2681 /*
2682 * Enter on the PV list if part of our managed memory
2683 */
2684 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2685 pmap_insert_entry(pmap, va, mpte, m);
2686 vm_page_flag_set(m, PG_MAPPED);
2687 }
2688
2689 /*
2690 * Increment counters
2691 */
2692 ++pmap->pm_stats.resident_count;
2693
2694 pa = VM_PAGE_TO_PHYS(m);
2695
2696 /*
2697 * Now validate mapping with RO protection
2698 */
2699 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2700 *pte = pa | PG_V | PG_U;
2701 else
2702 *pte = pa | PG_V | PG_U | PG_MANAGED;
2703/* pmap_inval_add(&info, pmap, va); shouldn't be needed inval->valid */
2704 pmap_inval_flush(&info);
d7f50089
YY
2705}
2706
2707/*
c8fe38ae
MD
2708 * Make a temporary mapping for a physical address. This is only intended
2709 * to be used for panic dumps.
d7f50089 2710 */
3f3709c3 2711/* JG Needed on amd64? */
c8fe38ae
MD
2712void *
2713pmap_kenter_temporary(vm_paddr_t pa, int i)
d7f50089 2714{
c8fe38ae
MD
2715 pmap_kenter((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
2716 return ((void *)crashdumpmap);
d7f50089
YY
2717}
2718
c8fe38ae
MD
2719#define MAX_INIT_PT (96)
2720
d7f50089
YY
2721/*
2722 * This routine preloads the ptes for a given object into the specified pmap.
2723 * This eliminates the blast of soft faults on process startup and
2724 * immediately after an mmap.
2725 */
2726static int pmap_object_init_pt_callback(vm_page_t p, void *data);
2727
2728void
2729pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
2730 vm_object_t object, vm_pindex_t pindex,
2731 vm_size_t size, int limit)
2732{
c8fe38ae
MD
2733 struct rb_vm_page_scan_info info;
2734 struct lwp *lp;
48ffc236 2735 vm_size_t psize;
c8fe38ae
MD
2736
2737 /*
2738 * We can't preinit if read access isn't set or there is no pmap
2739 * or object.
2740 */
2741 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
2742 return;
2743
2744 /*
2745 * We can't preinit if the pmap is not the current pmap
2746 */
2747 lp = curthread->td_lwp;
2748 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
2749 return;
2750
3f3709c3 2751 psize = amd64_btop(size);
c8fe38ae
MD
2752
2753 if ((object->type != OBJT_VNODE) ||
2754 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
2755 (object->resident_page_count > MAX_INIT_PT))) {
2756 return;
2757 }
2758
2759 if (psize + pindex > object->size) {
2760 if (object->size < pindex)
2761 return;
2762 psize = object->size - pindex;
2763 }
2764
2765 if (psize == 0)
2766 return;
2767
2768 /*
2769 * Use a red-black scan to traverse the requested range and load
2770 * any valid pages found into the pmap.
2771 *
2772 * We cannot safely scan the object's memq unless we are in a
2773 * critical section since interrupts can remove pages from objects.
2774 */
2775 info.start_pindex = pindex;
2776 info.end_pindex = pindex + psize - 1;
2777 info.limit = limit;
2778 info.mpte = NULL;
2779 info.addr = addr;
2780 info.pmap = pmap;
2781
2782 crit_enter();
2783 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
2784 pmap_object_init_pt_callback, &info);
2785 crit_exit();
d7f50089
YY
2786}
2787
2788static
2789int
2790pmap_object_init_pt_callback(vm_page_t p, void *data)
2791{
c8fe38ae
MD
2792 struct rb_vm_page_scan_info *info = data;
2793 vm_pindex_t rel_index;
2794 /*
2795 * don't allow an madvise to blow away our really
2796 * free pages allocating pv entries.
2797 */
2798 if ((info->limit & MAP_PREFAULT_MADVISE) &&
2799 vmstats.v_free_count < vmstats.v_free_reserved) {
2800 return(-1);
2801 }
2802 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2803 (p->busy == 0) && (p->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2804 if ((p->queue - p->pc) == PQ_CACHE)
2805 vm_page_deactivate(p);
2806 vm_page_busy(p);
2807 rel_index = p->pindex - info->start_pindex;
2808 pmap_enter_quick(info->pmap,
3f3709c3 2809 info->addr + amd64_ptob(rel_index), p);
c8fe38ae
MD
2810 vm_page_wakeup(p);
2811 }
d7f50089
YY
2812 return(0);
2813}
2814
2815/*
2816 * pmap_prefault provides a quick way of clustering pagefaults into a
2817 * processes address space. It is a "cousin" of pmap_object_init_pt,
2818 * except it runs at page fault time instead of mmap time.
2819 */
2820#define PFBAK 4
2821#define PFFOR 4
2822#define PAGEORDER_SIZE (PFBAK+PFFOR)
2823
2824static int pmap_prefault_pageorder[] = {
2825 -PAGE_SIZE, PAGE_SIZE,
2826 -2 * PAGE_SIZE, 2 * PAGE_SIZE,
2827 -3 * PAGE_SIZE, 3 * PAGE_SIZE,
2828 -4 * PAGE_SIZE, 4 * PAGE_SIZE
2829};
2830
2831void
2832pmap_prefault(pmap_t pmap, vm_offset_t addra, vm_map_entry_t entry)
2833{
c8fe38ae
MD
2834 int i;
2835 vm_offset_t starta;
2836 vm_offset_t addr;
2837 vm_pindex_t pindex;
2838 vm_page_t m;
2839 vm_object_t object;
2840 struct lwp *lp;
2841
2842 /*
2843 * We do not currently prefault mappings that use virtual page
2844 * tables. We do not prefault foreign pmaps.
2845 */
2846 if (entry->maptype == VM_MAPTYPE_VPAGETABLE)
2847 return;
2848 lp = curthread->td_lwp;
2849 if (lp == NULL || (pmap != vmspace_pmap(lp->lwp_vmspace)))
2850 return;
2851
2852 object = entry->object.vm_object;
2853
2854 starta = addra - PFBAK * PAGE_SIZE;
2855 if (starta < entry->start)
2856 starta = entry->start;
2857 else if (starta > addra)
2858 starta = 0;
2859
2860 /*
2861 * critical section protection is required to maintain the
2862 * page/object association, interrupts can free pages and remove
2863 * them from their objects.
2864 */
2865 crit_enter();
2866 for (i = 0; i < PAGEORDER_SIZE; i++) {
2867 vm_object_t lobject;
2868 pt_entry_t *pte;
665d7d25 2869 pd_entry_t *pde;
c8fe38ae
MD
2870
2871 addr = addra + pmap_prefault_pageorder[i];
2872 if (addr > addra + (PFFOR * PAGE_SIZE))
2873 addr = 0;
2874
2875 if (addr < starta || addr >= entry->end)
2876 continue;
2877
665d7d25
MD
2878 pde = pmap_pde(pmap, addr);
2879 if (pde == NULL || *pde == 0)
c8fe38ae
MD
2880 continue;
2881
2882 pte = vtopte(addr);
2883 if (*pte)
2884 continue;
2885
2886 pindex = ((addr - entry->start) + entry->offset) >> PAGE_SHIFT;
2887 lobject = object;
2888
2889 for (m = vm_page_lookup(lobject, pindex);
2890 (!m && (lobject->type == OBJT_DEFAULT) &&
2891 (lobject->backing_object));
2892 lobject = lobject->backing_object
2893 ) {
2894 if (lobject->backing_object_offset & PAGE_MASK)
2895 break;
2896 pindex += (lobject->backing_object_offset >> PAGE_SHIFT);
2897 m = vm_page_lookup(lobject->backing_object, pindex);
2898 }
2899
2900 /*
2901 * give-up when a page is not in memory
2902 */
2903 if (m == NULL)
2904 break;
2905
2906 if (((m->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2907 (m->busy == 0) &&
2908 (m->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2909
2910 if ((m->queue - m->pc) == PQ_CACHE) {
2911 vm_page_deactivate(m);
2912 }
2913 vm_page_busy(m);
2914 pmap_enter_quick(pmap, addr, m);
2915 vm_page_wakeup(m);
2916 }
2917 }
2918 crit_exit();
d7f50089
YY
2919}
2920
2921/*
2922 * Routine: pmap_change_wiring
2923 * Function: Change the wiring attribute for a map/virtual-address
2924 * pair.
2925 * In/out conditions:
2926 * The mapping must already exist in the pmap.
2927 */
2928void
2929pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
2930{
c8fe38ae
MD
2931 pt_entry_t *pte;
2932
2933 if (pmap == NULL)
2934 return;
2935
2936 pte = pmap_pte(pmap, va);
2937
2938 if (wired && !pmap_pte_w(pte))
2939 pmap->pm_stats.wired_count++;
2940 else if (!wired && pmap_pte_w(pte))
2941 pmap->pm_stats.wired_count--;
2942
2943 /*
2944 * Wiring is not a hardware characteristic so there is no need to
2945 * invalidate TLB. However, in an SMP environment we must use
2946 * a locked bus cycle to update the pte (if we are not using
2947 * the pmap_inval_*() API that is)... it's ok to do this for simple
2948 * wiring changes.
2949 */
2950#ifdef SMP
2951 if (wired)
71577ce5 2952 atomic_set_long(pte, PG_W);
c8fe38ae 2953 else
71577ce5 2954 atomic_clear_long(pte, PG_W);
c8fe38ae
MD
2955#else
2956 if (wired)
71577ce5 2957 atomic_set_long_nonlocked(pte, PG_W);
c8fe38ae 2958 else
71577ce5 2959 atomic_clear_long_nonlocked(pte, PG_W);
c8fe38ae 2960#endif
d7f50089
YY
2961}
2962
c8fe38ae
MD
2963
2964
d7f50089
YY
2965/*
2966 * Copy the range specified by src_addr/len
2967 * from the source map to the range dst_addr/len
2968 * in the destination map.
2969 *
2970 * This routine is only advisory and need not do anything.
2971 */
2972void
2973pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
bfc09ba0 2974 vm_size_t len, vm_offset_t src_addr)
d7f50089 2975{
bfc09ba0
MD
2976 return;
2977#if 0
c8fe38ae
MD
2978 pmap_inval_info info;
2979 vm_offset_t addr;
2980 vm_offset_t end_addr = src_addr + len;
2981 vm_offset_t pdnxt;
2982 pd_entry_t src_frame, dst_frame;
2983 vm_page_t m;
2984
2985 if (dst_addr != src_addr)
2986 return;
48ffc236 2987#if JGPMAP32
c8fe38ae
MD
2988 src_frame = src_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
2989 if (src_frame != (PTDpde & PG_FRAME)) {
2990 return;
2991 }
2992
2993 dst_frame = dst_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
2994 if (dst_frame != (APTDpde & PG_FRAME)) {
2995 APTDpde = (pd_entry_t) (dst_frame | PG_RW | PG_V);
2996 /* The page directory is not shared between CPUs */
2997 cpu_invltlb();
2998 }
48ffc236 2999#endif
c8fe38ae
MD
3000 pmap_inval_init(&info);
3001 pmap_inval_add(&info, dst_pmap, -1);
3002 pmap_inval_add(&info, src_pmap, -1);
3003
3004 /*
3005 * critical section protection is required to maintain the page/object
3006 * association, interrupts can free pages and remove them from
3007 * their objects.
3008 */
3009 crit_enter();
3010 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3011 pt_entry_t *src_pte, *dst_pte;
3012 vm_page_t dstmpte, srcmpte;
3013 vm_offset_t srcptepaddr;
3014 vm_pindex_t ptepindex;
3015
3016 if (addr >= UPT_MIN_ADDRESS)
3017 panic("pmap_copy: invalid to pmap_copy page tables\n");
3018
3019 /*
3020 * Don't let optional prefaulting of pages make us go
3021 * way below the low water mark of free pages or way
3022 * above high water mark of used pv entries.
3023 */
3024 if (vmstats.v_free_count < vmstats.v_free_reserved ||
3025 pv_entry_count > pv_entry_high_water)
3026 break;
3027
3028 pdnxt = ((addr + PAGE_SIZE*NPTEPG) & ~(PAGE_SIZE*NPTEPG - 1));
3029 ptepindex = addr >> PDRSHIFT;
3030
48ffc236 3031#if JGPMAP32
c8fe38ae 3032 srcptepaddr = (vm_offset_t) src_pmap->pm_pdir[ptepindex];
48ffc236 3033#endif
c8fe38ae
MD
3034 if (srcptepaddr == 0)
3035 continue;
3036
3037 if (srcptepaddr & PG_PS) {
48ffc236 3038#if JGPMAP32
c8fe38ae
MD
3039 if (dst_pmap->pm_pdir[ptepindex] == 0) {
3040 dst_pmap->pm_pdir[ptepindex] = (pd_entry_t) srcptepaddr;
3041 dst_pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3042 }
48ffc236 3043#endif
c8fe38ae
MD
3044 continue;
3045 }
3046
3047 srcmpte = vm_page_lookup(src_pmap->pm_pteobj, ptepindex);
3048 if ((srcmpte == NULL) || (srcmpte->hold_count == 0) ||
3049 (srcmpte->flags & PG_BUSY)) {
3050 continue;
3051 }
3052
3053 if (pdnxt > end_addr)
3054 pdnxt = end_addr;
3055
3056 src_pte = vtopte(addr);
48ffc236 3057#if JGPMAP32
c8fe38ae 3058 dst_pte = avtopte(addr);
48ffc236 3059#endif
c8fe38ae
MD
3060 while (addr < pdnxt) {
3061 pt_entry_t ptetemp;
3062
3063 ptetemp = *src_pte;
3064 /*
3065 * we only virtual copy managed pages
3066 */
3067 if ((ptetemp & PG_MANAGED) != 0) {
3068 /*
3069 * We have to check after allocpte for the
3070 * pte still being around... allocpte can
3071 * block.
3072 *
3073 * pmap_allocpte() can block. If we lose
3074 * our page directory mappings we stop.
3075 */
3076 dstmpte = pmap_allocpte(dst_pmap, addr);
3077
48ffc236 3078#if JGPMAP32
c8fe38ae
MD
3079 if (src_frame != (PTDpde & PG_FRAME) ||
3080 dst_frame != (APTDpde & PG_FRAME)
3081 ) {
3082 kprintf("WARNING: pmap_copy: detected and corrected race\n");
3083 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3084 goto failed;
3085 } else if ((*dst_pte == 0) &&
3086 (ptetemp = *src_pte) != 0 &&
3087 (ptetemp & PG_MANAGED)) {
3088 /*
3089 * Clear the modified and
3090 * accessed (referenced) bits
3091 * during the copy.
3092 */
3093 m = PHYS_TO_VM_PAGE(ptetemp);
3094 *dst_pte = ptetemp & ~(PG_M | PG_A);
3095 ++dst_pmap->pm_stats.resident_count;
3096 pmap_insert_entry(dst_pmap, addr,
3097 dstmpte, m);
3098 KKASSERT(m->flags & PG_MAPPED);
3099 } else {
3100 kprintf("WARNING: pmap_copy: dst_pte race detected and corrected\n");
3101 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3102 goto failed;
3103 }
48ffc236 3104#endif
c8fe38ae
MD
3105 if (dstmpte->hold_count >= srcmpte->hold_count)
3106 break;
3107 }
3108 addr += PAGE_SIZE;
3109 src_pte++;
3110 dst_pte++;
3111 }
3112 }
3113failed:
3114 crit_exit();
3115 pmap_inval_flush(&info);
f81851b8 3116#endif
d7f50089
YY
3117}
3118
3119/*
3120 * pmap_zero_page:
3121 *
48ffc236 3122 * Zero the specified physical page.
d7f50089
YY
3123 *
3124 * This function may be called from an interrupt and no locking is
3125 * required.
3126 */
3127void
3128pmap_zero_page(vm_paddr_t phys)
3129{
48ffc236 3130 vm_offset_t va = PHYS_TO_DMAP(phys);
c8fe38ae 3131
48ffc236 3132 pagezero((void *)va);
d7f50089
YY
3133}
3134
3135/*
3136 * pmap_page_assertzero:
3137 *
3138 * Assert that a page is empty, panic if it isn't.
3139 */
3140void
3141pmap_page_assertzero(vm_paddr_t phys)
3142{
48ffc236 3143 vm_offset_t virt = PHYS_TO_DMAP(phys);
bfc09ba0 3144 int i;
48ffc236 3145
bfc09ba0
MD
3146 for (i = 0; i < PAGE_SIZE; i += sizeof(long)) {
3147 if (*(long *)((char *)virt + i) != 0) {
3148 panic("pmap_page_assertzero() @ %p not zero!\n", (void *)virt);
c8fe38ae
MD
3149 }
3150 }
d7f50089
YY
3151}
3152
3153/*
3154 * pmap_zero_page:
3155 *
3156 * Zero part of a physical page by mapping it into memory and clearing
3157 * its contents with bzero.
3158 *
3159 * off and size may not cover an area beyond a single hardware page.
3160 */
3161void
3162pmap_zero_page_area(vm_paddr_t phys, int off, int size)
3163{
48ffc236 3164 vm_offset_t virt = PHYS_TO_DMAP(phys);
bfc09ba0 3165
48ffc236 3166 bzero((char *)virt + off, size);
d7f50089
YY
3167}
3168
3169/*
3170 * pmap_copy_page:
3171 *
3172 * Copy the physical page from the source PA to the target PA.
3173 * This function may be called from an interrupt. No locking
3174 * is required.
3175 */
3176void
3177pmap_copy_page(vm_paddr_t src, vm_paddr_t dst)
3178{
48ffc236 3179 vm_offset_t src_virt, dst_virt;
c8fe38ae 3180
48ffc236
JG
3181 src_virt = PHYS_TO_DMAP(src);
3182 dst_virt = PHYS_TO_DMAP(dst);
bfc09ba0 3183 bcopy((void *)src_virt, (void *)dst_virt, PAGE_SIZE);
d7f50089
YY
3184}
3185
3186/*
3187 * pmap_copy_page_frag:
3188 *
3189 * Copy the physical page from the source PA to the target PA.
3190 * This function may be called from an interrupt. No locking
3191 * is required.
3192 */
3193void
3194pmap_copy_page_frag(vm_paddr_t src, vm_paddr_t dst, size_t bytes)
3195{
48ffc236 3196 vm_offset_t src_virt, dst_virt;
c8fe38ae 3197
48ffc236
JG
3198 src_virt = PHYS_TO_DMAP(src);
3199 dst_virt = PHYS_TO_DMAP(dst);
bfc09ba0 3200
48ffc236
JG
3201 bcopy((char *)src_virt + (src & PAGE_MASK),
3202 (char *)dst_virt + (dst & PAGE_MASK),
c8fe38ae 3203 bytes);
d7f50089
YY
3204}
3205
3206/*
3207 * Returns true if the pmap's pv is one of the first
3208 * 16 pvs linked to from this page. This count may
3209 * be changed upwards or downwards in the future; it
3210 * is only necessary that true be returned for a small
3211 * subset of pmaps for proper page aging.
3212 */
3213boolean_t
3214pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3215{
c8fe38ae
MD
3216 pv_entry_t pv;
3217 int loops = 0;
3218
3219 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3220 return FALSE;
3221
3222 crit_enter();
3223
3224 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3225 if (pv->pv_pmap == pmap) {
3226 crit_exit();
3227 return TRUE;
3228 }
3229 loops++;
3230 if (loops >= 16)
3231 break;
3232 }
3233 crit_exit();
d7f50089
YY
3234 return (FALSE);
3235}
3236
3237/*
3238 * Remove all pages from specified address space
3239 * this aids process exit speeds. Also, this code
3240 * is special cased for current process only, but
3241 * can have the more generic (and slightly slower)
3242 * mode enabled. This is much faster than pmap_remove
3243 * in the case of running down an entire address space.
3244 */
3245void
3246pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3247{
c8fe38ae
MD
3248 struct lwp *lp;
3249 pt_entry_t *pte, tpte;
3250 pv_entry_t pv, npv;
3251 vm_page_t m;
3252 pmap_inval_info info;
3253 int iscurrentpmap;
48ffc236 3254 int save_generation;
c8fe38ae
MD
3255
3256 lp = curthread->td_lwp;
3257 if (lp && pmap == vmspace_pmap(lp->lwp_vmspace))
3258 iscurrentpmap = 1;
3259 else
3260 iscurrentpmap = 0;
3261
3262 pmap_inval_init(&info);
3263 crit_enter();
3264 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
3265 if (pv->pv_va >= eva || pv->pv_va < sva) {
3266 npv = TAILQ_NEXT(pv, pv_plist);
3267 continue;
3268 }
3269
3270 KKASSERT(pmap == pv->pv_pmap);
3271
3272 if (iscurrentpmap)
3273 pte = vtopte(pv->pv_va);
3274 else
3275 pte = pmap_pte_quick(pmap, pv->pv_va);
3276 if (pmap->pm_active)
3277 pmap_inval_add(&info, pmap, pv->pv_va);
3278
3279 /*
3280 * We cannot remove wired pages from a process' mapping
3281 * at this time
3282 */
3283 if (*pte & PG_W) {
3284 npv = TAILQ_NEXT(pv, pv_plist);
3285 continue;
3286 }
3287 tpte = pte_load_clear(pte);
3288
48ffc236 3289 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
c8fe38ae
MD
3290
3291 KASSERT(m < &vm_page_array[vm_page_array_size],
48ffc236 3292 ("pmap_remove_pages: bad tpte %lx", tpte));
c8fe38ae
MD
3293
3294 KKASSERT(pmap->pm_stats.resident_count > 0);
3295 --pmap->pm_stats.resident_count;
3296
3297 /*
3298 * Update the vm_page_t clean and reference bits.
3299 */
3300 if (tpte & PG_M) {
3301 vm_page_dirty(m);
3302 }
3303
3304 npv = TAILQ_NEXT(pv, pv_plist);
3305 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
3306 save_generation = ++pmap->pm_generation;
3307
3308 m->md.pv_list_count--;
3309 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3310 if (TAILQ_EMPTY(&m->md.pv_list))
3311 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
3312
3313 pmap_unuse_pt(pmap, pv->pv_va, pv->pv_ptem, &info);
3314 free_pv_entry(pv);
3315
3316 /*
3317 * Restart the scan if we blocked during the unuse or free
3318 * calls and other removals were made.
3319 */
3320 if (save_generation != pmap->pm_generation) {
3321 kprintf("Warning: pmap_remove_pages race-A avoided\n");
3322 pv = TAILQ_FIRST(&pmap->pm_pvlist);
3323 }
3324 }
3325 pmap_inval_flush(&info);
3326 crit_exit();
d7f50089
YY
3327}
3328
3329/*
c8fe38ae
MD
3330 * pmap_testbit tests bits in pte's
3331 * note that the testbit/clearbit routines are inline,
3332 * and a lot of things compile-time evaluate.
d7f50089 3333 */
bfc09ba0
MD
3334static
3335boolean_t
d7f50089
YY
3336pmap_testbit(vm_page_t m, int bit)
3337{
c8fe38ae
MD
3338 pv_entry_t pv;
3339 pt_entry_t *pte;
3340
3341 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3342 return FALSE;
3343
3344 if (TAILQ_FIRST(&m->md.pv_list) == NULL)
3345 return FALSE;
3346
3347 crit_enter();
3348
3349 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3350 /*
3351 * if the bit being tested is the modified bit, then
3352 * mark clean_map and ptes as never
3353 * modified.
3354 */
3355 if (bit & (PG_A|PG_M)) {
3356 if (!pmap_track_modified(pv->pv_va))
3357 continue;
3358 }
3359
3360#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3361 if (pv->pv_pmap == NULL) {
3362 kprintf("Null pmap (tb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3363 continue;
3364 }
3365#endif
3366 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3367 if (*pte & bit) {
3368 crit_exit();
3369 return TRUE;
3370 }
3371 }
3372 crit_exit();
d7f50089
YY
3373 return (FALSE);
3374}
3375
3376/*
c8fe38ae 3377 * this routine is used to modify bits in ptes
d7f50089 3378 */
bfc09ba0
MD
3379static __inline
3380void
d7f50089
YY
3381pmap_clearbit(vm_page_t m, int bit)
3382{
c8fe38ae
MD
3383 struct pmap_inval_info info;
3384 pv_entry_t pv;
3385 pt_entry_t *pte;
3386 pt_entry_t pbits;
3387
3388 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3389 return;
3390
3391 pmap_inval_init(&info);
3392 crit_enter();
3393
3394 /*
3395 * Loop over all current mappings setting/clearing as appropos If
3396 * setting RO do we need to clear the VAC?
3397 */
3398 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3399 /*
3400 * don't write protect pager mappings
3401 */
3402 if (bit == PG_RW) {
3403 if (!pmap_track_modified(pv->pv_va))
3404 continue;
3405 }
3406
3407#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3408 if (pv->pv_pmap == NULL) {
3409 kprintf("Null pmap (cb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3410 continue;
3411 }
3412#endif
3413
3414 /*
3415 * Careful here. We can use a locked bus instruction to
3416 * clear PG_A or PG_M safely but we need to synchronize
3417 * with the target cpus when we mess with PG_RW.
3418 *
3419 * We do not have to force synchronization when clearing
3420 * PG_M even for PTEs generated via virtual memory maps,
3421 * because the virtual kernel will invalidate the pmap
3422 * entry when/if it needs to resynchronize the Modify bit.
3423 */
3424 if (bit & PG_RW)
3425 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
3426 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3427again:
3428 pbits = *pte;
3429 if (pbits & bit) {
3430 if (bit == PG_RW) {
3431 if (pbits & PG_M) {
3432 vm_page_dirty(m);
48ffc236 3433 atomic_clear_long(pte, PG_M|PG_RW);
c8fe38ae
MD
3434 } else {
3435 /*
3436 * The cpu may be trying to set PG_M
3437 * simultaniously with our clearing
3438 * of PG_RW.
3439 */
48ffc236 3440 if (!atomic_cmpset_long(pte, pbits,
c8fe38ae
MD
3441 pbits & ~PG_RW))
3442 goto again;
3443 }
3444 } else if (bit == PG_M) {
3445 /*
3446 * We could also clear PG_RW here to force
3447 * a fault on write to redetect PG_M for
3448 * virtual kernels, but it isn't necessary
3449 * since virtual kernels invalidate the pte
3450 * when they clear the VPTE_M bit in their
3451 * virtual page tables.
3452 */
48ffc236 3453 atomic_clear_long(pte, PG_M);
c8fe38ae 3454 } else {
48ffc236 3455 atomic_clear_long(pte, bit);
c8fe38ae
MD
3456 }
3457 }
3458 }
3459 pmap_inval_flush(&info);
3460 crit_exit();
d7f50089
YY
3461}
3462
3463/*
3464 * pmap_page_protect:
3465 *
3466 * Lower the permission for all mappings to a given page.
3467 */
3468void
3469pmap_page_protect(vm_page_t m, vm_prot_t prot)
3470{
48ffc236 3471 /* JG NX support? */
c8fe38ae
MD
3472 if ((prot & VM_PROT_WRITE) == 0) {
3473 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) {
3474 pmap_clearbit(m, PG_RW);
3475 vm_page_flag_clear(m, PG_WRITEABLE);
3476 } else {
3477 pmap_remove_all(m);
3478 }
3479 }
d7f50089
YY
3480}
3481
3482vm_paddr_t
c8fe38ae 3483pmap_phys_address(vm_pindex_t ppn)
d7f50089 3484{
3f3709c3 3485 return (amd64_ptob(ppn));
d7f50089
YY
3486}
3487
3488/*
3489 * pmap_ts_referenced:
3490 *
3491 * Return a count of reference bits for a page, clearing those bits.
3492 * It is not necessary for every reference bit to be cleared, but it
3493 * is necessary that 0 only be returned when there are truly no
3494 * reference bits set.
3495 *
3496 * XXX: The exact number of bits to check and clear is a matter that
3497 * should be tested and standardized at some point in the future for
3498 * optimal aging of shared pages.
3499 */
3500int
3501pmap_ts_referenced(vm_page_t m)
3502{
c8fe38ae
MD
3503 pv_entry_t pv, pvf, pvn;
3504 pt_entry_t *pte;
3505 int rtval = 0;
3506
3507 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3508 return (rtval);
3509
3510 crit_enter();
3511
3512 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3513
3514 pvf = pv;
3515
3516 do {
3517 pvn = TAILQ_NEXT(pv, pv_list);
3518
3519 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3520
3521 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3522
3523 if (!pmap_track_modified(pv->pv_va))
3524 continue;
3525
3526 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3527
3528 if (pte && (*pte & PG_A)) {
3529#ifdef SMP
48ffc236 3530 atomic_clear_long(pte, PG_A);
c8fe38ae 3531#else
48ffc236 3532 atomic_clear_long_nonlocked(pte, PG_A);
c8fe38ae
MD
3533#endif
3534 rtval++;
3535 if (rtval > 4) {
3536 break;
3537 }
3538 }
3539 } while ((pv = pvn) != NULL && pv != pvf);
3540 }
3541 crit_exit();
3542
3543 return (rtval);
d7f50089
YY
3544}
3545
3546/*
3547 * pmap_is_modified:
3548 *
3549 * Return whether or not the specified physical page was modified
3550 * in any physical maps.
3551 */
3552boolean_t
3553pmap_is_modified(vm_page_t m)
3554{
c8fe38ae 3555 return pmap_testbit(m, PG_M);
d7f50089
YY
3556}
3557
3558/*
3559 * Clear the modify bits on the specified physical page.
3560 */
3561void
3562pmap_clear_modify(vm_page_t m)
3563{
c8fe38ae 3564 pmap_clearbit(m, PG_M);
d7f50089
YY
3565}
3566
3567/*
3568 * pmap_clear_reference:
3569 *
3570 * Clear the reference bit on the specified physical page.
3571 */
3572void
3573pmap_clear_reference(vm_page_t m)