SILI - Work around hardware LRAM bugs part 2/2.
[dragonfly.git] / sys / dev / disk / sili / sili.c
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1/*
2 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 *
35 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
36 *
37 * Permission to use, copy, modify, and distribute this software for any
38 * purpose with or without fee is hereby granted, provided that the above
39 * copyright notice and this permission notice appear in all copies.
40 *
41 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
42 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
43 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
44 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
45 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
46 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
47 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
48 *
49 *
50 *
51 * $OpenBSD: sili.c,v 1.147 2009/02/16 21:19:07 miod Exp $
52 */
53
54#include "sili.h"
55
56void sili_port_interrupt_enable(struct sili_port *ap);
57void sili_port_interrupt_redisable(struct sili_port *ap);
58void sili_port_interrupt_reenable(struct sili_port *ap);
59
60int sili_load_prb(struct sili_ccb *);
61void sili_unload_prb(struct sili_ccb *);
62static void sili_load_prb_callback(void *info, bus_dma_segment_t *segs,
63 int nsegs, int error);
64void sili_start(struct sili_ccb *);
65int sili_port_softreset(struct sili_port *ap);
66int sili_port_pmprobe(struct sili_port *ap);
67int sili_port_hardreset(struct sili_port *ap, int hard);
68void sili_port_hardstop(struct sili_port *ap);
69void sili_port_listen(struct sili_port *ap);
70
71static void sili_ata_cmd_timeout_unserialized(void *);
72static int sili_core_timeout(struct sili_ccb *ccb);
73void sili_quick_timeout(struct sili_ccb *ccb);
74void sili_check_active_timeouts(struct sili_port *ap);
75
4383d440 76#if 0
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77void sili_beg_exclusive_access(struct sili_port *ap, struct ata_port *at);
78void sili_end_exclusive_access(struct sili_port *ap, struct ata_port *at);
4383d440 79#endif
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80void sili_issue_pending_commands(struct sili_port *ap, struct sili_ccb *ccb);
81
82int sili_port_read_ncq_error(struct sili_port *, int);
83
84struct sili_dmamem *sili_dmamem_alloc(struct sili_softc *, bus_dma_tag_t tag);
85void sili_dmamem_free(struct sili_softc *, struct sili_dmamem *);
86static void sili_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
87
88static void sili_dummy_done(struct ata_xfer *xa);
89static void sili_empty_done(struct sili_ccb *ccb);
90static void sili_ata_cmd_done(struct sili_ccb *ccb);
91
92/* Wait for all bits in _b to be cleared */
93#define sili_pwait_clr(_ap, _r, _b) \
94 sili_pwait_eq((_ap), SILI_PWAIT_TIMEOUT, (_r), (_b), 0)
95#define sili_pwait_clr_to(_ap, _to, _r, _b) \
96 sili_pwait_eq((_ap), _to, (_r), (_b), 0)
97
98/* Wait for all bits in _b to be set */
99#define sili_pwait_set(_ap, _r, _b) \
100 sili_pwait_eq((_ap), SILI_PWAIT_TIMEOUT, (_r), (_b), (_b))
101#define sili_pwait_set_to(_ap, _to, _r, _b) \
102 sili_pwait_eq((_ap), _to, (_r), (_b), (_b))
103
104#define SILI_PWAIT_TIMEOUT 1000
105
106/*
107 * Initialize the global SILI hardware. This code does not set up any of
108 * its ports.
109 */
110int
111sili_init(struct sili_softc *sc)
112{
113 DPRINTF(SILI_D_VERBOSE, " GHC 0x%b",
114 sili_read(sc, SILI_REG_GHC), SILI_FMT_GHC);
115
116 /*
117 * Reset the entire chip. This also resets all ports.
118 *
119 * The spec doesn't say anything about how long we have to
120 * wait, so wait 10ms.
121 */
122 sili_write(sc, SILI_REG_GCTL, SILI_REG_GCTL_GRESET);
123 sili_os_sleep(10);
124 sili_write(sc, SILI_REG_GCTL, 0);
125 sili_os_sleep(10);
126
127 return (0);
128}
129
130/*
131 * Allocate and initialize an SILI port.
132 */
133int
134sili_port_alloc(struct sili_softc *sc, u_int port)
135{
136 struct sili_port *ap;
137 struct ata_port *at;
2102f407 138 struct sili_prb *prb;
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139 struct sili_ccb *ccb;
140 int rc = ENOMEM;
141 int error;
142 int i;
143
144 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
145
146 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
147 device_get_name(sc->sc_dev),
148 device_get_unit(sc->sc_dev),
149 port);
150 sc->sc_ports[port] = ap;
151 kprintf("%s: allocate port\n", PORTNAME(ap));
152
153 /*
154 * Allocate enough so we never have to reallocate, it makes
155 * it easier.
156 *
157 * ap_pmcount will be reduced by the scan if we encounter the
158 * port multiplier port prior to target 15.
159 */
160 if (ap->ap_ata == NULL) {
161 ap->ap_ata = kmalloc(sizeof(*ap->ap_ata) * SILI_MAX_PMPORTS,
162 M_DEVBUF, M_INTWAIT | M_ZERO);
163 for (i = 0; i < SILI_MAX_PMPORTS; ++i) {
164 at = &ap->ap_ata[i];
165 at->at_sili_port = ap;
166 at->at_target = i;
167 at->at_probe = ATA_PROBE_NEED_INIT;
168 at->at_features |= ATA_PORT_F_RESCAN;
169 ksnprintf(at->at_name, sizeof(at->at_name),
170 "%s.%d", ap->ap_name, i);
171 }
172 }
173 if (bus_space_subregion(sc->sc_piot, sc->sc_pioh,
174 SILI_PORT_REGION(port), SILI_PORT_SIZE,
175 &ap->ap_ioh) != 0) {
176 device_printf(sc->sc_dev,
177 "unable to create register window for port %d\n",
178 port);
179 goto freeport;
180 }
181
182 ap->ap_sc = sc;
183 ap->ap_num = port;
184 ap->ap_probe = ATA_PROBE_NEED_INIT;
185 TAILQ_INIT(&ap->ap_ccb_free);
186 TAILQ_INIT(&ap->ap_ccb_pending);
187 lockinit(&ap->ap_ccb_lock, "silipo", 0, 0);
188
189 /* Disable port interrupts */
190 sili_pwrite(ap, SILI_PREG_INT_DISABLE, SILI_PREG_INT_MASK);
191
192 /*
193 * Reset the port. This is similar to a Device Reset but far
194 * more invasive. We use Device Reset in our hardreset function.
195 * This function also does the same OOB initialization sequence
196 * that Device Reset does.
197 *
198 * NOTE: SILI_PREG_STATUS_READY will not be asserted unless and until
199 * a device is connected to the port, so we can't use it to
200 * verify that the port exists.
201 */
202 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET);
203 if (sili_pread(ap, SILI_PREG_STATUS) & SILI_PREG_STATUS_READY) {
204 device_printf(sc->sc_dev,
205 "Port %d will not go into reset\n", port);
206 goto freeport;
207 }
208 sili_os_sleep(10);
209 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME);
210 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESET);
211
212 /*
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213 * Adjust FIFO thresholds to improve PCI-e use.
214 */
215 sili_pwrite(ap, SILI_PREG_FIFO_CTL,
216 SILI_PREG_FIFO_CTL_ENCODE(1024, 1024));
217
218 /*
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219 * Allocate the SGE Table
220 */
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221 ap->ap_dmamem_prbs = sili_dmamem_alloc(sc, sc->sc_tag_prbs);
222 if (ap->ap_dmamem_prbs == NULL) {
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223 kprintf("%s: NOSGET\n", PORTNAME(ap));
224 goto freeport;
225 }
226
227 /*
228 * Set up the SGE table base address
229 */
2102f407 230 ap->ap_prbs = (struct sili_prb *)SILI_DMA_KVA(ap->ap_dmamem_prbs);
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231
232 /*
233 * Allocate a CCB for each command slot
234 */
235 ap->ap_ccbs = kmalloc(sizeof(struct sili_ccb) * sc->sc_ncmds, M_DEVBUF,
236 M_WAITOK | M_ZERO);
237 if (ap->ap_ccbs == NULL) {
238 device_printf(sc->sc_dev,
239 "unable to allocate command list for port %d\n",
240 port);
241 goto freeport;
242 }
243
244 /*
245 * Port control register setup.
246 */
247 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_NOAUTOCC);
248 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_32BITDMA |
249 SILI_PREG_CTL_PMA |
250 SILI_PREG_CTL_NOAUTOCC);
251
252 /*
253 * Most structures are in the port BAR. Assign convenient
254 * pointers in the CCBs
255 */
256
257 for (i = 0; i < sc->sc_ncmds; i++) {
258 ccb = &ap->ap_ccbs[i];
259
260 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
261 &ccb->ccb_dmamap);
262 if (error) {
263 device_printf(sc->sc_dev,
264 "unable to create dmamap for port %d "
265 "ccb %d\n", port, i);
266 goto freeport;
267 }
268
269 /*
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270 * WARNING!!! Access to the rfis is only allowed under very
271 * carefully controlled circumstances because it
272 * is located in the LRAM and reading from the
273 * LRAM has hardware issues which can blow the
274 * port up. I kid you not (from Linux, and
275 * verified by testing here).
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276 */
277 callout_init(&ccb->ccb_timeout);
278 ccb->ccb_slot = i;
279 ccb->ccb_port = ap;
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280 ccb->ccb_prb = &ap->ap_prbs[i];
281 ccb->ccb_prb_paddr = SILI_DMA_DVA(ap->ap_dmamem_prbs) +
282 sizeof(*ccb->ccb_prb) * i;
1ac8d5ba 283 ccb->ccb_xa.fis = &ccb->ccb_prb->prb_h2d;
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284 prb = bus_space_kva(ap->ap_sc->sc_iot, ap->ap_ioh,
285 SILI_PREG_LRAM_SLOT(i));
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286 ccb->ccb_prb_lram = prb;
287 /*
288 * Point our rfis to host-memory instead of the LRAM PRB.
289 * It will be copied back if ATA_F_AUTOSENSE is set. The
290 * LRAM PRB is buggy.
291 */
292 /*ccb->ccb_xa.rfis = &prb->prb_d2h;*/
293 ccb->ccb_xa.rfis = (void *)ccb->ccb_xa.fis;
294
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295 ccb->ccb_xa.packetcmd = prb_packet(ccb->ccb_prb);
296 ccb->ccb_xa.tag = i;
297
298 ccb->ccb_xa.state = ATA_S_COMPLETE;
299
300 /*
301 * Reserve CCB[1] as the error CCB. It doesn't matter
302 * which one we use for the Sili controllers.
303 */
304 if (i == 1)
305 ap->ap_err_ccb = ccb;
306 else
307 sili_put_ccb(ccb);
308 }
309 kprintf("%s: start port\n", PORTNAME(ap));
310 sili_os_start_port(ap);
311 return(0);
312freeport:
313 sili_port_free(sc, port);
314 return (rc);
315}
316
317/*
318 * [re]initialize an idle port. No CCBs should be active.
319 *
320 * If at is NULL we are initializing a directly connected port, otherwise
321 * we are indirectly initializing a port multiplier port.
322 *
323 * This function is called during the initial port allocation sequence
324 * and is also called on hot-plug insertion. We take no chances and
325 * use a hardreset instead of a softreset.
326 *
327 * This function is the only way to move a failed port back to active
328 * status.
329 *
330 * Returns 0 if a device is successfully detected.
331 */
332int
333sili_port_init(struct sili_port *ap, struct ata_port *atx)
334{
335 u_int32_t data;
336 int rc;
337
338 /*
339 * Clear all notification bits
340 */
341 if (atx == NULL && (ap->ap_sc->sc_flags & SILI_F_SSNTF))
342 sili_pwrite(ap, SILI_PREG_SNTF, -1);
343
344 /*
345 * Make sure the port is out of continuous COMRESET mode.
346 */
347 data = SILI_PREG_SCTL_SPM_NONE |
348 SILI_PREG_SCTL_IPM_NONE |
349 SILI_PREG_SCTL_SPD_NONE |
350 SILI_PREG_SCTL_DET_NONE;
351 if (SiliForceGen1 & (1 << ap->ap_num)) {
352 data &= ~SILI_PREG_SCTL_SPD_NONE;
353 data |= SILI_PREG_SCTL_SPD_GEN1;
354 }
355 sili_pwrite(ap, SILI_PREG_SCTL, data);
356
357 /*
358 * Hard-reset the port. If a device is detected but it is busy
359 * we try a second time, this time cycling the phy as well.
360 *
361 * XXX note: hard reset mode 2 (cycling the PHY) is not reliable.
362 */
363 if (atx)
364 atx->at_probe = ATA_PROBE_NEED_HARD_RESET;
365 else
366 ap->ap_probe = ATA_PROBE_NEED_HARD_RESET;
367
368 rc = sili_port_reset(ap, atx, 1);
369#if 0
370 rc = sili_port_reset(ap, atx, 1);
371 if (rc == EBUSY) {
372 rc = sili_port_reset(ap, atx, 2);
373 }
374#endif
375
376 switch (rc) {
377 case ENODEV:
378 /*
379 * We had problems talking to the device on the port.
380 */
381 if (atx) {
382 sili_pm_read(ap, atx->at_target,
383 SATA_PMREG_SSTS, &data);
384
385 switch(data & SATA_PM_SSTS_DET) {
386 case SATA_PM_SSTS_DET_DEV_NE:
387 kprintf("%s: Device not communicating\n",
388 ATANAME(ap, atx));
389 break;
390 case SATA_PM_SSTS_DET_PHYOFFLINE:
391 kprintf("%s: PHY offline\n",
392 ATANAME(ap, atx));
393 break;
394 default:
395 kprintf("%s: No device detected\n",
396 ATANAME(ap, atx));
397 break;
398 }
399 } else {
400 data = sili_pread(ap, SILI_PREG_SSTS);
401
402 switch(data & SATA_PM_SSTS_DET) {
403 case SILI_PREG_SSTS_DET_DEV_NE:
404 kprintf("%s: Device not communicating\n",
405 ATANAME(ap, atx));
406 break;
407 case SILI_PREG_SSTS_DET_OFFLINE:
408 kprintf("%s: PHY offline\n",
409 ATANAME(ap, atx));
410 break;
411 default:
412 kprintf("%s: No device detected\n",
413 ATANAME(ap, atx));
414 break;
415 }
416 }
417 break;
418
419 case EBUSY:
420 /*
421 * The device on the port is still telling us its busy,
422 * which means that it is not properly handling a SATA
423 * port COMRESET.
424 *
425 * It may be possible to softreset the device using CLO
426 * and a device reset command.
427 */
428 if (atx) {
429 kprintf("%s: Device on port is bricked, giving up\n",
430 ATANAME(ap, atx));
431 } else {
432 kprintf("%s: Device on port is bricked, "
433 "trying softreset\n", PORTNAME(ap));
434
435 rc = sili_port_reset(ap, atx, 0);
436 if (rc) {
437 kprintf("%s: Unable unbrick device\n",
438 PORTNAME(ap));
439 } else {
440 kprintf("%s: Successfully unbricked\n",
441 PORTNAME(ap));
442 }
443 }
444 break;
445
446 default:
447 break;
448 }
449
450 /*
451 * Command transfers can only be enabled if a device was successfully
452 * detected.
453 *
454 * Allocate or deallocate the ap_ata array here too.
455 */
456 if (atx == NULL) {
457 switch(ap->ap_type) {
458 case ATA_PORT_T_NONE:
459 ap->ap_pmcount = 0;
460 break;
461 case ATA_PORT_T_PM:
462 /* already set */
463 break;
464 default:
465 ap->ap_pmcount = 1;
466 break;
467 }
468 }
469
470 /*
471 * Flush interrupts on the port. XXX
472 *
473 * Enable interrupts on the port whether a device is sitting on
474 * it or not, to handle hot-plug events.
475 */
476 if (atx == NULL) {
477#if 0
478 sili_pwrite(ap, SILI_PREG_IS, sili_pread(ap, SILI_PREG_IS));
479 sili_write(ap->ap_sc, SILI_REG_IS, 1 << ap->ap_num);
480#endif
481 sili_port_interrupt_enable(ap);
482 }
483 return(rc);
484}
485
486/*
487 * Handle an errored port. This routine is called when the only
488 * commands left on the queue are expired, meaning we can safely
489 * go through a port init to clear its state.
490 *
491 * We complete the expired CCBs and then restart the queue.
492 */
493static
494void
495sili_port_reinit(struct sili_port *ap)
496{
497 struct sili_ccb *ccb;
498 struct ata_port *at;
499 int slot;
500 int target;
501 u_int32_t data;
502 int reentrant;
503
504 reentrant = (ap->ap_flags & AP_F_ERR_CCB_RESERVED) ? 1 : 0;
505
506 kprintf("%s: PORT REINIT AFTER ERROR reentrant=%d\n",
507 PORTNAME(ap), reentrant);
508
509 /*
510 * Clear port resume, clear bits 16:13 in the port device status
511 * register. This is from the data sheet.
512 *
513 * Data sheet does not specify a delay but it seems prudent.
514 */
515 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME);
516 sili_os_sleep(10);
517 for (target = 0; target < SILI_MAX_PMPORTS; ++target) {
518 data = sili_pread(ap, SILI_PREG_PM_STATUS(target));
519 data &= ~(SILI_PREG_PM_STATUS_SERVICE |
520 SILI_PREG_PM_STATUS_LEGACY |
521 SILI_PREG_PM_STATUS_NATIVE |
522 SILI_PREG_PM_STATUS_VBSY);
523 sili_pwrite(ap, SILI_PREG_PM_STATUS(target), data);
524 sili_pwrite(ap, SILI_PREG_PM_QACTIVE(target), 0);
525 }
526
527 /*
528 * Issue a Port Initialize and wait for it to clear. This flushes
529 * commands but does not reset the port. Then wait for port ready.
530 */
531 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_INIT);
532 if (sili_pwait_clr(ap, SILI_PREG_STATUS, SILI_PREG_CTL_INIT)) {
533 kprintf("%s: Unable to reinit, port failed\n",
534 PORTNAME(ap));
535 }
536 if (sili_pwait_set(ap, SILI_PREG_STATUS, SILI_PREG_STATUS_READY)) {
537 kprintf("%s: Unable to reinit, port will not come ready\n",
538 PORTNAME(ap));
539 }
540
541 /*
542 * Read the LOG ERROR page for targets that returned a specific
543 * D2H FIS with ERR set.
544 */
545 if (reentrant == 0) {
546 for (target = 0; target < SILI_MAX_PMPORTS; ++target) {
547 at = &ap->ap_ata[target];
548 if (at->at_features & ATA_PORT_F_READLOG) {
549 kprintf("%s: READ LOG ERROR PAGE\n",
550 ATANAME(ap, at));
551 at->at_features &= ~ATA_PORT_F_READLOG;
552 sili_port_read_ncq_error(ap, target);
553 }
554 }
555 }
556
557 /*
558 * Finally clean out the expired commands, we've probed the error
559 * status (or hopefully probed the error status). Well, ok,
560 * we probably didn't XXX.
561 */
562 while (ap->ap_expired) {
563 slot = ffs(ap->ap_expired) - 1;
564 ap->ap_expired &= ~(1 << slot);
565 KKASSERT(ap->ap_active & (1 << slot));
566 ap->ap_active &= ~(1 << slot);
567 --ap->ap_active_cnt;
568 ccb = &ap->ap_ccbs[slot];
569 ccb->ccb_xa.state = ATA_S_TIMEOUT;
570 kprintf("%s: reinit: kill slot %d\n",
571 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot);
572 ccb->ccb_done(ccb);
573 ccb->ccb_xa.complete(&ccb->ccb_xa);
574 }
575
576 /*
577 * Wow. All done. We can get the port moving again.
578 */
579 if (reentrant) {
580 kprintf("%s: reinit called reentrantly, skip end\n",
581 PORTNAME(ap));
582 } else if (ap->ap_probe == ATA_PROBE_FAILED) {
583 kprintf("%s: reinit failed, port is dead\n", PORTNAME(ap));
584 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) {
585 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
586 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED;
587 ccb->ccb_xa.state = ATA_S_TIMEOUT;
588 ccb->ccb_done(ccb);
589 ccb->ccb_xa.complete(&ccb->ccb_xa);
590 }
591 } else {
592 kprintf("%s: reinit succeeded probe=%d type=%d\n", PORTNAME(ap), ap->ap_probe, ap->ap_type);
593 sili_issue_pending_commands(ap, NULL);
594 }
595 return;
596}
597
598/*
599 * Enable or re-enable interrupts on a port.
600 *
601 * This routine is called from the port initialization code or from the
602 * helper thread as the real interrupt may be forced to turn off certain
603 * interrupt sources.
604 */
605void
606sili_port_interrupt_enable(struct sili_port *ap)
607{
608 u_int32_t data;
609
610 data = SILI_PREG_INT_CCOMPLETE | SILI_PREG_INT_CERROR |
611 SILI_PREG_INT_PHYRDYCHG | SILI_PREG_INT_DEVEXCHG |
612 SILI_PREG_INT_DECODE | SILI_PREG_INT_CRC |
613 SILI_PREG_INT_HANDSHK | SILI_PREG_INT_PMCHANGE;
614 if (ap->ap_sc->sc_flags & SILI_F_SSNTF)
615 data |= SILI_PREG_INT_SDB;
616 sili_pwrite(ap, SILI_PREG_INT_ENABLE, data);
617}
618
619void
620sili_port_interrupt_redisable(struct sili_port *ap)
621{
622 u_int32_t data;
623
624 data = sili_read(ap->ap_sc, SILI_REG_GCTL);
625 data &= SILI_REG_GINT_PORTMASK;
626 data &= ~(1 << ap->ap_num);
627 sili_write(ap->ap_sc, SILI_REG_GCTL, data);
628}
629
630void
631sili_port_interrupt_reenable(struct sili_port *ap)
632{
633 u_int32_t data;
634
635 data = sili_read(ap->ap_sc, SILI_REG_GCTL);
636 data &= SILI_REG_GINT_PORTMASK;
637 data |= (1 << ap->ap_num);
638 sili_write(ap->ap_sc, SILI_REG_GCTL, data);
639}
640
641/*
642 * Run the port / target state machine from a main context.
643 *
644 * The state machine for the port is always run.
645 *
646 * If atx is non-NULL run the state machine for a particular target.
647 * If atx is NULL run the state machine for all targets.
648 */
649void
650sili_port_state_machine(struct sili_port *ap, int initial)
651{
652 struct ata_port *at;
653 u_int32_t data;
654 int target;
655 int didsleep;
656 int loop;
657
658 /*
659 * State machine for port. Note that CAM is not yet associated
660 * during the initial parallel probe and the port's probe state
661 * will not get past ATA_PROBE_NEED_IDENT.
662 */
663 {
664 if (initial == 0 && ap->ap_probe <= ATA_PROBE_NEED_HARD_RESET) {
665 kprintf("%s: Waiting 10 seconds on insertion\n",
666 PORTNAME(ap));
667 sili_os_sleep(10000);
668 initial = 1;
669 }
670 if (ap->ap_probe == ATA_PROBE_NEED_INIT)
671 sili_port_init(ap, NULL);
672 if (ap->ap_probe == ATA_PROBE_NEED_HARD_RESET)
673 sili_port_reset(ap, NULL, 1);
674 if (ap->ap_probe == ATA_PROBE_NEED_SOFT_RESET)
675 sili_port_reset(ap, NULL, 0);
676 if (ap->ap_probe == ATA_PROBE_NEED_IDENT)
677 sili_cam_probe(ap, NULL);
678 }
679 if (ap->ap_type != ATA_PORT_T_PM) {
680 if (ap->ap_probe == ATA_PROBE_FAILED) {
681 sili_cam_changed(ap, NULL, 0);
682 } else if (ap->ap_probe >= ATA_PROBE_NEED_IDENT) {
683 sili_cam_changed(ap, NULL, 1);
684 }
685 return;
686 }
687
688 /*
689 * Port Multiplier state machine.
690 *
691 * Get a mask of changed targets and combine with any runnable
692 * states already present.
693 */
694 for (loop = 0; ;++loop) {
695 if (sili_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) {
696 kprintf("%s: PM unable to read hot-plug bitmap\n",
697 PORTNAME(ap));
698 break;
699 }
700
701 /*
702 * Do at least one loop, then stop if no more state changes
703 * have occured. The PM might not generate a new
704 * notification until we clear the entire bitmap.
705 */
706 if (loop && data == 0)
707 break;
708
709 /*
710 * New devices showing up in the bitmap require some spin-up
711 * time before we start probing them. Reset didsleep. The
712 * first new device we detect will sleep before probing.
713 *
714 * This only applies to devices whos change bit is set in
715 * the data, and does not apply to the initial boot-time
716 * probe.
717 */
718 didsleep = 0;
719
720 for (target = 0; target < ap->ap_pmcount; ++target) {
721 at = &ap->ap_ata[target];
722
723 /*
724 * Check the target state for targets behind the PM
725 * which have changed state. This will adjust
726 * at_probe and set ATA_PORT_F_RESCAN
727 *
728 * We want to wait at least 10 seconds before probing
729 * a newly inserted device. If the check status
730 * indicates a device is present and in need of a
731 * hard reset, we make sure we have slept before
732 * continuing.
733 *
734 * We also need to wait at least 1 second for the
735 * PHY state to change after insertion, if we
736 * haven't already waited the 10 seconds.
737 *
738 * NOTE: When pm_check_good finds a good port it
739 * typically starts us in probe state
740 * NEED_HARD_RESET rather than INIT.
741 */
742 if (data & (1 << target)) {
743 if (initial == 0 && didsleep == 0)
744 sili_os_sleep(1000);
745 sili_pm_check_good(ap, target);
746 if (initial == 0 && didsleep == 0 &&
747 at->at_probe <= ATA_PROBE_NEED_HARD_RESET
748 ) {
749 didsleep = 1;
750 kprintf("%s: Waiting 10 seconds on insertion\n", PORTNAME(ap));
751 sili_os_sleep(10000);
752 }
753 }
754
755 /*
756 * Report hot-plug events before the probe state
757 * really gets hot. Only actual events are reported
758 * here to reduce spew.
759 */
760 if (data & (1 << target)) {
761 kprintf("%s: HOTPLUG (PM) - ", ATANAME(ap, at));
762 switch(at->at_probe) {
763 case ATA_PROBE_NEED_INIT:
764 case ATA_PROBE_NEED_HARD_RESET:
765 kprintf("Device inserted\n");
766 break;
767 case ATA_PROBE_FAILED:
768 kprintf("Device removed\n");
769 break;
770 default:
771 kprintf("Device probe in progress\n");
772 break;
773 }
774 }
775
776 /*
777 * Run through the state machine as necessary if
778 * the port is not marked failed.
779 *
780 * The state machine may stop at NEED_IDENT if
781 * CAM is not yet attached.
782 *
783 * Acquire exclusive access to the port while we
784 * are doing this. This prevents command-completion
785 * from queueing commands for non-polled targets
786 * inbetween our probe steps. We need to do this
787 * because the reset probes can generate severe PHY
788 * and protocol errors and soft-brick the port.
789 */
790 if (at->at_probe != ATA_PROBE_FAILED &&
791 at->at_probe != ATA_PROBE_GOOD) {
4383d440 792#if 0
1ac8d5ba 793 sili_beg_exclusive_access(ap, at);
4383d440 794#endif
1ac8d5ba
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795 if (at->at_probe == ATA_PROBE_NEED_INIT)
796 sili_port_init(ap, at);
797 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET)
798 sili_port_reset(ap, at, 1);
799 if (at->at_probe == ATA_PROBE_NEED_SOFT_RESET)
800 sili_port_reset(ap, at, 0);
801 if (at->at_probe == ATA_PROBE_NEED_IDENT)
802 sili_cam_probe(ap, at);
4383d440 803#if 0
1ac8d5ba 804 sili_end_exclusive_access(ap, at);
4383d440 805#endif
1ac8d5ba
MD
806 }
807
808 /*
809 * Add or remove from CAM
810 */
811 if (at->at_features & ATA_PORT_F_RESCAN) {
812 at->at_features &= ~ATA_PORT_F_RESCAN;
813 if (at->at_probe == ATA_PROBE_FAILED) {
814 sili_cam_changed(ap, at, 0);
815 } else if (at->at_probe >= ATA_PROBE_NEED_IDENT) {
816 sili_cam_changed(ap, at, 1);
817 }
818 }
819 data &= ~(1 << target);
820 }
821 if (data) {
822 kprintf("%s: WARNING (PM): extra bits set in "
823 "EINFO: %08x\n", PORTNAME(ap), data);
824 while (target < SILI_MAX_PMPORTS) {
825 sili_pm_check_good(ap, target);
826 ++target;
827 }
828 }
829 }
830}
831
832/*
833 * De-initialize and detach a port.
834 */
835void
836sili_port_free(struct sili_softc *sc, u_int port)
837{
838 struct sili_port *ap = sc->sc_ports[port];
839 struct sili_ccb *ccb;
840
841 /*
842 * Ensure port is disabled and its interrupts are all flushed.
843 */
844 if (ap->ap_sc) {
845 sili_os_stop_port(ap);
846 sili_pwrite(ap, SILI_PREG_INT_DISABLE, SILI_PREG_INT_MASK);
847 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET);
848 sili_write(ap->ap_sc, SILI_REG_GCTL,
849 sili_read(ap->ap_sc, SILI_REG_GCTL) &
850 ~SILI_REG_GINT_PORTST(ap->ap_num));
851 }
852
853 if (ap->ap_ccbs) {
854 while ((ccb = sili_get_ccb(ap)) != NULL) {
855 if (ccb->ccb_dmamap) {
856 bus_dmamap_destroy(sc->sc_tag_data,
857 ccb->ccb_dmamap);
858 ccb->ccb_dmamap = NULL;
859 }
860 }
861 if ((ccb = ap->ap_err_ccb) != NULL) {
862 if (ccb->ccb_dmamap) {
863 bus_dmamap_destroy(sc->sc_tag_data,
864 ccb->ccb_dmamap);
865 ccb->ccb_dmamap = NULL;
866 }
867 ap->ap_err_ccb = NULL;
868 }
869 kfree(ap->ap_ccbs, M_DEVBUF);
870 ap->ap_ccbs = NULL;
871 }
872
2102f407
MD
873 if (ap->ap_dmamem_prbs) {
874 sili_dmamem_free(sc, ap->ap_dmamem_prbs);
875 ap->ap_dmamem_prbs = NULL;
1ac8d5ba
MD
876 }
877 if (ap->ap_ata) {
878 kfree(ap->ap_ata, M_DEVBUF);
879 ap->ap_ata = NULL;
880 }
881
882 /* bus_space(9) says we dont free the subregions handle */
883
884 kfree(ap, M_DEVBUF);
885 sc->sc_ports[port] = NULL;
886}
887
888/*
889 * Reset a port.
890 *
891 * If hard is 0 perform a softreset of the port.
892 * If hard is 1 perform a hard reset of the port.
893 * If hard is 2 perform a hard reset of the port and cycle the phy.
894 *
895 * If at is non-NULL an indirect port via a port-multiplier is being
896 * reset, otherwise a direct port is being reset.
897 *
898 * NOTE: Indirect ports can only be soft-reset.
899 */
900int
901sili_port_reset(struct sili_port *ap, struct ata_port *at, int hard)
902{
903 int rc;
904
905 if (hard) {
906 if (at)
907 rc = sili_pm_hardreset(ap, at->at_target, hard);
908 else
909 rc = sili_port_hardreset(ap, hard);
910 } else {
911 if (at)
912 rc = sili_pm_softreset(ap, at->at_target);
913 else
914 rc = sili_port_softreset(ap);
915 }
916 return(rc);
917}
918
919/*
920 * SILI soft reset, Section 10.4.1
921 *
922 * (at) will be NULL when soft-resetting a directly-attached device, and
923 * non-NULL when soft-resetting a device through a port multiplier.
924 *
925 * This function keeps port communications intact and attempts to generate
926 * a reset to the connected device using device commands.
927 */
928int
929sili_port_softreset(struct sili_port *ap)
930{
931 struct sili_ccb *ccb = NULL;
932 struct sili_prb *prb;
933 int error;
934 u_int32_t sig;
935
936 error = EIO;
937
938 kprintf("%s: START SOFTRESET\n", PORTNAME(ap));
939
940 DPRINTF(SILI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
941
942 crit_enter();
943 ap->ap_state = AP_S_NORMAL;
944
945 /*
946 * Prep the special soft-reset SII command.
947 */
948 ccb = sili_get_err_ccb(ap);
949 ccb->ccb_done = sili_empty_done;
4383d440 950 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_AUTOSENSE | ATA_F_EXCLUSIVE;
1ac8d5ba
MD
951 ccb->ccb_xa.complete = sili_dummy_done;
952 ccb->ccb_xa.at = NULL;
953
954 prb = ccb->ccb_prb;
955 bzero(&prb->prb_h2d, sizeof(prb->prb_h2d));
956 prb->prb_h2d.flags = 0;
957 prb->prb_control = SILI_PRB_CTRL_SOFTRESET;
958 prb->prb_override = 0;
959
960 ccb->ccb_xa.state = ATA_S_PENDING;
961 ccb->ccb_xa.flags = 0;
962
963 /* XXX */
964 if (sili_poll(ccb, 8000, sili_quick_timeout) != ATA_S_COMPLETE) {
965 kprintf("%s: First FIS failed\n", PORTNAME(ap));
966 goto err;
967 }
968
969 sig = (prb->prb_d2h.lba_high << 24) |
970 (prb->prb_d2h.lba_mid << 16) |
971 (prb->prb_d2h.lba_low << 8) |
972 (prb->prb_d2h.sector_count);
973 kprintf("%s: SOFTRESET SIGNATURE %08x\n", PORTNAME(ap), sig);
974
975 /*
976 * If the softreset is trying to clear a BSY condition after a
977 * normal portreset we assign the port type.
978 *
979 * If the softreset is being run first as part of the ccb error
980 * processing code then report if the device signature changed
981 * unexpectedly.
982 */
983 if (ap->ap_type == ATA_PORT_T_NONE) {
984 ap->ap_type = sili_port_signature(ap, NULL, sig);
985 } else {
986 if (sili_port_signature(ap, NULL, sig) != ap->ap_type) {
987 kprintf("%s: device signature unexpectedly "
988 "changed\n", PORTNAME(ap));
989 error = EBUSY; /* XXX */
990 }
991 }
992 error = 0;
993err:
994 if (ccb != NULL) {
995 sili_put_err_ccb(ccb);
996 }
997
998 /*
999 * If we failed to softreset make the port quiescent, otherwise
1000 * make sure the port's start/stop state matches what it was on
1001 * entry.
1002 *
1003 * Don't kill the port if the softreset is on a port multiplier
1004 * target, that would kill all the targets!
1005 */
1006 kprintf("%s: END SOFTRESET %d prob=%d state=%d\n", PORTNAME(ap), error, ap->ap_probe, ap->ap_state);
1007 if (error) {
1008 sili_port_hardstop(ap);
1009 /* ap_probe set to failed */
1010 } else {
1011 ap->ap_probe = ATA_PROBE_NEED_IDENT;
1012 }
1013 crit_exit();
1014
1015 if (bootverbose)
1016 kprintf("%s: END SOFTRESET\n", PORTNAME(ap));
1017
1018 return (error);
1019}
1020
1021/*
1022 * SILI port reset, Section 10.4.2
1023 *
1024 * This function does a hard reset of the port. Note that the device
1025 * connected to the port could still end-up hung.
1026 */
1027int
1028sili_port_hardreset(struct sili_port *ap, int hard)
1029{
1030 u_int32_t r;
1031 int error;
1032 int loop;
1033
1034 DPRINTF(SILI_D_VERBOSE, "%s: port reset\n", PORTNAME(ap));
1035
1036 ap->ap_state = AP_S_NORMAL;
1037 error = 0;
1038
1039 /*
1040 * Issue Device Reset.
1041 *
1042 * NOTE: Unlike Port Reset, the port ready signal will not
1043 * go active unless a device is established to be on
1044 * the port.
1045 */
1046 sili_pwrite(ap, SILI_PREG_SERR, -1);
1047 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA);
1048 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME);
1049 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_DEVRESET);
1050 if (sili_pwait_clr(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_DEVRESET)) {
1051 kprintf("%s: hardreset failed to clear\n", PORTNAME(ap));
1052 }
1053
1054 /*
1055 * Try to determine if there is a device on the port.
1056 *
1057 * Give the device 3/10 second to at least be detected.
1058 */
1059 loop = 300;
1060 while (loop > 0) {
1061 r = sili_pread(ap, SILI_PREG_SSTS);
1062 if (r & SILI_PREG_SSTS_DET)
1063 break;
1064 loop -= sili_os_softsleep();
1065 }
1066 if (loop <= 0) {
1067 if (bootverbose) {
1068 kprintf("%s: Port appears to be unplugged\n",
1069 PORTNAME(ap));
1070 }
1071 error = ENODEV;
1072 }
1073
1074 /*
1075 * There is something on the port. Give the device 3 seconds
1076 * to fully negotiate.
1077 */
1078 if (error == 0 &&
1079 sili_pwait_eq(ap, 3000, SILI_PREG_SSTS,
1080 SILI_PREG_SSTS_DET, SILI_PREG_SSTS_DET_DEV)) {
1081 if (bootverbose) {
1082 kprintf("%s: Device may be powered down\n",
1083 PORTNAME(ap));
1084 }
1085 error = ENODEV;
1086 }
1087
1088 /*
1089 * Wait for the port to become ready.
1090 *
1091 * This can take more then a second, give it 3 seconds. If we
1092 * succeed give the device another 3ms after that.
1093 *
1094 * NOTE: Port multipliers can do two things here. First they can
1095 * return device-ready if a device is on target 0 and also
1096 * return the signature for that device. If there is no
1097 * device on target 0 then BSY/DRQ is never cleared and
1098 * it never comes ready.
1099 */
1100 if (error == 0 && sili_pwait_set_to(ap, 3000, SILI_PREG_STATUS,
1101 SILI_PREG_STATUS_READY)) {
1102 /*
1103 * The device is bricked or its a port multiplier and will
1104 * not unbusy until we do the pmprobe CLO softreset sequence.
1105 */
1106 error = sili_port_pmprobe(ap);
1107 if (error) {
1108 kprintf("%s: Device will not come ready\n",
1109 PORTNAME(ap));
1110 } else {
1111 ap->ap_type = ATA_PORT_T_PM;
1112 }
1113 } else if (error == 0) {
1114 /*
1115 * The sili's hardreset doesn't return a signature (does it)?
1116 * In anycase, set the type so the signature gets set by
1117 * the softreset stage.
1118 */
1119 error = sili_port_pmprobe(ap);
1120 if (error) {
1121 ap->ap_type = ATA_PORT_T_NONE;
1122 error = 0;
1123 } else {
1124 ap->ap_type = ATA_PORT_T_PM;
1125 kprintf("%s: Port multiplier detected\n",
1126 PORTNAME(ap));
1127 }
1128 }
1129
1130 /*
1131 * hard-stop the port if we failed. This will set ap_probe
1132 * to FAILED.
1133 */
1134 if (error) {
1135 sili_port_hardstop(ap);
1136 /* ap_probe set to failed */
1137 } else {
1138 if (ap->ap_type == ATA_PORT_T_PM)
1139 ap->ap_probe = ATA_PROBE_GOOD;
1140 else
1141 ap->ap_probe = ATA_PROBE_NEED_SOFT_RESET;
1142 }
1143 return (error);
1144}
1145
1146/*
1147 * SILI port multiplier probe. This routine is run by the hardreset code
1148 * if it gets past the device detect.
1149 *
1150 * All we do here is call sili_pm_softreset(). The Sili chip does all the
1151 * hard work for us.
1152 *
1153 * Return 0 on success, non-zero on failure.
1154 */
1155int
1156sili_port_pmprobe(struct sili_port *ap)
1157{
1158 struct ata_port *at;
1159 int error;
1160 int i;
1161
1162 /*
1163 * If we don't support port multipliers don't try to detect one.
1164 */
1165 if ((ap->ap_sc->sc_flags & SILI_F_SPM) == 0)
1166 return (ENODEV);
1167
1168 /*
1169 * The port may be unhappy from its hardreset if there's a PM
1170 * but no device at target 0. If we try to shove the softreset
1171 * for target 15 down its throat it will pop a gasket.
1172 *
1173 * Reiniting the port.. kind of a soft reset of its command
1174 * processor which otherwise does not effect the port registers,
1175 * seems to fix the problem.
1176 */
1177 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_PMA);
1178 sili_port_reinit(ap);
1179 ap->ap_state = AP_S_NORMAL;
1180 error = sili_pm_softreset(ap, 15);
1181 if (error == 0) {
1182 ap->ap_ata[15].at_probe = ATA_PROBE_GOOD;
1183 } else {
1184 error = EBUSY;
1185 }
1186
1187 kprintf("PMPROBE3 %d\n", error);
1188
1189 if (error == 0 && sili_pm_identify(ap)) {
1190 kprintf("%s: PM - cannot identify port multiplier\n",
1191 PORTNAME(ap));
1192 error = EBUSY;
1193 }
1194 kprintf("PMPROBE3 %d %d %d\n", error, ap->ap_probe, ap->ap_state);
1195
1196 /*
1197 * If we probed the PM reset the state for the targets behind
1198 * it so they get probed by the state machine.
1199 */
1200 if (error == 0) {
1201 for (i = 0; i < SILI_MAX_PMPORTS; ++i) {
1202 at = &ap->ap_ata[i];
1203 at->at_probe = ATA_PROBE_NEED_INIT;
1204 at->at_features |= ATA_PORT_F_RESCAN;
1205 at->at_features &= ~ATA_PORT_F_READLOG;
1206 }
1207 }
1208
1209 /*
1210 * If we failed turn off PMA, otherwise identify the port multiplier.
1211 * CAM will iterate the devices.
1212 */
1213 if (error)
1214 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA);
1215 return(error);
1216}
1217
1218/*
1219 * Hard-stop on hot-swap device removal. See 10.10.1
1220 *
1221 * Place the port in a mode that will allow it to detect hot-swap insertions.
1222 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't
1223 * seem to do the job.
1224 */
1225void
1226sili_port_hardstop(struct sili_port *ap)
1227{
1228 struct sili_ccb *ccb;
1229 struct ata_port *at;
1230 int i;
1231 int slot;
1232
1233 ap->ap_state = AP_S_FATAL_ERROR;
1234 ap->ap_probe = ATA_PROBE_FAILED;
1235 ap->ap_type = ATA_PORT_T_NONE;
1236
1237 /*
1238 * Clean up AT sub-ports on SATA port.
1239 */
1240 for (i = 0; ap->ap_ata && i < SILI_MAX_PMPORTS; ++i) {
1241 at = &ap->ap_ata[i];
1242 at->at_type = ATA_PORT_T_NONE;
1243 at->at_probe = ATA_PROBE_FAILED;
1244 at->at_features &= ~ATA_PORT_F_READLOG;
1245 }
1246
1247 /*
1248 * Kill the port. Don't bother waiting for it to transition
1249 * back up.
1250 */
1251 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET);
1252 if (sili_pread(ap, SILI_PREG_STATUS) & SILI_PREG_STATUS_READY) {
1253 kprintf("%s: Port will not go into reset\n",
1254 PORTNAME(ap));
1255 }
1256 sili_os_sleep(10);
1257 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME);
1258 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESET);
1259
1260 /*
1261 * Turn off port-multiplier control bit
1262 */
1263 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA);
1264
1265 /*
1266 * Clean up the command list.
1267 */
1268 while (ap->ap_active) {
1269 slot = ffs(ap->ap_active) - 1;
1270 ap->ap_active &= ~(1 << slot);
1271 ap->ap_expired &= ~(1 << slot);
1272 --ap->ap_active_cnt;
1273 ccb = &ap->ap_ccbs[slot];
1274 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) {
1275 callout_stop(&ccb->ccb_timeout);
1276 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
1277 }
1278 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED |
1279 ATA_F_TIMEOUT_EXPIRED);
1280 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1281 ccb->ccb_done(ccb);
1282 ccb->ccb_xa.complete(&ccb->ccb_xa);
1283 }
1284 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) {
1285 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1286 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1287 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED;
1288 ccb->ccb_done(ccb);
1289 ccb->ccb_xa.complete(&ccb->ccb_xa);
1290 }
1291 KKASSERT(ap->ap_active_cnt == 0);
1292
1293 /*
1294 * Put the port into a listen mode, we want to get insertion/removal
1295 * events.
1296 */
1297 sili_port_listen(ap);
1298}
1299
1300/*
1301 * Place port into a listen mode for hotplug events only. The port has
1302 * already been reset and the command processor may not be ready due
1303 * to the lack of a device.
1304 */
1305void
1306sili_port_listen(struct sili_port *ap)
1307{
1308 u_int32_t data;
1309
1310#if 1
1311 data = SILI_PREG_SCTL_SPM_NONE |
1312 SILI_PREG_SCTL_IPM_NONE |
1313 SILI_PREG_SCTL_SPD_NONE |
1314 SILI_PREG_SCTL_DET_INIT;
1315 if (SiliForceGen1 & (1 << ap->ap_num)) {
1316 data &= ~SILI_PREG_SCTL_SPD_NONE;
1317 data |= SILI_PREG_SCTL_SPD_GEN1;
1318 }
1319#endif
1320 sili_pwrite(ap, SILI_PREG_SERR, -1);
1321 sili_pwrite(ap, SILI_PREG_INT_ENABLE, SILI_PREG_INT_PHYRDYCHG |
1322 SILI_PREG_INT_DEVEXCHG);
1323}
1324
1325/*
1326 * Figure out what type of device is connected to the port, ATAPI or
1327 * DISK.
1328 */
1329int
1330sili_port_signature(struct sili_port *ap, struct ata_port *at, u_int32_t sig)
1331{
1332 if (bootverbose)
1333 kprintf("%s: sig %08x\n", ATANAME(ap, at), sig);
1334 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
1335 return(ATA_PORT_T_ATAPI);
1336 } else if ((sig & 0xffff0000) ==
1337 (SATA_SIGNATURE_PORT_MULTIPLIER & 0xffff0000)) {
1338 return(ATA_PORT_T_PM);
1339 } else {
1340 return(ATA_PORT_T_DISK);
1341 }
1342}
1343
1344/*
1345 * Load the DMA descriptor table for a CCB's buffer.
1346 *
1347 * NOTE: ATA_F_PIO is auto-selected by sili part.
1348 */
1349int
1350sili_load_prb(struct sili_ccb *ccb)
1351{
1352 struct sili_port *ap = ccb->ccb_port;
1353 struct sili_softc *sc = ap->ap_sc;
1354 struct ata_xfer *xa = &ccb->ccb_xa;
1355 struct sili_prb *prb = ccb->ccb_prb;
1356 struct sili_sge *sge;
1357 bus_dmamap_t dmap = ccb->ccb_dmamap;
1358 int error;
1359
1360 /*
2102f407
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1361 * Set up the PRB. The PRB contains 2 SGE's (1 if it is an ATAPI
1362 * command). The SGE must be set up to link to the rest of our
1363 * SGE array, in blocks of four SGEs (a SGE table) starting at
1ac8d5ba
MD
1364 */
1365 prb->prb_xfer_count = 0;
1366 prb->prb_control = 0;
1367 prb->prb_override = 0;
1368 sge = (ccb->ccb_xa.flags & ATA_F_PACKET) ?
1369 &prb->prb_sge_packet : &prb->prb_sge_normal;
1370 if (xa->datalen == 0) {
1371 sge->sge_flags = SILI_SGE_FLAGS_TRM | SILI_SGE_FLAGS_DRD;
1372 sge->sge_count = 0;
1373 return (0);
1374 }
1375
1376 if (ccb->ccb_xa.flags & ATA_F_READ)
1377 prb->prb_control |= SILI_PRB_CTRL_READ;
1378 if (ccb->ccb_xa.flags & ATA_F_WRITE)
1379 prb->prb_control |= SILI_PRB_CTRL_WRITE;
1380 sge->sge_flags = SILI_SGE_FLAGS_LNK;
1381 sge->sge_count = 0;
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1382 sge->sge_paddr = ccb->ccb_prb_paddr +
1383 offsetof(struct sili_prb, prb_sge[0]);
1ac8d5ba
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1384
1385 /*
2102f407 1386 * Load our sge array.
1ac8d5ba
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1387 */
1388 error = bus_dmamap_load(sc->sc_tag_data, dmap,
1389 xa->data, xa->datalen,
1390 sili_load_prb_callback,
1391 ccb,
1392 ((xa->flags & ATA_F_NOWAIT) ?
1393 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
1394 if (error != 0) {
1395 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
1396 return (1);
1397 }
1398
1399 bus_dmamap_sync(sc->sc_tag_data, dmap,
1400 (xa->flags & ATA_F_READ) ?
1401 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1402
1403 return (0);
1404
1405#ifdef DIAGNOSTIC
1406diagerr:
1407 bus_dmamap_unload(sc->sc_tag_data, dmap);
1408 return (1);
1409#endif
1410}
1411
1412/*
1413 * Callback from BUSDMA system to load the segment list.
1414 *
1415 * The scatter/gather table is loaded by the sili chip in blocks of
1416 * four SGE's. If a continuance is required the last entry in each
1417 * block must point to the next block.
1418 */
1419static
1420void
1421sili_load_prb_callback(void *info, bus_dma_segment_t *segs, int nsegs,
1422 int error)
1423{
1424 struct sili_ccb *ccb = info;
1425 struct sili_sge *sge;
1426 int sgi;
1427
1428 KKASSERT(nsegs <= SILI_MAX_SGET);
1429
1430 sgi = 0;
2102f407 1431 sge = &ccb->ccb_prb->prb_sge[0];
1ac8d5ba
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1432 while (nsegs) {
1433 if ((sgi & 3) == 3) {
2102f407
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1434 sge->sge_paddr = htole64(ccb->ccb_prb_paddr +
1435 offsetof(struct sili_prb,
1436 prb_sge[sgi + 1]));
1ac8d5ba
MD
1437 sge->sge_count = 0;
1438 sge->sge_flags = SILI_SGE_FLAGS_LNK;
1439 } else {
1440 sge->sge_paddr = htole64(segs->ds_addr);
1441 sge->sge_count = htole32(segs->ds_len);
1442 sge->sge_flags = 0;
1443 --nsegs;
1444 ++segs;
1445 }
1446 ++sge;
1447 ++sgi;
1448 }
1449 --sge;
1450 sge->sge_flags |= SILI_SGE_FLAGS_TRM;
1451}
1452
1453void
1454sili_unload_prb(struct sili_ccb *ccb)
1455{
1456 struct sili_port *ap = ccb->ccb_port;
1457 struct sili_softc *sc = ap->ap_sc;
1458 struct ata_xfer *xa = &ccb->ccb_xa;
1459 bus_dmamap_t dmap = ccb->ccb_dmamap;
1460
1461 if (xa->datalen != 0) {
1462 bus_dmamap_sync(sc->sc_tag_data, dmap,
1463 (xa->flags & ATA_F_READ) ?
1464 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1465
1466 bus_dmamap_unload(sc->sc_tag_data, dmap);
1467
1468 if (ccb->ccb_xa.flags & ATA_F_NCQ)
1469 xa->resid = 0;
1470 else
1471 xa->resid = xa->datalen -
1472 le32toh(ccb->ccb_prb->prb_xfer_count);
1473 }
1474}
1475
1476/*
1477 * Start a command and poll for completion.
1478 *
1479 * timeout is in ms and only counts once the command gets on-chip.
1480 *
1481 * Returns ATA_S_* state, compare against ATA_S_COMPLETE to determine
1482 * that no error occured.
1483 *
1484 * NOTE: If the caller specifies a NULL timeout function the caller is
1485 * responsible for clearing hardware state on failure, but we will
1486 * deal with removing the ccb from any pending queue.
1487 *
1488 * NOTE: NCQ should never be used with this function.
1489 *
1490 * NOTE: If the port is in a failed state and stopped we do not try
1491 * to activate the ccb.
1492 */
1493int
1494sili_poll(struct sili_ccb *ccb, int timeout,
1495 void (*timeout_fn)(struct sili_ccb *))
1496{
1497 struct sili_port *ap = ccb->ccb_port;
1498
1499 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) {
1500 ccb->ccb_xa.state = ATA_S_ERROR;
1501 return(ccb->ccb_xa.state);
1502 }
1503
1504 sili_start(ccb);
1505
1506 do {
1507 sili_port_intr(ap, 1);
1508 switch(ccb->ccb_xa.state) {
1509 case ATA_S_ONCHIP:
1510 timeout -= sili_os_softsleep();
1511 break;
1512 case ATA_S_PENDING:
1513 /*
1514 * The packet can get stuck on the pending queue
4383d440 1515 * if the port refuses to come ready. XXX
1ac8d5ba 1516 */
4383d440
MD
1517#if 0
1518 if (xxx AP_F_EXCLUSIVE_ACCESS)
1ac8d5ba
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1519 timeout -= sili_os_softsleep();
1520 else
4383d440 1521#endif
1ac8d5ba
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1522 sili_os_softsleep();
1523 sili_check_active_timeouts(ap);
1524 break;
1525 default:
1526 return (ccb->ccb_xa.state);
1527 }
1528 } while (timeout > 0);
1529
1530 kprintf("%s: Poll timeout slot %d\n",
1531 ATANAME(ap, ccb->ccb_xa.at),
1532 ccb->ccb_slot);
1533
1534 timeout_fn(ccb);
1535
1536 return(ccb->ccb_xa.state);
1537}
1538
1539/*
1540 * When polling we have to check if the currently active CCB(s)
1541 * have timed out as the callout will be deadlocked while we
1542 * hold the port lock.
1543 */
1544void
1545sili_check_active_timeouts(struct sili_port *ap)
1546{
1547 struct sili_ccb *ccb;
1548 u_int32_t mask;
1549 int tag;
1550
1551 mask = ap->ap_active;
1552 while (mask) {
1553 tag = ffs(mask) - 1;
1554 mask &= ~(1 << tag);
1555 ccb = &ap->ap_ccbs[tag];
1556 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_EXPIRED) {
1557 sili_core_timeout(ccb);
1558 }
1559 }
1560}
1561
1562static
1563__inline
1564void
1565sili_start_timeout(struct sili_ccb *ccb)
1566{
1567 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_DESIRED) {
1568 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_RUNNING;
1569 callout_reset(&ccb->ccb_timeout,
1570 (ccb->ccb_xa.timeout * hz + 999) / 1000,
1571 sili_ata_cmd_timeout_unserialized, ccb);
1572 }
1573}
1574
1575void
1576sili_start(struct sili_ccb *ccb)
1577{
1578 struct sili_port *ap = ccb->ccb_port;
1579#if 0
1580 struct sili_softc *sc = ap->ap_sc;
1581#endif
1582
1583 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
1584
1585 /*
1586 * Sync our SGE table and PRB
1587 */
2102f407
MD
1588 bus_dmamap_sync(ap->ap_dmamem_prbs->adm_tag,
1589 ap->ap_dmamem_prbs->adm_map,
1ac8d5ba
MD
1590 BUS_DMASYNC_PREWRITE);
1591
1592 /*
1593 * XXX dmamap for PRB XXX BUS_DMASYNC_PREWRITE
1594 */
1595
1596 /*
1597 * Controller will update shared memory!
1598 * XXX bus_dmamap_sync ... BUS_DMASYNC_PREREAD ...
1599 */
1600 /* Prepare RFIS area for write by controller */
1601
1602 /*
1603 * There's no point trying to optimize this, it only shaves a few
1604 * nanoseconds so just queue the command and call our generic issue.
1605 */
1606 sili_issue_pending_commands(ap, ccb);
1607}
1608
4383d440 1609#if 0
1ac8d5ba
MD
1610/*
1611 * While holding the port lock acquire exclusive access to the port.
1612 *
1613 * This is used when running the state machine to initialize and identify
1614 * targets over a port multiplier. Setting exclusive access prevents
1615 * sili_port_intr() from activating any requests sitting on the pending
1616 * queue.
1617 */
1618void
1619sili_beg_exclusive_access(struct sili_port *ap, struct ata_port *at)
1620{
1621 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) == 0);
1622 ap->ap_flags |= AP_F_EXCLUSIVE_ACCESS;
1623 while (ap->ap_active) {
1624 sili_port_intr(ap, 1);
1625 sili_os_softsleep();
1626 }
1627}
1628
1629void
1630sili_end_exclusive_access(struct sili_port *ap, struct ata_port *at)
1631{
1632 KKASSERT((ap->ap_flags & AP_F_EXCLUSIVE_ACCESS) != 0);
1633 ap->ap_flags &= ~AP_F_EXCLUSIVE_ACCESS;
1634 sili_issue_pending_commands(ap, NULL);
1635}
4383d440 1636#endif
1ac8d5ba
MD
1637
1638/*
1639 * If ccb is not NULL enqueue and/or issue it.
1640 *
1641 * If ccb is NULL issue whatever we can from the queue. However, nothing
1642 * new is issued if the exclusive access flag is set or expired ccb's are
1643 * present.
1644 *
1645 * If existing commands are still active (ap_active) we can only
1646 * issue matching new commands.
1647 */
1648void
1649sili_issue_pending_commands(struct sili_port *ap, struct sili_ccb *ccb)
1650{
1651 /*
1652 * Enqueue the ccb.
1653 *
1654 * If just running the queue and in exclusive access mode we
1655 * just return. Also in this case if there are any expired ccb's
1656 * we want to clear the queue so the port can be safely stopped.
1657 *
1658 * XXX sili chip - expiration needs to be per-target if PM supports
1659 * FBSS?
1660 */
1661 if (ccb) {
1662 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
4383d440 1663 } else if (ap->ap_expired) {
1ac8d5ba
MD
1664 return;
1665 }
1666
1667 /*
1668 * Pull the next ccb off the queue and run it if possible.
1669 * If the port is not ready to accept commands enable the
1670 * ready interrupt instead of starting a new command.
1671 *
1672 * XXX limit ncqdepth for attached devices behind PM
1673 */
1674 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) {
4383d440
MD
1675 /*
1676 * Port may be wedged.
1677 */
1ac8d5ba
MD
1678 if ((sili_pread(ap, SILI_PREG_STATUS) &
1679 SILI_PREG_STATUS_READY) == 0) {
1680 kprintf("%s: slot %d NOT READY\n",
1681 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot);
1682 sili_pwrite(ap, SILI_PREG_INT_ENABLE,
1683 SILI_PREG_INT_READY);
1684 break;
1685 }
4383d440
MD
1686
1687 /*
1688 * Handle exclusivity requirements. ATA_F_EXCLUSIVE is used
1689 * when we may have to access the rfis which is stored in
1690 * the LRAM PRB. Unfortunately reading the LRAM PRB is
1691 * highly problematic, so requests (like PM requests) which
1692 * need to access the rfis use exclusive mode and then
1693 * access the copy made by the port interrupt code back in
1694 * host memory.
1695 */
1696 if (ap->ap_active & ~ap->ap_expired) {
1697 /*
1698 * There may be multiple ccb's already running,
1699 * but there will only be one if it is exclusive.
1700 * We can't queue a new command in that case.
1701 *
1702 * XXX Current AUTOSENSE code forces exclusivity
1703 * to simplify the code.
1704 */
1705 KKASSERT(ap->ap_last_ccb);
1706 KKASSERT(ap->ap_active &
1707 (1 << ap->ap_last_ccb->ccb_slot));
1708 if (ap->ap_last_ccb->ccb_xa.flags &
1709 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) {
1710 break;
1711 }
1712
1713 /*
1714 * If the ccb we want to run is exclusive and ccb's
1715 * are still active on the port, we can't queue it
1716 * yet.
1717 *
1718 * XXX Current AUTOSENSE code forces exclusivity
1719 * to simplify the code.
1720 */
1721 if (ccb->ccb_xa.flags &
1722 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) {
1723 break;
1724 }
1725 }
1726
1ac8d5ba
MD
1727 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1728 ccb->ccb_xa.state = ATA_S_ONCHIP;
1729 ap->ap_active |= 1 << ccb->ccb_slot;
1730 ap->ap_active_cnt++;
4383d440 1731 ap->ap_last_ccb = ccb;
2102f407
MD
1732
1733 /*
1734 * We can't use the CMD_FIFO method because it requires us
1735 * building the PRB in the LRAM, and the LRAM is buggy. So
1736 * we use host memory for the PRB.
1737 */
1738 sili_pwrite(ap, SILI_PREG_CMDACT(ccb->ccb_slot),
1739 (u_int32_t)ccb->ccb_prb_paddr);
1740 sili_pwrite(ap, SILI_PREG_CMDACT(ccb->ccb_slot) + 4,
1741 (u_int32_t)(ccb->ccb_prb_paddr >> 32));
1742 /* sili_pwrite(ap, SILI_PREG_CMD_FIFO, ccb->ccb_slot); */
1ac8d5ba
MD
1743 sili_start_timeout(ccb);
1744 }
1745}
1746
1747void
1748sili_intr(void *arg)
1749{
1750 struct sili_softc *sc = arg;
1751 struct sili_port *ap;
1752 u_int32_t gint;
1753 int port;
1754
1755 /*
1756 * Check if the master enable is up, and whether any interrupts are
1757 * pending.
1758 *
1759 * Clear the ints we got.
1760 */
1761 if ((sc->sc_flags & SILI_F_INT_GOOD) == 0)
1762 return;
1763 gint = sili_read(sc, SILI_REG_GINT);
1764 if (gint == 0 || gint == 0xffffffff)
1765 return;
1766 sili_write(sc, SILI_REG_GINT, gint);
1767
1768 /*
1769 * Process interrupts for each port in a non-blocking fashion.
1770 */
1771 while (gint & SILI_REG_GINT_PORTMASK) {
1772 port = ffs(gint) - 1;
1773 ap = sc->sc_ports[port];
1774 if (ap) {
1775 if (sili_os_lock_port_nb(ap) == 0) {
1776 sili_port_intr(ap, 0);
1777 sili_os_unlock_port(ap);
1778 } else {
1779 sili_port_interrupt_redisable(ap);
1780 sili_os_signal_port_thread(ap, AP_SIGF_PORTINT);
1781 }
1782 }
1783 gint &= ~(1 << port);
1784 }
1785}
1786
1787/*
1788 * Core called from helper thread.
1789 */
1790void
1791sili_port_thread_core(struct sili_port *ap, int mask)
1792{
1793 /*
1794 * Process any expired timedouts.
1795 */
1796 sili_os_lock_port(ap);
1797 if (mask & AP_SIGF_TIMEOUT) {
1798 sili_check_active_timeouts(ap);
1799 }
1800
1801 /*
1802 * Process port interrupts which require a higher level of
1803 * intervention.
1804 */
1805 if (mask & AP_SIGF_PORTINT) {
1806 sili_port_intr(ap, 1);
1807 sili_port_interrupt_reenable(ap);
1808 sili_os_unlock_port(ap);
1809 } else {
1810 sili_os_unlock_port(ap);
1811 }
1812}
1813
1814/*
1815 * Core per-port interrupt handler.
1816 *
1817 * If blockable is 0 we cannot call sili_os_sleep() at all and we can only
1818 * deal with normal command completions which do not require blocking.
1819 */
1820void
1821sili_port_intr(struct sili_port *ap, int blockable)
1822{
1823 struct sili_softc *sc = ap->ap_sc;
1824 u_int32_t is;
1825 int slot;
1826 struct sili_ccb *ccb = NULL;
1827 struct ata_port *ccb_at = NULL;
1828#ifdef DIAGNOSTIC
1829 u_int32_t tmp;
1830#endif
1831 u_int32_t active;
1832 const u_int32_t blockable_mask = SILI_PREG_IST_PHYRDYCHG |
1833 SILI_PREG_IST_DEVEXCHG |
1834 SILI_PREG_IST_CERROR |
1835 SILI_PREG_IST_DECODE |
1836 SILI_PREG_IST_CRC |
1837 SILI_PREG_IST_HANDSHK;
1838 const u_int32_t fatal_mask = SILI_PREG_IST_PHYRDYCHG |
1839 SILI_PREG_IST_DEVEXCHG |
1840 SILI_PREG_IST_DECODE |
1841 SILI_PREG_IST_CRC |
1842 SILI_PREG_IST_HANDSHK;
1843
1844 enum { NEED_NOTHING, NEED_HOTPLUG_INSERT,
1845 NEED_HOTPLUG_REMOVE } need = NEED_NOTHING;
1846
1847 /*
1848 * NOTE: CCOMPLETE was automatically cleared when we read INT_STATUS.
1849 */
1850 is = sili_pread(ap, SILI_PREG_INT_STATUS);
1851 is &= SILI_PREG_IST_MASK;
1852 if (is & SILI_PREG_IST_CCOMPLETE)
1853 sili_pwrite(ap, SILI_PREG_INT_STATUS, SILI_PREG_IST_CCOMPLETE);
1854
1855 /*
1856 * If we can't block then we can't handle these here. Disable
1857 * the interrupts in question so we don't live-lock, the helper
1858 * thread will re-enable them.
1859 *
1860 * If the port is in a completely failed state we do not want
1861 * to drop through to failed-command-processing if blockable is 0,
1862 * just let the thread deal with it all.
1863 *
1864 * Otherwise we fall through and still handle DHRS and any commands
1865 * which completed normally. Even if we are errored we haven't
1866 * stopped the port yet so CI/SACT are still good.
1867 */
1868 if (blockable == 0) {
1869 if (ap->ap_state == AP_S_FATAL_ERROR) {
1870 sili_port_interrupt_redisable(ap);
1871 sili_os_signal_port_thread(ap, AP_SIGF_PORTINT);
1872 /*is &= ~blockable_mask;*/
1873 return;
1874 }
1875 if (is & blockable_mask) {
1876 sili_port_interrupt_redisable(ap);
1877 sili_os_signal_port_thread(ap, AP_SIGF_PORTINT);
1878 /*is &= ~blockable_mask;*/
1879 return;
1880 }
1881 }
1882
1883 if (is & SILI_PREG_IST_CERROR) {
1884 /*
1885 * Command failed (blockable).
1886 *
1887 * This stops command processing. We can extract the PM
1888 * target from the PMP field in SILI_PREG_CONTEXT. The
1889 * tag is not necessarily valid so don't use that.
1890 *
1891 * We must then expire all CCB's for that target and resume
1892 * processing if any other targets have active commands.
1893 * Particular error codes can be recovered by reading the LOG
1894 * page.
1895 *
1896 * The expire handling code will do the rest, which is
1897 * basically to reset the port once the only active
1898 * commands remaining are all expired.
1899 */
1900 u_int32_t error;
1901 int target;
1902 int resume = 1;
1903
1904 target = (sili_pread(ap, SILI_PREG_CONTEXT) >>
1905 SILI_PREG_CONTEXT_PMPORT_SHIFT) &
1906 SILI_PREG_CONTEXT_PMPORT_MASK;
1907 sili_pwrite(ap, SILI_PREG_INT_STATUS, SILI_PREG_IST_CERROR);
1908 active = ap->ap_active & ~ap->ap_expired;
1909 error = sili_pread(ap, SILI_PREG_CERROR);
1910 kprintf("%s.%d target error %d active=%08x hactive=%08x "
1911 "SERR=%b\n",
1912 PORTNAME(ap), target, error,
1913 active, sili_pread(ap, SILI_PREG_SLOTST),
1914 sili_pread(ap, SILI_PREG_SERR), SILI_PFMT_SERR);
1915
1916 while (active) {
1917 slot = ffs(active) - 1;
1918 ccb = &ap->ap_ccbs[slot];
1919 if ((ccb_at = ccb->ccb_xa.at) == NULL)
1920 ccb_at = &ap->ap_ata[0];
1921 if (target == ccb_at->at_target) {
1922 kprintf("%s kill ccb slot %d\n",
1923 ATANAME(ap, ccb->ccb_xa.at), slot);
1924 if (ccb->ccb_xa.flags & ATA_F_NCQ &&
1925 (error == SILI_PREG_CERROR_DEVICE ||
1926 error == SILI_PREG_CERROR_SDBERROR)) {
1927 ccb_at->at_features |= ATA_PORT_F_READLOG;
1928 }
1929 if (sili_core_timeout(ccb) == 0)
1930 resume = 0;
1931 }
1932 active &= ~(1 << slot);
1933 }
1934
1935 /*
1936 * Resume will be 0 if the timeout reinited and restarted
1937 * the port. Otherwise we resume the port to allow other
1938 * commands to complete.
1939 */
1940 kprintf("%s.%d remain=%08x resume=%d\n",
1941 PORTNAME(ap), target,
1942 ap->ap_active & ~ap->ap_expired, resume);
1943 if (resume)
1944 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESUME);
1945 }
1946
1947 /*
1948 * Device notification to us (non-blocking)
1949 *
1950 * This is interrupt status SILIPREG_IST_SDB
1951 *
1952 * NOTE! On some parts notification bits can get set without
1953 * generating an interrupt. It is unclear whether this is
1954 * a bug in the PM (sending a DTOH device setbits with 'N' set
1955 * and 'I' not set), or a bug in the host controller.
1956 *
1957 * It only seems to occur under load.
1958 */
1959 if (sc->sc_flags & SILI_F_SSNTF) {
1960 u_int32_t data;
1961 const char *xstr;
1962
1963 data = sili_pread(ap, SILI_PREG_SNTF);
1964 if (is & SILI_PREG_IST_SDB) {
1965 sili_pwrite(ap, SILI_PREG_INT_STATUS,
1966 SILI_PREG_IST_SDB);
1967 is &= ~SILI_PREG_IST_SDB;
1968 xstr = " (no SDBS!)";
1969 } else {
1970 xstr = "";
1971 }
1972 if (data) {
1973 kprintf("%s: NOTIFY %08x%s\n",
1974 PORTNAME(ap), data, xstr);
1975 sili_pwrite(ap, SILI_PREG_SNTF, data);
1976 sili_cam_changed(ap, NULL, -1);
1977 }
1978 }
1979
1980 /*
1981 * Port change (hot-plug) (blockable).
1982 *
1983 * A PCS interrupt will occur on hot-plug once communication is
1984 * established.
1985 *
1986 * A PRCS interrupt will occur on hot-unplug (and possibly also
1987 * on hot-plug).
1988 *
1989 * XXX We can then check the CPS (Cold Presence State) bit, if
1990 * supported, to determine if a device is plugged in or not and do
1991 * the right thing.
1992 *
1993 * WARNING: A PCS interrupt is cleared by clearing DIAG_X, and
1994 * can also occur if an unsolicited COMINIT is received.
1995 * If this occurs command processing is automatically
1996 * stopped (CR goes inactive) and the port must be stopped
1997 * and restarted.
1998 */
1999 if (is & (SILI_PREG_IST_PHYRDYCHG | SILI_PREG_IST_DEVEXCHG)) {
2000 /* XXX */
2001 sili_pwrite(ap, SILI_PREG_SERR,
2002 (SILI_PREG_SERR_DIAG_N | SILI_PREG_SERR_DIAG_X));
2003 sili_pwrite(ap, SILI_PREG_INT_STATUS,
2004 is & (SILI_PREG_IST_PHYRDYCHG | SILI_PREG_IST_DEVEXCHG));
2005
2006 is &= ~(SILI_PREG_IST_PHYRDYCHG | SILI_PREG_IST_DEVEXCHG);
2007 kprintf("%s: Port change\n", PORTNAME(ap));
2008
2009 switch (sili_pread(ap, SILI_PREG_SSTS) & SILI_PREG_SSTS_DET) {
2010 case SILI_PREG_SSTS_DET_DEV:
2011 if (ap->ap_type == ATA_PORT_T_NONE &&
2012 ap->ap_probe == ATA_PROBE_FAILED) {
2013 need = NEED_HOTPLUG_INSERT;
2014 goto fatal;
2015 }
2016 break;
2017 default:
2018 kprintf("%s: Device lost\n", PORTNAME(ap));
2019 if (ap->ap_type != ATA_PORT_T_NONE) {
2020 need = NEED_HOTPLUG_REMOVE;
2021 goto fatal;
2022 }
2023 break;
2024 }
2025 }
2026
2027 /*
2028 * Check for remaining errors - they are fatal. (blockable)
2029 */
2030 if (is & fatal_mask) {
2031 u_int32_t serr;
2032
2033 sili_pwrite(ap, SILI_PREG_INT_STATUS, is & fatal_mask);
2034
2035 serr = sili_pread(ap, SILI_PREG_SERR);
2036 kprintf("%s: Unrecoverable errors (IS: %b, SERR: %b), "
2037 "disabling port.\n",
2038 PORTNAME(ap),
2039 is, SILI_PFMT_INT_STATUS,
2040 serr, SILI_PFMT_SERR
2041 );
2042 is &= ~fatal_mask;
2043 /* XXX try recovery first */
2044 goto fatal;
2045 }
2046
2047 /*
2048 * Fail all outstanding commands if we know the port won't recover.
2049 *
2050 * We may have a ccb_at if the failed command is known and was
2051 * being sent to a device over a port multiplier (PM). In this
2052 * case if the port itself has not completely failed we fail just
2053 * the commands related to that target.
2054 */
2055 if (ap->ap_state == AP_S_FATAL_ERROR && ap->ap_active) {
2056fatal:
2057 kprintf("%s: Interrupt, fatal error\n", PORTNAME(ap));
2058 ap->ap_state = AP_S_FATAL_ERROR;
2059/*failall:*/
2060 /*
2061 * Error all the active slots. If running across a PM
2062 * try to error out just the slots related to the target.
2063 */
2064 active = ap->ap_active & ~ap->ap_expired;
2065
2066 while (active) {
2067 slot = ffs(active) - 1;
2068 kprintf("%s: Killing slot %d\n", PORTNAME(ap), slot);
2069 active &= ~(1 << slot);
2070 ccb = &ap->ap_ccbs[slot];
2071 sili_core_timeout(ccb);
2072 }
2073 }
2074
2075 /*
2076 * CCB completion (non blocking).
2077 *
2078 * CCB completion is detected by noticing the slot bit in
2079 * the port slot status register has cleared while the bit
2080 * is still set in our ap_active variable.
2081 *
2082 * When completing expired events we must remember to reinit
2083 * the port once everything is clear.
2084 */
2085 active = ap->ap_active & ~sili_pread(ap, SILI_PREG_SLOTST);
2086
2087 while (active) {
2088 slot = ffs(active) - 1;
2089 ccb = &ap->ap_ccbs[slot];
2090
2091 DPRINTF(SILI_D_INTR, "%s: slot %d is complete%s\n",
2092 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
2093 " (error)" : "");
2094
2095 active &= ~(1 << slot);
2096
2097 /*
2098 * XXX sync POSTREAD for return data?
2099 */
2100 ap->ap_active &= ~(1 << ccb->ccb_slot);
2101 --ap->ap_active_cnt;
2102
2103 /*
2104 * Complete the ccb. If the ccb was marked expired it
2105 * may or may not have been cleared from the port,
2106 * make sure we mark it as having timed out.
4383d440
MD
2107 *
2108 * In a normal completion if AUTOSENSE is set we copy
2109 * the PRB LRAM rfis back to the rfis in host-memory.
2110 *
2111 * XXX Currently AUTOSENSE also forces exclusivity so we
2112 * can safely work around a hardware bug when reading
2113 * the LRAM.
1ac8d5ba
MD
2114 */
2115 if (ap->ap_expired & (1 << ccb->ccb_slot)) {
2116 ap->ap_expired &= ~(1 << ccb->ccb_slot);
2117 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2118 ccb->ccb_done(ccb);
2119 ccb->ccb_xa.complete(&ccb->ccb_xa);
2120 } else {
4383d440
MD
2121 if (ccb->ccb_xa.flags & ATA_F_AUTOSENSE) {
2122 memcpy(ccb->ccb_xa.rfis,
2123 &ccb->ccb_prb_lram->prb_d2h,
2124 sizeof(ccb->ccb_prb_lram->prb_d2h));
2125 }
1ac8d5ba
MD
2126 if (ccb->ccb_xa.state == ATA_S_ONCHIP)
2127 ccb->ccb_xa.state = ATA_S_COMPLETE;
2128 ccb->ccb_done(ccb);
2129 }
2130 }
2131 if (is & SILI_PREG_IST_READY) {
2132 is &= ~SILI_PREG_IST_READY;
2133 sili_pwrite(ap, SILI_PREG_INT_DISABLE, SILI_PREG_INT_READY);
2134 sili_pwrite(ap, SILI_PREG_INT_STATUS, SILI_PREG_IST_READY);
2135 }
2136
2137 /*
2138 * If we had expired commands and were waiting for
2139 * remaining commands to complete, and they have now
2140 * completed, we can reinit the port.
2141 *
2142 * This will also clean out the expired commands.
2143 * The timeout code also calls sili_port_reinit() if
2144 * the only commands remaining after a timeout are all
2145 * now expired commands.
2146 *
2147 * Otherwise just reissue.
2148 */
2149 if (ap->ap_expired && ap->ap_active == ap->ap_expired)
2150 sili_port_reinit(ap);
2151 else
2152 sili_issue_pending_commands(ap, NULL);
2153
2154 /*
2155 * Cleanup. Will not be set if non-blocking.
2156 */
2157 switch(need) {
2158 case NEED_HOTPLUG_INSERT:
2159 /*
2160 * A hot-plug insertion event has occured and all
2161 * outstanding commands have already been revoked.
2162 *
2163 * Don't recurse if this occurs while we are
2164 * resetting the port.
2165 *
2166 * Place the port in a continuous COMRESET state
2167 * until the INIT code gets to it.
2168 */
2169 kprintf("%s: HOTPLUG - Device inserted\n",
2170 PORTNAME(ap));
2171 ap->ap_probe = ATA_PROBE_NEED_INIT;
2172 sili_cam_changed(ap, NULL, -1);
2173 break;
2174 case NEED_HOTPLUG_REMOVE:
2175 /*
2176 * A hot-plug removal event has occured and all
2177 * outstanding commands have already been revoked.
2178 *
2179 * Don't recurse if this occurs while we are
2180 * resetting the port.
2181 */
2182 kprintf("%s: HOTPLUG - Device removed\n",
2183 PORTNAME(ap));
2184 sili_port_hardstop(ap);
2185 /* ap_probe set to failed */
2186 sili_cam_changed(ap, NULL, -1);
2187 break;
2188 default:
2189 break;
2190 }
2191}
2192
2193struct sili_ccb *
2194sili_get_ccb(struct sili_port *ap)
2195{
2196 struct sili_ccb *ccb;
2197
2198 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2199 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
2200 if (ccb != NULL) {
2201 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
2202 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
2203 ccb->ccb_xa.state = ATA_S_SETUP;
2204 ccb->ccb_xa.at = NULL;
2205 }
2206 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2207
2208 return (ccb);
2209}
2210
2211void
2212sili_put_ccb(struct sili_ccb *ccb)
2213{
2214 struct sili_port *ap = ccb->ccb_port;
2215
2216#ifdef DIAGNOSTIC
2217 if (ccb->ccb_xa.state != ATA_S_COMPLETE &&
2218 ccb->ccb_xa.state != ATA_S_TIMEOUT &&
2219 ccb->ccb_xa.state != ATA_S_ERROR) {
2220 kprintf("%s: invalid ata_xfer state %02x in sili_put_ccb, "
2221 "slot %d\n",
2222 PORTNAME(ccb->ccb_port), ccb->ccb_xa.state,
2223 ccb->ccb_slot);
2224 }
2225#endif
2226
2227 ccb->ccb_xa.state = ATA_S_PUT;
2228 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2229 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
2230 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2231}
2232
2233struct sili_ccb *
2234sili_get_err_ccb(struct sili_port *ap)
2235{
2236 struct sili_ccb *err_ccb;
2237
2238 KKASSERT(sili_pread(ap, SILI_PREG_CI) == 0);
2239 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) == 0);
2240 ap->ap_flags |= AP_F_ERR_CCB_RESERVED;
2241
2242#ifdef DIAGNOSTIC
2243 KKASSERT(ap->ap_err_busy == 0);
2244 ap->ap_err_busy = 1;
2245#endif
2246 /*
2247 * Grab a CCB to use for error recovery. This should never fail, as
2248 * we ask atascsi to reserve one for us at init time.
2249 */
2250 err_ccb = ap->ap_err_ccb;
2251 KKASSERT(err_ccb != NULL);
2252 err_ccb->ccb_xa.flags = 0;
2253 err_ccb->ccb_done = sili_empty_done;
2254
2255 return err_ccb;
2256}
2257
2258void
2259sili_put_err_ccb(struct sili_ccb *ccb)
2260{
2261 struct sili_port *ap = ccb->ccb_port;
2262
2263#ifdef DIAGNOSTIC
2264 KKASSERT(ap->ap_err_busy);
2265#endif
2266 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) != 0);
2267
2268 KKASSERT(ccb == ap->ap_err_ccb);
2269
2270#ifdef DIAGNOSTIC
2271 ap->ap_err_busy = 0;
2272#endif
2273 ap->ap_flags &= ~AP_F_ERR_CCB_RESERVED;
2274}
2275
2276/*
2277 * Read log page to get NCQ error.
2278 */
2279int
2280sili_port_read_ncq_error(struct sili_port *ap, int target)
2281{
2282 struct sili_ccb *ccb;
2283 struct ata_fis_h2d *fis;
2284 int rc = EIO;
2285
2286 DPRINTF(SILI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap));
2287
2288 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */
2289 ccb = sili_get_err_ccb(ap);
2290 ccb->ccb_done = sili_empty_done;
2291 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL;
2292 ccb->ccb_xa.data = ap->ap_err_scratch;
2293 ccb->ccb_xa.datalen = 512;
2294 ccb->ccb_xa.complete = sili_dummy_done;
2295 ccb->ccb_xa.at = &ap->ap_ata[target];
2296 fis = &ccb->ccb_prb->prb_h2d;
2297 bzero(fis, sizeof(*fis));
2298
2299 fis->type = ATA_FIS_TYPE_H2D;
2300 fis->flags = ATA_H2D_FLAGS_CMD | target;
2301 fis->command = ATA_C_READ_LOG_EXT;
2302 fis->lba_low = 0x10; /* queued error log page (10h) */
2303 fis->sector_count = 1; /* number of sectors (1) */
2304 fis->sector_count_exp = 0;
2305 fis->lba_mid = 0; /* starting offset */
2306 fis->lba_mid_exp = 0;
2307 fis->device = 0;
2308
2309 if (sili_load_prb(ccb) != 0) {
2310 rc = ENOMEM; /* XXX caller must abort all commands */
2311 } else {
2312 ccb->ccb_xa.state = ATA_S_PENDING;
2313 rc = sili_poll(ccb, 1000, sili_quick_timeout);
2314 }
2315
2316 /* Abort our command, if it failed, by stopping command DMA. */
2317 if (rc) {
2318 kprintf("%s: log page read failed, slot %d was still active.\n",
2319 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot);
2320 }
2321
2322 /* Done with the error CCB now. */
2323 sili_unload_prb(ccb);
2324 sili_put_err_ccb(ccb);
2325
2326 /* Extract failed register set and tags from the scratch space. */
2327 if (rc == 0) {
2328 struct ata_log_page_10h *log;
2329 int err_slot;
2330
2331 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
2332 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
2333 /* Not queued bit was set - wasn't an NCQ error? */
2334 kprintf("%s: read NCQ error page, but not an NCQ "
2335 "error?\n",
2336 PORTNAME(ap));
2337 rc = ESRCH;
2338 } else {
2339 /* Copy back the log record as a D2H register FIS. */
2340 err_slot = log->err_regs.type &
2341 ATA_LOG_10H_TYPE_TAG_MASK;
2342 ccb = &ap->ap_ccbs[err_slot];
2343 if (ap->ap_expired & (1 << ccb->ccb_slot)) {
2344 kprintf("%s: read NCQ error page ok\n",
2345 ATANAME(ap, ccb->ccb_xa.at));
2346 memcpy(&ccb->ccb_prb->prb_d2h, &log->err_regs,
2347 sizeof(struct ata_fis_d2h));
2348 ccb->ccb_prb->prb_d2h.type = ATA_FIS_TYPE_D2H;
2349 ccb->ccb_prb->prb_d2h.flags = 0;
2350 } else {
2351 kprintf("%s: error log slot %d did not match a failed ccb!\n", ATANAME(ccb->ccb_port, ccb->ccb_xa.at), err_slot);
2352 }
2353 }
2354 }
2355
2356 return (rc);
2357}
2358
2359/*
2360 * Allocate memory for various structures DMAd by hardware. The maximum
2361 * number of segments for these tags is 1 so the DMA memory will have a
2362 * single physical base address.
2363 */
2364struct sili_dmamem *
2365sili_dmamem_alloc(struct sili_softc *sc, bus_dma_tag_t tag)
2366{
2367 struct sili_dmamem *adm;
2368 int error;
2369
2370 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
2371
2372 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
2373 BUS_DMA_ZERO, &adm->adm_map);
2374 if (error == 0) {
2375 adm->adm_tag = tag;
2376 error = bus_dmamap_load(tag, adm->adm_map,
2377 adm->adm_kva,
2378 bus_dma_tag_getmaxsize(tag),
2379 sili_dmamem_saveseg, &adm->adm_busaddr,
2380 0);
2381 }
2382 if (error) {
2383 if (adm->adm_map) {
2384 bus_dmamap_destroy(tag, adm->adm_map);
2385 adm->adm_map = NULL;
2386 adm->adm_tag = NULL;
2387 adm->adm_kva = NULL;
2388 }
2389 kfree(adm, M_DEVBUF);
2390 adm = NULL;
2391 }
2392 return (adm);
2393}
2394
2395static
2396void
2397sili_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
2398{
2399 KKASSERT(error == 0);
2400 KKASSERT(nsegs == 1);
2401 *(bus_addr_t *)info = segs->ds_addr;
2402}
2403
2404
2405void
2406sili_dmamem_free(struct sili_softc *sc, struct sili_dmamem *adm)
2407{
2408 if (adm->adm_map) {
2409 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
2410 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
2411 adm->adm_map = NULL;
2412 adm->adm_tag = NULL;
2413 adm->adm_kva = NULL;
2414 }
2415 kfree(adm, M_DEVBUF);
2416}
2417
2418u_int32_t
2419sili_read(struct sili_softc *sc, bus_size_t r)
2420{
2421 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
2422 BUS_SPACE_BARRIER_READ);
2423 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
2424}
2425
2426void
2427sili_write(struct sili_softc *sc, bus_size_t r, u_int32_t v)
2428{
2429 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
2430 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
2431 BUS_SPACE_BARRIER_WRITE);
2432}
2433
2434u_int32_t
2435sili_pread(struct sili_port *ap, bus_size_t r)
2436{
2437 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
2438 BUS_SPACE_BARRIER_READ);
2439 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
2440}
2441
2442void
2443sili_pwrite(struct sili_port *ap, bus_size_t r, u_int32_t v)
2444{
2445 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
2446 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
2447 BUS_SPACE_BARRIER_WRITE);
2448}
2449
2450/*
2451 * Wait up to (timeout) milliseconds for the masked port register to
2452 * match the target.
2453 *
2454 * Timeout is in milliseconds.
2455 */
2456int
2457sili_pwait_eq(struct sili_port *ap, int timeout,
2458 bus_size_t r, u_int32_t mask, u_int32_t target)
2459{
2460 int t;
2461
2462 /*
2463 * Loop hard up to 100uS
2464 */
2465 for (t = 0; t < 100; ++t) {
2466 if ((sili_pread(ap, r) & mask) == target)
2467 return (0);
2468 sili_os_hardsleep(1); /* us */
2469 }
2470
2471 do {
2472 timeout -= sili_os_softsleep();
2473 if ((sili_pread(ap, r) & mask) == target)
2474 return (0);
2475 } while (timeout > 0);
2476 return (1);
2477}
2478
2479int
2480sili_wait_ne(struct sili_softc *sc, bus_size_t r, u_int32_t mask,
2481 u_int32_t target)
2482{
2483 int t;
2484
2485 /*
2486 * Loop hard up to 100uS
2487 */
2488 for (t = 0; t < 100; ++t) {
2489 if ((sili_read(sc, r) & mask) != target)
2490 return (0);
2491 sili_os_hardsleep(1); /* us */
2492 }
2493
2494 /*
2495 * And one millisecond the slow way
2496 */
2497 t = 1000;
2498 do {
2499 t -= sili_os_softsleep();
2500 if ((sili_read(sc, r) & mask) != target)
2501 return (0);
2502 } while (t > 0);
2503
2504 return (1);
2505}
2506
2507
2508/*
2509 * Acquire an ata transfer.
2510 *
2511 * Pass a NULL at for direct-attached transfers, and a non-NULL at for
2512 * targets that go through the port multiplier.
2513 */
2514struct ata_xfer *
2515sili_ata_get_xfer(struct sili_port *ap, struct ata_port *at)
2516{
2517 struct sili_ccb *ccb;
2518
2519 ccb = sili_get_ccb(ap);
2520 if (ccb == NULL) {
2521 DPRINTF(SILI_D_XFER, "%s: sili_ata_get_xfer: NULL ccb\n",
2522 PORTNAME(ap));
2523 return (NULL);
2524 }
2525
2526 DPRINTF(SILI_D_XFER, "%s: sili_ata_get_xfer got slot %d\n",
2527 PORTNAME(ap), ccb->ccb_slot);
2528
2529 bzero(ccb->ccb_xa.fis, sizeof(*ccb->ccb_xa.fis));
2530 ccb->ccb_xa.at = at;
2531 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
2532
2533 return (&ccb->ccb_xa);
2534}
2535
2536void
2537sili_ata_put_xfer(struct ata_xfer *xa)
2538{
2539 struct sili_ccb *ccb = (struct sili_ccb *)xa;
2540
2541 DPRINTF(SILI_D_XFER, "sili_ata_put_xfer slot %d\n", ccb->ccb_slot);
2542
2543 sili_put_ccb(ccb);
2544}
2545
2546int
2547sili_ata_cmd(struct ata_xfer *xa)
2548{
2549 struct sili_ccb *ccb = (struct sili_ccb *)xa;
2550
2551 KKASSERT(xa->state == ATA_S_SETUP);
2552
2553 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
2554 goto failcmd;
2555#if 0
2556 kprintf("%s: started std command %b ccb %d ccb_at %p %d\n",
2557 ATANAME(ccb->ccb_port, ccb->ccb_xa.at),
2558 sili_pread(ccb->ccb_port, SILI_PREG_CMD), SILI_PFMT_CMD,
2559 ccb->ccb_slot,
2560 ccb->ccb_xa.at,
2561 ccb->ccb_xa.at ? ccb->ccb_xa.at->at_target : -1);
2562#endif
2563
2564 ccb->ccb_done = sili_ata_cmd_done;
2565
2566 if (sili_load_prb(ccb) != 0)
2567 goto failcmd;
2568
2569 xa->state = ATA_S_PENDING;
2570
2571 if (xa->flags & ATA_F_POLL)
2572 return (sili_poll(ccb, xa->timeout, sili_ata_cmd_timeout));
2573
2574 crit_enter();
2575 KKASSERT((xa->flags & ATA_F_TIMEOUT_EXPIRED) == 0);
2576 xa->flags |= ATA_F_TIMEOUT_DESIRED;
2577 sili_start(ccb);
2578 crit_exit();
2579 return (xa->state);
2580
2581failcmd:
2582 crit_enter();
2583 xa->state = ATA_S_ERROR;
2584 xa->complete(xa);
2585 crit_exit();
2586 return (ATA_S_ERROR);
2587}
2588
2589static void
2590sili_ata_cmd_done(struct sili_ccb *ccb)
2591{
2592 struct ata_xfer *xa = &ccb->ccb_xa;
2593
2594 /*
2595 * NOTE: callout does not lock port and may race us modifying
2596 * the flags, so make sure its stopped.
2597 */
2598 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
2599 callout_stop(&ccb->ccb_timeout);
2600 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
2601 }
2602 xa->flags &= ~(ATA_F_TIMEOUT_DESIRED | ATA_F_TIMEOUT_EXPIRED);
2603
2604 KKASSERT(xa->state != ATA_S_ONCHIP);
2605 sili_unload_prb(ccb);
2606
2607#ifdef DIAGNOSTIC
2608 else if (xa->state != ATA_S_ERROR && xa->state != ATA_S_TIMEOUT)
2609 kprintf("%s: invalid ata_xfer state %02x in sili_ata_cmd_done, "
2610 "slot %d\n",
2611 PORTNAME(ccb->ccb_port), xa->state, ccb->ccb_slot);
2612#endif
2613 if (xa->state != ATA_S_TIMEOUT)
2614 xa->complete(xa);
2615}
2616
2617/*
2618 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags
2619 * while the callout is runing.
2620 *
2621 * We can't safely get the port lock here or delay, we could block
2622 * the callout thread.
2623 */
2624static void
2625sili_ata_cmd_timeout_unserialized(void *arg)
2626{
2627 struct sili_ccb *ccb = arg;
2628 struct sili_port *ap = ccb->ccb_port;
2629
2630 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
2631 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_EXPIRED;
2632 sili_os_signal_port_thread(ap, AP_SIGF_TIMEOUT);
2633}
2634
2635void
2636sili_ata_cmd_timeout(struct sili_ccb *ccb)
2637{
2638 sili_core_timeout(ccb);
2639}
2640
2641/*
2642 * Timeout code, typically called when the port command processor is running.
2643 *
2644 * Returns 0 if all timeout processing completed, non-zero if it is still
2645 * in progress.
2646 */
2647static
2648int
2649sili_core_timeout(struct sili_ccb *ccb)
2650{
2651 struct ata_xfer *xa = &ccb->ccb_xa;
2652 struct sili_port *ap = ccb->ccb_port;
2653 struct ata_port *at;
2654
2655 at = ccb->ccb_xa.at;
2656
2657 kprintf("%s: CMD TIMEOUT state=%d slot=%d\n"
2658 "\t active=%08x\n"
2659 "\texpired=%08x\n"
2660 "\thactive=%08x\n",
2661 ATANAME(ap, at),
2662 ccb->ccb_xa.state, ccb->ccb_slot,
2663 ap->ap_active,
2664 ap->ap_expired,
2665 sili_pread(ap, SILI_PREG_SLOTST)
2666 );
2667
2668 /*
2669 * NOTE: Timeout will not be running if the command was polled.
2670 * If we got here at least one of these flags should be set.
2671 *
2672 * However, it might be running if we are called from the
2673 * interrupt error handling code.
2674 */
2675 KKASSERT(xa->flags & (ATA_F_POLL | ATA_F_TIMEOUT_DESIRED |
2676 ATA_F_TIMEOUT_RUNNING));
2677 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
2678 callout_stop(&ccb->ccb_timeout);
2679 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
2680 }
2681 xa->flags &= ~ATA_F_TIMEOUT_EXPIRED;
2682
2683 if (ccb->ccb_xa.state == ATA_S_PENDING) {
2684 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2685 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2686 ccb->ccb_done(ccb);
2687 xa->complete(xa);
2688 sili_issue_pending_commands(ap, NULL);
2689 return(1);
2690 }
2691 if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
2692 kprintf("%s: Unexpected state during timeout: %d\n",
2693 ATANAME(ap, at), ccb->ccb_xa.state);
2694 return(1);
2695 }
2696
2697 /*
2698 * We can't process timeouts while other commands are running.
2699 */
2700 ap->ap_expired |= 1 << ccb->ccb_slot;
2701
2702 if (ap->ap_active != ap->ap_expired) {
2703 kprintf("%s: Deferred timeout until its safe, slot %d\n",
2704 ATANAME(ap, at), ccb->ccb_slot);
2705 return(1);
2706 }
2707
2708 /*
2709 * We have to issue a Port reinit. We don't read an error log
2710 * page for timeouts. Reiniting the port will clear all pending
2711 * commands.
2712 */
2713 sili_port_reinit(ap);
2714 return(0);
2715}
2716
2717/*
2718 * Used by the softreset, pmprobe, and read_ncq_error only, in very
2719 * specialized, controlled circumstances.
2720 */
2721void
2722sili_quick_timeout(struct sili_ccb *ccb)
2723{
2724 struct sili_port *ap = ccb->ccb_port;
2725
2726 switch (ccb->ccb_xa.state) {
2727 case ATA_S_PENDING:
2728 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
2729 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2730 break;
2731 case ATA_S_ONCHIP:
2732 KKASSERT((ap->ap_active & ~ap->ap_expired) ==
2733 (1 << ccb->ccb_slot));
2734 ccb->ccb_xa.state = ATA_S_TIMEOUT;
2735 ap->ap_active &= ~(1 << ccb->ccb_slot);
2736 KKASSERT(ap->ap_active_cnt > 0);
2737 --ap->ap_active_cnt;
2738 sili_port_reinit(ap);
2739 break;
2740 default:
2741 panic("%s: sili_quick_timeout: ccb in bad state %d",
2742 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_xa.state);
2743 }
2744}
2745
2746static void
2747sili_dummy_done(struct ata_xfer *xa)
2748{
2749}
2750
2751static void
2752sili_empty_done(struct sili_ccb *ccb)
2753{
2754}