Adjust IPFW to use M_WAITOK instead of M_NOWAIT. The M_NOWAIT flag on
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
984263bc
MD
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41a01a4d 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.55 2004/03/01 06:33:16 dillon Exp $
984263bc
MD
40 */
41
1f2de5d4
MD
42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
984263bc
MD
46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
984263bc
MD
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
a722be49 76#include <sys/upcall.h>
984263bc
MD
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
4b5f931b
MD
88#include <sys/thread2.h>
89
984263bc
MD
90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
984263bc
MD
96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
984263bc
MD
105#ifdef SMP
106#include <machine/smp.h>
984263bc
MD
107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
984263bc
MD
115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
984263bc
MD
118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
3ae0cd58
RG
123extern void init386 (int first);
124extern void dblfault_handler (void);
984263bc
MD
125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
3ae0cd58
RG
133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
984263bc
MD
136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
984263bc
MD
140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
984263bc
MD
181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
6ef943a3
MD
240int bootverbose = 0;
241vm_paddr_t Maxmem = 0;
984263bc
MD
242long dumplo;
243
6ef943a3 244vm_paddr_t phys_avail[10];
984263bc
MD
245
246/* must be 2 less so 0 0 can signal end of chunks */
247#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
248
249static vm_offset_t buffer_sva, buffer_eva;
250vm_offset_t clean_sva, clean_eva;
251static vm_offset_t pager_sva, pager_eva;
252static struct trapframe proc0_tf;
253
254static void
255cpu_startup(dummy)
256 void *dummy;
257{
c9faf524
RG
258 unsigned i;
259 caddr_t v;
cb840899 260 vm_offset_t minaddr;
984263bc
MD
261 vm_offset_t maxaddr;
262 vm_size_t size = 0;
263 int firstaddr;
984263bc
MD
264
265 if (boothowto & RB_VERBOSE)
266 bootverbose++;
267
268 /*
269 * Good {morning,afternoon,evening,night}.
270 */
271 printf("%s", version);
272 startrtclock();
273 printcpuinfo();
274 panicifcpuunsupported();
275#ifdef PERFMON
276 perfmon_init();
277#endif
6ef943a3 278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
984263bc
MD
279 /*
280 * Display any holes after the first chunk of extended memory.
281 */
282 if (bootverbose) {
283 int indx;
284
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 288
6ef943a3 289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
984263bc
MD
290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
291 size1 / PAGE_SIZE);
292 }
293 }
294
295 /*
296 * Calculate callout wheel size
297 */
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
301 ;
302 callwheelmask = callwheelsize - 1;
303
304 /*
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
312 */
313
314 /*
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
318 */
319 firstaddr = 0;
320again:
321 v = (caddr_t)firstaddr;
322
323#define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325#define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
327
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
330
331 /*
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
337 * maxbcache bytes.
338 *
339 * factor represents the 1/4 x ram conversion.
340 */
341 if (nbuf == 0) {
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
344
345 nbuf = 50;
346 if (kbytes > 4096)
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
348 if (kbytes > 65536)
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
352 }
353
354 /*
355 * Do not allow the buffer_map to be more then 1/2 the size of the
356 * kernel_map.
357 */
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
359 (BKVASIZE * 2)) {
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
361 (BKVASIZE * 2);
362 printf("Warning: nbufs capped at %d\n", nbuf);
363 }
364
365 nswbuf = max(min(nbuf/4, 256), 16);
366#ifdef NSWBUF_MIN
367 if (nswbuf < NSWBUF_MIN)
368 nswbuf = NSWBUF_MIN;
369#endif
370#ifdef DIRECTIO
371 ffs_rawread_setup();
372#endif
373
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
376 v = bufhashinit(v);
377
378 /*
379 * End of first pass, size has been calculated so allocate memory
380 */
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
384 if (firstaddr == 0)
385 panic("startup: no room for tables");
386 goto again;
387 }
388
389 /*
390 * End of second pass, addresses have been assigned
391 */
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
394
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
398 (nbuf*BKVASIZE));
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
405
406 /*
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
409 */
410 {
411 vm_offset_t mb_map_size;
412
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
1870e334 415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_WAITOK);
984263bc 416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
cb840899
MD
417 mb_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
418 mb_map_size);
984263bc 419 mb_map->system_map = 1;
cb840899
MD
420 mbutl = (void *)mb_map->header.start;
421 mbute = (void *)mb_map->header.end;
984263bc
MD
422 }
423
424 /*
425 * Initialize callouts
426 */
427 SLIST_INIT(&callfree);
428 for (i = 0; i < ncallout; i++) {
429 callout_init(&callout[i]);
430 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
431 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
432 }
433
434 for (i = 0; i < callwheelsize; i++) {
435 TAILQ_INIT(&callwheel[i]);
436 }
437
438#if defined(USERCONFIG)
439 userconfig();
440 cninit(); /* the preferred console may have changed */
441#endif
442
12e4aaff
MD
443 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
444 ptoa(vmstats.v_free_count) / 1024);
984263bc
MD
445
446 /*
447 * Set up buffers, so they can be used to read disk labels.
448 */
449 bufinit();
450 vm_pager_bufferinit();
451
452#ifdef SMP
453 /*
454 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
455 */
456 mp_start(); /* fire up the APs and APICs */
457 mp_announce();
458#endif /* SMP */
459 cpu_setregs();
460}
461
984263bc
MD
462/*
463 * Send an interrupt to process.
464 *
465 * Stack is set up to allow sigcode stored
466 * at top to call routine, followed by kcall
467 * to sigreturn routine below. After sigreturn
468 * resets the signal mask, the stack, and the
469 * frame pointer, it returns to the user
470 * specified pc, psl.
471 */
984263bc
MD
472void
473sendsig(catcher, sig, mask, code)
474 sig_t catcher;
475 int sig;
476 sigset_t *mask;
477 u_long code;
478{
479 struct proc *p = curproc;
480 struct trapframe *regs;
481 struct sigacts *psp = p->p_sigacts;
482 struct sigframe sf, *sfp;
483 int oonstack;
484
984263bc
MD
485 regs = p->p_md.md_regs;
486 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
487
488 /* save user context */
489 bzero(&sf, sizeof(struct sigframe));
490 sf.sf_uc.uc_sigmask = *mask;
491 sf.sf_uc.uc_stack = p->p_sigstk;
492 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
493 sf.sf_uc.uc_mcontext.mc_gs = rgs();
494 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
495
496 /* Allocate and validate space for the signal handler context. */
497 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
498 SIGISMEMBER(psp->ps_sigonstack, sig)) {
499 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
500 p->p_sigstk.ss_size - sizeof(struct sigframe));
501 p->p_sigstk.ss_flags |= SS_ONSTACK;
502 }
503 else
504 sfp = (struct sigframe *)regs->tf_esp - 1;
505
506 /* Translate the signal is appropriate */
507 if (p->p_sysent->sv_sigtbl) {
508 if (sig <= p->p_sysent->sv_sigsize)
509 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
510 }
511
512 /* Build the argument list for the signal handler. */
513 sf.sf_signum = sig;
514 sf.sf_ucontext = (register_t)&sfp->sf_uc;
515 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
516 /* Signal handler installed with SA_SIGINFO. */
517 sf.sf_siginfo = (register_t)&sfp->sf_si;
518 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
519
520 /* fill siginfo structure */
521 sf.sf_si.si_signo = sig;
522 sf.sf_si.si_code = code;
523 sf.sf_si.si_addr = (void*)regs->tf_err;
524 }
525 else {
526 /* Old FreeBSD-style arguments. */
527 sf.sf_siginfo = code;
528 sf.sf_addr = regs->tf_err;
529 sf.sf_ahu.sf_handler = catcher;
530 }
531
532 /*
533 * If we're a vm86 process, we want to save the segment registers.
534 * We also change eflags to be our emulated eflags, not the actual
535 * eflags.
536 */
537 if (regs->tf_eflags & PSL_VM) {
538 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 539 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
540
541 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
542 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
543 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
544 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
545
546 if (vm86->vm86_has_vme == 0)
547 sf.sf_uc.uc_mcontext.mc_eflags =
548 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
549 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
550
551 /*
552 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
553 * syscalls made by the signal handler. This just avoids
554 * wasting time for our lazy fixup of such faults. PSL_NT
555 * does nothing in vm86 mode, but vm86 programs can set it
556 * almost legitimately in probes for old cpu types.
557 */
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
559 }
560
561 /*
562 * Copy the sigframe out to the user's stack.
563 */
564 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
565 /*
566 * Something is wrong with the stack pointer.
567 * ...Kill the process.
568 */
569 sigexit(p, SIGILL);
570 }
571
572 regs->tf_esp = (int)sfp;
573 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
574 regs->tf_eflags &= ~PSL_T;
575 regs->tf_cs = _ucodesel;
576 regs->tf_ds = _udatasel;
577 regs->tf_es = _udatasel;
578 regs->tf_fs = _udatasel;
579 load_gs(_udatasel);
580 regs->tf_ss = _udatasel;
581}
582
583/*
65957d54 584 * sigreturn(ucontext_t *sigcntxp)
41c20dac 585 *
984263bc
MD
586 * System call to cleanup state after a signal
587 * has been taken. Reset signal mask and
588 * stack state from context left by sendsig (above).
589 * Return to previous pc and psl as specified by
590 * context left by sendsig. Check carefully to
591 * make sure that the user has not modified the
592 * state to gain improper privileges.
593 */
594#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
595#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
596
984263bc 597int
41c20dac 598sigreturn(struct sigreturn_args *uap)
984263bc 599{
41c20dac 600 struct proc *p = curproc;
984263bc
MD
601 struct trapframe *regs;
602 ucontext_t *ucp;
603 int cs, eflags;
604
605 ucp = uap->sigcntxp;
606
984263bc
MD
607 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
608 return (EFAULT);
609
610 regs = p->p_md.md_regs;
611 eflags = ucp->uc_mcontext.mc_eflags;
612
613 if (eflags & PSL_VM) {
614 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
615 struct vm86_kernel *vm86;
616
617 /*
618 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
619 * set up the vm86 area, and we can't enter vm86 mode.
620 */
b7c628e4 621 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 622 return (EINVAL);
b7c628e4 623 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
624 if (vm86->vm86_inited == 0)
625 return (EINVAL);
626
627 /* go back to user mode if both flags are set */
628 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
629 trapsignal(p, SIGBUS, 0);
630
631 if (vm86->vm86_has_vme) {
632 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
633 (eflags & VME_USERCHANGE) | PSL_VM;
634 } else {
635 vm86->vm86_eflags = eflags; /* save VIF, VIP */
636 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
637 }
638 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
639 tf->tf_eflags = eflags;
640 tf->tf_vm86_ds = tf->tf_ds;
641 tf->tf_vm86_es = tf->tf_es;
642 tf->tf_vm86_fs = tf->tf_fs;
643 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
644 tf->tf_ds = _udatasel;
645 tf->tf_es = _udatasel;
646 tf->tf_fs = _udatasel;
647 } else {
648 /*
649 * Don't allow users to change privileged or reserved flags.
650 */
651 /*
652 * XXX do allow users to change the privileged flag PSL_RF.
653 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
654 * should sometimes set it there too. tf_eflags is kept in
655 * the signal context during signal handling and there is no
656 * other place to remember it, so the PSL_RF bit may be
657 * corrupted by the signal handler without us knowing.
658 * Corruption of the PSL_RF bit at worst causes one more or
659 * one less debugger trap, so allowing it is fairly harmless.
660 */
661 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
662 printf("sigreturn: eflags = 0x%x\n", eflags);
663 return(EINVAL);
664 }
665
666 /*
667 * Don't allow users to load a valid privileged %cs. Let the
668 * hardware check for invalid selectors, excess privilege in
669 * other selectors, invalid %eip's and invalid %esp's.
670 */
671 cs = ucp->uc_mcontext.mc_cs;
672 if (!CS_SECURE(cs)) {
673 printf("sigreturn: cs = 0x%x\n", cs);
674 trapsignal(p, SIGBUS, T_PROTFLT);
675 return(EINVAL);
676 }
677 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
678 }
679
680 if (ucp->uc_mcontext.mc_onstack & 1)
681 p->p_sigstk.ss_flags |= SS_ONSTACK;
682 else
683 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
684
685 p->p_sigmask = ucp->uc_sigmask;
686 SIG_CANTMASK(p->p_sigmask);
687 return(EJUSTRETURN);
688}
689
a722be49
MD
690/*
691 * Stack frame on entry to function. %eax will contain the function vector,
692 * %ecx will contain the function data. flags, ecx, and eax will have
693 * already been pushed on the stack.
694 */
695struct upc_frame {
696 register_t eax;
697 register_t ecx;
0a455ac5 698 register_t edx;
a722be49
MD
699 register_t flags;
700 register_t oldip;
701};
702
703void
704sendupcall(struct vmupcall *vu, int morepending)
705{
706 struct proc *p = curproc;
707 struct trapframe *regs;
708 struct upcall upcall;
709 struct upc_frame upc_frame;
6e58b5df 710 int crit_count = 0;
a722be49
MD
711
712 /*
713 * Get the upcall data structure
714 */
6e58b5df
MD
715 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
716 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
717 ) {
a722be49
MD
718 vu->vu_pending = 0;
719 printf("bad upcall address\n");
720 return;
721 }
722
723 /*
724 * If the data structure is already marked pending or has a critical
725 * section count, mark the data structure as pending and return
726 * without doing an upcall. vu_pending is left set.
727 */
6e58b5df
MD
728 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
729 if (upcall.upc_pending < vu->vu_pending) {
730 upcall.upc_pending = vu->vu_pending;
731 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
732 sizeof(upcall.upc_pending));
a722be49
MD
733 }
734 return;
735 }
736
737 /*
738 * We can run this upcall now, clear vu_pending.
739 *
740 * Bump our critical section count and set or clear the
741 * user pending flag depending on whether more upcalls are
742 * pending. The user will be responsible for calling
743 * upc_dispatch(-1) to process remaining upcalls.
744 */
745 vu->vu_pending = 0;
6e58b5df
MD
746 upcall.upc_pending = morepending;
747 crit_count += TDPRI_CRIT;
748 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
749 sizeof(upcall.upc_pending));
750 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
751 sizeof(int));
a722be49
MD
752
753 /*
754 * Construct a stack frame and issue the upcall
755 */
756 regs = p->p_md.md_regs;
757 upc_frame.eax = regs->tf_eax;
758 upc_frame.ecx = regs->tf_ecx;
0a455ac5 759 upc_frame.edx = regs->tf_edx;
a722be49
MD
760 upc_frame.flags = regs->tf_eflags;
761 upc_frame.oldip = regs->tf_eip;
762 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
763 sizeof(upc_frame)) != 0) {
764 printf("bad stack on upcall\n");
765 } else {
766 regs->tf_eax = (register_t)vu->vu_func;
767 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 768 regs->tf_edx = (register_t)p->p_upcall;
a722be49
MD
769 regs->tf_eip = (register_t)vu->vu_ctx;
770 regs->tf_esp -= sizeof(upc_frame);
771 }
772}
773
774/*
775 * fetchupcall occurs in the context of a system call, which means that
0a455ac5
MD
776 * we have to return EJUSTRETURN in order to prevent eax and edx from
777 * being overwritten by the syscall return value.
a722be49
MD
778 *
779 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
780 * and the function pointer in %eax.
781 */
782int
0a455ac5 783fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
a722be49
MD
784{
785 struct upc_frame upc_frame;
786 struct proc *p;
787 struct trapframe *regs;
788 int error;
6e58b5df
MD
789 struct upcall upcall;
790 int crit_count;
a722be49
MD
791
792 p = curproc;
793 regs = p->p_md.md_regs;
794
6e58b5df 795 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
a722be49
MD
796 if (error == 0) {
797 if (vu) {
798 /*
799 * This jumps us to the next ready context.
800 */
801 vu->vu_pending = 0;
6e58b5df
MD
802 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
803 crit_count = 0;
804 if (error == 0)
805 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
806 crit_count += TDPRI_CRIT;
a722be49 807 if (error == 0)
6e58b5df 808 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
a722be49
MD
809 regs->tf_eax = (register_t)vu->vu_func;
810 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 811 regs->tf_edx = (register_t)p->p_upcall;
a722be49
MD
812 regs->tf_eip = (register_t)vu->vu_ctx;
813 regs->tf_esp = (register_t)rsp;
814 } else {
815 /*
816 * This returns us to the originally interrupted code.
817 */
818 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
819 regs->tf_eax = upc_frame.eax;
820 regs->tf_ecx = upc_frame.ecx;
0a455ac5 821 regs->tf_edx = upc_frame.edx;
6e58b5df
MD
822 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
823 (upc_frame.flags & PSL_USERCHANGE);
a722be49
MD
824 regs->tf_eip = upc_frame.oldip;
825 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
826 }
827 }
828 if (error == 0)
829 error = EJUSTRETURN;
830 return(error);
831}
832
984263bc
MD
833/*
834 * Machine dependent boot() routine
835 *
836 * I haven't seen anything to put here yet
837 * Possibly some stuff might be grafted back here from boot()
838 */
839void
840cpu_boot(int howto)
841{
842}
843
844/*
845 * Shutdown the CPU as much as possible
846 */
847void
848cpu_halt(void)
849{
850 for (;;)
851 __asm__ ("hlt");
852}
853
854/*
8ad65e08
MD
855 * cpu_idle() represents the idle LWKT. You cannot return from this function
856 * (unless you want to blow things up!). Instead we look for runnable threads
857 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 858 *
26a0694b 859 * The main loop is entered with a critical section held, we must release
a2a5ad0d
MD
860 * the critical section before doing anything else. lwkt_switch() will
861 * check for pending interrupts due to entering and exiting its own
862 * critical section.
26a0694b 863 *
a2a5ad0d
MD
864 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
865 * to wake a HLTed cpu up. However, there are cases where the idlethread
866 * will be entered with the possibility that no IPI will occur and in such
867 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 868 */
96728c05 869static int cpu_idle_hlt = 1;
60f945af
MD
870static int cpu_idle_hltcnt;
871static int cpu_idle_spincnt;
984263bc
MD
872SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
873 &cpu_idle_hlt, 0, "Idle loop HLT enable");
60f945af
MD
874SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
875 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
876SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
877 &cpu_idle_spincnt, 0, "Idle loop entry spins");
984263bc
MD
878
879void
880cpu_idle(void)
881{
a2a5ad0d
MD
882 struct thread *td = curthread;
883
26a0694b 884 crit_exit();
a2a5ad0d 885 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 886 for (;;) {
a2a5ad0d
MD
887 /*
888 * See if there are any LWKTs ready to go.
889 */
8ad65e08 890 lwkt_switch();
a2a5ad0d
MD
891
892 /*
893 * If we are going to halt call splz unconditionally after
894 * CLIing to catch any interrupt races. Note that we are
895 * at SPL0 and interrupts are enabled.
896 */
897 if (cpu_idle_hlt && !lwkt_runnable() &&
898 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
8ad65e08
MD
899 /*
900 * We must guarentee that hlt is exactly the instruction
901 * following the sti.
902 */
a2a5ad0d
MD
903 __asm __volatile("cli");
904 splz();
8ad65e08 905 __asm __volatile("sti; hlt");
60f945af 906 ++cpu_idle_hltcnt;
8ad65e08 907 } else {
a2a5ad0d 908 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 909 splz();
8ad65e08 910 __asm __volatile("sti");
60f945af 911 ++cpu_idle_spincnt;
8ad65e08 912 }
984263bc
MD
913 }
914}
915
916/*
917 * Clear registers on exec
918 */
919void
920setregs(p, entry, stack, ps_strings)
921 struct proc *p;
922 u_long entry;
923 u_long stack;
924 u_long ps_strings;
925{
926 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 927 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
MD
928
929 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
930 pcb->pcb_gs = _udatasel;
931 load_gs(_udatasel);
932
984263bc
MD
933 /* was i386_user_cleanup() in NetBSD */
934 user_ldt_free(pcb);
984263bc
MD
935
936 bzero((char *)regs, sizeof(struct trapframe));
937 regs->tf_eip = entry;
938 regs->tf_esp = stack;
939 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
940 regs->tf_ss = _udatasel;
941 regs->tf_ds = _udatasel;
942 regs->tf_es = _udatasel;
943 regs->tf_fs = _udatasel;
944 regs->tf_cs = _ucodesel;
945
946 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
947 regs->tf_ebx = ps_strings;
948
949 /*
950 * Reset the hardware debug registers if they were in use.
951 * They won't have any meaning for the newly exec'd process.
952 */
953 if (pcb->pcb_flags & PCB_DBREGS) {
954 pcb->pcb_dr0 = 0;
955 pcb->pcb_dr1 = 0;
956 pcb->pcb_dr2 = 0;
957 pcb->pcb_dr3 = 0;
958 pcb->pcb_dr6 = 0;
959 pcb->pcb_dr7 = 0;
b7c628e4 960 if (pcb == curthread->td_pcb) {
984263bc
MD
961 /*
962 * Clear the debug registers on the running
963 * CPU, otherwise they will end up affecting
964 * the next process we switch to.
965 */
966 reset_dbregs();
967 }
968 pcb->pcb_flags &= ~PCB_DBREGS;
969 }
970
971 /*
972 * Initialize the math emulator (if any) for the current process.
973 * Actually, just clear the bit that says that the emulator has
974 * been initialized. Initialization is delayed until the process
975 * traps to the emulator (if it is done at all) mainly because
976 * emulators don't provide an entry point for initialization.
977 */
b7c628e4 978 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
979
980 /*
981 * Arrange to trap the next npx or `fwait' instruction (see npx.c
982 * for why fwait must be trapped at least if there is an npx or an
983 * emulator). This is mainly to handle the case where npx0 is not
984 * configured, since the npx routines normally set up the trap
985 * otherwise. It should be done only at boot time, but doing it
986 * here allows modifying `npx_exists' for testing the emulator on
987 * systems with an npx.
988 */
989 load_cr0(rcr0() | CR0_MP | CR0_TS);
990
991#if NNPX > 0
992 /* Initialize the npx (if any) for the current process. */
993 npxinit(__INITIAL_NPXCW__);
994#endif
995
90b9818c
MD
996 /*
997 * note: linux emulator needs edx to be 0x0 on entry, which is
c0510e9a
MD
998 * handled in execve simply by setting the 64 bit syscall
999 * return value to 0.
90b9818c 1000 */
984263bc
MD
1001}
1002
1003void
1004cpu_setregs(void)
1005{
1006 unsigned int cr0;
1007
1008 cr0 = rcr0();
1009 cr0 |= CR0_NE; /* Done by npxinit() */
1010 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1011#ifdef I386_CPU
1012 if (cpu_class != CPUCLASS_386)
1013#endif
1014 cr0 |= CR0_WP | CR0_AM;
1015 load_cr0(cr0);
1016 load_gs(_udatasel);
1017}
1018
1019static int
1020sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1021{
1022 int error;
1023 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1024 req);
1025 if (!error && req->newptr)
1026 resettodr();
1027 return (error);
1028}
1029
1030SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1031 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1032
1033SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1034 CTLFLAG_RW, &disable_rtc_set, 0, "");
1035
1036SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1037 CTLFLAG_RD, &bootinfo, bootinfo, "");
1038
1039SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1040 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1041
1042extern u_long bootdev; /* not a dev_t - encoding is different */
1043SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1044 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1045
1046/*
1047 * Initialize 386 and configure to run kernel
1048 */
1049
1050/*
1051 * Initialize segments & interrupt table
1052 */
1053
1054int _default_ldt;
1055union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1056static struct gate_descriptor idt0[NIDT];
1057struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1058union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1059
1060/* table descriptors - used to load tables by cpu */
984263bc 1061struct region_descriptor r_gdt, r_idt;
984263bc 1062
984263bc
MD
1063#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1064extern int has_f00f_bug;
1065#endif
1066
1067static struct i386tss dblfault_tss;
1068static char dblfault_stack[PAGE_SIZE];
1069
1070extern struct user *proc0paddr;
1071
1072
1073/* software prototypes -- in more palatable form */
1074struct soft_segment_descriptor gdt_segs[] = {
1075/* GNULL_SEL 0 Null Descriptor */
1076{ 0x0, /* segment base address */
1077 0x0, /* length */
1078 0, /* segment type */
1079 0, /* segment descriptor priority level */
1080 0, /* segment descriptor present */
1081 0, 0,
1082 0, /* default 32 vs 16 bit size */
1083 0 /* limit granularity (byte/page units)*/ },
1084/* GCODE_SEL 1 Code Descriptor for kernel */
1085{ 0x0, /* segment base address */
1086 0xfffff, /* length - all address space */
1087 SDT_MEMERA, /* segment type */
1088 0, /* segment descriptor priority level */
1089 1, /* segment descriptor present */
1090 0, 0,
1091 1, /* default 32 vs 16 bit size */
1092 1 /* limit granularity (byte/page units)*/ },
1093/* GDATA_SEL 2 Data Descriptor for kernel */
1094{ 0x0, /* segment base address */
1095 0xfffff, /* length - all address space */
1096 SDT_MEMRWA, /* segment type */
1097 0, /* segment descriptor priority level */
1098 1, /* segment descriptor present */
1099 0, 0,
1100 1, /* default 32 vs 16 bit size */
1101 1 /* limit granularity (byte/page units)*/ },
1102/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1103{ 0x0, /* segment base address */
1104 0xfffff, /* length - all address space */
1105 SDT_MEMRWA, /* segment type */
1106 0, /* segment descriptor priority level */
1107 1, /* segment descriptor present */
1108 0, 0,
1109 1, /* default 32 vs 16 bit size */
1110 1 /* limit granularity (byte/page units)*/ },
1111/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1112{
1113 0x0, /* segment base address */
1114 sizeof(struct i386tss)-1,/* length - all address space */
1115 SDT_SYS386TSS, /* segment type */
1116 0, /* segment descriptor priority level */
1117 1, /* segment descriptor present */
1118 0, 0,
1119 0, /* unused - default 32 vs 16 bit size */
1120 0 /* limit granularity (byte/page units)*/ },
1121/* GLDT_SEL 5 LDT Descriptor */
1122{ (int) ldt, /* segment base address */
1123 sizeof(ldt)-1, /* length - all address space */
1124 SDT_SYSLDT, /* segment type */
1125 SEL_UPL, /* segment descriptor priority level */
1126 1, /* segment descriptor present */
1127 0, 0,
1128 0, /* unused - default 32 vs 16 bit size */
1129 0 /* limit granularity (byte/page units)*/ },
1130/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1131{ (int) ldt, /* segment base address */
1132 (512 * sizeof(union descriptor)-1), /* length */
1133 SDT_SYSLDT, /* segment type */
1134 0, /* segment descriptor priority level */
1135 1, /* segment descriptor present */
1136 0, 0,
1137 0, /* unused - default 32 vs 16 bit size */
1138 0 /* limit granularity (byte/page units)*/ },
1139/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1140{ 0x0, /* segment base address */
1141 0x0, /* length - all address space */
1142 0, /* segment type */
1143 0, /* segment descriptor priority level */
1144 0, /* segment descriptor present */
1145 0, 0,
1146 0, /* default 32 vs 16 bit size */
1147 0 /* limit granularity (byte/page units)*/ },
1148/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1149{ 0x400, /* segment base address */
1150 0xfffff, /* length */
1151 SDT_MEMRWA, /* segment type */
1152 0, /* segment descriptor priority level */
1153 1, /* segment descriptor present */
1154 0, 0,
1155 1, /* default 32 vs 16 bit size */
1156 1 /* limit granularity (byte/page units)*/ },
1157/* GPANIC_SEL 9 Panic Tss Descriptor */
1158{ (int) &dblfault_tss, /* segment base address */
1159 sizeof(struct i386tss)-1,/* length - all address space */
1160 SDT_SYS386TSS, /* segment type */
1161 0, /* segment descriptor priority level */
1162 1, /* segment descriptor present */
1163 0, 0,
1164 0, /* unused - default 32 vs 16 bit size */
1165 0 /* limit granularity (byte/page units)*/ },
1166/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1167{ 0, /* segment base address (overwritten) */
1168 0xfffff, /* length */
1169 SDT_MEMERA, /* segment type */
1170 0, /* segment descriptor priority level */
1171 1, /* segment descriptor present */
1172 0, 0,
1173 0, /* default 32 vs 16 bit size */
1174 1 /* limit granularity (byte/page units)*/ },
1175/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1176{ 0, /* segment base address (overwritten) */
1177 0xfffff, /* length */
1178 SDT_MEMERA, /* segment type */
1179 0, /* segment descriptor priority level */
1180 1, /* segment descriptor present */
1181 0, 0,
1182 0, /* default 32 vs 16 bit size */
1183 1 /* limit granularity (byte/page units)*/ },
1184/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1185{ 0, /* segment base address (overwritten) */
1186 0xfffff, /* length */
1187 SDT_MEMRWA, /* segment type */
1188 0, /* segment descriptor priority level */
1189 1, /* segment descriptor present */
1190 0, 0,
1191 1, /* default 32 vs 16 bit size */
1192 1 /* limit granularity (byte/page units)*/ },
1193/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1194{ 0, /* segment base address (overwritten) */
1195 0xfffff, /* length */
1196 SDT_MEMRWA, /* segment type */
1197 0, /* segment descriptor priority level */
1198 1, /* segment descriptor present */
1199 0, 0,
1200 0, /* default 32 vs 16 bit size */
1201 1 /* limit granularity (byte/page units)*/ },
1202/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1203{ 0, /* segment base address (overwritten) */
1204 0xfffff, /* length */
1205 SDT_MEMRWA, /* segment type */
1206 0, /* segment descriptor priority level */
1207 1, /* segment descriptor present */
1208 0, 0,
1209 0, /* default 32 vs 16 bit size */
1210 1 /* limit granularity (byte/page units)*/ },
1211};
1212
1213static struct soft_segment_descriptor ldt_segs[] = {
1214 /* Null Descriptor - overwritten by call gate */
1215{ 0x0, /* segment base address */
1216 0x0, /* length - all address space */
1217 0, /* segment type */
1218 0, /* segment descriptor priority level */
1219 0, /* segment descriptor present */
1220 0, 0,
1221 0, /* default 32 vs 16 bit size */
1222 0 /* limit granularity (byte/page units)*/ },
1223 /* Null Descriptor - overwritten by call gate */
1224{ 0x0, /* segment base address */
1225 0x0, /* length - all address space */
1226 0, /* segment type */
1227 0, /* segment descriptor priority level */
1228 0, /* segment descriptor present */
1229 0, 0,
1230 0, /* default 32 vs 16 bit size */
1231 0 /* limit granularity (byte/page units)*/ },
1232 /* Null Descriptor - overwritten by call gate */
1233{ 0x0, /* segment base address */
1234 0x0, /* length - all address space */
1235 0, /* segment type */
1236 0, /* segment descriptor priority level */
1237 0, /* segment descriptor present */
1238 0, 0,
1239 0, /* default 32 vs 16 bit size */
1240 0 /* limit granularity (byte/page units)*/ },
1241 /* Code Descriptor for user */
1242{ 0x0, /* segment base address */
1243 0xfffff, /* length - all address space */
1244 SDT_MEMERA, /* segment type */
1245 SEL_UPL, /* segment descriptor priority level */
1246 1, /* segment descriptor present */
1247 0, 0,
1248 1, /* default 32 vs 16 bit size */
1249 1 /* limit granularity (byte/page units)*/ },
1250 /* Null Descriptor - overwritten by call gate */
1251{ 0x0, /* segment base address */
1252 0x0, /* length - all address space */
1253 0, /* segment type */
1254 0, /* segment descriptor priority level */
1255 0, /* segment descriptor present */
1256 0, 0,
1257 0, /* default 32 vs 16 bit size */
1258 0 /* limit granularity (byte/page units)*/ },
1259 /* Data Descriptor for user */
1260{ 0x0, /* segment base address */
1261 0xfffff, /* length - all address space */
1262 SDT_MEMRWA, /* segment type */
1263 SEL_UPL, /* segment descriptor priority level */
1264 1, /* segment descriptor present */
1265 0, 0,
1266 1, /* default 32 vs 16 bit size */
1267 1 /* limit granularity (byte/page units)*/ },
1268};
1269
1270void
1271setidt(idx, func, typ, dpl, selec)
1272 int idx;
1273 inthand_t *func;
1274 int typ;
1275 int dpl;
1276 int selec;
1277{
1278 struct gate_descriptor *ip;
1279
1280 ip = idt + idx;
1281 ip->gd_looffset = (int)func;
1282 ip->gd_selector = selec;
1283 ip->gd_stkcpy = 0;
1284 ip->gd_xx = 0;
1285 ip->gd_type = typ;
1286 ip->gd_dpl = dpl;
1287 ip->gd_p = 1;
1288 ip->gd_hioffset = ((int)func)>>16 ;
1289}
1290
1291#define IDTVEC(name) __CONCAT(X,name)
1292
1293extern inthand_t
1294 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1295 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1296 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1297 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1298 IDTVEC(xmm), IDTVEC(syscall),
1299 IDTVEC(rsvd0);
a64ba182
MD
1300extern inthand_t
1301 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1302
f7bc9806
MD
1303#ifdef DEBUG_INTERRUPTS
1304extern inthand_t *Xrsvdary[256];
1305#endif
1306
984263bc
MD
1307void
1308sdtossd(sd, ssd)
1309 struct segment_descriptor *sd;
1310 struct soft_segment_descriptor *ssd;
1311{
1312 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1313 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1314 ssd->ssd_type = sd->sd_type;
1315 ssd->ssd_dpl = sd->sd_dpl;
1316 ssd->ssd_p = sd->sd_p;
1317 ssd->ssd_def32 = sd->sd_def32;
1318 ssd->ssd_gran = sd->sd_gran;
1319}
1320
1321#define PHYSMAP_SIZE (2 * 8)
1322
1323/*
1324 * Populate the (physmap) array with base/bound pairs describing the
1325 * available physical memory in the system, then test this memory and
1326 * build the phys_avail array describing the actually-available memory.
1327 *
1328 * If we cannot accurately determine the physical memory map, then use
1329 * value from the 0xE801 call, and failing that, the RTC.
1330 *
1331 * Total memory size may be set by the kernel environment variable
1332 * hw.physmem or the compile-time define MAXMEM.
1333 */
1334static void
1335getmemsize(int first)
1336{
1337 int i, physmap_idx, pa_indx;
1338 int hasbrokenint12;
1339 u_int basemem, extmem;
1340 struct vm86frame vmf;
1341 struct vm86context vmc;
1342 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1343 pt_entry_t *pte;
984263bc
MD
1344 const char *cp;
1345 struct {
1346 u_int64_t base;
1347 u_int64_t length;
1348 u_int32_t type;
1349 } *smap;
1350
1351 hasbrokenint12 = 0;
1352 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1353 bzero(&vmf, sizeof(struct vm86frame));
1354 bzero(physmap, sizeof(physmap));
1355 basemem = 0;
1356
1357 /*
1358 * Some newer BIOSes has broken INT 12H implementation which cause
1359 * kernel panic immediately. In this case, we need to scan SMAP
1360 * with INT 15:E820 first, then determine base memory size.
1361 */
1362 if (hasbrokenint12) {
1363 goto int15e820;
1364 }
1365
1366 /*
1367 * Perform "base memory" related probes & setup
1368 */
1369 vm86_intcall(0x12, &vmf);
1370 basemem = vmf.vmf_ax;
1371 if (basemem > 640) {
1372 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1373 basemem);
1374 basemem = 640;
1375 }
1376
1377 /*
1378 * XXX if biosbasemem is now < 640, there is a `hole'
1379 * between the end of base memory and the start of
1380 * ISA memory. The hole may be empty or it may
1381 * contain BIOS code or data. Map it read/write so
1382 * that the BIOS can write to it. (Memory from 0 to
1383 * the physical end of the kernel is mapped read-only
1384 * to begin with and then parts of it are remapped.
1385 * The parts that aren't remapped form holes that
1386 * remain read-only and are unused by the kernel.
1387 * The base memory area is below the physical end of
1388 * the kernel and right now forms a read-only hole.
1389 * The part of it from PAGE_SIZE to
1390 * (trunc_page(biosbasemem * 1024) - 1) will be
1391 * remapped and used by the kernel later.)
1392 *
1393 * This code is similar to the code used in
1394 * pmap_mapdev, but since no memory needs to be
1395 * allocated we simply change the mapping.
1396 */
1397 for (pa = trunc_page(basemem * 1024);
1398 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1399 pte = vtopte(pa + KERNBASE);
984263bc
MD
1400 *pte = pa | PG_RW | PG_V;
1401 }
1402
1403 /*
1404 * if basemem != 640, map pages r/w into vm86 page table so
1405 * that the bios can scribble on it.
1406 */
b5b32410 1407 pte = vm86paddr;
984263bc
MD
1408 for (i = basemem / 4; i < 160; i++)
1409 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1410
1411int15e820:
1412 /*
1413 * map page 1 R/W into the kernel page table so we can use it
1414 * as a buffer. The kernel will unmap this page later.
1415 */
b5b32410 1416 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1417 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1418
1419 /*
1420 * get memory map with INT 15:E820
1421 */
1422#define SMAPSIZ sizeof(*smap)
1423#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1424
1425 vmc.npages = 0;
1426 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1427 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1428
1429 physmap_idx = 0;
1430 vmf.vmf_ebx = 0;
1431 do {
1432 vmf.vmf_eax = 0xE820;
1433 vmf.vmf_edx = SMAP_SIG;
1434 vmf.vmf_ecx = SMAPSIZ;
1435 i = vm86_datacall(0x15, &vmf, &vmc);
1436 if (i || vmf.vmf_eax != SMAP_SIG)
1437 break;
1438 if (boothowto & RB_VERBOSE)
1439 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1440 smap->type,
1441 *(u_int32_t *)((char *)&smap->base + 4),
1442 (u_int32_t)smap->base,
1443 *(u_int32_t *)((char *)&smap->length + 4),
1444 (u_int32_t)smap->length);
1445
1446 if (smap->type != 0x01)
1447 goto next_run;
1448
1449 if (smap->length == 0)
1450 goto next_run;
1451
1452 if (smap->base >= 0xffffffff) {
1453 printf("%uK of memory above 4GB ignored\n",
1454 (u_int)(smap->length / 1024));
1455 goto next_run;
1456 }
1457
1458 for (i = 0; i <= physmap_idx; i += 2) {
1459 if (smap->base < physmap[i + 1]) {
1460 if (boothowto & RB_VERBOSE)
1461 printf(
1462 "Overlapping or non-montonic memory region, ignoring second region\n");
1463 goto next_run;
1464 }
1465 }
1466
1467 if (smap->base == physmap[physmap_idx + 1]) {
1468 physmap[physmap_idx + 1] += smap->length;
1469 goto next_run;
1470 }
1471
1472 physmap_idx += 2;
1473 if (physmap_idx == PHYSMAP_SIZE) {
1474 printf(
1475 "Too many segments in the physical address map, giving up\n");
1476 break;
1477 }
1478 physmap[physmap_idx] = smap->base;
1479 physmap[physmap_idx + 1] = smap->base + smap->length;
1480next_run:
6b08710e 1481 ; /* fix GCC3.x warning */
984263bc
MD
1482 } while (vmf.vmf_ebx != 0);
1483
1484 /*
1485 * Perform "base memory" related probes & setup based on SMAP
1486 */
1487 if (basemem == 0) {
1488 for (i = 0; i <= physmap_idx; i += 2) {
1489 if (physmap[i] == 0x00000000) {
1490 basemem = physmap[i + 1] / 1024;
1491 break;
1492 }
1493 }
1494
1495 if (basemem == 0) {
1496 basemem = 640;
1497 }
1498
1499 if (basemem > 640) {
1500 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1501 basemem);
1502 basemem = 640;
1503 }
1504
1505 for (pa = trunc_page(basemem * 1024);
1506 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1507 pte = vtopte(pa + KERNBASE);
984263bc
MD
1508 *pte = pa | PG_RW | PG_V;
1509 }
1510
b5b32410 1511 pte = vm86paddr;
984263bc
MD
1512 for (i = basemem / 4; i < 160; i++)
1513 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1514 }
1515
1516 if (physmap[1] != 0)
1517 goto physmap_done;
1518
1519 /*
1520 * If we failed above, try memory map with INT 15:E801
1521 */
1522 vmf.vmf_ax = 0xE801;
1523 if (vm86_intcall(0x15, &vmf) == 0) {
1524 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1525 } else {
1526#if 0
1527 vmf.vmf_ah = 0x88;
1528 vm86_intcall(0x15, &vmf);
1529 extmem = vmf.vmf_ax;
1530#else
1531 /*
1532 * Prefer the RTC value for extended memory.
1533 */
1534 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1535#endif
1536 }
1537
1538 /*
1539 * Special hack for chipsets that still remap the 384k hole when
1540 * there's 16MB of memory - this really confuses people that
1541 * are trying to use bus mastering ISA controllers with the
1542 * "16MB limit"; they only have 16MB, but the remapping puts
1543 * them beyond the limit.
1544 *
1545 * If extended memory is between 15-16MB (16-17MB phys address range),
1546 * chop it to 15MB.
1547 */
1548 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1549 extmem = 15 * 1024;
1550
1551 physmap[0] = 0;
1552 physmap[1] = basemem * 1024;
1553 physmap_idx = 2;
1554 physmap[physmap_idx] = 0x100000;
1555 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1556
1557physmap_done:
1558 /*
1559 * Now, physmap contains a map of physical memory.
1560 */
1561
1562#ifdef SMP
17a9f566 1563 /* make hole for AP bootstrap code YYY */
984263bc
MD
1564 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1565
1566 /* look for the MP hardware - needed for apic addresses */
1567 mp_probe();
1568#endif
1569
1570 /*
1571 * Maxmem isn't the "maximum memory", it's one larger than the
1572 * highest page of the physical address space. It should be
1573 * called something like "Maxphyspage". We may adjust this
1574 * based on ``hw.physmem'' and the results of the memory test.
1575 */
1576 Maxmem = atop(physmap[physmap_idx + 1]);
1577
1578#ifdef MAXMEM
1579 Maxmem = MAXMEM / 4;
1580#endif
1581
1582 /*
eb7d35b8 1583 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1584 * for the appropriate modifiers. This overrides MAXMEM.
1585 */
1586 if ((cp = getenv("hw.physmem")) != NULL) {
1587 u_int64_t AllowMem, sanity;
1588 char *ep;
1589
1590 sanity = AllowMem = strtouq(cp, &ep, 0);
1591 if ((ep != cp) && (*ep != 0)) {
1592 switch(*ep) {
1593 case 'g':
1594 case 'G':
1595 AllowMem <<= 10;
1596 case 'm':
1597 case 'M':
1598 AllowMem <<= 10;
1599 case 'k':
1600 case 'K':
1601 AllowMem <<= 10;
1602 break;
1603 default:
1604 AllowMem = sanity = 0;
1605 }
1606 if (AllowMem < sanity)
1607 AllowMem = 0;
1608 }
1609 if (AllowMem == 0)
1610 printf("Ignoring invalid memory size of '%s'\n", cp);
1611 else
1612 Maxmem = atop(AllowMem);
1613 }
1614
1615 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1616 (boothowto & RB_VERBOSE))
6ef943a3 1617 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1618
1619 /*
1620 * If Maxmem has been increased beyond what the system has detected,
1621 * extend the last memory segment to the new limit.
1622 */
1623 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1624 physmap[physmap_idx + 1] = ptoa(Maxmem);
1625
1626 /* call pmap initialization to make new kernel address space */
1627 pmap_bootstrap(first, 0);
1628
1629 /*
1630 * Size up each available chunk of physical memory.
1631 */
1632 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1633 pa_indx = 0;
1634 phys_avail[pa_indx++] = physmap[0];
1635 phys_avail[pa_indx] = physmap[0];
b5b32410 1636 pte = CMAP1;
984263bc
MD
1637
1638 /*
1639 * physmap is in bytes, so when converting to page boundaries,
1640 * round up the start address and round down the end address.
1641 */
1642 for (i = 0; i <= physmap_idx; i += 2) {
1643 vm_offset_t end;
1644
1645 end = ptoa(Maxmem);
1646 if (physmap[i + 1] < end)
1647 end = trunc_page(physmap[i + 1]);
1648 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1649 int tmp, page_bad;
1650#if 0
1651 int *ptr = 0;
1652#else
1653 int *ptr = (int *)CADDR1;
1654#endif
1655
1656 /*
1657 * block out kernel memory as not available.
1658 */
1659 if (pa >= 0x100000 && pa < first)
1660 continue;
1661
1662 page_bad = FALSE;
1663
1664 /*
1665 * map page into kernel: valid, read/write,non-cacheable
1666 */
1667 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1668 cpu_invltlb();
984263bc
MD
1669
1670 tmp = *(int *)ptr;
1671 /*
1672 * Test for alternating 1's and 0's
1673 */
1674 *(volatile int *)ptr = 0xaaaaaaaa;
1675 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1676 page_bad = TRUE;
1677 }
1678 /*
1679 * Test for alternating 0's and 1's
1680 */
1681 *(volatile int *)ptr = 0x55555555;
1682 if (*(volatile int *)ptr != 0x55555555) {
1683 page_bad = TRUE;
1684 }
1685 /*
1686 * Test for all 1's
1687 */
1688 *(volatile int *)ptr = 0xffffffff;
1689 if (*(volatile int *)ptr != 0xffffffff) {
1690 page_bad = TRUE;
1691 }
1692 /*
1693 * Test for all 0's
1694 */
1695 *(volatile int *)ptr = 0x0;
1696 if (*(volatile int *)ptr != 0x0) {
1697 page_bad = TRUE;
1698 }
1699 /*
1700 * Restore original value.
1701 */
1702 *(int *)ptr = tmp;
1703
1704 /*
1705 * Adjust array of valid/good pages.
1706 */
1707 if (page_bad == TRUE) {
1708 continue;
1709 }
1710 /*
1711 * If this good page is a continuation of the
1712 * previous set of good pages, then just increase
1713 * the end pointer. Otherwise start a new chunk.
1714 * Note that "end" points one higher than end,
1715 * making the range >= start and < end.
1716 * If we're also doing a speculative memory
1717 * test and we at or past the end, bump up Maxmem
1718 * so that we keep going. The first bad page
1719 * will terminate the loop.
1720 */
1721 if (phys_avail[pa_indx] == pa) {
1722 phys_avail[pa_indx] += PAGE_SIZE;
1723 } else {
1724 pa_indx++;
1725 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1726 printf("Too many holes in the physical address space, giving up\n");
1727 pa_indx--;
1728 break;
1729 }
1730 phys_avail[pa_indx++] = pa; /* start */
1731 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1732 }
1733 physmem++;
1734 }
1735 }
1736 *pte = 0;
0f7a3396 1737 cpu_invltlb();
984263bc
MD
1738
1739 /*
1740 * XXX
1741 * The last chunk must contain at least one page plus the message
1742 * buffer to avoid complicating other code (message buffer address
1743 * calculation, etc.).
1744 */
1745 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1746 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1747 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1748 phys_avail[pa_indx--] = 0;
1749 phys_avail[pa_indx--] = 0;
1750 }
1751
1752 Maxmem = atop(phys_avail[pa_indx]);
1753
1754 /* Trim off space for the message buffer. */
1755 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1756
1757 avail_end = phys_avail[pa_indx];
1758}
1759
f7bc9806
MD
1760/*
1761 * IDT VECTORS:
1762 * 0 Divide by zero
1763 * 1 Debug
1764 * 2 NMI
1765 * 3 BreakPoint
1766 * 4 OverFlow
1767 * 5 Bound-Range
1768 * 6 Invalid OpCode
1769 * 7 Device Not Available (x87)
1770 * 8 Double-Fault
1771 * 9 Coprocessor Segment overrun (unsupported, reserved)
1772 * 10 Invalid-TSS
1773 * 11 Segment not present
1774 * 12 Stack
1775 * 13 General Protection
1776 * 14 Page Fault
1777 * 15 Reserved
1778 * 16 x87 FP Exception pending
1779 * 17 Alignment Check
1780 * 18 Machine Check
1781 * 19 SIMD floating point
1782 * 20-31 reserved
1783 * 32-255 INTn/external sources
1784 */
984263bc 1785void
17a9f566 1786init386(int first)
984263bc
MD
1787{
1788 struct gate_descriptor *gdp;
1789 int gsel_tss, metadata_missing, off, x;
85100692 1790 struct mdglobaldata *gd;
984263bc
MD
1791
1792 /*
1793 * Prevent lowering of the ipl if we call tsleep() early.
1794 */
85100692 1795 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1796 bzero(gd, sizeof(*gd));
984263bc 1797
85100692 1798 gd->mi.gd_curthread = &thread0;
984263bc
MD
1799
1800 atdevbase = ISA_HOLE_START + KERNBASE;
1801
1802 metadata_missing = 0;
1803 if (bootinfo.bi_modulep) {
1804 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1805 preload_bootstrap_relocate(KERNBASE);
1806 } else {
1807 metadata_missing = 1;
1808 }
1809 if (bootinfo.bi_envp)
1810 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1811
4e8e646b
MD
1812 /* start with one cpu */
1813 ncpus = 1;
984263bc
MD
1814 /* Init basic tunables, hz etc */
1815 init_param1();
1816
1817 /*
1818 * make gdt memory segments, the code segment goes up to end of the
1819 * page with etext in it, the data segment goes to the end of
1820 * the address space
1821 */
1822 /*
1823 * XXX text protection is temporarily (?) disabled. The limit was
1824 * i386_btop(round_page(etext)) - 1.
1825 */
1826 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1827 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1828
984263bc
MD
1829 gdt_segs[GPRIV_SEL].ssd_limit =
1830 atop(sizeof(struct privatespace) - 1);
8ad65e08 1831 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1832 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1833 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1834
85100692 1835 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1836
84b592ba
MD
1837 /*
1838 * Note: on both UP and SMP curthread must be set non-NULL
1839 * early in the boot sequence because the system assumes
1840 * that 'curthread' is never NULL.
1841 */
984263bc
MD
1842
1843 for (x = 0; x < NGDT; x++) {
1844#ifdef BDE_DEBUGGER
1845 /* avoid overwriting db entries with APM ones */
1846 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1847 continue;
1848#endif
1849 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1850 }
1851
1852 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1853 r_gdt.rd_base = (int) gdt;
1854 lgdt(&r_gdt);
1855
73e4f7b9
MD
1856 mi_gdinit(&gd->mi, 0);
1857 cpu_gdinit(gd, 0);
1858 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1859 lwkt_set_comm(&thread0, "thread0");
1860 proc0.p_addr = (void *)thread0.td_kstack;
1861 proc0.p_thread = &thread0;
a2a5ad0d 1862 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
98a7f915 1863 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1864 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1865 thread0.td_proc = &proc0;
1866 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1867 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1868
984263bc
MD
1869 /* make ldt memory segments */
1870 /*
1871 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1872 * should be spelled ...MAX_USER...
1873 */
1874 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1875 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1876 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1877 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1878
1879 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1880 lldt(_default_ldt);
17a9f566 1881 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1882 /* spinlocks and the BGL */
1883 init_locks();
984263bc
MD
1884
1885 /* exceptions */
f7bc9806
MD
1886 for (x = 0; x < NIDT; x++) {
1887#ifdef DEBUG_INTERRUPTS
1888 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1889#else
1890 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1891#endif
1892 }
984263bc
MD
1893 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1894 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1895 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1896 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1897 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1898 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1899 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1900 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1901 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1902 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1903 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1905 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1908 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1909 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1913 setidt(0x80, &IDTVEC(int0x80_syscall),
1914 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1915 setidt(0x81, &IDTVEC(int0x81_syscall),
1916 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1917
1918 r_idt.rd_limit = sizeof(idt0) - 1;
1919 r_idt.rd_base = (int) idt;
1920 lidt(&r_idt);
1921
1922 /*
1923 * Initialize the console before we print anything out.
1924 */
1925 cninit();
1926
1927 if (metadata_missing)
1928 printf("WARNING: loader(8) metadata is missing!\n");
1929
984263bc
MD
1930#if NISA >0
1931 isa_defaultirq();
1932#endif
1933 rand_initialize();
1934
1935#ifdef DDB
1936 kdb_init();
1937 if (boothowto & RB_KDB)
1938 Debugger("Boot flags requested debugger");
1939#endif
1940
1941 finishidentcpu(); /* Final stage of CPU initialization */
1942 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1943 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1944 initializecpu(); /* Initialize CPU registers */
1945
b7c628e4
MD
1946 /*
1947 * make an initial tss so cpu can get interrupt stack on syscall!
1948 * The 16 bytes is to save room for a VM86 context.
1949 */
17a9f566
MD
1950 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1951 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1952 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1953 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1954 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1955 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1956 ltr(gsel_tss);
1957
1958 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1959 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1960 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1961 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1962 dblfault_tss.tss_cr3 = (int)IdlePTD;
1963 dblfault_tss.tss_eip = (int) dblfault_handler;
1964 dblfault_tss.tss_eflags = PSL_KERNEL;
1965 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1966 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1967 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1968 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1969 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1970
1971 vm86_initialize();
1972 getmemsize(first);
1973 init_param2(physmem);
1974
1975 /* now running on new page tables, configured,and u/iom is accessible */
1976
1977 /* Map the message buffer. */
1978 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1979 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1980
1981 msgbufinit(msgbufp, MSGBUF_SIZE);
1982
1983 /* make a call gate to reenter kernel with */
1984 gdp = &ldt[LSYS5CALLS_SEL].gd;
1985
1986 x = (int) &IDTVEC(syscall);
1987 gdp->gd_looffset = x++;
1988 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1989 gdp->gd_stkcpy = 1;
1990 gdp->gd_type = SDT_SYS386CGT;
1991 gdp->gd_dpl = SEL_UPL;
1992 gdp->gd_p = 1;
1993 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1994
1995 /* XXX does this work? */
1996 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1997 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1998
1999 /* transfer to user mode */
2000
2001 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2002 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2003
2004 /* setup proc 0's pcb */
b7c628e4
MD
2005 thread0.td_pcb->pcb_flags = 0;
2006 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2007 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2008 proc0.p_md.md_regs = &proc0_tf;
2009}
2010
8ad65e08 2011/*
17a9f566
MD
2012 * Initialize machine-dependant portions of the global data structure.
2013 * Note that the global data area and cpu0's idlestack in the private
2014 * data space were allocated in locore.
ef0fdad1
MD
2015 *
2016 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2017 *
2018 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2019 */
2020void
85100692 2021cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2022{
2023 char *sp;
8ad65e08 2024
7d0bac62 2025 if (cpu)
a2a5ad0d 2026 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2027
85100692 2028 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2029 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2030 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2031 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2032 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2033 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2034}
2035
12e4aaff
MD
2036struct globaldata *
2037globaldata_find(int cpu)
2038{
2039 KKASSERT(cpu >= 0 && cpu < ncpus);
2040 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2041}
2042
984263bc
MD
2043#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2044static void f00f_hack(void *unused);
2045SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2046
2047static void
17a9f566
MD
2048f00f_hack(void *unused)
2049{
984263bc 2050 struct gate_descriptor *new_idt;
984263bc
MD
2051 vm_offset_t tmp;
2052
2053 if (!has_f00f_bug)
2054 return;
2055
2056 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2057
2058 r_idt.rd_limit = sizeof(idt0) - 1;
2059
2060 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2061 if (tmp == 0)
2062 panic("kmem_alloc returned 0");
2063 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2064 panic("kmem_alloc returned non-page-aligned memory");
2065 /* Put the first seven entries in the lower page */
2066 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2067 bcopy(idt, new_idt, sizeof(idt0));
2068 r_idt.rd_base = (int)new_idt;
2069 lidt(&r_idt);
2070 idt = new_idt;
2071 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2072 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2073 panic("vm_map_protect failed");
2074 return;
2075}
2076#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2077
2078int
2079ptrace_set_pc(p, addr)
2080 struct proc *p;
2081 unsigned long addr;
2082{
2083 p->p_md.md_regs->tf_eip = addr;
2084 return (0);
2085}
2086
2087int
2088ptrace_single_step(p)
2089 struct proc *p;
2090{
2091 p->p_md.md_regs->tf_eflags |= PSL_T;
2092 return (0);
2093}
2094
2095int ptrace_read_u_check(p, addr, len)
2096 struct proc *p;
2097 vm_offset_t addr;
2098 size_t len;
2099{
2100 vm_offset_t gap;
2101
2102 if ((vm_offset_t) (addr + len) < addr)
2103 return EPERM;
2104 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2105 return 0;
2106
2107 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2108
2109 if ((vm_offset_t) addr < gap)
2110 return EPERM;
2111 if ((vm_offset_t) (addr + len) <=
2112 (vm_offset_t) (gap + sizeof(struct trapframe)))
2113 return 0;
2114 return EPERM;
2115}
2116
2117int ptrace_write_u(p, off, data)
2118 struct proc *p;
2119 vm_offset_t off;
2120 long data;
2121{
2122 struct trapframe frame_copy;
2123 vm_offset_t min;
2124 struct trapframe *tp;
2125
2126 /*
2127 * Privileged kernel state is scattered all over the user area.
2128 * Only allow write access to parts of regs and to fpregs.
2129 */
2130 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2131 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2132 tp = p->p_md.md_regs;
2133 frame_copy = *tp;
2134 *(int *)((char *)&frame_copy + (off - min)) = data;
2135 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2136 !CS_SECURE(frame_copy.tf_cs))
2137 return (EINVAL);
2138 *(int*)((char *)p->p_addr + off) = data;
2139 return (0);
2140 }
b7c628e4
MD
2141
2142 /*
2143 * The PCB is at the end of the user area YYY
2144 */
2145 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2146 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2147 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2148 *(int*)((char *)p->p_addr + off) = data;
2149 return (0);
2150 }
2151 return (EFAULT);
2152}
2153
2154int
2155fill_regs(p, regs)
2156 struct proc *p;
2157 struct reg *regs;
2158{
2159 struct pcb *pcb;
2160 struct trapframe *tp;
2161
2162 tp = p->p_md.md_regs;
2163 regs->r_fs = tp->tf_fs;
2164 regs->r_es = tp->tf_es;
2165 regs->r_ds = tp->tf_ds;
2166 regs->r_edi = tp->tf_edi;
2167 regs->r_esi = tp->tf_esi;
2168 regs->r_ebp = tp->tf_ebp;
2169 regs->r_ebx = tp->tf_ebx;
2170 regs->r_edx = tp->tf_edx;
2171 regs->r_ecx = tp->tf_ecx;
2172 regs->r_eax = tp->tf_eax;
2173 regs->r_eip = tp->tf_eip;
2174 regs->r_cs = tp->tf_cs;
2175 regs->r_eflags = tp->tf_eflags;
2176 regs->r_esp = tp->tf_esp;
2177 regs->r_ss = tp->tf_ss;
b7c628e4 2178 pcb = p->p_thread->td_pcb;
984263bc
MD
2179 regs->r_gs = pcb->pcb_gs;
2180 return (0);
2181}
2182
2183int
2184set_regs(p, regs)
2185 struct proc *p;
2186 struct reg *regs;
2187{
2188 struct pcb *pcb;
2189 struct trapframe *tp;
2190
2191 tp = p->p_md.md_regs;
2192 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2193 !CS_SECURE(regs->r_cs))
2194 return (EINVAL);
2195 tp->tf_fs = regs->r_fs;
2196 tp->tf_es = regs->r_es;
2197 tp->tf_ds = regs->r_ds;
2198 tp->tf_edi = regs->r_edi;
2199 tp->tf_esi = regs->r_esi;
2200 tp->tf_ebp = regs->r_ebp;
2201 tp->tf_ebx = regs->r_ebx;
2202 tp->tf_edx = regs->r_edx;
2203 tp->tf_ecx = regs->r_ecx;
2204 tp->tf_eax = regs->r_eax;
2205 tp->tf_eip = regs->r_eip;
2206 tp->tf_cs = regs->r_cs;
2207 tp->tf_eflags = regs->r_eflags;
2208 tp->tf_esp = regs->r_esp;
2209 tp->tf_ss = regs->r_ss;
b7c628e4 2210 pcb = p->p_thread->td_pcb;
984263bc
MD
2211 pcb->pcb_gs = regs->r_gs;
2212 return (0);
2213}
2214
642a6e88 2215#ifndef CPU_DISABLE_SSE
984263bc
MD
2216static void
2217fill_fpregs_xmm(sv_xmm, sv_87)
2218 struct savexmm *sv_xmm;
2219 struct save87 *sv_87;
2220{
c9faf524
RG
2221 struct env87 *penv_87 = &sv_87->sv_env;
2222 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2223 int i;
2224
2225 /* FPU control/status */
2226 penv_87->en_cw = penv_xmm->en_cw;
2227 penv_87->en_sw = penv_xmm->en_sw;
2228 penv_87->en_tw = penv_xmm->en_tw;
2229 penv_87->en_fip = penv_xmm->en_fip;
2230 penv_87->en_fcs = penv_xmm->en_fcs;
2231 penv_87->en_opcode = penv_xmm->en_opcode;
2232 penv_87->en_foo = penv_xmm->en_foo;
2233 penv_87->en_fos = penv_xmm->en_fos;
2234
2235 /* FPU registers */
2236 for (i = 0; i < 8; ++i)
2237 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2238
2239 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2240}
2241
2242static void
2243set_fpregs_xmm(sv_87, sv_xmm)
2244 struct save87 *sv_87;
2245 struct savexmm *sv_xmm;
2246{
c9faf524
RG
2247 struct env87 *penv_87 = &sv_87->sv_env;
2248 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2249 int i;
2250
2251 /* FPU control/status */
2252 penv_xmm->en_cw = penv_87->en_cw;
2253 penv_xmm->en_sw = penv_87->en_sw;
2254 penv_xmm->en_tw = penv_87->en_tw;
2255 penv_xmm->en_fip = penv_87->en_fip;
2256 penv_xmm->en_fcs = penv_87->en_fcs;
2257 penv_xmm->en_opcode = penv_87->en_opcode;
2258 penv_xmm->en_foo = penv_87->en_foo;
2259 penv_xmm->en_fos = penv_87->en_fos;
2260
2261 /* FPU registers */
2262 for (i = 0; i < 8; ++i)
2263 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2264
2265 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2266}
642a6e88 2267#endif /* CPU_DISABLE_SSE */
984263bc
MD
2268
2269int
2270fill_fpregs(p, fpregs)
2271 struct proc *p;
2272 struct fpreg *fpregs;
2273{
642a6e88 2274#ifndef CPU_DISABLE_SSE
984263bc 2275 if (cpu_fxsr) {
b7c628e4 2276 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2277 (struct save87 *)fpregs);
2278 return (0);
2279 }
642a6e88 2280#endif /* CPU_DISABLE_SSE */
b7c628e4 2281 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2282 return (0);
2283}
2284
2285int
2286set_fpregs(p, fpregs)
2287 struct proc *p;
2288 struct fpreg *fpregs;
2289{
642a6e88 2290#ifndef CPU_DISABLE_SSE
984263bc
MD
2291 if (cpu_fxsr) {
2292 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2293 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2294 return (0);
2295 }
642a6e88 2296#endif /* CPU_DISABLE_SSE */
b7c628e4 2297 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2298 return (0);
2299}
2300
2301int
2302fill_dbregs(p, dbregs)
2303 struct proc *p;
2304 struct dbreg *dbregs;
2305{
2306 struct pcb *pcb;
2307
2308 if (p == NULL) {
2309 dbregs->dr0 = rdr0();
2310 dbregs->dr1 = rdr1();
2311 dbregs->dr2 = rdr2();
2312 dbregs->dr3 = rdr3();
2313 dbregs->dr4 = rdr4();
2314 dbregs->dr5 = rdr5();
2315 dbregs->dr6 = rdr6();
2316 dbregs->dr7 = rdr7();
2317 }
2318 else {
b7c628e4 2319 pcb = p->p_thread->td_pcb;
984263bc
MD
2320 dbregs->dr0 = pcb->pcb_dr0;
2321 dbregs->dr1 = pcb->pcb_dr1;
2322 dbregs->dr2 = pcb->pcb_dr2;
2323 dbregs->dr3 = pcb->pcb_dr3;
2324 dbregs->dr4 = 0;
2325 dbregs->dr5 = 0;
2326 dbregs->dr6 = pcb->pcb_dr6;
2327 dbregs->dr7 = pcb->pcb_dr7;
2328 }
2329 return (0);
2330}
2331
2332int
2333set_dbregs(p, dbregs)
2334 struct proc *p;
2335 struct dbreg *dbregs;
2336{
2337 struct pcb *pcb;
2338 int i;
2339 u_int32_t mask1, mask2;
2340
2341 if (p == NULL) {
2342 load_dr0(dbregs->dr0);
2343 load_dr1(dbregs->dr1);
2344 load_dr2(dbregs->dr2);
2345 load_dr3(dbregs->dr3);
2346 load_dr4(dbregs->dr4);
2347 load_dr5(dbregs->dr5);
2348 load_dr6(dbregs->dr6);
2349 load_dr7(dbregs->dr7);
2350 }
2351 else {
2352 /*
2353 * Don't let an illegal value for dr7 get set. Specifically,
2354 * check for undefined settings. Setting these bit patterns
2355 * result in undefined behaviour and can lead to an unexpected
2356 * TRCTRAP.
2357 */
2358 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2359 i++, mask1 <<= 2, mask2 <<= 2)
2360 if ((dbregs->dr7 & mask1) == mask2)
2361 return (EINVAL);
2362
b7c628e4 2363 pcb = p->p_thread->td_pcb;
984263bc
MD
2364
2365 /*
2366 * Don't let a process set a breakpoint that is not within the
2367 * process's address space. If a process could do this, it
2368 * could halt the system by setting a breakpoint in the kernel
2369 * (if ddb was enabled). Thus, we need to check to make sure
2370 * that no breakpoints are being enabled for addresses outside
2371 * process's address space, unless, perhaps, we were called by
2372 * uid 0.
2373 *
2374 * XXX - what about when the watched area of the user's
2375 * address space is written into from within the kernel
2376 * ... wouldn't that still cause a breakpoint to be generated
2377 * from within kernel mode?
2378 */
2379
dadab5e9 2380 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2381 if (dbregs->dr7 & 0x3) {
2382 /* dr0 is enabled */
2383 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2384 return (EINVAL);
2385 }
2386
2387 if (dbregs->dr7 & (0x3<<2)) {
2388 /* dr1 is enabled */
2389 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2390 return (EINVAL);
2391 }
2392
2393 if (dbregs->dr7 & (0x3<<4)) {
2394 /* dr2 is enabled */
2395 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2396 return (EINVAL);
2397 }
2398
2399 if (dbregs->dr7 & (0x3<<6)) {
2400 /* dr3 is enabled */
2401 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2402 return (EINVAL);
2403 }
2404 }
2405
2406 pcb->pcb_dr0 = dbregs->dr0;
2407 pcb->pcb_dr1 = dbregs->dr1;
2408 pcb->pcb_dr2 = dbregs->dr2;
2409 pcb->pcb_dr3 = dbregs->dr3;
2410 pcb->pcb_dr6 = dbregs->dr6;
2411 pcb->pcb_dr7 = dbregs->dr7;
2412
2413 pcb->pcb_flags |= PCB_DBREGS;
2414 }
2415
2416 return (0);
2417}
2418
2419/*
2420 * Return > 0 if a hardware breakpoint has been hit, and the
2421 * breakpoint was in user space. Return 0, otherwise.
2422 */
2423int
2424user_dbreg_trap(void)
2425{
2426 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2427 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2428 int nbp; /* number of breakpoints that triggered */
2429 caddr_t addr[4]; /* breakpoint addresses */
2430 int i;
2431
2432 dr7 = rdr7();
2433 if ((dr7 & 0x000000ff) == 0) {
2434 /*
2435 * all GE and LE bits in the dr7 register are zero,
2436 * thus the trap couldn't have been caused by the
2437 * hardware debug registers
2438 */
2439 return 0;
2440 }
2441
2442 nbp = 0;
2443 dr6 = rdr6();
2444 bp = dr6 & 0x0000000f;
2445
2446 if (!bp) {
2447 /*
2448 * None of the breakpoint bits are set meaning this
2449 * trap was not caused by any of the debug registers
2450 */
2451 return 0;
2452 }
2453
2454 /*
2455 * at least one of the breakpoints were hit, check to see
2456 * which ones and if any of them are user space addresses
2457 */
2458
2459 if (bp & 0x01) {
2460 addr[nbp++] = (caddr_t)rdr0();
2461 }
2462 if (bp & 0x02) {
2463 addr[nbp++] = (caddr_t)rdr1();
2464 }
2465 if (bp & 0x04) {
2466 addr[nbp++] = (caddr_t)rdr2();
2467 }
2468 if (bp & 0x08) {
2469 addr[nbp++] = (caddr_t)rdr3();
2470 }
2471
2472 for (i=0; i<nbp; i++) {
2473 if (addr[i] <
2474 (caddr_t)VM_MAXUSER_ADDRESS) {
2475 /*
2476 * addr[i] is in user space
2477 */
2478 return nbp;
2479 }
2480 }
2481
2482 /*
2483 * None of the breakpoints are in user space.
2484 */
2485 return 0;
2486}
2487
2488
2489#ifndef DDB
2490void
2491Debugger(const char *msg)
2492{
2493 printf("Debugger(\"%s\") called.\n", msg);
2494}
2495#endif /* no DDB */
2496
2497#include <sys/disklabel.h>
2498
2499/*
2500 * Determine the size of the transfer, and make sure it is
2501 * within the boundaries of the partition. Adjust transfer
2502 * if needed, and signal errors or early completion.
2503 */
2504int
2505bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2506{
2507 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2508 int labelsect = lp->d_partitions[0].p_offset;
2509 int maxsz = p->p_size,
2510 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2511
2512 /* overwriting disk label ? */
2513 /* XXX should also protect bootstrap in first 8K */
2514 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2515#if LABELSECTOR != 0
2516 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2517#endif
2518 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2519 bp->b_error = EROFS;
2520 goto bad;
2521 }
2522
2523#if defined(DOSBBSECTOR) && defined(notyet)
2524 /* overwriting master boot record? */
2525 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2526 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2527 bp->b_error = EROFS;
2528 goto bad;
2529 }
2530#endif
2531
2532 /* beyond partition? */
2533 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2534 /* if exactly at end of disk, return an EOF */
2535 if (bp->b_blkno == maxsz) {
2536 bp->b_resid = bp->b_bcount;
2537 return(0);
2538 }
2539 /* or truncate if part of it fits */
2540 sz = maxsz - bp->b_blkno;
2541 if (sz <= 0) {
2542 bp->b_error = EINVAL;
2543 goto bad;
2544 }
2545 bp->b_bcount = sz << DEV_BSHIFT;
2546 }
2547
2548 bp->b_pblkno = bp->b_blkno + p->p_offset;
2549 return(1);
2550
2551bad:
2552 bp->b_flags |= B_ERROR;
2553 return(-1);
2554}
2555
2556#ifdef DDB
2557
2558/*
2559 * Provide inb() and outb() as functions. They are normally only
2560 * available as macros calling inlined functions, thus cannot be
2561 * called inside DDB.
2562 *
2563 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2564 */
2565
2566#undef inb
2567#undef outb
2568
2569/* silence compiler warnings */
2570u_char inb(u_int);
2571void outb(u_int, u_char);
2572
2573u_char
2574inb(u_int port)
2575{
2576 u_char data;
2577 /*
2578 * We use %%dx and not %1 here because i/o is done at %dx and not at
2579 * %edx, while gcc generates inferior code (movw instead of movl)
2580 * if we tell it to load (u_short) port.
2581 */
2582 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2583 return (data);
2584}
2585
2586void
2587outb(u_int port, u_char data)
2588{
2589 u_char al;
2590 /*
2591 * Use an unnecessary assignment to help gcc's register allocator.
2592 * This make a large difference for gcc-1.40 and a tiny difference
2593 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2594 * best results. gcc-2.6.0 can't handle this.
2595 */
2596 al = data;
2597 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2598}
2599
2600#endif /* DDB */
8a8d5d85
MD
2601
2602
2603
2604#include "opt_cpu.h"
8a8d5d85
MD
2605
2606
2607/*
2608 * initialize all the SMP locks
2609 */
2610
2611/* critical region around IO APIC, apic_imen */
2612struct spinlock imen_spinlock;
2613
2614/* Make FAST_INTR() routines sequential */
2615struct spinlock fast_intr_spinlock;
2616
2617/* critical region for old style disable_intr/enable_intr */
2618struct spinlock mpintr_spinlock;
2619
2620/* critical region around INTR() routines */
2621struct spinlock intr_spinlock;
2622
2623/* lock region used by kernel profiling */
2624struct spinlock mcount_spinlock;
2625
2626/* locks com (tty) data/hardware accesses: a FASTINTR() */
2627struct spinlock com_spinlock;
2628
2629/* locks kernel printfs */
2630struct spinlock cons_spinlock;
2631
2632/* lock regions around the clock hardware */
2633struct spinlock clock_spinlock;
2634
2635/* lock around the MP rendezvous */
2636struct spinlock smp_rv_spinlock;
2637
2638static void
2639init_locks(void)
2640{
2641 /*
2642 * mp_lock = 0; BSP already owns the MP lock
2643 */
2644 /*
2645 * Get the initial mp_lock with a count of 1 for the BSP.
2646 * This uses a LOGICAL cpu ID, ie BSP == 0.
2647 */
2648#ifdef SMP
2649 cpu_get_initial_mplock();
2650#endif
41a01a4d 2651 /* DEPRECATED */
8a8d5d85
MD
2652 spin_lock_init(&mcount_spinlock);
2653 spin_lock_init(&fast_intr_spinlock);
2654 spin_lock_init(&intr_spinlock);
2655 spin_lock_init(&mpintr_spinlock);
2656 spin_lock_init(&imen_spinlock);
2657 spin_lock_init(&smp_rv_spinlock);
2658 spin_lock_init(&com_spinlock);
2659 spin_lock_init(&clock_spinlock);
2660 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2661
2662 /* our token pool needs to work early */
2663 lwkt_token_pool_init();
8a8d5d85
MD
2664}
2665