kernel: Remove some unused variables in RAID and disk drivers.
[dragonfly.git] / sys / dev / raid / ciss / ciss.c
CommitLineData
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1/*-
2 * Copyright (c) 2001 Michael Smith
9cf9a798 3 * Copyright (c) 2004 Paul Saab
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4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
a8416dcf 27 * $FreeBSD: src/sys/dev/ciss/ciss.c,v 1.113 2012/03/12 08:03:51 scottl Exp $
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28 */
29
30/*
31 * Common Interface for SCSI-3 Support driver.
32 *
33 * CISS claims to provide a common interface between a generic SCSI
34 * transport and an intelligent host adapter.
35 *
36 * This driver supports CISS as defined in the document "CISS Command
37 * Interface for SCSI-3 Support Open Specification", Version 1.04,
38 * Valence Number 1, dated 20001127, produced by Compaq Computer
39 * Corporation. This document appears to be a hastily and somewhat
40 * arbitrarlily cut-down version of a larger (and probably even more
41 * chaotic and inconsistent) Compaq internal document. Various
42 * details were also gleaned from Compaq's "cciss" driver for Linux.
43 *
44 * We provide a shim layer between the CISS interface and CAM,
45 * offloading most of the queueing and being-a-disk chores onto CAM.
46 * Entry to the driver is via the PCI bus attachment (ciss_probe,
47 * ciss_attach, etc) and via the CAM interface (ciss_cam_action,
48 * ciss_cam_poll). The Compaq CISS adapters are, however, poor SCSI
49 * citizens and we have to fake up some responses to get reasonable
50 * behaviour out of them. In addition, the CISS command set is by no
51 * means adequate to support the functionality of a RAID controller,
52 * and thus the supported Compaq adapters utilise portions of the
53 * control protocol from earlier Compaq adapter families.
54 *
55 * Note that we only support the "simple" transport layer over PCI.
56 * This interface (ab)uses the I2O register set (specifically the post
57 * queues) to exchange commands with the adapter. Other interfaces
58 * are available, but we aren't supposed to know about them, and it is
59 * dubious whether they would provide major performance improvements
60 * except under extreme load.
9cf9a798 61 *
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62 * Currently the only supported CISS adapters are the Compaq Smart
63 * Array 5* series (5300, 5i, 532). Even with only three adapters,
64 * Compaq still manage to have interface variations.
65 *
66 *
67 * Thanks must go to Fred Harris and Darryl DeVinney at Compaq, as
68 * well as Paul Saab at Yahoo! for their assistance in making this
69 * driver happen.
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70 *
71 * More thanks must go to John Cagle at HP for the countless hours
72 * spent making this driver "work" with the MSA* series storage
73 * enclosures. Without his help (and nagging), this driver could not
74 * be used with these enclosures.
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75 */
76
77#include <sys/param.h>
78#include <sys/systm.h>
79#include <sys/malloc.h>
80#include <sys/kernel.h>
81#include <sys/bus.h>
82#include <sys/conf.h>
984263bc 83#include <sys/stat.h>
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84#include <sys/kthread.h>
85#include <sys/queue.h>
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86#include <sys/sysctl.h>
87#include <sys/device.h>
cd8ab232 88
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89#include <bus/cam/cam.h>
90#include <bus/cam/cam_ccb.h>
91#include <bus/cam/cam_periph.h>
92#include <bus/cam/cam_sim.h>
93#include <bus/cam/cam_xpt_sim.h>
94#include <bus/cam/scsi/scsi_all.h>
95#include <bus/cam/scsi/scsi_message.h>
984263bc 96
984263bc 97#include <machine/endian.h>
a8416dcf 98#include <sys/rman.h>
984263bc 99
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100#include <bus/pci/pcireg.h>
101#include <bus/pci/pcivar.h>
984263bc 102
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103#include <dev/raid/ciss/cissreg.h>
104#include <dev/raid/ciss/cissio.h>
105#include <dev/raid/ciss/cissvar.h>
984263bc 106
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107static MALLOC_DEFINE(CISS_MALLOC_CLASS, "ciss_data",
108 "ciss internal data buffers");
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109
110/* pci interface */
111static int ciss_lookup(device_t dev);
112static int ciss_probe(device_t dev);
113static int ciss_attach(device_t dev);
114static int ciss_detach(device_t dev);
115static int ciss_shutdown(device_t dev);
116
117/* (de)initialisation functions, control wrappers */
118static int ciss_init_pci(struct ciss_softc *sc);
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119static int ciss_setup_msix(struct ciss_softc *sc);
120static int ciss_init_perf(struct ciss_softc *sc);
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121static int ciss_wait_adapter(struct ciss_softc *sc);
122static int ciss_flush_adapter(struct ciss_softc *sc);
123static int ciss_init_requests(struct ciss_softc *sc);
124static void ciss_command_map_helper(void *arg, bus_dma_segment_t *segs,
125 int nseg, int error);
126static int ciss_identify_adapter(struct ciss_softc *sc);
127static int ciss_init_logical(struct ciss_softc *sc);
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128static int ciss_init_physical(struct ciss_softc *sc);
129static int ciss_filter_physical(struct ciss_softc *sc, struct ciss_lun_report *cll);
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130static int ciss_identify_logical(struct ciss_softc *sc, struct ciss_ldrive *ld);
131static int ciss_get_ldrive_status(struct ciss_softc *sc, struct ciss_ldrive *ld);
132static int ciss_update_config(struct ciss_softc *sc);
9cf9a798 133static int ciss_accept_media(struct ciss_softc *sc, struct ciss_ldrive *ld);
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134static void ciss_init_sysctl(struct ciss_softc *sc);
135static void ciss_soft_reset(struct ciss_softc *sc);
984263bc 136static void ciss_free(struct ciss_softc *sc);
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137static void ciss_spawn_notify_thread(struct ciss_softc *sc);
138static void ciss_kill_notify_thread(struct ciss_softc *sc);
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139
140/* request submission/completion */
141static int ciss_start(struct ciss_request *cr);
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142static void ciss_done(struct ciss_softc *sc, cr_qhead_t *qh);
143static void ciss_perf_done(struct ciss_softc *sc, cr_qhead_t *qh);
984263bc 144static void ciss_intr(void *arg);
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145static void ciss_perf_intr(void *arg);
146static void ciss_perf_msi_intr(void *arg);
147static void ciss_complete(struct ciss_softc *sc, cr_qhead_t *qh);
148static int _ciss_report_request(struct ciss_request *cr, int *command_status, int *scsi_status, const char *func);
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149static int ciss_synch_request(struct ciss_request *cr, int timeout);
150static int ciss_poll_request(struct ciss_request *cr, int timeout);
151static int ciss_wait_request(struct ciss_request *cr, int timeout);
152#if 0
153static int ciss_abort_request(struct ciss_request *cr);
154#endif
155
156/* request queueing */
157static int ciss_get_request(struct ciss_softc *sc, struct ciss_request **crp);
158static void ciss_preen_command(struct ciss_request *cr);
159static void ciss_release_request(struct ciss_request *cr);
160
161/* request helpers */
162static int ciss_get_bmic_request(struct ciss_softc *sc, struct ciss_request **crp,
163 int opcode, void **bufp, size_t bufsize);
164static int ciss_user_command(struct ciss_softc *sc, IOCTL_Command_struct *ioc);
165
166/* DMA map/unmap */
167static int ciss_map_request(struct ciss_request *cr);
168static void ciss_request_map_helper(void *arg, bus_dma_segment_t *segs,
169 int nseg, int error);
170static void ciss_unmap_request(struct ciss_request *cr);
171
172/* CAM interface */
173static int ciss_cam_init(struct ciss_softc *sc);
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174static void ciss_cam_rescan_target(struct ciss_softc *sc,
175 int bus, int target);
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176static void ciss_cam_rescan_all(struct ciss_softc *sc);
177static void ciss_cam_rescan_callback(struct cam_periph *periph, union ccb *ccb);
178static void ciss_cam_action(struct cam_sim *sim, union ccb *ccb);
179static int ciss_cam_action_io(struct cam_sim *sim, struct ccb_scsiio *csio);
180static int ciss_cam_emulate(struct ciss_softc *sc, struct ccb_scsiio *csio);
181static void ciss_cam_poll(struct cam_sim *sim);
182static void ciss_cam_complete(struct ciss_request *cr);
183static void ciss_cam_complete_fixup(struct ciss_softc *sc, struct ccb_scsiio *csio);
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184static struct cam_periph *ciss_find_periph(struct ciss_softc *sc,
185 int bus, int target);
186static int ciss_name_device(struct ciss_softc *sc, int bus, int target);
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187
188/* periodic status monitoring */
189static void ciss_periodic(void *arg);
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190static void ciss_nop_complete(struct ciss_request *cr);
191static void ciss_disable_adapter(struct ciss_softc *sc);
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192static void ciss_notify_event(struct ciss_softc *sc);
193static void ciss_notify_complete(struct ciss_request *cr);
194static int ciss_notify_abort(struct ciss_softc *sc);
195static int ciss_notify_abort_bmic(struct ciss_softc *sc);
9cf9a798 196static void ciss_notify_hotplug(struct ciss_softc *sc, struct ciss_notify *cn);
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197static void ciss_notify_logical(struct ciss_softc *sc, struct ciss_notify *cn);
198static void ciss_notify_physical(struct ciss_softc *sc, struct ciss_notify *cn);
199
200/* debugging output */
201static void ciss_print_request(struct ciss_request *cr);
202static void ciss_print_ldrive(struct ciss_softc *sc, struct ciss_ldrive *ld);
203static const char *ciss_name_ldrive_status(int status);
204static int ciss_decode_ldrive_status(int status);
205static const char *ciss_name_ldrive_org(int org);
206static const char *ciss_name_command_status(int status);
207
208/*
209 * PCI bus interface.
210 */
211static device_method_t ciss_methods[] = {
212 /* Device interface */
213 DEVMETHOD(device_probe, ciss_probe),
214 DEVMETHOD(device_attach, ciss_attach),
215 DEVMETHOD(device_detach, ciss_detach),
216 DEVMETHOD(device_shutdown, ciss_shutdown),
217 { 0, 0 }
218};
219
220static driver_t ciss_pci_driver = {
221 "ciss",
222 ciss_methods,
223 sizeof(struct ciss_softc)
224};
225
226static devclass_t ciss_devclass;
aa2b9d05 227DRIVER_MODULE(ciss, pci, ciss_pci_driver, ciss_devclass, NULL, NULL);
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228MODULE_VERSION(ciss, 1);
229MODULE_DEPEND(ciss, cam, 1, 1, 1);
230MODULE_DEPEND(ciss, pci, 1, 1, 1);
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231
232/*
233 * Control device interface.
234 */
235static d_open_t ciss_open;
236static d_close_t ciss_close;
237static d_ioctl_t ciss_ioctl;
238
fef8985e 239static struct dev_ops ciss_ops = {
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240 { "ciss", 0, 0 },
241 .d_open = ciss_open,
242 .d_close = ciss_close,
243 .d_ioctl = ciss_ioctl,
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244};
245
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246/*
247 * This tunable can be set at boot time and controls whether physical devices
248 * that are marked hidden by the firmware should be exposed anyways.
249 */
250static unsigned int ciss_expose_hidden_physical = 0;
251TUNABLE_INT("hw.ciss.expose_hidden_physical", &ciss_expose_hidden_physical);
252
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253static unsigned int ciss_nop_message_heartbeat = 0;
254TUNABLE_INT("hw.ciss.nop_message_heartbeat", &ciss_nop_message_heartbeat);
255
256/*
257 * This tunable can force a particular transport to be used:
258 * <= 0 : use default
259 * 1 : force simple
260 * 2 : force performant
261 */
262static int ciss_force_transport = 0;
263TUNABLE_INT("hw.ciss.force_transport", &ciss_force_transport);
264
265/*
266 * This tunable can force a particular interrupt delivery method to be used:
267 * <= 0 : use default
268 * 1 : force INTx
269 * 2 : force MSIX
270 */
271static int ciss_force_interrupt = 0;
272TUNABLE_INT("hw.ciss.force_interrupt", &ciss_force_interrupt);
273
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274/************************************************************************
275 * CISS adapters amazingly don't have a defined programming interface
276 * value. (One could say some very despairing things about PCI and
277 * people just not getting the general idea.) So we are forced to
278 * stick with matching against subvendor/subdevice, and thus have to
279 * be updated for every new CISS adapter that appears.
280 */
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281#define CISS_BOARD_UNKNWON 0
282#define CISS_BOARD_SA5 1
283#define CISS_BOARD_SA5B 2
284#define CISS_BOARD_NOMSI (1<<4)
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285
286static struct
287{
288 u_int16_t subvendor;
289 u_int16_t subdevice;
290 int flags;
291 char *desc;
292} ciss_vendor_data[] = {
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293 { 0x0e11, 0x4070, CISS_BOARD_SA5|CISS_BOARD_NOMSI, "Compaq Smart Array 5300" },
294 { 0x0e11, 0x4080, CISS_BOARD_SA5B|CISS_BOARD_NOMSI, "Compaq Smart Array 5i" },
295 { 0x0e11, 0x4082, CISS_BOARD_SA5B|CISS_BOARD_NOMSI, "Compaq Smart Array 532" },
296 { 0x0e11, 0x4083, CISS_BOARD_SA5B|CISS_BOARD_NOMSI, "HP Smart Array 5312" },
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297 { 0x0e11, 0x4091, CISS_BOARD_SA5, "HP Smart Array 6i" },
298 { 0x0e11, 0x409A, CISS_BOARD_SA5, "HP Smart Array 641" },
299 { 0x0e11, 0x409B, CISS_BOARD_SA5, "HP Smart Array 642" },
300 { 0x0e11, 0x409C, CISS_BOARD_SA5, "HP Smart Array 6400" },
301 { 0x0e11, 0x409D, CISS_BOARD_SA5, "HP Smart Array 6400 EM" },
302 { 0x103C, 0x3211, CISS_BOARD_SA5, "HP Smart Array E200i" },
303 { 0x103C, 0x3212, CISS_BOARD_SA5, "HP Smart Array E200" },
304 { 0x103C, 0x3213, CISS_BOARD_SA5, "HP Smart Array E200i" },
305 { 0x103C, 0x3214, CISS_BOARD_SA5, "HP Smart Array E200i" },
306 { 0x103C, 0x3215, CISS_BOARD_SA5, "HP Smart Array E200i" },
307 { 0x103C, 0x3220, CISS_BOARD_SA5, "HP Smart Array" },
308 { 0x103C, 0x3222, CISS_BOARD_SA5, "HP Smart Array" },
309 { 0x103C, 0x3223, CISS_BOARD_SA5, "HP Smart Array P800" },
310 { 0x103C, 0x3225, CISS_BOARD_SA5, "HP Smart Array P600" },
311 { 0x103C, 0x3230, CISS_BOARD_SA5, "HP Smart Array" },
312 { 0x103C, 0x3231, CISS_BOARD_SA5, "HP Smart Array" },
313 { 0x103C, 0x3232, CISS_BOARD_SA5, "HP Smart Array" },
314 { 0x103C, 0x3233, CISS_BOARD_SA5, "HP Smart Array" },
315 { 0x103C, 0x3234, CISS_BOARD_SA5, "HP Smart Array P400" },
316 { 0x103C, 0x3235, CISS_BOARD_SA5, "HP Smart Array P400i" },
317 { 0x103C, 0x3236, CISS_BOARD_SA5, "HP Smart Array" },
a8416dcf 318 { 0x103C, 0x3237, CISS_BOARD_SA5, "HP Smart Array E500" },
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319 { 0x103C, 0x3238, CISS_BOARD_SA5, "HP Smart Array" },
320 { 0x103C, 0x3239, CISS_BOARD_SA5, "HP Smart Array" },
321 { 0x103C, 0x323A, CISS_BOARD_SA5, "HP Smart Array" },
322 { 0x103C, 0x323B, CISS_BOARD_SA5, "HP Smart Array" },
323 { 0x103C, 0x323C, CISS_BOARD_SA5, "HP Smart Array" },
a8416dcf 324 { 0x103C, 0x323D, CISS_BOARD_SA5, "HP Smart Array P700m" },
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325 { 0x103C, 0x3241, CISS_BOARD_SA5, "HP Smart Array P212" },
326 { 0x103C, 0x3243, CISS_BOARD_SA5, "HP Smart Array P410" },
327 { 0x103C, 0x3245, CISS_BOARD_SA5, "HP Smart Array P410i" },
328 { 0x103C, 0x3247, CISS_BOARD_SA5, "HP Smart Array P411" },
329 { 0x103C, 0x3249, CISS_BOARD_SA5, "HP Smart Array P812" },
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330 { 0x103C, 0x324A, CISS_BOARD_SA5, "HP Smart Array P712m" },
331 { 0x103C, 0x324B, CISS_BOARD_SA5, "HP Smart Array" },
332 { 0x103C, 0x3350, CISS_BOARD_SA5, "HP Smart Array P222" },
333 { 0x103C, 0x3351, CISS_BOARD_SA5, "HP Smart Array P420" },
334 { 0x103C, 0x3352, CISS_BOARD_SA5, "HP Smart Array P421" },
335 { 0x103C, 0x3353, CISS_BOARD_SA5, "HP Smart Array P822" },
336 { 0x103C, 0x3354, CISS_BOARD_SA5, "HP Smart Array P420i" },
337 { 0x103C, 0x3355, CISS_BOARD_SA5, "HP Smart Array P220i" },
338 { 0x103C, 0x3356, CISS_BOARD_SA5, "HP Smart Array P721m" },
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339 { 0, 0, 0, NULL }
340};
341
342/************************************************************************
343 * Find a match for the device in our list of known adapters.
344 */
345static int
346ciss_lookup(device_t dev)
347{
348 int i;
9cf9a798 349
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350 for (i = 0; ciss_vendor_data[i].desc != NULL; i++)
351 if ((pci_get_subvendor(dev) == ciss_vendor_data[i].subvendor) &&
352 (pci_get_subdevice(dev) == ciss_vendor_data[i].subdevice)) {
353 return(i);
354 }
355 return(-1);
356}
357
358/************************************************************************
359 * Match a known CISS adapter.
360 */
361static int
362ciss_probe(device_t dev)
363{
364 int i;
9cf9a798 365
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366 i = ciss_lookup(dev);
367 if (i != -1) {
368 device_set_desc(dev, ciss_vendor_data[i].desc);
a8416dcf 369 return(BUS_PROBE_DEFAULT);
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370 }
371 return(ENOENT);
9cf9a798 372}
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373
374/************************************************************************
375 * Attach the driver to this adapter.
376 */
377static int
378ciss_attach(device_t dev)
379{
380 struct ciss_softc *sc;
a8416dcf 381 int error;
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382
383 debug_called(1);
384
385#ifdef CISS_DEBUG
386 /* print structure/union sizes */
387 debug_struct(ciss_command);
388 debug_struct(ciss_header);
389 debug_union(ciss_device_address);
390 debug_struct(ciss_cdb);
391 debug_struct(ciss_report_cdb);
392 debug_struct(ciss_notify_cdb);
393 debug_struct(ciss_notify);
394 debug_struct(ciss_message_cdb);
395 debug_struct(ciss_error_info_pointer);
396 debug_struct(ciss_error_info);
397 debug_struct(ciss_sg_entry);
398 debug_struct(ciss_config_table);
399 debug_struct(ciss_bmic_cdb);
400 debug_struct(ciss_bmic_id_ldrive);
401 debug_struct(ciss_bmic_id_lstatus);
402 debug_struct(ciss_bmic_id_table);
403 debug_struct(ciss_bmic_id_pdrive);
404 debug_struct(ciss_bmic_blink_pdrive);
405 debug_struct(ciss_bmic_flush_cache);
406 debug_const(CISS_MAX_REQUESTS);
407 debug_const(CISS_MAX_LOGICAL);
408 debug_const(CISS_INTERRUPT_COALESCE_DELAY);
409 debug_const(CISS_INTERRUPT_COALESCE_COUNT);
410 debug_const(CISS_COMMAND_ALLOC_SIZE);
411 debug_const(CISS_COMMAND_SG_LENGTH);
412
413 debug_type(cciss_pci_info_struct);
414 debug_type(cciss_coalint_struct);
415 debug_type(cciss_coalint_struct);
416 debug_type(NodeName_type);
417 debug_type(NodeName_type);
418 debug_type(Heartbeat_type);
419 debug_type(BusTypes_type);
420 debug_type(FirmwareVer_type);
421 debug_type(DriverVer_type);
422 debug_type(IOCTL_Command_struct);
423#endif
424
425 sc = device_get_softc(dev);
426 sc->ciss_dev = dev;
a8416dcf 427 lockinit(&sc->ciss_lock, "cissmtx", 0, LK_CANRECURSE);
aa1ab3c5 428 callout_init(&sc->ciss_periodic);
984263bc 429
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430 /*
431 * Do PCI-specific init.
432 */
433 if ((error = ciss_init_pci(sc)) != 0)
434 goto out;
435
436 /*
437 * Initialise driver queues.
438 */
439 ciss_initq_free(sc);
9cf9a798 440 ciss_initq_notify(sc);
984263bc 441
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442 /*
443 * Initalize device sysctls.
444 */
445 ciss_init_sysctl(sc);
446
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447 /*
448 * Initialise command/request pool.
449 */
450 if ((error = ciss_init_requests(sc)) != 0)
451 goto out;
452
453 /*
454 * Get adapter information.
455 */
456 if ((error = ciss_identify_adapter(sc)) != 0)
457 goto out;
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458
459 /*
460 * Find all the physical devices.
461 */
462 if ((error = ciss_init_physical(sc)) != 0)
463 goto out;
464
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465 /*
466 * Build our private table of logical devices.
467 */
468 if ((error = ciss_init_logical(sc)) != 0)
469 goto out;
470
471 /*
472 * Enable interrupts so that the CAM scan can complete.
473 */
474 CISS_TL_SIMPLE_ENABLE_INTERRUPTS(sc);
475
476 /*
477 * Initialise the CAM interface.
478 */
479 if ((error = ciss_cam_init(sc)) != 0)
480 goto out;
481
482 /*
483 * Start the heartbeat routine and event chain.
484 */
485 ciss_periodic(sc);
486
3e82b46c 487 /*
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488 * Create the control device.
489 */
fef8985e 490 sc->ciss_dev_t = make_dev(&ciss_ops, device_get_unit(sc->ciss_dev),
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491 UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR,
492 "ciss%d", device_get_unit(sc->ciss_dev));
493 sc->ciss_dev_t->si_drv1 = sc;
494
495 /*
496 * The adapter is running; synchronous commands can now sleep
497 * waiting for an interrupt to signal completion.
498 */
499 sc->ciss_flags |= CISS_FLAG_RUNNING;
500
9cf9a798
SW
501 ciss_spawn_notify_thread(sc);
502
984263bc
MD
503 error = 0;
504 out:
a8416dcf
SW
505 if (error != 0) {
506 /* ciss_free() expects the mutex to be held */
507 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc 508 ciss_free(sc);
a8416dcf 509 }
984263bc
MD
510 return(error);
511}
512
513/************************************************************************
514 * Detach the driver from this adapter.
515 */
516static int
517ciss_detach(device_t dev)
518{
519 struct ciss_softc *sc = device_get_softc(dev);
520
521 debug_called(1);
9cf9a798 522
a8416dcf
SW
523 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
524 if (sc->ciss_flags & CISS_FLAG_CONTROL_OPEN) {
525 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798 526 return (EBUSY);
a8416dcf 527 }
9cf9a798 528
984263bc
MD
529 /* flush adapter cache */
530 ciss_flush_adapter(sc);
531
a8416dcf 532 /* release all resources. The mutex is released and freed here too. */
984263bc
MD
533 ciss_free(sc);
534
535 return(0);
984263bc
MD
536}
537
538/************************************************************************
539 * Prepare adapter for system shutdown.
540 */
541static int
542ciss_shutdown(device_t dev)
543{
544 struct ciss_softc *sc = device_get_softc(dev);
545
546 debug_called(1);
547
a8416dcf 548 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc
MD
549 /* flush adapter cache */
550 ciss_flush_adapter(sc);
551
a8416dcf
SW
552 if (sc->ciss_soft_reset)
553 ciss_soft_reset(sc);
554 lockmgr(&sc->ciss_lock, LK_RELEASE);
555
984263bc
MD
556 return(0);
557}
558
a8416dcf
SW
559static void
560ciss_init_sysctl(struct ciss_softc *sc)
561{
562 sysctl_ctx_init(&sc->ciss_sysctl_ctx);
563 sc->ciss_sysctl_tree = SYSCTL_ADD_NODE(&sc->ciss_sysctl_ctx,
564 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
565 device_get_nameunit(sc->ciss_dev), CTLFLAG_RD, 0, "");
566 SYSCTL_ADD_INT(&sc->ciss_sysctl_ctx,
567 SYSCTL_CHILDREN(sc->ciss_sysctl_tree),
568 OID_AUTO, "soft_reset", CTLFLAG_RW, &sc->ciss_soft_reset, 0, "");
569}
570
984263bc
MD
571/************************************************************************
572 * Perform PCI-specific attachment actions.
573 */
574static int
575ciss_init_pci(struct ciss_softc *sc)
576{
577 uintptr_t cbase, csize, cofs;
a8416dcf
SW
578 uint32_t method, supported_methods;
579 int error, sqmask, i;
580 void *intr;
581 int use_msi;
582 u_int irq_flags;
984263bc
MD
583
584 debug_called(1);
585
a8416dcf
SW
586 /*
587 * Work out adapter type.
588 */
589 i = ciss_lookup(sc->ciss_dev);
590 if (i < 0) {
591 ciss_printf(sc, "unknown adapter type\n");
592 return (ENXIO);
593 }
594
595 if (ciss_vendor_data[i].flags & CISS_BOARD_SA5) {
596 sqmask = CISS_TL_SIMPLE_INTR_OPQ_SA5;
597 } else if (ciss_vendor_data[i].flags & CISS_BOARD_SA5B) {
598 sqmask = CISS_TL_SIMPLE_INTR_OPQ_SA5B;
599 } else {
600 /*
601 * XXX Big hammer, masks/unmasks all possible interrupts. This should
602 * work on all hardware variants. Need to add code to handle the
603 * "controller crashed" interupt bit that this unmasks.
604 */
605 sqmask = ~0;
606 }
607
984263bc
MD
608 /*
609 * Allocate register window first (we need this to find the config
610 * struct).
611 */
612 error = ENXIO;
613 sc->ciss_regs_rid = CISS_TL_SIMPLE_BAR_REGS;
614 if ((sc->ciss_regs_resource =
a8416dcf
SW
615 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_MEMORY,
616 &sc->ciss_regs_rid, RF_ACTIVE)) == NULL) {
984263bc
MD
617 ciss_printf(sc, "can't allocate register window\n");
618 return(ENXIO);
619 }
620 sc->ciss_regs_bhandle = rman_get_bushandle(sc->ciss_regs_resource);
621 sc->ciss_regs_btag = rman_get_bustag(sc->ciss_regs_resource);
9cf9a798 622
984263bc
MD
623 /*
624 * Find the BAR holding the config structure. If it's not the one
625 * we already mapped for registers, map it too.
626 */
627 sc->ciss_cfg_rid = CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_CFG_BAR) & 0xffff;
628 if (sc->ciss_cfg_rid != sc->ciss_regs_rid) {
629 if ((sc->ciss_cfg_resource =
a8416dcf
SW
630 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_MEMORY,
631 &sc->ciss_cfg_rid, RF_ACTIVE)) == NULL) {
984263bc
MD
632 ciss_printf(sc, "can't allocate config window\n");
633 return(ENXIO);
634 }
635 cbase = (uintptr_t)rman_get_virtual(sc->ciss_cfg_resource);
636 csize = rman_get_end(sc->ciss_cfg_resource) -
637 rman_get_start(sc->ciss_cfg_resource) + 1;
638 } else {
639 cbase = (uintptr_t)rman_get_virtual(sc->ciss_regs_resource);
640 csize = rman_get_end(sc->ciss_regs_resource) -
641 rman_get_start(sc->ciss_regs_resource) + 1;
642 }
643 cofs = CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_CFG_OFF);
9cf9a798 644
984263bc
MD
645 /*
646 * Use the base/size/offset values we just calculated to
647 * sanity-check the config structure. If it's OK, point to it.
648 */
649 if ((cofs + sizeof(struct ciss_config_table)) > csize) {
650 ciss_printf(sc, "config table outside window\n");
651 return(ENXIO);
652 }
653 sc->ciss_cfg = (struct ciss_config_table *)(cbase + cofs);
654 debug(1, "config struct at %p", sc->ciss_cfg);
9cf9a798 655
a8416dcf
SW
656 /*
657 * Calculate the number of request structures/commands we are
658 * going to provide for this adapter.
659 */
660 sc->ciss_max_requests = min(CISS_MAX_REQUESTS, sc->ciss_cfg->max_outstanding_commands);
661
984263bc
MD
662 /*
663 * Validate the config structure. If we supported other transport
664 * methods, we could select amongst them at this point in time.
665 */
666 if (strncmp(sc->ciss_cfg->signature, "CISS", 4)) {
667 ciss_printf(sc, "config signature mismatch (got '%c%c%c%c')\n",
668 sc->ciss_cfg->signature[0], sc->ciss_cfg->signature[1],
669 sc->ciss_cfg->signature[2], sc->ciss_cfg->signature[3]);
670 return(ENXIO);
671 }
984263bc
MD
672
673 /*
a8416dcf 674 * Select the mode of operation, prefer Performant.
984263bc 675 */
a8416dcf
SW
676 if (!(sc->ciss_cfg->supported_methods &
677 (CISS_TRANSPORT_METHOD_SIMPLE | CISS_TRANSPORT_METHOD_PERF))) {
678 ciss_printf(sc, "No supported transport layers: 0x%x\n",
679 sc->ciss_cfg->supported_methods);
680 }
681
682 switch (ciss_force_transport) {
683 case 1:
684 supported_methods = CISS_TRANSPORT_METHOD_SIMPLE;
685 break;
686 case 2:
687 supported_methods = CISS_TRANSPORT_METHOD_PERF;
688 break;
689 default:
690 supported_methods = sc->ciss_cfg->supported_methods;
691 break;
692 }
693
694setup:
695 if ((supported_methods & CISS_TRANSPORT_METHOD_PERF) != 0) {
696 method = CISS_TRANSPORT_METHOD_PERF;
697 sc->ciss_perf = (struct ciss_perf_config *)(cbase + cofs +
698 sc->ciss_cfg->transport_offset);
699 if (ciss_init_perf(sc)) {
700 supported_methods &= ~method;
701 goto setup;
702 }
703 } else if (supported_methods & CISS_TRANSPORT_METHOD_SIMPLE) {
704 method = CISS_TRANSPORT_METHOD_SIMPLE;
705 } else {
706 ciss_printf(sc, "No supported transport methods: 0x%x\n",
707 sc->ciss_cfg->supported_methods);
984263bc
MD
708 return(ENXIO);
709 }
a8416dcf
SW
710
711 /*
712 * Tell it we're using the low 4GB of RAM. Set the default interrupt
713 * coalescing options.
714 */
715 sc->ciss_cfg->requested_method = method;
984263bc
MD
716 sc->ciss_cfg->command_physlimit = 0;
717 sc->ciss_cfg->interrupt_coalesce_delay = CISS_INTERRUPT_COALESCE_DELAY;
718 sc->ciss_cfg->interrupt_coalesce_count = CISS_INTERRUPT_COALESCE_COUNT;
719
9cf9a798
SW
720#ifdef __i386__
721 sc->ciss_cfg->host_driver |= CISS_DRIVER_SCSI_PREFETCH;
722#endif
723
984263bc
MD
724 if (ciss_update_config(sc)) {
725 ciss_printf(sc, "adapter refuses to accept config update (IDBR 0x%x)\n",
726 CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_IDBR));
727 return(ENXIO);
728 }
a8416dcf
SW
729 if ((sc->ciss_cfg->active_method & method) == 0) {
730 supported_methods &= ~method;
731 if (supported_methods == 0) {
732 ciss_printf(sc, "adapter refuses to go into available transports "
733 "mode (0x%x, 0x%x)\n", supported_methods,
734 sc->ciss_cfg->active_method);
735 return(ENXIO);
736 } else
737 goto setup;
984263bc
MD
738 }
739
740 /*
741 * Wait for the adapter to come ready.
742 */
743 if ((error = ciss_wait_adapter(sc)) != 0)
744 return(error);
745
a8416dcf
SW
746 /* Prepare to possibly use MSIX and/or PERFORMANT interrupts. Normal
747 * interrupts have a rid of 0, this will be overridden if MSIX is used.
748 */
749 sc->ciss_irq_rid[0] = 0;
750 if (method == CISS_TRANSPORT_METHOD_PERF) {
751 ciss_printf(sc, "PERFORMANT Transport\n");
752 if ((ciss_force_interrupt != 1) && (ciss_setup_msix(sc) == 0)) {
753 intr = ciss_perf_msi_intr;
754 } else {
755 intr = ciss_perf_intr;
756 }
757 /* XXX The docs say that the 0x01 bit is only for SAS controllers.
758 * Unfortunately, there is no good way to know if this is a SAS
759 * controller. Hopefully enabling this bit universally will work OK.
760 * It seems to work fine for SA6i controllers.
761 */
762 sc->ciss_interrupt_mask = CISS_TL_PERF_INTR_OPQ | CISS_TL_PERF_INTR_MSI;
763
764 } else {
765 ciss_printf(sc, "SIMPLE Transport\n");
766 /* MSIX doesn't seem to work in SIMPLE mode, only enable if it forced */
767 if (ciss_force_interrupt == 2)
768 /* If this fails, we automatically revert to INTx */
769 ciss_setup_msix(sc);
770 sc->ciss_perf = NULL;
771 intr = ciss_intr;
772 sc->ciss_interrupt_mask = sqmask;
773 }
984263bc
MD
774 /*
775 * Turn off interrupts before we go routing anything.
776 */
777 CISS_TL_SIMPLE_DISABLE_INTERRUPTS(sc);
9cf9a798 778
984263bc
MD
779 /*
780 * Allocate and set up our interrupt.
781 */
a8416dcf
SW
782#ifdef __DragonFly__ /* DragonFly specific MSI setup */
783 use_msi = (intr == ciss_perf_msi_intr);
784#endif
785 sc->ciss_irq_rid[0] = 0;
786 sc->ciss_irq_type = pci_alloc_1intr(sc->ciss_dev, use_msi,
787 &sc->ciss_irq_rid[0], &irq_flags);
984263bc 788 if ((sc->ciss_irq_resource =
a8416dcf
SW
789 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_IRQ, &sc->ciss_irq_rid[0],
790 irq_flags)) == NULL) {
984263bc
MD
791 ciss_printf(sc, "can't allocate interrupt\n");
792 return(ENXIO);
793 }
a8416dcf
SW
794
795 if (bus_setup_intr(sc->ciss_dev, sc->ciss_irq_resource,
796 INTR_MPSAFE, intr, sc,
797 &sc->ciss_intr, NULL)) {
984263bc
MD
798 ciss_printf(sc, "can't set up interrupt\n");
799 return(ENXIO);
800 }
801
802 /*
803 * Allocate the parent bus DMA tag appropriate for our PCI
804 * interface.
9cf9a798 805 *
984263bc
MD
806 * Note that "simple" adapters can only address within a 32-bit
807 * span.
808 */
a8416dcf 809 if (bus_dma_tag_create(NULL, /* PCI parent */
984263bc 810 1, 0, /* alignment, boundary */
9cf9a798 811 BUS_SPACE_MAXADDR, /* lowaddr */
984263bc
MD
812 BUS_SPACE_MAXADDR, /* highaddr */
813 NULL, NULL, /* filter, filterarg */
9cf9a798 814 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
a8416dcf 815 CISS_MAX_SG_ELEMENTS, /* nsegments */
984263bc 816 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
a8416dcf 817 0, /* flags */
984263bc
MD
818 &sc->ciss_parent_dmat)) {
819 ciss_printf(sc, "can't allocate parent DMA tag\n");
820 return(ENOMEM);
821 }
822
823 /*
824 * Create DMA tag for mapping buffers into adapter-addressable
825 * space.
826 */
827 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
828 1, 0, /* alignment, boundary */
829 BUS_SPACE_MAXADDR, /* lowaddr */
830 BUS_SPACE_MAXADDR, /* highaddr */
831 NULL, NULL, /* filter, filterarg */
a8416dcf 832 MAXBSIZE, CISS_MAX_SG_ELEMENTS, /* maxsize, nsegments */
984263bc 833 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
a8416dcf 834 BUS_DMA_ALLOCNOW, /* flags */
984263bc
MD
835 &sc->ciss_buffer_dmat)) {
836 ciss_printf(sc, "can't allocate buffer DMA tag\n");
837 return(ENOMEM);
838 }
839 return(0);
840}
841
a8416dcf
SW
842/************************************************************************
843 * Setup MSI/MSIX operation (Performant only)
844 * Four interrupts are available, but we only use 1 right now. If MSI-X
845 * isn't avaialble, try using MSI instead.
846 */
847static int
848ciss_setup_msix(struct ciss_softc *sc)
849{
850 int val, i;
851
852 /* Weed out devices that don't actually support MSI */
853 i = ciss_lookup(sc->ciss_dev);
854 if (ciss_vendor_data[i].flags & CISS_BOARD_NOMSI)
855 return (EINVAL);
856
857#if 0 /* XXX swildner */
858 /*
859 * Only need to use the minimum number of MSI vectors, as the driver
860 * doesn't support directed MSIX interrupts.
861 */
862 val = pci_msix_count(sc->ciss_dev);
863 if (val < CISS_MSI_COUNT) {
864 val = pci_msi_count(sc->ciss_dev);
865 device_printf(sc->ciss_dev, "got %d MSI messages]\n", val);
866 if (val < CISS_MSI_COUNT)
867 return (EINVAL);
868 }
869 val = MIN(val, CISS_MSI_COUNT);
870 if (pci_alloc_msix(sc->ciss_dev, &val) != 0) {
871 if (pci_alloc_msi(sc->ciss_dev, &val) != 0)
872 return (EINVAL);
873 }
874#endif
875
876 val = 1;
877 sc->ciss_msi = val;
878 if (bootverbose)
879 ciss_printf(sc, "Using %d MSIX interrupt%s\n", val,
880 (val != 1) ? "s" : "");
881
882 for (i = 0; i < val; i++)
883 sc->ciss_irq_rid[i] = i + 1;
884
885 return (0);
886
887}
888
889/************************************************************************
890 * Setup the Performant structures.
891 */
892static int
893ciss_init_perf(struct ciss_softc *sc)
894{
895 struct ciss_perf_config *pc = sc->ciss_perf;
896 int reply_size;
897
898 /*
899 * Create the DMA tag for the reply queue.
900 */
901 reply_size = sizeof(uint64_t) * sc->ciss_max_requests;
902 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
903 1, 0, /* alignment, boundary */
904 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
905 BUS_SPACE_MAXADDR, /* highaddr */
906 NULL, NULL, /* filter, filterarg */
907 reply_size, 1, /* maxsize, nsegments */
908 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
909 0, /* flags */
910 &sc->ciss_reply_dmat)) {
911 ciss_printf(sc, "can't allocate reply DMA tag\n");
912 return(ENOMEM);
913 }
914 /*
915 * Allocate memory and make it available for DMA.
916 */
917 if (bus_dmamem_alloc(sc->ciss_reply_dmat, (void **)&sc->ciss_reply,
918 BUS_DMA_NOWAIT, &sc->ciss_reply_map)) {
919 ciss_printf(sc, "can't allocate reply memory\n");
920 return(ENOMEM);
921 }
922 bus_dmamap_load(sc->ciss_reply_dmat, sc->ciss_reply_map, sc->ciss_reply,
923 reply_size, ciss_command_map_helper, &sc->ciss_reply_phys, 0);
924 bzero(sc->ciss_reply, reply_size);
925
926 sc->ciss_cycle = 0x1;
927 sc->ciss_rqidx = 0;
928
929 /*
930 * Preload the fetch table with common command sizes. This allows the
931 * hardware to not waste bus cycles for typical i/o commands, but also not
932 * tax the driver to be too exact in choosing sizes. The table is optimized
933 * for page-aligned i/o's, but since most i/o comes from the various pagers,
934 * it's a reasonable assumption to make.
935 */
936 pc->fetch_count[CISS_SG_FETCH_NONE] = (sizeof(struct ciss_command) + 15) / 16;
937 pc->fetch_count[CISS_SG_FETCH_1] =
938 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 1 + 15) / 16;
939 pc->fetch_count[CISS_SG_FETCH_2] =
940 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 2 + 15) / 16;
941 pc->fetch_count[CISS_SG_FETCH_4] =
942 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 4 + 15) / 16;
943 pc->fetch_count[CISS_SG_FETCH_8] =
944 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 8 + 15) / 16;
945 pc->fetch_count[CISS_SG_FETCH_16] =
946 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 16 + 15) / 16;
947 pc->fetch_count[CISS_SG_FETCH_32] =
948 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 32 + 15) / 16;
949 pc->fetch_count[CISS_SG_FETCH_MAX] = (CISS_COMMAND_ALLOC_SIZE + 15) / 16;
950
951 pc->rq_size = sc->ciss_max_requests; /* XXX less than the card supports? */
952 pc->rq_count = 1; /* XXX Hardcode for a single queue */
953 pc->rq_bank_hi = 0;
954 pc->rq_bank_lo = 0;
955 pc->rq[0].rq_addr_hi = 0x0;
956 pc->rq[0].rq_addr_lo = sc->ciss_reply_phys;
957
958 return(0);
959}
960
984263bc
MD
961/************************************************************************
962 * Wait for the adapter to come ready.
963 */
964static int
965ciss_wait_adapter(struct ciss_softc *sc)
966{
967 int i;
968
969 debug_called(1);
9cf9a798 970
984263bc
MD
971 /*
972 * Wait for the adapter to come ready.
973 */
974 if (!(sc->ciss_cfg->active_method & CISS_TRANSPORT_METHOD_READY)) {
975 ciss_printf(sc, "waiting for adapter to come ready...\n");
976 for (i = 0; !(sc->ciss_cfg->active_method & CISS_TRANSPORT_METHOD_READY); i++) {
977 DELAY(1000000); /* one second */
978 if (i > 30) {
979 ciss_printf(sc, "timed out waiting for adapter to come ready\n");
980 return(EIO);
981 }
982 }
983 }
984 return(0);
985}
986
987/************************************************************************
988 * Flush the adapter cache.
989 */
990static int
991ciss_flush_adapter(struct ciss_softc *sc)
992{
993 struct ciss_request *cr;
994 struct ciss_bmic_flush_cache *cbfc;
995 int error, command_status;
996
997 debug_called(1);
998
999 cr = NULL;
1000 cbfc = NULL;
1001
1002 /*
1003 * Build a BMIC request to flush the cache. We don't disable
1004 * it, as we may be going to do more I/O (eg. we are emulating
1005 * the Synchronise Cache command).
1006 */
efda3bd0 1007 cbfc = kmalloc(sizeof(*cbfc), CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
984263bc 1008 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_FLUSH_CACHE,
a8416dcf 1009 (void **)&cbfc, sizeof(*cbfc))) != 0)
984263bc
MD
1010 goto out;
1011
1012 /*
1013 * Submit the request and wait for it to complete.
1014 */
1015 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1016 ciss_printf(sc, "error sending BMIC FLUSH_CACHE command (%d)\n", error);
1017 goto out;
1018 }
9cf9a798 1019
984263bc
MD
1020 /*
1021 * Check response.
1022 */
1023 ciss_report_request(cr, &command_status, NULL);
1024 switch(command_status) {
1025 case CISS_CMD_STATUS_SUCCESS:
1026 break;
1027 default:
9cf9a798 1028 ciss_printf(sc, "error flushing cache (%s)\n",
984263bc
MD
1029 ciss_name_command_status(command_status));
1030 error = EIO;
1031 goto out;
1032 }
1033
1034out:
1035 if (cbfc != NULL)
efda3bd0 1036 kfree(cbfc, CISS_MALLOC_CLASS);
984263bc
MD
1037 if (cr != NULL)
1038 ciss_release_request(cr);
1039 return(error);
1040}
1041
a8416dcf
SW
1042static void
1043ciss_soft_reset(struct ciss_softc *sc)
1044{
1045 struct ciss_request *cr = NULL;
1046 struct ciss_command *cc;
1047 int i, error = 0;
1048
1049 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
1050 /* only reset proxy controllers */
1051 if (sc->ciss_controllers[i].physical.bus == 0)
1052 continue;
1053
1054 if ((error = ciss_get_request(sc, &cr)) != 0)
1055 break;
1056
1057 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_SOFT_RESET,
1058 NULL, 0)) != 0)
1059 break;
1060
1061 cc = cr->cr_cc;
1062 cc->header.address = sc->ciss_controllers[i];
1063
1064 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0)
1065 break;
1066
1067 ciss_release_request(cr);
1068 }
1069
1070 if (error)
1071 ciss_printf(sc, "error resetting controller (%d)\n", error);
1072
1073 if (cr != NULL)
1074 ciss_release_request(cr);
1075}
1076
984263bc
MD
1077/************************************************************************
1078 * Allocate memory for the adapter command structures, initialise
1079 * the request structures.
1080 *
1081 * Note that the entire set of commands are allocated in a single
1082 * contiguous slab.
1083 */
1084static int
1085ciss_init_requests(struct ciss_softc *sc)
1086{
1087 struct ciss_request *cr;
1088 int i;
1089
1090 debug_called(1);
9cf9a798 1091
9cf9a798 1092 if (bootverbose)
984263bc
MD
1093 ciss_printf(sc, "using %d of %d available commands\n",
1094 sc->ciss_max_requests, sc->ciss_cfg->max_outstanding_commands);
1095
1096 /*
1097 * Create the DMA tag for commands.
1098 */
1099 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
a8416dcf 1100 32, 0, /* alignment, boundary */
9cf9a798 1101 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
984263bc
MD
1102 BUS_SPACE_MAXADDR, /* highaddr */
1103 NULL, NULL, /* filter, filterarg */
9cf9a798 1104 CISS_COMMAND_ALLOC_SIZE *
984263bc
MD
1105 sc->ciss_max_requests, 1, /* maxsize, nsegments */
1106 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
a8416dcf 1107 0, /* flags */
984263bc
MD
1108 &sc->ciss_command_dmat)) {
1109 ciss_printf(sc, "can't allocate command DMA tag\n");
1110 return(ENOMEM);
1111 }
1112 /*
1113 * Allocate memory and make it available for DMA.
1114 */
9cf9a798 1115 if (bus_dmamem_alloc(sc->ciss_command_dmat, (void **)&sc->ciss_command,
984263bc
MD
1116 BUS_DMA_NOWAIT, &sc->ciss_command_map)) {
1117 ciss_printf(sc, "can't allocate command memory\n");
1118 return(ENOMEM);
1119 }
a8416dcf 1120 bus_dmamap_load(sc->ciss_command_dmat, sc->ciss_command_map,sc->ciss_command,
9cf9a798 1121 CISS_COMMAND_ALLOC_SIZE * sc->ciss_max_requests,
a8416dcf 1122 ciss_command_map_helper, &sc->ciss_command_phys, 0);
984263bc
MD
1123 bzero(sc->ciss_command, CISS_COMMAND_ALLOC_SIZE * sc->ciss_max_requests);
1124
1125 /*
1126 * Set up the request and command structures, push requests onto
1127 * the free queue.
1128 */
1129 for (i = 1; i < sc->ciss_max_requests; i++) {
1130 cr = &sc->ciss_request[i];
1131 cr->cr_sc = sc;
1132 cr->cr_tag = i;
a8416dcf
SW
1133 cr->cr_cc = (struct ciss_command *)((uintptr_t)sc->ciss_command +
1134 CISS_COMMAND_ALLOC_SIZE * i);
1135 cr->cr_ccphys = sc->ciss_command_phys + CISS_COMMAND_ALLOC_SIZE * i;
9cf9a798 1136 bus_dmamap_create(sc->ciss_buffer_dmat, 0, &cr->cr_datamap);
984263bc
MD
1137 ciss_enqueue_free(cr);
1138 }
1139 return(0);
1140}
1141
1142static void
1143ciss_command_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1144{
a8416dcf 1145 uint32_t *addr;
984263bc 1146
a8416dcf
SW
1147 addr = arg;
1148 *addr = segs[0].ds_addr;
984263bc
MD
1149}
1150
1151/************************************************************************
1152 * Identify the adapter, print some information about it.
1153 */
1154static int
1155ciss_identify_adapter(struct ciss_softc *sc)
1156{
1157 struct ciss_request *cr;
1158 int error, command_status;
1159
1160 debug_called(1);
1161
1162 cr = NULL;
1163
1164 /*
1165 * Get a request, allocate storage for the adapter data.
1166 */
1167 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_CTLR,
a8416dcf 1168 (void **)&sc->ciss_id,
984263bc
MD
1169 sizeof(*sc->ciss_id))) != 0)
1170 goto out;
1171
1172 /*
1173 * Submit the request and wait for it to complete.
1174 */
1175 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1176 ciss_printf(sc, "error sending BMIC ID_CTLR command (%d)\n", error);
1177 goto out;
1178 }
9cf9a798 1179
984263bc
MD
1180 /*
1181 * Check response.
1182 */
1183 ciss_report_request(cr, &command_status, NULL);
1184 switch(command_status) {
1185 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1186 break;
1187 case CISS_CMD_STATUS_DATA_UNDERRUN:
1188 case CISS_CMD_STATUS_DATA_OVERRUN:
1189 ciss_printf(sc, "data over/underrun reading adapter information\n");
1190 default:
1191 ciss_printf(sc, "error reading adapter information (%s)\n",
1192 ciss_name_command_status(command_status));
1193 error = EIO;
1194 goto out;
1195 }
1196
1197 /* sanity-check reply */
1198 if (!sc->ciss_id->big_map_supported) {
1199 ciss_printf(sc, "adapter does not support BIG_MAP\n");
1200 error = ENXIO;
1201 goto out;
1202 }
1203
a8416dcf 1204#if 0
984263bc
MD
1205 /* XXX later revisions may not need this */
1206 sc->ciss_flags |= CISS_FLAG_FAKE_SYNCH;
1207#endif
1208
1209 /* XXX only really required for old 5300 adapters? */
1210 sc->ciss_flags |= CISS_FLAG_BMIC_ABORT;
9cf9a798 1211
984263bc 1212 /* print information */
9cf9a798
SW
1213 if (bootverbose) {
1214#if 0 /* XXX proxy volumes??? */
984263bc
MD
1215 ciss_printf(sc, " %d logical drive%s configured\n",
1216 sc->ciss_id->configured_logical_drives,
1217 (sc->ciss_id->configured_logical_drives == 1) ? "" : "s");
9cf9a798 1218#endif
984263bc
MD
1219 ciss_printf(sc, " firmware %4.4s\n", sc->ciss_id->running_firmware_revision);
1220 ciss_printf(sc, " %d SCSI channels\n", sc->ciss_id->scsi_bus_count);
1221
1222 ciss_printf(sc, " signature '%.4s'\n", sc->ciss_cfg->signature);
1223 ciss_printf(sc, " valence %d\n", sc->ciss_cfg->valence);
1224 ciss_printf(sc, " supported I/O methods 0x%b\n",
9cf9a798 1225 sc->ciss_cfg->supported_methods,
984263bc
MD
1226 "\20\1READY\2simple\3performant\4MEMQ\n");
1227 ciss_printf(sc, " active I/O method 0x%b\n",
1228 sc->ciss_cfg->active_method, "\20\2simple\3performant\4MEMQ\n");
1229 ciss_printf(sc, " 4G page base 0x%08x\n",
1230 sc->ciss_cfg->command_physlimit);
1231 ciss_printf(sc, " interrupt coalesce delay %dus\n",
1232 sc->ciss_cfg->interrupt_coalesce_delay);
1233 ciss_printf(sc, " interrupt coalesce count %d\n",
1234 sc->ciss_cfg->interrupt_coalesce_count);
1235 ciss_printf(sc, " max outstanding commands %d\n",
1236 sc->ciss_cfg->max_outstanding_commands);
9cf9a798 1237 ciss_printf(sc, " bus types 0x%b\n", sc->ciss_cfg->bus_types,
984263bc
MD
1238 "\20\1ultra2\2ultra3\10fibre1\11fibre2\n");
1239 ciss_printf(sc, " server name '%.16s'\n", sc->ciss_cfg->server_name);
1240 ciss_printf(sc, " heartbeat 0x%x\n", sc->ciss_cfg->heartbeat);
1241 }
1242
1243out:
1244 if (error) {
1245 if (sc->ciss_id != NULL) {
efda3bd0 1246 kfree(sc->ciss_id, CISS_MALLOC_CLASS);
984263bc
MD
1247 sc->ciss_id = NULL;
1248 }
9cf9a798 1249 }
984263bc
MD
1250 if (cr != NULL)
1251 ciss_release_request(cr);
1252 return(error);
1253}
1254
1255/************************************************************************
9cf9a798 1256 * Helper routine for generating a list of logical and physical luns.
984263bc 1257 */
9cf9a798
SW
1258static struct ciss_lun_report *
1259ciss_report_luns(struct ciss_softc *sc, int opcode, int nunits)
984263bc
MD
1260{
1261 struct ciss_request *cr;
1262 struct ciss_command *cc;
1263 struct ciss_report_cdb *crc;
1264 struct ciss_lun_report *cll;
984263bc 1265 int command_status;
9cf9a798
SW
1266 int report_size;
1267 int error = 0;
984263bc
MD
1268
1269 debug_called(1);
1270
1271 cr = NULL;
1272 cll = NULL;
1273
1274 /*
1275 * Get a request, allocate storage for the address list.
1276 */
1277 if ((error = ciss_get_request(sc, &cr)) != 0)
1278 goto out;
9cf9a798 1279 report_size = sizeof(*cll) + nunits * sizeof(union ciss_device_address);
efda3bd0 1280 cll = kmalloc(report_size, CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
984263bc
MD
1281
1282 /*
9cf9a798 1283 * Build the Report Logical/Physical LUNs command.
984263bc 1284 */
a8416dcf 1285 cc = cr->cr_cc;
984263bc
MD
1286 cr->cr_data = cll;
1287 cr->cr_length = report_size;
1288 cr->cr_flags = CISS_REQ_DATAIN;
9cf9a798 1289
984263bc
MD
1290 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
1291 cc->header.address.physical.bus = 0;
1292 cc->header.address.physical.target = 0;
1293 cc->cdb.cdb_length = sizeof(*crc);
1294 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
1295 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
1296 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
1297 cc->cdb.timeout = 30; /* XXX better suggestions? */
1298
1299 crc = (struct ciss_report_cdb *)&(cc->cdb.cdb[0]);
1300 bzero(crc, sizeof(*crc));
9cf9a798 1301 crc->opcode = opcode;
984263bc
MD
1302 crc->length = htonl(report_size); /* big-endian field */
1303 cll->list_size = htonl(report_size - sizeof(*cll)); /* big-endian field */
9cf9a798 1304
984263bc
MD
1305 /*
1306 * Submit the request and wait for it to complete. (timeout
1307 * here should be much greater than above)
1308 */
1309 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
9cf9a798 1310 ciss_printf(sc, "error sending %d LUN command (%d)\n", opcode, error);
984263bc
MD
1311 goto out;
1312 }
1313
1314 /*
1315 * Check response. Note that data over/underrun is OK.
1316 */
1317 ciss_report_request(cr, &command_status, NULL);
1318 switch(command_status) {
1319 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1320 case CISS_CMD_STATUS_DATA_UNDERRUN: /* buffer too large, not bad */
1321 break;
1322 case CISS_CMD_STATUS_DATA_OVERRUN:
9cf9a798 1323 ciss_printf(sc, "WARNING: more units than driver limit (%d)\n",
984263bc
MD
1324 CISS_MAX_LOGICAL);
1325 break;
1326 default:
1327 ciss_printf(sc, "error detecting logical drive configuration (%s)\n",
1328 ciss_name_command_status(command_status));
1329 error = EIO;
1330 goto out;
1331 }
1332 ciss_release_request(cr);
1333 cr = NULL;
1334
9cf9a798
SW
1335out:
1336 if (cr != NULL)
1337 ciss_release_request(cr);
1338 if (error && cll != NULL) {
1339 kfree(cll, CISS_MALLOC_CLASS);
1340 cll = NULL;
1341 }
1342 return(cll);
1343}
1344
1345/************************************************************************
1346 * Find logical drives on the adapter.
1347 */
1348static int
1349ciss_init_logical(struct ciss_softc *sc)
1350{
1351 struct ciss_lun_report *cll;
1352 int error = 0, i, j;
1353 int ndrives;
1354
1355 debug_called(1);
1356
1357 cll = ciss_report_luns(sc, CISS_OPCODE_REPORT_LOGICAL_LUNS,
1358 CISS_MAX_LOGICAL);
1359 if (cll == NULL) {
1360 error = ENXIO;
1361 goto out;
1362 }
1363
984263bc
MD
1364 /* sanity-check reply */
1365 ndrives = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
a8416dcf 1366 if ((ndrives < 0) || (ndrives > CISS_MAX_LOGICAL)) {
984263bc
MD
1367 ciss_printf(sc, "adapter claims to report absurd number of logical drives (%d > %d)\n",
1368 ndrives, CISS_MAX_LOGICAL);
9cf9a798
SW
1369 error = ENXIO;
1370 goto out;
984263bc
MD
1371 }
1372
1373 /*
1374 * Save logical drive information.
1375 */
9cf9a798
SW
1376 if (bootverbose) {
1377 ciss_printf(sc, "%d logical drive%s\n",
1378 ndrives, (ndrives > 1 || ndrives == 0) ? "s" : "");
1379 }
1380
1381 sc->ciss_logical =
1382 kmalloc(sc->ciss_max_logical_bus * sizeof(struct ciss_ldrive *),
1383 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1384
1385 for (i = 0; i <= sc->ciss_max_logical_bus; i++) {
1386 sc->ciss_logical[i] =
1387 kmalloc(CISS_MAX_LOGICAL * sizeof(struct ciss_ldrive),
1388 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1389
1390 for (j = 0; j < CISS_MAX_LOGICAL; j++)
1391 sc->ciss_logical[i][j].cl_status = CISS_LD_NONEXISTENT;
1392 }
1393
1394
984263bc
MD
1395 for (i = 0; i < CISS_MAX_LOGICAL; i++) {
1396 if (i < ndrives) {
9cf9a798
SW
1397 struct ciss_ldrive *ld;
1398 int bus, target;
1399
1400 bus = CISS_LUN_TO_BUS(cll->lun[i].logical.lun);
1401 target = CISS_LUN_TO_TARGET(cll->lun[i].logical.lun);
1402 ld = &sc->ciss_logical[bus][target];
1403
1404 ld->cl_address = cll->lun[i];
1405 ld->cl_controller = &sc->ciss_controllers[bus];
1406 if (ciss_identify_logical(sc, ld) != 0)
984263bc
MD
1407 continue;
1408 /*
1409 * If the drive has had media exchanged, we should bring it online.
1410 */
9cf9a798
SW
1411 if (ld->cl_lstatus->media_exchanged)
1412 ciss_accept_media(sc, ld);
984263bc 1413
984263bc
MD
1414 }
1415 }
9cf9a798 1416
984263bc 1417 out:
9cf9a798
SW
1418 if (cll != NULL)
1419 kfree(cll, CISS_MALLOC_CLASS);
1420 return(error);
1421}
1422
1423static int
1424ciss_init_physical(struct ciss_softc *sc)
1425{
1426 struct ciss_lun_report *cll;
1427 int error = 0, i;
1428 int nphys;
489fe090 1429 int bus;
9cf9a798
SW
1430
1431 debug_called(1);
1432
1433 bus = 0;
9cf9a798
SW
1434
1435 cll = ciss_report_luns(sc, CISS_OPCODE_REPORT_PHYSICAL_LUNS,
1436 CISS_MAX_PHYSICAL);
1437 if (cll == NULL) {
1438 error = ENXIO;
1439 goto out;
1440 }
1441
1442 nphys = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1443
1444 if (bootverbose) {
1445 ciss_printf(sc, "%d physical device%s\n",
1446 nphys, (nphys > 1 || nphys == 0) ? "s" : "");
1447 }
1448
984263bc 1449 /*
9cf9a798
SW
1450 * Figure out the bus mapping.
1451 * Logical buses include both the local logical bus for local arrays and
1452 * proxy buses for remote arrays. Physical buses are numbered by the
1453 * controller and represent physical buses that hold physical devices.
1454 * We shift these bus numbers so that everything fits into a single flat
1455 * numbering space for CAM. Logical buses occupy the first 32 CAM bus
1456 * numbers, and the physical bus numbers are shifted to be above that.
1457 * This results in the various driver arrays being indexed as follows:
1458 *
1459 * ciss_controllers[] - indexed by logical bus
1460 * ciss_cam_sim[] - indexed by both logical and physical, with physical
1461 * being shifted by 32.
1462 * ciss_logical[][] - indexed by logical bus
1463 * ciss_physical[][] - indexed by physical bus
1464 *
1465 * XXX This is getting more and more hackish. CISS really doesn't play
1466 * well with a standard SCSI model; devices are addressed via magic
1467 * cookies, not via b/t/l addresses. Since there is no way to store
1468 * the cookie in the CAM device object, we have to keep these lookup
1469 * tables handy so that the devices can be found quickly at the cost
1470 * of wasting memory and having a convoluted lookup scheme. This
1471 * driver should probably be converted to block interface.
1472 */
1473 /*
1474 * If the L2 and L3 SCSI addresses are 0, this signifies a proxy
1475 * controller. A proxy controller is another physical controller
1476 * behind the primary PCI controller. We need to know about this
1477 * so that BMIC commands can be properly targeted. There can be
1478 * proxy controllers attached to a single PCI controller, so
1479 * find the highest numbered one so the array can be properly
1480 * sized.
1481 */
1482 sc->ciss_max_logical_bus = 1;
1483 for (i = 0; i < nphys; i++) {
1484 if (cll->lun[i].physical.extra_address == 0) {
1485 bus = cll->lun[i].physical.bus;
1486 sc->ciss_max_logical_bus = max(sc->ciss_max_logical_bus, bus) + 1;
1487 } else {
1488 bus = CISS_EXTRA_BUS2(cll->lun[i].physical.extra_address);
1489 sc->ciss_max_physical_bus = max(sc->ciss_max_physical_bus, bus);
1490 }
1491 }
1492
1493 sc->ciss_controllers =
1494 kmalloc(sc->ciss_max_logical_bus * sizeof (union ciss_device_address),
1495 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1496
1497 /* setup a map of controller addresses */
1498 for (i = 0; i < nphys; i++) {
1499 if (cll->lun[i].physical.extra_address == 0) {
1500 sc->ciss_controllers[cll->lun[i].physical.bus] = cll->lun[i];
1501 }
1502 }
1503
1504 sc->ciss_physical =
1505 kmalloc(sc->ciss_max_physical_bus * sizeof(struct ciss_pdrive *),
1506 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1507
1508 for (i = 0; i < sc->ciss_max_physical_bus; i++) {
1509 sc->ciss_physical[i] =
1510 kmalloc(sizeof(struct ciss_pdrive) * CISS_MAX_PHYSTGT,
1511 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1512 }
1513
1514 ciss_filter_physical(sc, cll);
1515
1516out:
984263bc 1517 if (cll != NULL)
efda3bd0 1518 kfree(cll, CISS_MALLOC_CLASS);
9cf9a798 1519
984263bc
MD
1520 return(error);
1521}
1522
9cf9a798
SW
1523static int
1524ciss_filter_physical(struct ciss_softc *sc, struct ciss_lun_report *cll)
1525{
1526 u_int32_t ea;
1527 int i, nphys;
1528 int bus, target;
1529
1530 nphys = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1531 for (i = 0; i < nphys; i++) {
1532 if (cll->lun[i].physical.extra_address == 0)
1533 continue;
1534
1535 /*
1536 * Filter out devices that we don't want. Level 3 LUNs could
1537 * probably be supported, but the docs don't give enough of a
1538 * hint to know how.
1539 *
1540 * The mode field of the physical address is likely set to have
1541 * hard disks masked out. Honor it unless the user has overridden
1542 * us with the tunable. We also munge the inquiry data for these
1543 * disks so that they only show up as passthrough devices. Keeping
1544 * them visible in this fashion is useful for doing things like
1545 * flashing firmware.
1546 */
1547 ea = cll->lun[i].physical.extra_address;
1548 if ((CISS_EXTRA_BUS3(ea) != 0) || (CISS_EXTRA_TARGET3(ea) != 0) ||
1549 (CISS_EXTRA_MODE2(ea) == 0x3))
1550 continue;
1551 if ((ciss_expose_hidden_physical == 0) &&
1552 (cll->lun[i].physical.mode == CISS_HDR_ADDRESS_MODE_MASK_PERIPHERAL))
1553 continue;
1554
1555 /*
1556 * Note: CISS firmware numbers physical busses starting at '1', not
1557 * '0'. This numbering is internal to the firmware and is only
1558 * used as a hint here.
1559 */
1560 bus = CISS_EXTRA_BUS2(ea) - 1;
1561 target = CISS_EXTRA_TARGET2(ea);
1562 sc->ciss_physical[bus][target].cp_address = cll->lun[i];
1563 sc->ciss_physical[bus][target].cp_online = 1;
1564 }
1565
1566 return (0);
1567}
1568
984263bc
MD
1569static int
1570ciss_inquiry_logical(struct ciss_softc *sc, struct ciss_ldrive *ld)
1571{
1572 struct ciss_request *cr;
1573 struct ciss_command *cc;
1574 struct scsi_inquiry *inq;
1575 int error;
1576 int command_status;
984263bc
MD
1577
1578 cr = NULL;
984263bc
MD
1579
1580 bzero(&ld->cl_geometry, sizeof(ld->cl_geometry));
1581
1582 if ((error = ciss_get_request(sc, &cr)) != 0)
1583 goto out;
1584
a8416dcf 1585 cc = cr->cr_cc;
984263bc
MD
1586 cr->cr_data = &ld->cl_geometry;
1587 cr->cr_length = sizeof(ld->cl_geometry);
1588 cr->cr_flags = CISS_REQ_DATAIN;
1589
9cf9a798 1590 cc->header.address = ld->cl_address;
984263bc
MD
1591 cc->cdb.cdb_length = 6;
1592 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
1593 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
1594 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
1595 cc->cdb.timeout = 30;
1596
1597 inq = (struct scsi_inquiry *)&(cc->cdb.cdb[0]);
1598 inq->opcode = INQUIRY;
1599 inq->byte2 = SI_EVPD;
1600 inq->page_code = CISS_VPD_LOGICAL_DRIVE_GEOMETRY;
1601 inq->length = sizeof(ld->cl_geometry);
1602
1603 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1604 ciss_printf(sc, "error getting geometry (%d)\n", error);
1605 goto out;
1606 }
1607
1608 ciss_report_request(cr, &command_status, NULL);
1609 switch(command_status) {
1610 case CISS_CMD_STATUS_SUCCESS:
1611 case CISS_CMD_STATUS_DATA_UNDERRUN:
1612 break;
1613 case CISS_CMD_STATUS_DATA_OVERRUN:
1614 ciss_printf(sc, "WARNING: Data overrun\n");
1615 break;
1616 default:
1617 ciss_printf(sc, "Error detecting logical drive geometry (%s)\n",
1618 ciss_name_command_status(command_status));
1619 break;
1620 }
1621
1622out:
1623 if (cr != NULL)
1624 ciss_release_request(cr);
1625 return(error);
1626}
1627/************************************************************************
1628 * Identify a logical drive, initialise state related to it.
1629 */
1630static int
1631ciss_identify_logical(struct ciss_softc *sc, struct ciss_ldrive *ld)
1632{
1633 struct ciss_request *cr;
1634 struct ciss_command *cc;
1635 struct ciss_bmic_cdb *cbc;
1636 int error, command_status;
1637
1638 debug_called(1);
1639
1640 cr = NULL;
1641
1642 /*
1643 * Build a BMIC request to fetch the drive ID.
1644 */
1645 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_LDRIVE,
a8416dcf 1646 (void **)&ld->cl_ldrive,
984263bc
MD
1647 sizeof(*ld->cl_ldrive))) != 0)
1648 goto out;
a8416dcf 1649 cc = cr->cr_cc;
9cf9a798 1650 cc->header.address = *ld->cl_controller; /* target controller */
984263bc 1651 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
9cf9a798 1652 cbc->log_drive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
984263bc
MD
1653
1654 /*
1655 * Submit the request and wait for it to complete.
1656 */
1657 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1658 ciss_printf(sc, "error sending BMIC LDRIVE command (%d)\n", error);
1659 goto out;
1660 }
9cf9a798 1661
984263bc
MD
1662 /*
1663 * Check response.
1664 */
1665 ciss_report_request(cr, &command_status, NULL);
1666 switch(command_status) {
1667 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1668 break;
1669 case CISS_CMD_STATUS_DATA_UNDERRUN:
1670 case CISS_CMD_STATUS_DATA_OVERRUN:
1671 ciss_printf(sc, "data over/underrun reading logical drive ID\n");
1672 default:
1673 ciss_printf(sc, "error reading logical drive ID (%s)\n",
1674 ciss_name_command_status(command_status));
1675 error = EIO;
1676 goto out;
1677 }
1678 ciss_release_request(cr);
1679 cr = NULL;
1680
1681 /*
1682 * Build a CISS BMIC command to get the logical drive status.
1683 */
1684 if ((error = ciss_get_ldrive_status(sc, ld)) != 0)
1685 goto out;
1686
1687 /*
1688 * Get the logical drive geometry.
1689 */
1690 if ((error = ciss_inquiry_logical(sc, ld)) != 0)
1691 goto out;
1692
1693 /*
1694 * Print the drive's basic characteristics.
1695 */
9cf9a798
SW
1696 if (bootverbose) {
1697 ciss_printf(sc, "logical drive (b%dt%d): %s, %dMB ",
1698 CISS_LUN_TO_BUS(ld->cl_address.logical.lun),
1699 CISS_LUN_TO_TARGET(ld->cl_address.logical.lun),
1700 ciss_name_ldrive_org(ld->cl_ldrive->fault_tolerance),
984263bc
MD
1701 ((ld->cl_ldrive->blocks_available / (1024 * 1024)) *
1702 ld->cl_ldrive->block_size));
1703
1704 ciss_print_ldrive(sc, ld);
1705 }
1706out:
1707 if (error != 0) {
1708 /* make the drive not-exist */
1709 ld->cl_status = CISS_LD_NONEXISTENT;
1710 if (ld->cl_ldrive != NULL) {
efda3bd0 1711 kfree(ld->cl_ldrive, CISS_MALLOC_CLASS);
984263bc
MD
1712 ld->cl_ldrive = NULL;
1713 }
1714 if (ld->cl_lstatus != NULL) {
efda3bd0 1715 kfree(ld->cl_lstatus, CISS_MALLOC_CLASS);
984263bc
MD
1716 ld->cl_lstatus = NULL;
1717 }
1718 }
1719 if (cr != NULL)
1720 ciss_release_request(cr);
9cf9a798 1721
984263bc
MD
1722 return(error);
1723}
1724
1725/************************************************************************
1726 * Get status for a logical drive.
1727 *
1728 * XXX should we also do this in response to Test Unit Ready?
1729 */
1730static int
1731ciss_get_ldrive_status(struct ciss_softc *sc, struct ciss_ldrive *ld)
1732{
1733 struct ciss_request *cr;
1734 struct ciss_command *cc;
1735 struct ciss_bmic_cdb *cbc;
1736 int error, command_status;
1737
1738 /*
1739 * Build a CISS BMIC command to get the logical drive status.
1740 */
1741 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_LSTATUS,
a8416dcf 1742 (void **)&ld->cl_lstatus,
984263bc
MD
1743 sizeof(*ld->cl_lstatus))) != 0)
1744 goto out;
a8416dcf 1745 cc = cr->cr_cc;
9cf9a798 1746 cc->header.address = *ld->cl_controller; /* target controller */
984263bc 1747 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
9cf9a798 1748 cbc->log_drive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
984263bc
MD
1749
1750 /*
1751 * Submit the request and wait for it to complete.
1752 */
1753 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1754 ciss_printf(sc, "error sending BMIC LSTATUS command (%d)\n", error);
1755 goto out;
1756 }
9cf9a798 1757
984263bc
MD
1758 /*
1759 * Check response.
1760 */
1761 ciss_report_request(cr, &command_status, NULL);
1762 switch(command_status) {
1763 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1764 break;
1765 case CISS_CMD_STATUS_DATA_UNDERRUN:
1766 case CISS_CMD_STATUS_DATA_OVERRUN:
1767 ciss_printf(sc, "data over/underrun reading logical drive status\n");
1768 default:
1769 ciss_printf(sc, "error reading logical drive status (%s)\n",
1770 ciss_name_command_status(command_status));
1771 error = EIO;
1772 goto out;
1773 }
1774
1775 /*
1776 * Set the drive's summary status based on the returned status.
1777 *
9cf9a798 1778 * XXX testing shows that a failed JBOD drive comes back at next
984263bc
MD
1779 * boot in "queued for expansion" mode. WTF?
1780 */
1781 ld->cl_status = ciss_decode_ldrive_status(ld->cl_lstatus->status);
1782
1783out:
1784 if (cr != NULL)
1785 ciss_release_request(cr);
1786 return(error);
1787}
1788
1789/************************************************************************
1790 * Notify the adapter of a config update.
1791 */
1792static int
1793ciss_update_config(struct ciss_softc *sc)
1794{
1795 int i;
1796
1797 debug_called(1);
1798
1799 CISS_TL_SIMPLE_WRITE(sc, CISS_TL_SIMPLE_IDBR, CISS_TL_SIMPLE_IDBR_CFG_TABLE);
1800 for (i = 0; i < 1000; i++) {
1801 if (!(CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_IDBR) &
1802 CISS_TL_SIMPLE_IDBR_CFG_TABLE)) {
1803 return(0);
1804 }
1805 DELAY(1000);
1806 }
1807 return(1);
1808}
1809
1810/************************************************************************
1811 * Accept new media into a logical drive.
1812 *
1813 * XXX The drive has previously been offline; it would be good if we
1814 * could make sure it's not open right now.
1815 */
1816static int
9cf9a798 1817ciss_accept_media(struct ciss_softc *sc, struct ciss_ldrive *ld)
984263bc
MD
1818{
1819 struct ciss_request *cr;
1820 struct ciss_command *cc;
1821 struct ciss_bmic_cdb *cbc;
9cf9a798
SW
1822 int command_status;
1823 int error = 0, ldrive;
984263bc 1824
9cf9a798
SW
1825 ldrive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
1826
a8416dcf 1827 debug(0, "bringing logical drive %d back online");
984263bc
MD
1828
1829 /*
1830 * Build a CISS BMIC command to bring the drive back online.
1831 */
1832 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ACCEPT_MEDIA,
1833 NULL, 0)) != 0)
1834 goto out;
a8416dcf 1835 cc = cr->cr_cc;
9cf9a798 1836 cc->header.address = *ld->cl_controller; /* target controller */
984263bc
MD
1837 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
1838 cbc->log_drive = ldrive;
1839
1840 /*
9cf9a798 1841 * Submit the request and wait for it to complete.
984263bc 1842 */
9cf9a798
SW
1843 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1844 ciss_printf(sc, "error sending BMIC ACCEPT MEDIA command (%d)\n", error);
1845 goto out;
984263bc
MD
1846 }
1847
984263bc
MD
1848 /*
1849 * Check response.
1850 */
1851 ciss_report_request(cr, &command_status, NULL);
1852 switch(command_status) {
1853 case CISS_CMD_STATUS_SUCCESS: /* all OK */
1854 /* we should get a logical drive status changed event here */
1855 break;
1856 default:
1857 ciss_printf(cr->cr_sc, "error accepting media into failed logical drive (%s)\n",
1858 ciss_name_command_status(command_status));
1859 break;
1860 }
9cf9a798
SW
1861
1862out:
1863 if (cr != NULL)
1864 ciss_release_request(cr);
1865 return(error);
984263bc
MD
1866}
1867
1868/************************************************************************
1869 * Release adapter resources.
1870 */
1871static void
1872ciss_free(struct ciss_softc *sc)
1873{
9cf9a798 1874 struct ciss_request *cr;
a8416dcf 1875 int i, j;
9cf9a798 1876
984263bc
MD
1877 debug_called(1);
1878
1879 /* we're going away */
1880 sc->ciss_flags |= CISS_FLAG_ABORTING;
1881
1882 /* terminate the periodic heartbeat routine */
3fb01875 1883 callout_stop(&sc->ciss_periodic);
984263bc
MD
1884
1885 /* cancel the Event Notify chain */
1886 ciss_notify_abort(sc);
9cf9a798
SW
1887
1888 ciss_kill_notify_thread(sc);
1889
a8416dcf
SW
1890 /* disconnect from CAM */
1891 if (sc->ciss_cam_sim) {
1892 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
1893 if (sc->ciss_cam_sim[i]) {
1894 xpt_bus_deregister(cam_sim_path(sc->ciss_cam_sim[i]));
1895 cam_sim_free(sc->ciss_cam_sim[i]);
1896 }
1897 }
1898 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
1899 CISS_PHYSICAL_BASE; i++) {
1900 if (sc->ciss_cam_sim[i]) {
1901 xpt_bus_deregister(cam_sim_path(sc->ciss_cam_sim[i]));
1902 cam_sim_free(sc->ciss_cam_sim[i]);
1903 }
1904 }
1905 kfree(sc->ciss_cam_sim, CISS_MALLOC_CLASS);
1906 }
1907 if (sc->ciss_cam_devq)
1908 cam_simq_release(sc->ciss_cam_devq);
1909
9cf9a798 1910 /* remove the control device */
a8416dcf 1911 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798
SW
1912 if (sc->ciss_dev_t != NULL)
1913 destroy_dev(sc->ciss_dev_t);
1914
a8416dcf
SW
1915 /* Final cleanup of the callout. */
1916#if 0 /* XXX swildner callout_drain */
1917 callout_drain(&sc->ciss_periodic);
1918#else
1919 callout_stop(&sc->ciss_periodic);
1920#endif
1921 lockuninit(&sc->ciss_lock);
1922
984263bc
MD
1923 /* free the controller data */
1924 if (sc->ciss_id != NULL)
efda3bd0 1925 kfree(sc->ciss_id, CISS_MALLOC_CLASS);
984263bc
MD
1926
1927 /* release I/O resources */
1928 if (sc->ciss_regs_resource != NULL)
1929 bus_release_resource(sc->ciss_dev, SYS_RES_MEMORY,
1930 sc->ciss_regs_rid, sc->ciss_regs_resource);
1931 if (sc->ciss_cfg_resource != NULL)
1932 bus_release_resource(sc->ciss_dev, SYS_RES_MEMORY,
1933 sc->ciss_cfg_rid, sc->ciss_cfg_resource);
1934 if (sc->ciss_intr != NULL)
1935 bus_teardown_intr(sc->ciss_dev, sc->ciss_irq_resource, sc->ciss_intr);
1936 if (sc->ciss_irq_resource != NULL)
1937 bus_release_resource(sc->ciss_dev, SYS_RES_IRQ,
a8416dcf
SW
1938 sc->ciss_irq_rid[0], sc->ciss_irq_resource);
1939 if (sc->ciss_irq_type == PCI_INTR_TYPE_MSI)
1940 pci_release_msi(sc->ciss_dev);
9cf9a798
SW
1941
1942 while ((cr = ciss_dequeue_free(sc)) != NULL)
1943 bus_dmamap_destroy(sc->ciss_buffer_dmat, cr->cr_datamap);
984263bc
MD
1944 if (sc->ciss_buffer_dmat)
1945 bus_dma_tag_destroy(sc->ciss_buffer_dmat);
1946
1947 /* destroy command memory and DMA tag */
1948 if (sc->ciss_command != NULL) {
1949 bus_dmamap_unload(sc->ciss_command_dmat, sc->ciss_command_map);
1950 bus_dmamem_free(sc->ciss_command_dmat, sc->ciss_command, sc->ciss_command_map);
1951 }
9cf9a798 1952 if (sc->ciss_command_dmat)
984263bc
MD
1953 bus_dma_tag_destroy(sc->ciss_command_dmat);
1954
a8416dcf
SW
1955 if (sc->ciss_reply) {
1956 bus_dmamap_unload(sc->ciss_reply_dmat, sc->ciss_reply_map);
1957 bus_dmamem_free(sc->ciss_reply_dmat, sc->ciss_reply, sc->ciss_reply_map);
984263bc 1958 }
a8416dcf
SW
1959 if (sc->ciss_reply_dmat)
1960 bus_dma_tag_destroy(sc->ciss_reply_dmat);
9cf9a798 1961
a8416dcf
SW
1962 /* destroy DMA tags */
1963 if (sc->ciss_parent_dmat)
1964 bus_dma_tag_destroy(sc->ciss_parent_dmat);
9cf9a798 1965 if (sc->ciss_logical) {
a8416dcf
SW
1966 for (i = 0; i <= sc->ciss_max_logical_bus; i++) {
1967 for (j = 0; j < CISS_MAX_LOGICAL; j++) {
1968 if (sc->ciss_logical[i][j].cl_ldrive)
1969 kfree(sc->ciss_logical[i][j].cl_ldrive, CISS_MALLOC_CLASS);
1970 if (sc->ciss_logical[i][j].cl_lstatus)
1971 kfree(sc->ciss_logical[i][j].cl_lstatus, CISS_MALLOC_CLASS);
1972 }
9cf9a798 1973 kfree(sc->ciss_logical[i], CISS_MALLOC_CLASS);
a8416dcf 1974 }
9cf9a798
SW
1975 kfree(sc->ciss_logical, CISS_MALLOC_CLASS);
1976 }
1977
1978 if (sc->ciss_physical) {
1979 for (i = 0; i < sc->ciss_max_physical_bus; i++)
1980 kfree(sc->ciss_physical[i], CISS_MALLOC_CLASS);
1981 kfree(sc->ciss_physical, CISS_MALLOC_CLASS);
1982 }
1983
1984 if (sc->ciss_controllers)
1985 kfree(sc->ciss_controllers, CISS_MALLOC_CLASS);
a8416dcf
SW
1986
1987 sysctl_ctx_free(&sc->ciss_sysctl_ctx);
984263bc
MD
1988}
1989
1990/************************************************************************
1991 * Give a command to the adapter.
1992 *
1993 * Note that this uses the simple transport layer directly. If we
1994 * want to add support for other layers, we'll need a switch of some
1995 * sort.
1996 *
1997 * Note that the simple transport layer has no way of refusing a
1998 * command; we only have as many request structures as the adapter
1999 * supports commands, so we don't have to check (this presumes that
2000 * the adapter can handle commands as fast as we throw them at it).
2001 */
2002static int
2003ciss_start(struct ciss_request *cr)
2004{
2005 struct ciss_command *cc; /* XXX debugging only */
2006 int error;
2007
a8416dcf 2008 cc = cr->cr_cc;
984263bc
MD
2009 debug(2, "post command %d tag %d ", cr->cr_tag, cc->header.host_tag);
2010
2011 /*
2012 * Map the request's data.
2013 */
2014 if ((error = ciss_map_request(cr)))
2015 return(error);
2016
2017#if 0
2018 ciss_print_request(cr);
2019#endif
2020
984263bc
MD
2021 return(0);
2022}
2023
2024/************************************************************************
2025 * Fetch completed request(s) from the adapter, queue them for
2026 * completion handling.
2027 *
2028 * Note that this uses the simple transport layer directly. If we
2029 * want to add support for other layers, we'll need a switch of some
2030 * sort.
2031 *
2032 * Note that the simple transport mechanism does not require any
2033 * reentrancy protection; the OPQ read is atomic. If there is a
2034 * chance of a race with something else that might move the request
2035 * off the busy list, then we will have to lock against that
2036 * (eg. timeouts, etc.)
2037 */
2038static void
a8416dcf 2039ciss_done(struct ciss_softc *sc, cr_qhead_t *qh)
984263bc
MD
2040{
2041 struct ciss_request *cr;
2042 struct ciss_command *cc;
2043 u_int32_t tag, index;
9cf9a798 2044
984263bc
MD
2045 debug_called(3);
2046
2047 /*
2048 * Loop quickly taking requests from the adapter and moving them
a8416dcf 2049 * to the completed queue.
984263bc 2050 */
984263bc
MD
2051 for (;;) {
2052
984263bc
MD
2053 tag = CISS_TL_SIMPLE_FETCH_CMD(sc);
2054 if (tag == CISS_TL_SIMPLE_OPQ_EMPTY)
2055 break;
2056 index = tag >> 2;
9cf9a798 2057 debug(2, "completed command %d%s", index,
984263bc
MD
2058 (tag & CISS_HDR_HOST_TAG_ERROR) ? " with error" : "");
2059 if (index >= sc->ciss_max_requests) {
2060 ciss_printf(sc, "completed invalid request %d (0x%x)\n", index, tag);
2061 continue;
2062 }
2063 cr = &(sc->ciss_request[index]);
a8416dcf 2064 cc = cr->cr_cc;
984263bc 2065 cc->header.host_tag = tag; /* not updated by adapter */
a8416dcf 2066 ciss_enqueue_complete(cr, qh);
984263bc 2067 }
9cf9a798 2068
a8416dcf
SW
2069}
2070
2071static void
2072ciss_perf_done(struct ciss_softc *sc, cr_qhead_t *qh)
2073{
2074 struct ciss_request *cr;
2075 struct ciss_command *cc;
2076 u_int32_t tag, index;
2077
2078 debug_called(3);
2079
984263bc 2080 /*
a8416dcf
SW
2081 * Loop quickly taking requests from the adapter and moving them
2082 * to the completed queue.
984263bc 2083 */
a8416dcf
SW
2084 for (;;) {
2085 tag = sc->ciss_reply[sc->ciss_rqidx];
2086 if ((tag & CISS_CYCLE_MASK) != sc->ciss_cycle)
2087 break;
2088 index = tag >> 2;
2089 debug(2, "completed command %d%s\n", index,
2090 (tag & CISS_HDR_HOST_TAG_ERROR) ? " with error" : "");
2091 if (index < sc->ciss_max_requests) {
2092 cr = &(sc->ciss_request[index]);
2093 cc = cr->cr_cc;
2094 cc->header.host_tag = tag; /* not updated by adapter */
2095 ciss_enqueue_complete(cr, qh);
2096 } else {
2097 ciss_printf(sc, "completed invalid request %d (0x%x)\n", index, tag);
2098 }
2099 if (++sc->ciss_rqidx == sc->ciss_max_requests) {
2100 sc->ciss_rqidx = 0;
2101 sc->ciss_cycle ^= 1;
2102 }
2103 }
2104
984263bc
MD
2105}
2106
2107/************************************************************************
2108 * Take an interrupt from the adapter.
2109 */
2110static void
2111ciss_intr(void *arg)
2112{
a8416dcf 2113 cr_qhead_t qh;
984263bc
MD
2114 struct ciss_softc *sc = (struct ciss_softc *)arg;
2115
2116 /*
2117 * The only interrupt we recognise indicates that there are
2118 * entries in the outbound post queue.
2119 */
a8416dcf
SW
2120 STAILQ_INIT(&qh);
2121 ciss_done(sc, &qh);
2122 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
2123 ciss_complete(sc, &qh);
2124 lockmgr(&sc->ciss_lock, LK_RELEASE);
2125}
2126
2127static void
2128ciss_perf_intr(void *arg)
2129{
2130 struct ciss_softc *sc = (struct ciss_softc *)arg;
2131
2132 /* Clear the interrupt and flush the bridges. Docs say that the flush
2133 * needs to be done twice, which doesn't seem right.
2134 */
2135 CISS_TL_PERF_CLEAR_INT(sc);
2136 CISS_TL_PERF_FLUSH_INT(sc);
2137
2138 ciss_perf_msi_intr(sc);
984263bc
MD
2139}
2140
a8416dcf
SW
2141static void
2142ciss_perf_msi_intr(void *arg)
2143{
2144 cr_qhead_t qh;
2145 struct ciss_softc *sc = (struct ciss_softc *)arg;
2146
2147 STAILQ_INIT(&qh);
2148 ciss_perf_done(sc, &qh);
2149 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
2150 ciss_complete(sc, &qh);
2151 lockmgr(&sc->ciss_lock, LK_RELEASE);
2152}
2153
2154
984263bc
MD
2155/************************************************************************
2156 * Process completed requests.
2157 *
2158 * Requests can be completed in three fashions:
2159 *
2160 * - by invoking a callback function (cr_complete is non-null)
2161 * - by waking up a sleeper (cr_flags has CISS_REQ_SLEEP set)
2162 * - by clearing the CISS_REQ_POLL flag in interrupt/timeout context
2163 */
2164static void
a8416dcf 2165ciss_complete(struct ciss_softc *sc, cr_qhead_t *qh)
984263bc
MD
2166{
2167 struct ciss_request *cr;
2168
2169 debug_called(2);
2170
2171 /*
2172 * Loop taking requests off the completed queue and performing
2173 * completion processing on them.
2174 */
2175 for (;;) {
a8416dcf 2176 if ((cr = ciss_dequeue_complete(sc, qh)) == NULL)
984263bc
MD
2177 break;
2178 ciss_unmap_request(cr);
9cf9a798 2179
a8416dcf
SW
2180 if ((cr->cr_flags & CISS_REQ_BUSY) == 0)
2181 ciss_printf(sc, "WARNING: completing non-busy request\n");
2182 cr->cr_flags &= ~CISS_REQ_BUSY;
2183
984263bc
MD
2184 /*
2185 * If the request has a callback, invoke it.
2186 */
2187 if (cr->cr_complete != NULL) {
2188 cr->cr_complete(cr);
2189 continue;
2190 }
9cf9a798 2191
984263bc
MD
2192 /*
2193 * If someone is sleeping on this request, wake them up.
2194 */
2195 if (cr->cr_flags & CISS_REQ_SLEEP) {
2196 cr->cr_flags &= ~CISS_REQ_SLEEP;
2197 wakeup(cr);
2198 continue;
2199 }
2200
2201 /*
2202 * If someone is polling this request for completion, signal.
2203 */
2204 if (cr->cr_flags & CISS_REQ_POLL) {
2205 cr->cr_flags &= ~CISS_REQ_POLL;
2206 continue;
2207 }
9cf9a798 2208
984263bc
MD
2209 /*
2210 * Give up and throw the request back on the free queue. This
2211 * should never happen; resources will probably be lost.
2212 */
2213 ciss_printf(sc, "WARNING: completed command with no submitter\n");
2214 ciss_enqueue_free(cr);
2215 }
2216}
2217
2218/************************************************************************
2219 * Report on the completion status of a request, and pass back SCSI
2220 * and command status values.
2221 */
2222static int
a8416dcf 2223_ciss_report_request(struct ciss_request *cr, int *command_status, int *scsi_status, const char *func)
984263bc
MD
2224{
2225 struct ciss_command *cc;
2226 struct ciss_error_info *ce;
2227
2228 debug_called(2);
2229
a8416dcf 2230 cc = cr->cr_cc;
984263bc
MD
2231 ce = (struct ciss_error_info *)&(cc->sg[0]);
2232
2233 /*
2234 * We don't consider data under/overrun an error for the Report
2235 * Logical/Physical LUNs commands.
2236 */
2237 if ((cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) &&
9cf9a798
SW
2238 ((ce->command_status == CISS_CMD_STATUS_DATA_OVERRUN) ||
2239 (ce->command_status == CISS_CMD_STATUS_DATA_UNDERRUN)) &&
984263bc 2240 ((cc->cdb.cdb[0] == CISS_OPCODE_REPORT_LOGICAL_LUNS) ||
9cf9a798
SW
2241 (cc->cdb.cdb[0] == CISS_OPCODE_REPORT_PHYSICAL_LUNS) ||
2242 (cc->cdb.cdb[0] == INQUIRY))) {
984263bc
MD
2243 cc->header.host_tag &= ~CISS_HDR_HOST_TAG_ERROR;
2244 debug(2, "ignoring irrelevant under/overrun error");
2245 }
9cf9a798 2246
984263bc
MD
2247 /*
2248 * Check the command's error bit, if clear, there's no status and
2249 * everything is OK.
2250 */
2251 if (!(cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR)) {
2252 if (scsi_status != NULL)
2253 *scsi_status = SCSI_STATUS_OK;
2254 if (command_status != NULL)
2255 *command_status = CISS_CMD_STATUS_SUCCESS;
2256 return(0);
2257 } else {
2258 if (command_status != NULL)
2259 *command_status = ce->command_status;
2260 if (scsi_status != NULL) {
2261 if (ce->command_status == CISS_CMD_STATUS_TARGET_STATUS) {
2262 *scsi_status = ce->scsi_status;
2263 } else {
2264 *scsi_status = -1;
2265 }
2266 }
2267 if (bootverbose)
2268 ciss_printf(cr->cr_sc, "command status 0x%x (%s) scsi status 0x%x\n",
2269 ce->command_status, ciss_name_command_status(ce->command_status),
2270 ce->scsi_status);
2271 if (ce->command_status == CISS_CMD_STATUS_INVALID_COMMAND) {
a8416dcf 2272 ciss_printf(cr->cr_sc, "invalid command, offense size %d at %d, value 0x%x, function %s\n",
984263bc
MD
2273 ce->additional_error_info.invalid_command.offense_size,
2274 ce->additional_error_info.invalid_command.offense_offset,
a8416dcf
SW
2275 ce->additional_error_info.invalid_command.offense_value,
2276 func);
984263bc
MD
2277 }
2278 }
9cf9a798
SW
2279#if 0
2280 ciss_print_request(cr);
2281#endif
984263bc
MD
2282 return(1);
2283}
2284
2285/************************************************************************
2286 * Issue a request and don't return until it's completed.
2287 *
2288 * Depending on adapter status, we may poll or sleep waiting for
2289 * completion.
2290 */
2291static int
2292ciss_synch_request(struct ciss_request *cr, int timeout)
2293{
2294 if (cr->cr_sc->ciss_flags & CISS_FLAG_RUNNING) {
2295 return(ciss_wait_request(cr, timeout));
2296 } else {
2297 return(ciss_poll_request(cr, timeout));
2298 }
2299}
2300
2301/************************************************************************
2302 * Issue a request and poll for completion.
2303 *
2304 * Timeout in milliseconds.
2305 */
2306static int
2307ciss_poll_request(struct ciss_request *cr, int timeout)
2308{
a8416dcf
SW
2309 cr_qhead_t qh;
2310 struct ciss_softc *sc;
984263bc 2311 int error;
9cf9a798 2312
984263bc
MD
2313 debug_called(2);
2314
a8416dcf
SW
2315 STAILQ_INIT(&qh);
2316 sc = cr->cr_sc;
984263bc
MD
2317 cr->cr_flags |= CISS_REQ_POLL;
2318 if ((error = ciss_start(cr)) != 0)
2319 return(error);
2320
2321 do {
a8416dcf
SW
2322 if (sc->ciss_perf)
2323 ciss_perf_done(sc, &qh);
2324 else
2325 ciss_done(sc, &qh);
2326 ciss_complete(sc, &qh);
984263bc
MD
2327 if (!(cr->cr_flags & CISS_REQ_POLL))
2328 return(0);
2329 DELAY(1000);
2330 } while (timeout-- >= 0);
2331 return(EWOULDBLOCK);
2332}
2333
2334/************************************************************************
2335 * Issue a request and sleep waiting for completion.
2336 *
2337 * Timeout in milliseconds. Note that a spurious wakeup will reset
2338 * the timeout.
2339 */
2340static int
2341ciss_wait_request(struct ciss_request *cr, int timeout)
2342{
7f2216bc 2343 int error;
984263bc
MD
2344
2345 debug_called(2);
2346
2347 cr->cr_flags |= CISS_REQ_SLEEP;
2348 if ((error = ciss_start(cr)) != 0)
2349 return(error);
2350
9cf9a798 2351 while ((cr->cr_flags & CISS_REQ_SLEEP) && (error != EWOULDBLOCK)) {
a8416dcf 2352 error = lksleep(cr, &cr->cr_sc->ciss_lock, 0, "cissREQ", (timeout * hz) / 1000);
984263bc 2353 }
984263bc
MD
2354 return(error);
2355}
2356
2357#if 0
2358/************************************************************************
2359 * Abort a request. Note that a potential exists here to race the
2360 * request being completed; the caller must deal with this.
2361 */
2362static int
2363ciss_abort_request(struct ciss_request *ar)
2364{
2365 struct ciss_request *cr;
2366 struct ciss_command *cc;
2367 struct ciss_message_cdb *cmc;
2368 int error;
2369
2370 debug_called(1);
2371
2372 /* get a request */
2373 if ((error = ciss_get_request(ar->cr_sc, &cr)) != 0)
2374 return(error);
2375
9cf9a798 2376 /* build the abort command */
a8416dcf 2377 cc = cr->cr_cc;
984263bc
MD
2378 cc->header.address.mode.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL; /* addressing? */
2379 cc->header.address.physical.target = 0;
2380 cc->header.address.physical.bus = 0;
2381 cc->cdb.cdb_length = sizeof(*cmc);
2382 cc->cdb.type = CISS_CDB_TYPE_MESSAGE;
2383 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
2384 cc->cdb.direction = CISS_CDB_DIRECTION_NONE;
2385 cc->cdb.timeout = 30;
2386
2387 cmc = (struct ciss_message_cdb *)&(cc->cdb.cdb[0]);
2388 cmc->opcode = CISS_OPCODE_MESSAGE_ABORT;
2389 cmc->type = CISS_MESSAGE_ABORT_TASK;
2390 cmc->abort_tag = ar->cr_tag; /* endianness?? */
2391
2392 /*
2393 * Send the request and wait for a response. If we believe we
2394 * aborted the request OK, clear the flag that indicates it's
2395 * running.
2396 */
2397 error = ciss_synch_request(cr, 35 * 1000);
2398 if (!error)
2399 error = ciss_report_request(cr, NULL, NULL);
2400 ciss_release_request(cr);
2401
2402 return(error);
2403}
2404#endif
2405
2406
2407/************************************************************************
2408 * Fetch and initialise a request
2409 */
2410static int
2411ciss_get_request(struct ciss_softc *sc, struct ciss_request **crp)
2412{
2413 struct ciss_request *cr;
2414
2415 debug_called(2);
2416
2417 /*
2418 * Get a request and clean it up.
2419 */
2420 if ((cr = ciss_dequeue_free(sc)) == NULL)
2421 return(ENOMEM);
2422
2423 cr->cr_data = NULL;
2424 cr->cr_flags = 0;
2425 cr->cr_complete = NULL;
9cf9a798 2426 cr->cr_private = NULL;
a8416dcf 2427 cr->cr_sg_tag = CISS_SG_MAX; /* Backstop to prevent accidents */
9cf9a798 2428
984263bc
MD
2429 ciss_preen_command(cr);
2430 *crp = cr;
2431 return(0);
2432}
2433
2434static void
2435ciss_preen_command(struct ciss_request *cr)
2436{
2437 struct ciss_command *cc;
2438 u_int32_t cmdphys;
2439
2440 /*
2441 * Clean up the command structure.
2442 *
2443 * Note that we set up the error_info structure here, since the
2444 * length can be overwritten by any command.
2445 */
a8416dcf 2446 cc = cr->cr_cc;
984263bc
MD
2447 cc->header.sg_in_list = 0; /* kinda inefficient this way */
2448 cc->header.sg_total = 0;
2449 cc->header.host_tag = cr->cr_tag << 2;
2450 cc->header.host_tag_zeroes = 0;
a8416dcf 2451 cmdphys = cr->cr_ccphys;
984263bc
MD
2452 cc->error_info.error_info_address = cmdphys + sizeof(struct ciss_command);
2453 cc->error_info.error_info_length = CISS_COMMAND_ALLOC_SIZE - sizeof(struct ciss_command);
984263bc
MD
2454}
2455
2456/************************************************************************
2457 * Release a request to the free list.
2458 */
2459static void
2460ciss_release_request(struct ciss_request *cr)
2461{
984263bc
MD
2462 debug_called(2);
2463
984263bc
MD
2464 /* release the request to the free queue */
2465 ciss_requeue_free(cr);
2466}
2467
2468/************************************************************************
2469 * Allocate a request that will be used to send a BMIC command. Do some
2470 * of the common setup here to avoid duplicating it everywhere else.
2471 */
2472static int
2473ciss_get_bmic_request(struct ciss_softc *sc, struct ciss_request **crp,
2474 int opcode, void **bufp, size_t bufsize)
2475{
2476 struct ciss_request *cr;
2477 struct ciss_command *cc;
2478 struct ciss_bmic_cdb *cbc;
2479 void *buf;
2480 int error;
2481 int dataout;
2482
2483 debug_called(2);
2484
2485 cr = NULL;
9cf9a798 2486 buf = NULL;
984263bc
MD
2487
2488 /*
2489 * Get a request.
2490 */
2491 if ((error = ciss_get_request(sc, &cr)) != 0)
2492 goto out;
2493
2494 /*
2495 * Allocate data storage if requested, determine the data direction.
2496 */
2497 dataout = 0;
2498 if ((bufsize > 0) && (bufp != NULL)) {
2499 if (*bufp == NULL) {
efda3bd0 2500 buf = kmalloc(bufsize, CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
984263bc
MD
2501 } else {
2502 buf = *bufp;
2503 dataout = 1; /* we are given a buffer, so we are writing */
2504 }
2505 }
2506
2507 /*
2508 * Build a CISS BMIC command to get the logical drive ID.
2509 */
2510 cr->cr_data = buf;
2511 cr->cr_length = bufsize;
2512 if (!dataout)
2513 cr->cr_flags = CISS_REQ_DATAIN;
9cf9a798 2514
a8416dcf 2515 cc = cr->cr_cc;
984263bc
MD
2516 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
2517 cc->header.address.physical.bus = 0;
2518 cc->header.address.physical.target = 0;
2519 cc->cdb.cdb_length = sizeof(*cbc);
2520 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
2521 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
2522 cc->cdb.direction = dataout ? CISS_CDB_DIRECTION_WRITE : CISS_CDB_DIRECTION_READ;
2523 cc->cdb.timeout = 0;
2524
2525 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
2526 bzero(cbc, sizeof(*cbc));
2527 cbc->opcode = dataout ? CISS_ARRAY_CONTROLLER_WRITE : CISS_ARRAY_CONTROLLER_READ;
2528 cbc->bmic_opcode = opcode;
2529 cbc->size = htons((u_int16_t)bufsize);
2530
2531out:
2532 if (error) {
2533 if (cr != NULL)
2534 ciss_release_request(cr);
984263bc
MD
2535 } else {
2536 *crp = cr;
2537 if ((bufp != NULL) && (*bufp == NULL) && (buf != NULL))
2538 *bufp = buf;
2539 }
2540 return(error);
2541}
2542
2543/************************************************************************
2544 * Handle a command passed in from userspace.
2545 */
2546static int
2547ciss_user_command(struct ciss_softc *sc, IOCTL_Command_struct *ioc)
2548{
2549 struct ciss_request *cr;
2550 struct ciss_command *cc;
2551 struct ciss_error_info *ce;
9cf9a798 2552 int error = 0;
984263bc
MD
2553
2554 debug_called(1);
2555
2556 cr = NULL;
2557
2558 /*
2559 * Get a request.
2560 */
a8416dcf
SW
2561 while (ciss_get_request(sc, &cr) != 0)
2562 lksleep(sc, &sc->ciss_lock, 0, "cissREQ", hz);
2563 cc = cr->cr_cc;
984263bc
MD
2564
2565 /*
2566 * Allocate an in-kernel databuffer if required, copy in user data.
2567 */
a8416dcf 2568 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2569 cr->cr_length = ioc->buf_size;
2570 if (ioc->buf_size > 0) {
978400d3 2571 cr->cr_data = kmalloc(ioc->buf_size, CISS_MALLOC_CLASS, M_WAITOK);
984263bc
MD
2572 if ((error = copyin(ioc->buf, cr->cr_data, ioc->buf_size))) {
2573 debug(0, "copyin: bad data buffer %p/%d", ioc->buf, ioc->buf_size);
a8416dcf 2574 goto out_unlocked;
984263bc
MD
2575 }
2576 }
2577
2578 /*
2579 * Build the request based on the user command.
2580 */
2581 bcopy(&ioc->LUN_info, &cc->header.address, sizeof(cc->header.address));
2582 bcopy(&ioc->Request, &cc->cdb, sizeof(cc->cdb));
2583
2584 /* XXX anything else to populate here? */
a8416dcf 2585 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc
MD
2586
2587 /*
2588 * Run the command.
2589 */
2590 if ((error = ciss_synch_request(cr, 60 * 1000))) {
2591 debug(0, "request failed - %d", error);
2592 goto out;
2593 }
2594
2595 /*
9cf9a798 2596 * Check to see if the command succeeded.
984263bc
MD
2597 */
2598 ce = (struct ciss_error_info *)&(cc->sg[0]);
9cf9a798
SW
2599 if ((cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) == 0)
2600 bzero(ce, sizeof(*ce));
2601
2602 /*
2603 * Copy the results back to the user.
2604 */
984263bc 2605 bcopy(ce, &ioc->error_info, sizeof(*ce));
a8416dcf 2606 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2607 if ((ioc->buf_size > 0) &&
2608 (error = copyout(cr->cr_data, ioc->buf, ioc->buf_size))) {
2609 debug(0, "copyout: bad data buffer %p/%d", ioc->buf, ioc->buf_size);
a8416dcf 2610 goto out_unlocked;
984263bc
MD
2611 }
2612
2613 /* done OK */
2614 error = 0;
2615
a8416dcf
SW
2616out_unlocked:
2617 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
2618
984263bc
MD
2619out:
2620 if ((cr != NULL) && (cr->cr_data != NULL))
efda3bd0 2621 kfree(cr->cr_data, CISS_MALLOC_CLASS);
984263bc
MD
2622 if (cr != NULL)
2623 ciss_release_request(cr);
2624 return(error);
2625}
2626
2627/************************************************************************
2628 * Map a request into bus-visible space, initialise the scatter/gather
2629 * list.
2630 */
2631static int
2632ciss_map_request(struct ciss_request *cr)
2633{
2634 struct ciss_softc *sc;
9cf9a798 2635 int error = 0;
984263bc
MD
2636
2637 debug_called(2);
9cf9a798 2638
984263bc
MD
2639 sc = cr->cr_sc;
2640
2641 /* check that mapping is necessary */
9cf9a798 2642 if (cr->cr_flags & CISS_REQ_MAPPED)
984263bc 2643 return(0);
984263bc
MD
2644
2645 cr->cr_flags |= CISS_REQ_MAPPED;
9cf9a798
SW
2646
2647 bus_dmamap_sync(sc->ciss_command_dmat, sc->ciss_command_map,
2648 BUS_DMASYNC_PREWRITE);
2649
2650 if (cr->cr_data != NULL) {
2651 error = bus_dmamap_load(sc->ciss_buffer_dmat, cr->cr_datamap,
2652 cr->cr_data, cr->cr_length,
2653 ciss_request_map_helper, cr, 0);
2654 if (error != 0)
2655 return (error);
2656 } else {
2657 /*
2658 * Post the command to the adapter.
2659 */
a8416dcf
SW
2660 cr->cr_sg_tag = CISS_SG_NONE;
2661 cr->cr_flags |= CISS_REQ_BUSY;
2662 if (sc->ciss_perf)
2663 CISS_TL_PERF_POST_CMD(sc, cr);
2664 else
2665 CISS_TL_SIMPLE_POST_CMD(sc, cr->cr_ccphys);
9cf9a798
SW
2666 }
2667
984263bc
MD
2668 return(0);
2669}
2670
2671static void
2672ciss_request_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2673{
2674 struct ciss_command *cc;
9cf9a798 2675 struct ciss_request *cr;
a8416dcf 2676 struct ciss_softc *sc;
984263bc
MD
2677 int i;
2678
2679 debug_called(2);
9cf9a798
SW
2680
2681 cr = (struct ciss_request *)arg;
2682 sc = cr->cr_sc;
a8416dcf 2683 cc = cr->cr_cc;
9cf9a798 2684
984263bc
MD
2685 for (i = 0; i < nseg; i++) {
2686 cc->sg[i].address = segs[i].ds_addr;
2687 cc->sg[i].length = segs[i].ds_len;
2688 cc->sg[i].extension = 0;
2689 }
2690 /* we leave the s/g table entirely within the command */
2691 cc->header.sg_in_list = nseg;
2692 cc->header.sg_total = nseg;
9cf9a798
SW
2693
2694 if (cr->cr_flags & CISS_REQ_DATAIN)
2695 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_PREREAD);
2696 if (cr->cr_flags & CISS_REQ_DATAOUT)
2697 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_PREWRITE);
2698
a8416dcf
SW
2699 if (nseg == 0)
2700 cr->cr_sg_tag = CISS_SG_NONE;
2701 else if (nseg == 1)
2702 cr->cr_sg_tag = CISS_SG_1;
2703 else if (nseg == 2)
2704 cr->cr_sg_tag = CISS_SG_2;
2705 else if (nseg <= 4)
2706 cr->cr_sg_tag = CISS_SG_4;
2707 else if (nseg <= 8)
2708 cr->cr_sg_tag = CISS_SG_8;
2709 else if (nseg <= 16)
2710 cr->cr_sg_tag = CISS_SG_16;
2711 else if (nseg <= 32)
2712 cr->cr_sg_tag = CISS_SG_32;
2713 else
2714 cr->cr_sg_tag = CISS_SG_MAX;
2715
9cf9a798
SW
2716 /*
2717 * Post the command to the adapter.
2718 */
a8416dcf
SW
2719 cr->cr_flags |= CISS_REQ_BUSY;
2720 if (sc->ciss_perf)
2721 CISS_TL_PERF_POST_CMD(sc, cr);
2722 else
2723 CISS_TL_SIMPLE_POST_CMD(sc, cr->cr_ccphys);
984263bc
MD
2724}
2725
2726/************************************************************************
2727 * Unmap a request from bus-visible space.
2728 */
2729static void
2730ciss_unmap_request(struct ciss_request *cr)
2731{
2732 struct ciss_softc *sc;
2733
2734 debug_called(2);
9cf9a798 2735
984263bc
MD
2736 sc = cr->cr_sc;
2737
2738 /* check that unmapping is necessary */
9cf9a798 2739 if ((cr->cr_flags & CISS_REQ_MAPPED) == 0)
984263bc
MD
2740 return;
2741
9cf9a798
SW
2742 bus_dmamap_sync(sc->ciss_command_dmat, sc->ciss_command_map,
2743 BUS_DMASYNC_POSTWRITE);
2744
2745 if (cr->cr_data == NULL)
2746 goto out;
2747
984263bc
MD
2748 if (cr->cr_flags & CISS_REQ_DATAIN)
2749 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_POSTREAD);
2750 if (cr->cr_flags & CISS_REQ_DATAOUT)
2751 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_POSTWRITE);
2752
2753 bus_dmamap_unload(sc->ciss_buffer_dmat, cr->cr_datamap);
9cf9a798 2754out:
984263bc
MD
2755 cr->cr_flags &= ~CISS_REQ_MAPPED;
2756}
2757
2758/************************************************************************
2759 * Attach the driver to CAM.
2760 *
2761 * We put all the logical drives on a single SCSI bus.
2762 */
2763static int
2764ciss_cam_init(struct ciss_softc *sc)
2765{
9cf9a798 2766 int i, maxbus;
984263bc
MD
2767
2768 debug_called(1);
2769
2770 /*
2771 * Allocate a devq. We can reuse this for the masked physical
2772 * devices if we decide to export these as well.
2773 */
a8416dcf 2774 if ((sc->ciss_cam_devq = cam_simq_alloc(sc->ciss_max_requests - 2)) == NULL) {
984263bc
MD
2775 ciss_printf(sc, "can't allocate CAM SIM queue\n");
2776 return(ENOMEM);
2777 }
2778
2779 /*
2780 * Create a SIM.
9cf9a798
SW
2781 *
2782 * This naturally wastes a bit of memory. The alternative is to allocate
2783 * and register each bus as it is found, and then track them on a linked
2784 * list. Unfortunately, the driver has a few places where it needs to
2785 * look up the SIM based solely on bus number, and it's unclear whether
2786 * a list traversal would work for these situations.
2787 */
2788 maxbus = max(sc->ciss_max_logical_bus, sc->ciss_max_physical_bus +
2789 CISS_PHYSICAL_BASE);
2790 sc->ciss_cam_sim = kmalloc(maxbus * sizeof(struct cam_sim*),
2791 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
2792
2793 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
2794 if ((sc->ciss_cam_sim[i] = cam_sim_alloc(ciss_cam_action, ciss_cam_poll,
2795 "ciss", sc,
2796 device_get_unit(sc->ciss_dev),
a8416dcf
SW
2797 &sc->ciss_lock,
2798 2,
9cf9a798
SW
2799 sc->ciss_max_requests - 2,
2800 sc->ciss_cam_devq)) == NULL) {
2801 ciss_printf(sc, "can't allocate CAM SIM for controller %d\n", i);
2802 return(ENOMEM);
2803 }
2804
2805 /*
2806 * Register bus with this SIM.
2807 */
a8416dcf 2808 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
9cf9a798
SW
2809 if (i == 0 || sc->ciss_controllers[i].physical.bus != 0) {
2810 if (xpt_bus_register(sc->ciss_cam_sim[i], i) != 0) {
2811 ciss_printf(sc, "can't register SCSI bus %d\n", i);
a8416dcf 2812 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798
SW
2813 return (ENXIO);
2814 }
2815 }
a8416dcf 2816 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2817 }
2818
9cf9a798
SW
2819 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
2820 CISS_PHYSICAL_BASE; i++) {
2821 if ((sc->ciss_cam_sim[i] = cam_sim_alloc(ciss_cam_action, ciss_cam_poll,
2822 "ciss", sc,
2823 device_get_unit(sc->ciss_dev),
a8416dcf 2824 &sc->ciss_lock, 1,
9cf9a798
SW
2825 sc->ciss_max_requests - 2,
2826 sc->ciss_cam_devq)) == NULL) {
2827 ciss_printf(sc, "can't allocate CAM SIM for controller %d\n", i);
2828 return (ENOMEM);
2829 }
2830
a8416dcf 2831 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
9cf9a798
SW
2832 if (xpt_bus_register(sc->ciss_cam_sim[i], i) != 0) {
2833 ciss_printf(sc, "can't register SCSI bus %d\n", i);
a8416dcf 2834 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798
SW
2835 return (ENXIO);
2836 }
a8416dcf 2837 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2838 }
2839
2840 /*
2841 * Initiate a rescan of the bus.
2842 */
2843 ciss_cam_rescan_all(sc);
9cf9a798 2844
984263bc
MD
2845 return(0);
2846}
2847
2848/************************************************************************
2849 * Initiate a rescan of the 'logical devices' SIM
9cf9a798 2850 */
984263bc 2851static void
9cf9a798 2852ciss_cam_rescan_target(struct ciss_softc *sc, int bus, int target)
984263bc 2853{
9cf9a798 2854 union ccb *ccb;
984263bc
MD
2855
2856 debug_called(1);
2857
978400d3 2858 ccb = kmalloc(sizeof(union ccb), M_TEMP, M_WAITOK | M_ZERO);
9cf9a798 2859
a8416dcf
SW
2860 if (xpt_create_path(&ccb->ccb_h.path, xpt_periph,
2861 cam_sim_path(sc->ciss_cam_sim[bus]),
2862 target, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
984263bc 2863 ciss_printf(sc, "rescan failed (can't create path)\n");
9cf9a798 2864 kfree(ccb, M_TEMP);
984263bc
MD
2865 return;
2866 }
9cf9a798 2867
a8416dcf 2868 xpt_setup_ccb(&ccb->ccb_h, ccb->ccb_h.path, 5/*priority (low)*/);
984263bc
MD
2869 ccb->ccb_h.func_code = XPT_SCAN_BUS;
2870 ccb->ccb_h.cbfcnp = ciss_cam_rescan_callback;
2871 ccb->crcn.flags = CAM_FLAG_NONE;
2872 xpt_action(ccb);
9cf9a798 2873
984263bc
MD
2874 /* scan is now in progress */
2875}
2876
2877static void
2878ciss_cam_rescan_all(struct ciss_softc *sc)
2879{
9cf9a798
SW
2880 int i;
2881
2882 /* Rescan the logical buses */
2883 for (i = 0; i < sc->ciss_max_logical_bus; i++)
2884 ciss_cam_rescan_target(sc, i, CAM_TARGET_WILDCARD);
2885 /* Rescan the physical buses */
2886 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
2887 CISS_PHYSICAL_BASE; i++)
2888 ciss_cam_rescan_target(sc, i, CAM_TARGET_WILDCARD);
984263bc
MD
2889}
2890
2891static void
2892ciss_cam_rescan_callback(struct cam_periph *periph, union ccb *ccb)
2893{
2894 xpt_free_path(ccb->ccb_h.path);
efda3bd0 2895 kfree(ccb, M_TEMP);
984263bc
MD
2896}
2897
2898/************************************************************************
2899 * Handle requests coming from CAM
2900 */
2901static void
2902ciss_cam_action(struct cam_sim *sim, union ccb *ccb)
2903{
2904 struct ciss_softc *sc;
2905 struct ccb_scsiio *csio;
9cf9a798
SW
2906 int bus, target;
2907 int physical;
984263bc
MD
2908
2909 sc = cam_sim_softc(sim);
9cf9a798 2910 bus = cam_sim_bus(sim);
984263bc
MD
2911 csio = (struct ccb_scsiio *)&ccb->csio;
2912 target = csio->ccb_h.target_id;
9cf9a798 2913 physical = CISS_IS_PHYSICAL(bus);
984263bc
MD
2914
2915 switch (ccb->ccb_h.func_code) {
2916
2917 /* perform SCSI I/O */
2918 case XPT_SCSI_IO:
2919 if (!ciss_cam_action_io(sim, csio))
2920 return;
2921 break;
2922
2923 /* perform geometry calculations */
2924 case XPT_CALC_GEOMETRY:
2925 {
2926 struct ccb_calc_geometry *ccg = &ccb->ccg;
9cf9a798 2927 struct ciss_ldrive *ld;
984263bc
MD
2928
2929 debug(1, "XPT_CALC_GEOMETRY %d:%d:%d", cam_sim_bus(sim), ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
2930
9cf9a798
SW
2931 ld = NULL;
2932 if (!physical)
2933 ld = &sc->ciss_logical[bus][target];
2934
984263bc
MD
2935 /*
2936 * Use the cached geometry settings unless the fault tolerance
2937 * is invalid.
2938 */
9cf9a798 2939 if (physical || ld->cl_geometry.fault_tolerance == 0xFF) {
984263bc
MD
2940 u_int32_t secs_per_cylinder;
2941
2942 ccg->heads = 255;
2943 ccg->secs_per_track = 32;
2944 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
2945 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
2946 } else {
2947 ccg->heads = ld->cl_geometry.heads;
2948 ccg->secs_per_track = ld->cl_geometry.sectors;
2949 ccg->cylinders = ntohs(ld->cl_geometry.cylinders);
2950 }
2951 ccb->ccb_h.status = CAM_REQ_CMP;
2952 break;
2953 }
2954
2955 /* handle path attribute inquiry */
2956 case XPT_PATH_INQ:
2957 {
2958 struct ccb_pathinq *cpi = &ccb->cpi;
2959
2960 debug(1, "XPT_PATH_INQ %d:%d:%d", cam_sim_bus(sim), ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
2961
2962 cpi->version_num = 1;
2963 cpi->hba_inquiry = PI_TAG_ABLE; /* XXX is this correct? */
2964 cpi->target_sprt = 0;
2965 cpi->hba_misc = 0;
2966 cpi->max_target = CISS_MAX_LOGICAL;
2967 cpi->max_lun = 0; /* 'logical drive' channel only */
2968 cpi->initiator_id = CISS_MAX_LOGICAL;
2969 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2970 strncpy(cpi->hba_vid, "msmith@freebsd.org", HBA_IDLEN);
2971 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
2972 cpi->unit_number = cam_sim_unit(sim);
2973 cpi->bus_id = cam_sim_bus(sim);
2974 cpi->base_transfer_speed = 132 * 1024; /* XXX what to set this to? */
f19fcfb0
PA
2975 cpi->transport = XPORT_SPI;
2976 cpi->transport_version = 2;
2977 cpi->protocol = PROTO_SCSI;
2978 cpi->protocol_version = SCSI_REV_2;
a8416dcf
SW
2979#if 0 /* XXX swildner */
2980 cpi->maxio = (CISS_MAX_SG_ELEMENTS - 1) * PAGE_SIZE;
2981#endif
984263bc
MD
2982 ccb->ccb_h.status = CAM_REQ_CMP;
2983 break;
2984 }
2985
2986 case XPT_GET_TRAN_SETTINGS:
2987 {
2988 struct ccb_trans_settings *cts = &ccb->cts;
2989 int bus, target;
a8416dcf
SW
2990 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
2991 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
984263bc
MD
2992
2993 bus = cam_sim_bus(sim);
2994 target = cts->ccb_h.target_id;
2995
2996 debug(1, "XPT_GET_TRAN_SETTINGS %d:%d", bus, target);
984263bc 2997 /* disconnect always OK */
f19fcfb0
PA
2998 cts->protocol = PROTO_SCSI;
2999 cts->protocol_version = SCSI_REV_2;
3000 cts->transport = XPORT_SPI;
3001 cts->transport_version = 2;
3002
3003 spi->valid = CTS_SPI_VALID_DISC;
3004 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
984263bc 3005
a8416dcf
SW
3006 scsi->valid = CTS_SCSI_VALID_TQ;
3007 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
3008
984263bc
MD
3009 cts->ccb_h.status = CAM_REQ_CMP;
3010 break;
3011 }
3012
3013 default: /* we can't do this */
a8416dcf 3014 debug(1, "unspported func_code = 0x%x", ccb->ccb_h.func_code);
984263bc
MD
3015 ccb->ccb_h.status = CAM_REQ_INVALID;
3016 break;
3017 }
3018
3019 xpt_done(ccb);
3020}
3021
3022/************************************************************************
3023 * Handle a CAM SCSI I/O request.
3024 */
3025static int
3026ciss_cam_action_io(struct cam_sim *sim, struct ccb_scsiio *csio)
3027{
3028 struct ciss_softc *sc;
3029 int bus, target;
3030 struct ciss_request *cr;
3031 struct ciss_command *cc;
3032 int error;
3033
3034 sc = cam_sim_softc(sim);
3035 bus = cam_sim_bus(sim);
3036 target = csio->ccb_h.target_id;
3037
3038 debug(2, "XPT_SCSI_IO %d:%d:%d", bus, target, csio->ccb_h.target_lun);
3039
984263bc
MD
3040 /* check that the CDB pointer is not to a physical address */
3041 if ((csio->ccb_h.flags & CAM_CDB_POINTER) && (csio->ccb_h.flags & CAM_CDB_PHYS)) {
3042 debug(3, " CDB pointer is to physical address");
3043 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3044 }
3045
3046 /* if there is data transfer, it must be to/from a virtual address */
3047 if ((csio->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
3048 if (csio->ccb_h.flags & CAM_DATA_PHYS) { /* we can't map it */
3049 debug(3, " data pointer is to physical address");
3050 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3051 }
3052 if (csio->ccb_h.flags & CAM_SCATTER_VALID) { /* we want to do the s/g setup */
3053 debug(3, " data has premature s/g setup");
3054 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3055 }
3056 }
3057
3058 /* abandon aborted ccbs or those that have failed validation */
3059 if ((csio->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3060 debug(3, "abandoning CCB due to abort/validation failure");
3061 return(EINVAL);
3062 }
3063
3064 /* handle emulation of some SCSI commands ourself */
3065 if (ciss_cam_emulate(sc, csio))
3066 return(0);
3067
3068 /*
3069 * Get a request to manage this command. If we can't, return the
3070 * ccb, freeze the queue and flag so that we unfreeze it when a
3071 * request completes.
3072 */
3073 if ((error = ciss_get_request(sc, &cr)) != 0) {
9cf9a798 3074 xpt_freeze_simq(sim, 1);
a8416dcf 3075 sc->ciss_flags |= CISS_FLAG_BUSY;
984263bc
MD
3076 csio->ccb_h.status |= CAM_REQUEUE_REQ;
3077 return(error);
3078 }
3079
3080 /*
3081 * Build the command.
3082 */
a8416dcf 3083 cc = cr->cr_cc;
984263bc
MD
3084 cr->cr_data = csio->data_ptr;
3085 cr->cr_length = csio->dxfer_len;
3086 cr->cr_complete = ciss_cam_complete;
3087 cr->cr_private = csio;
9cf9a798
SW
3088
3089 /*
3090 * Target the right logical volume.
3091 */
3092 if (CISS_IS_PHYSICAL(bus))
3093 cc->header.address =
3094 sc->ciss_physical[CISS_CAM_TO_PBUS(bus)][target].cp_address;
3095 else
3096 cc->header.address =
3097 sc->ciss_logical[bus][target].cl_address;
984263bc
MD
3098 cc->cdb.cdb_length = csio->cdb_len;
3099 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3100 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE; /* XXX ordered tags? */
3101 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
3102 cr->cr_flags = CISS_REQ_DATAOUT;
3103 cc->cdb.direction = CISS_CDB_DIRECTION_WRITE;
3104 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
3105 cr->cr_flags = CISS_REQ_DATAIN;
3106 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3107 } else {
3108 cr->cr_flags = 0;
3109 cc->cdb.direction = CISS_CDB_DIRECTION_NONE;
3110 }
3111 cc->cdb.timeout = (csio->ccb_h.timeout / 1000) + 1;
3112 if (csio->ccb_h.flags & CAM_CDB_POINTER) {
3113 bcopy(csio->cdb_io.cdb_ptr, &cc->cdb.cdb[0], csio->cdb_len);
3114 } else {
3115 bcopy(csio->cdb_io.cdb_bytes, &cc->cdb.cdb[0], csio->cdb_len);
3116 }
3117
3118 /*
3119 * Submit the request to the adapter.
3120 *
3121 * Note that this may fail if we're unable to map the request (and
3122 * if we ever learn a transport layer other than simple, may fail
3123 * if the adapter rejects the command).
3124 */
3125 if ((error = ciss_start(cr)) != 0) {
9cf9a798 3126 xpt_freeze_simq(sim, 1);
a8416dcf 3127 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
9cf9a798 3128 if (error == EINPROGRESS) {
9cf9a798
SW
3129 error = 0;
3130 } else {
3131 csio->ccb_h.status |= CAM_REQUEUE_REQ;
3132 ciss_release_request(cr);
3133 }
984263bc
MD
3134 return(error);
3135 }
9cf9a798 3136
984263bc
MD
3137 return(0);
3138}
3139
3140/************************************************************************
3141 * Emulate SCSI commands the adapter doesn't handle as we might like.
3142 */
3143static int
3144ciss_cam_emulate(struct ciss_softc *sc, struct ccb_scsiio *csio)
3145{
9cf9a798 3146 int bus, target;
9cf9a798 3147
984263bc 3148 target = csio->ccb_h.target_id;
9cf9a798 3149 bus = cam_sim_bus(xpt_path_sim(csio->ccb_h.path));
984263bc 3150
9cf9a798
SW
3151 if (CISS_IS_PHYSICAL(bus)) {
3152 if (sc->ciss_physical[CISS_CAM_TO_PBUS(bus)][target].cp_online != 1) {
a8416dcf 3153 csio->ccb_h.status |= CAM_SEL_TIMEOUT;
9cf9a798
SW
3154 xpt_done((union ccb *)csio);
3155 return(1);
3156 } else
3157 return(0);
3158 }
3159
984263bc 3160 /*
9cf9a798
SW
3161 * Handle requests for volumes that don't exist or are not online.
3162 * A selection timeout is slightly better than an illegal request.
3163 * Other errors might be better.
984263bc 3164 */
9cf9a798 3165 if (sc->ciss_logical[bus][target].cl_status != CISS_LD_ONLINE) {
a8416dcf 3166 csio->ccb_h.status |= CAM_SEL_TIMEOUT;
984263bc
MD
3167 xpt_done((union ccb *)csio);
3168 return(1);
3169 }
3170
984263bc
MD
3171 /* if we have to fake Synchronise Cache */
3172 if (sc->ciss_flags & CISS_FLAG_FAKE_SYNCH) {
984263bc
MD
3173 /*
3174 * If this is a Synchronise Cache command, typically issued when
3175 * a device is closed, flush the adapter and complete now.
3176 */
9cf9a798 3177 if (((csio->ccb_h.flags & CAM_CDB_POINTER) ?
984263bc
MD
3178 *(u_int8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes[0]) == SYNCHRONIZE_CACHE) {
3179 ciss_flush_adapter(sc);
a8416dcf 3180 csio->ccb_h.status |= CAM_REQ_CMP;
984263bc
MD
3181 xpt_done((union ccb *)csio);
3182 return(1);
3183 }
3184 }
3185
3186 return(0);
3187}
3188
3189/************************************************************************
3190 * Check for possibly-completed commands.
3191 */
3192static void
3193ciss_cam_poll(struct cam_sim *sim)
3194{
a8416dcf 3195 cr_qhead_t qh;
984263bc
MD
3196 struct ciss_softc *sc = cam_sim_softc(sim);
3197
3198 debug_called(2);
3199
a8416dcf
SW
3200 STAILQ_INIT(&qh);
3201 if (sc->ciss_perf)
3202 ciss_perf_done(sc, &qh);
3203 else
3204 ciss_done(sc, &qh);
3205 ciss_complete(sc, &qh);
984263bc
MD
3206}
3207
3208/************************************************************************
3209 * Handle completion of a command - pass results back through the CCB
3210 */
3211static void
3212ciss_cam_complete(struct ciss_request *cr)
3213{
3214 struct ciss_softc *sc;
3215 struct ciss_command *cc;
3216 struct ciss_error_info *ce;
3217 struct ccb_scsiio *csio;
3218 int scsi_status;
3219 int command_status;
3220
3221 debug_called(2);
3222
3223 sc = cr->cr_sc;
a8416dcf 3224 cc = cr->cr_cc;
984263bc
MD
3225 ce = (struct ciss_error_info *)&(cc->sg[0]);
3226 csio = (struct ccb_scsiio *)cr->cr_private;
3227
3228 /*
3229 * Extract status values from request.
3230 */
3231 ciss_report_request(cr, &command_status, &scsi_status);
3232 csio->scsi_status = scsi_status;
9cf9a798 3233
984263bc
MD
3234 /*
3235 * Handle specific SCSI status values.
3236 */
3237 switch(scsi_status) {
3238 /* no status due to adapter error */
9cf9a798 3239 case -1:
984263bc 3240 debug(0, "adapter error");
a8416dcf 3241 csio->ccb_h.status |= CAM_REQ_CMP_ERR;
984263bc 3242 break;
9cf9a798 3243
984263bc
MD
3244 /* no status due to command completed OK */
3245 case SCSI_STATUS_OK: /* CISS_SCSI_STATUS_GOOD */
3246 debug(2, "SCSI_STATUS_OK");
a8416dcf 3247 csio->ccb_h.status |= CAM_REQ_CMP;
984263bc
MD
3248 break;
3249
3250 /* check condition, sense data included */
3251 case SCSI_STATUS_CHECK_COND: /* CISS_SCSI_STATUS_CHECK_CONDITION */
9cf9a798 3252 debug(0, "SCSI_STATUS_CHECK_COND sense size %d resid %d\n",
984263bc
MD
3253 ce->sense_length, ce->residual_count);
3254 bzero(&csio->sense_data, SSD_FULL_SIZE);
3255 bcopy(&ce->sense_info[0], &csio->sense_data, ce->sense_length);
a8416dcf
SW
3256 if (csio->sense_len > ce->sense_length)
3257 csio->sense_resid = csio->sense_len - ce->sense_length;
3258 else
3259 csio->sense_resid = 0;
9cf9a798 3260 csio->resid = ce->residual_count;
a8416dcf 3261 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID;
984263bc
MD
3262#ifdef CISS_DEBUG
3263 {
3264 struct scsi_sense_data *sns = (struct scsi_sense_data *)&ce->sense_info[0];
a8416dcf
SW
3265 debug(0, "sense key %x", scsi_get_sense_key(sns, csio->sense_len -
3266 csio->sense_resid, /*show_errors*/ 1));
984263bc 3267 }
9cf9a798 3268#endif
984263bc
MD
3269 break;
3270
3271 case SCSI_STATUS_BUSY: /* CISS_SCSI_STATUS_BUSY */
3272 debug(0, "SCSI_STATUS_BUSY");
a8416dcf 3273 csio->ccb_h.status |= CAM_SCSI_BUSY;
984263bc
MD
3274 break;
3275
3276 default:
3277 debug(0, "unknown status 0x%x", csio->scsi_status);
a8416dcf 3278 csio->ccb_h.status |= CAM_REQ_CMP_ERR;
984263bc
MD
3279 break;
3280 }
3281
3282 /* handle post-command fixup */
3283 ciss_cam_complete_fixup(sc, csio);
3284
984263bc 3285 ciss_release_request(cr);
a8416dcf
SW
3286 if (sc->ciss_flags & CISS_FLAG_BUSY) {
3287 sc->ciss_flags &= ~CISS_FLAG_BUSY;
3288 if (csio->ccb_h.status & CAM_RELEASE_SIMQ)
3289 xpt_release_simq(xpt_path_sim(csio->ccb_h.path), 0);
3290 else
3291 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
3292 }
3293 xpt_done((union ccb *)csio);
984263bc
MD
3294}
3295
3296/********************************************************************************
3297 * Fix up the result of some commands here.
3298 */
3299static void
3300ciss_cam_complete_fixup(struct ciss_softc *sc, struct ccb_scsiio *csio)
3301{
3302 struct scsi_inquiry_data *inq;
3303 struct ciss_ldrive *cl;
a8416dcf 3304 uint8_t *cdb;
9cf9a798 3305 int bus, target;
984263bc 3306
a8416dcf
SW
3307 cdb = (csio->ccb_h.flags & CAM_CDB_POINTER) ?
3308 (uint8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes;
3309 if (cdb[0] == INQUIRY &&
3310 (cdb[1] & SI_EVPD) == 0 &&
3311 (csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN &&
3312 csio->dxfer_len >= SHORT_INQUIRY_LENGTH) {
984263bc
MD
3313
3314 inq = (struct scsi_inquiry_data *)csio->data_ptr;
3315 target = csio->ccb_h.target_id;
9cf9a798
SW
3316 bus = cam_sim_bus(xpt_path_sim(csio->ccb_h.path));
3317
3318 /*
3319 * Don't let hard drives be seen by the DA driver. They will still be
3320 * attached by the PASS driver.
3321 */
3322 if (CISS_IS_PHYSICAL(bus)) {
3323 if (SID_TYPE(inq) == T_DIRECT)
3324 inq->device = (inq->device & 0xe0) | T_NODEVICE;
3325 return;
3326 }
3327
3328 cl = &sc->ciss_logical[bus][target];
3329
984263bc
MD
3330 padstr(inq->vendor, "COMPAQ", 8);
3331 padstr(inq->product, ciss_name_ldrive_org(cl->cl_ldrive->fault_tolerance), 8);
3332 padstr(inq->revision, ciss_name_ldrive_status(cl->cl_lstatus->status), 16);
3333 }
3334}
3335
3336
3337/********************************************************************************
3338 * Find a peripheral attached at (target)
3339 */
3340static struct cam_periph *
9cf9a798 3341ciss_find_periph(struct ciss_softc *sc, int bus, int target)
984263bc
MD
3342{
3343 struct cam_periph *periph;
3344 struct cam_path *path;
3345 int status;
3346
9cf9a798
SW
3347 status = xpt_create_path(&path, NULL, cam_sim_path(sc->ciss_cam_sim[bus]),
3348 target, 0);
984263bc
MD
3349 if (status == CAM_REQ_CMP) {
3350 periph = cam_periph_find(path, NULL);
3351 xpt_free_path(path);
3352 } else {
3353 periph = NULL;
3354 }
3355 return(periph);
3356}
3357
3358/********************************************************************************
3359 * Name the device at (target)
3360 *
3361 * XXX is this strictly correct?
3362 */
9cf9a798
SW
3363static int
3364ciss_name_device(struct ciss_softc *sc, int bus, int target)
984263bc
MD
3365{
3366 struct cam_periph *periph;
3367
9cf9a798
SW
3368 if (CISS_IS_PHYSICAL(bus))
3369 return (0);
3370 if ((periph = ciss_find_periph(sc, bus, target)) != NULL) {
3371 ksprintf(sc->ciss_logical[bus][target].cl_name, "%s%d",
a8416dcf 3372 periph->periph_name, periph->unit_number);
984263bc
MD
3373 return(0);
3374 }
9cf9a798 3375 sc->ciss_logical[bus][target].cl_name[0] = 0;
984263bc
MD
3376 return(ENOENT);
3377}
3378
3379/************************************************************************
3380 * Periodic status monitoring.
3381 */
3382static void
3383ciss_periodic(void *arg)
3384{
a8416dcf
SW
3385 struct ciss_softc *sc = (struct ciss_softc *)arg;
3386 struct ciss_request *cr = NULL;
3387 struct ciss_command *cc = NULL;
3388 int error = 0;
984263bc 3389
a8416dcf 3390 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc 3391 debug_called(1);
9cf9a798 3392
984263bc
MD
3393 /*
3394 * Check the adapter heartbeat.
3395 */
3396 if (sc->ciss_cfg->heartbeat == sc->ciss_heartbeat) {
3397 sc->ciss_heart_attack++;
9cf9a798 3398 debug(0, "adapter heart attack in progress 0x%x/%d",
984263bc
MD
3399 sc->ciss_heartbeat, sc->ciss_heart_attack);
3400 if (sc->ciss_heart_attack == 3) {
3401 ciss_printf(sc, "ADAPTER HEARTBEAT FAILED\n");
a8416dcf
SW
3402 ciss_disable_adapter(sc);
3403 lockmgr(&sc->ciss_lock, LK_RELEASE);
3404 return;
984263bc
MD
3405 }
3406 } else {
3407 sc->ciss_heartbeat = sc->ciss_cfg->heartbeat;
3408 sc->ciss_heart_attack = 0;
3409 debug(3, "new heartbeat 0x%x", sc->ciss_heartbeat);
3410 }
9cf9a798 3411
a8416dcf
SW
3412 /*
3413 * Send the NOP message and wait for a response.
3414 */
3415 if (ciss_nop_message_heartbeat != 0 && (error = ciss_get_request(sc, &cr)) == 0) {
3416 cc = cr->cr_cc;
3417 cr->cr_complete = ciss_nop_complete;
3418 cc->cdb.cdb_length = 1;
3419 cc->cdb.type = CISS_CDB_TYPE_MESSAGE;
3420 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3421 cc->cdb.direction = CISS_CDB_DIRECTION_WRITE;
3422 cc->cdb.timeout = 0;
3423 cc->cdb.cdb[0] = CISS_OPCODE_MESSAGE_NOP;
3424
3425 if ((error = ciss_start(cr)) != 0) {
3426 ciss_printf(sc, "SENDING NOP MESSAGE FAILED\n");
3427 }
3428 }
3429
984263bc
MD
3430 /*
3431 * If the notify event request has died for some reason, or has
3432 * not started yet, restart it.
3433 */
3434 if (!(sc->ciss_flags & CISS_FLAG_NOTIFY_OK)) {
3435 debug(0, "(re)starting Event Notify chain");
3436 ciss_notify_event(sc);
3437 }
a8416dcf 3438 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
3439
3440 /*
3441 * Reschedule.
3442 */
a8416dcf
SW
3443 callout_reset(&sc->ciss_periodic, CISS_HEARTBEAT_RATE * hz, ciss_periodic, sc);
3444}
3445
3446static void
3447ciss_nop_complete(struct ciss_request *cr)
3448{
3449 struct ciss_softc *sc;
3450 static int first_time = 1;
3451
3452 sc = cr->cr_sc;
3453 if (ciss_report_request(cr, NULL, NULL) != 0) {
3454 if (first_time == 1) {
3455 first_time = 0;
3456 ciss_printf(sc, "SENDING NOP MESSAGE FAILED (not logging anymore)\n");
3457 }
3458 }
3459
3460 ciss_release_request(cr);
3461}
3462
3463/************************************************************************
3464 * Disable the adapter.
3465 *
3466 * The all requests in completed queue is failed with hardware error.
3467 * This will cause failover in a multipath configuration.
3468 */
3469static void
3470ciss_disable_adapter(struct ciss_softc *sc)
3471{
3472 cr_qhead_t qh;
3473 struct ciss_request *cr;
3474 struct ciss_command *cc;
3475 struct ciss_error_info *ce;
3476 int i;
3477
3478 CISS_TL_SIMPLE_DISABLE_INTERRUPTS(sc);
3479 pci_disable_busmaster(sc->ciss_dev);
3480 sc->ciss_flags &= ~CISS_FLAG_RUNNING;
3481
3482 for (i = 1; i < sc->ciss_max_requests; i++) {
3483 cr = &sc->ciss_request[i];
3484 if ((cr->cr_flags & CISS_REQ_BUSY) == 0)
3485 continue;
3486
3487 cc = cr->cr_cc;
3488 ce = (struct ciss_error_info *)&(cc->sg[0]);
3489 ce->command_status = CISS_CMD_STATUS_HARDWARE_ERROR;
3490 ciss_enqueue_complete(cr, &qh);
3491 }
3492
3493 for (;;) {
3494 if ((cr = ciss_dequeue_complete(sc, &qh)) == NULL)
3495 break;
3496
3497 /*
3498 * If the request has a callback, invoke it.
3499 */
3500 if (cr->cr_complete != NULL) {
3501 cr->cr_complete(cr);
3502 continue;
3503 }
3504
3505 /*
3506 * If someone is sleeping on this request, wake them up.
3507 */
3508 if (cr->cr_flags & CISS_REQ_SLEEP) {
3509 cr->cr_flags &= ~CISS_REQ_SLEEP;
3510 wakeup(cr);
3511 continue;
3512 }
3513 }
984263bc
MD
3514}
3515
3516/************************************************************************
3517 * Request a notification response from the adapter.
3518 *
3519 * If (cr) is NULL, this is the first request of the adapter, so
3520 * reset the adapter's message pointer and start with the oldest
3521 * message available.
3522 */
3523static void
3524ciss_notify_event(struct ciss_softc *sc)
3525{
3526 struct ciss_request *cr;
3527 struct ciss_command *cc;
3528 struct ciss_notify_cdb *cnc;
3529 int error;
3530
3531 debug_called(1);
3532
3533 cr = sc->ciss_periodic_notify;
9cf9a798 3534
984263bc
MD
3535 /* get a request if we don't already have one */
3536 if (cr == NULL) {
3537 if ((error = ciss_get_request(sc, &cr)) != 0) {
3538 debug(0, "can't get notify event request");
3539 goto out;
3540 }
3541 sc->ciss_periodic_notify = cr;
3542 cr->cr_complete = ciss_notify_complete;
3543 debug(1, "acquired request %d", cr->cr_tag);
3544 }
9cf9a798
SW
3545
3546 /*
984263bc
MD
3547 * Get a databuffer if we don't already have one, note that the
3548 * adapter command wants a larger buffer than the actual
3549 * structure.
3550 */
3551 if (cr->cr_data == NULL) {
efda3bd0 3552 cr->cr_data = kmalloc(CISS_NOTIFY_DATA_SIZE, CISS_MALLOC_CLASS, M_INTWAIT);
984263bc
MD
3553 cr->cr_length = CISS_NOTIFY_DATA_SIZE;
3554 }
3555
3556 /* re-setup the request's command (since we never release it) XXX overkill*/
3557 ciss_preen_command(cr);
3558
3559 /* (re)build the notify event command */
a8416dcf 3560 cc = cr->cr_cc;
984263bc
MD
3561 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
3562 cc->header.address.physical.bus = 0;
3563 cc->header.address.physical.target = 0;
3564
3565 cc->cdb.cdb_length = sizeof(*cnc);
3566 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3567 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3568 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3569 cc->cdb.timeout = 0; /* no timeout, we hope */
9cf9a798 3570
984263bc
MD
3571 cnc = (struct ciss_notify_cdb *)&(cc->cdb.cdb[0]);
3572 bzero(cr->cr_data, CISS_NOTIFY_DATA_SIZE);
3573 cnc->opcode = CISS_OPCODE_READ;
3574 cnc->command = CISS_COMMAND_NOTIFY_ON_EVENT;
3575 cnc->timeout = 0; /* no timeout, we hope */
3576 cnc->synchronous = 0;
3577 cnc->ordered = 0;
3578 cnc->seek_to_oldest = 0;
9cf9a798
SW
3579 if ((sc->ciss_flags & CISS_FLAG_RUNNING) == 0)
3580 cnc->new_only = 1;
3581 else
3582 cnc->new_only = 0;
984263bc
MD
3583 cnc->length = htonl(CISS_NOTIFY_DATA_SIZE);
3584
3585 /* submit the request */
3586 error = ciss_start(cr);
3587
3588 out:
3589 if (error) {
3590 if (cr != NULL) {
3591 if (cr->cr_data != NULL)
efda3bd0 3592 kfree(cr->cr_data, CISS_MALLOC_CLASS);
984263bc
MD
3593 ciss_release_request(cr);
3594 }
3595 sc->ciss_periodic_notify = NULL;
3596 debug(0, "can't submit notify event request");
3597 sc->ciss_flags &= ~CISS_FLAG_NOTIFY_OK;
3598 } else {
3599 debug(1, "notify event submitted");
3600 sc->ciss_flags |= CISS_FLAG_NOTIFY_OK;
3601 }
3602}
3603
3604static void
3605ciss_notify_complete(struct ciss_request *cr)
3606{
984263bc
MD
3607 struct ciss_notify *cn;
3608 struct ciss_softc *sc;
3609 int scsi_status;
3610 int command_status;
984263bc 3611 debug_called(1);
9cf9a798 3612
984263bc
MD
3613 cn = (struct ciss_notify *)cr->cr_data;
3614 sc = cr->cr_sc;
9cf9a798 3615
984263bc
MD
3616 /*
3617 * Report request results, decode status.
3618 */
3619 ciss_report_request(cr, &command_status, &scsi_status);