Properly assert the state of the MP lock in the async syscall message
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
c2751817 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.85 2005/12/12 08:15:03 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
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57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
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69#include <sys/mbuf.h>
70#include <sys/msgbuf.h>
71#include <sys/sysent.h>
72#include <sys/sysctl.h>
73#include <sys/vmmeter.h>
74#include <sys/bus.h>
a722be49 75#include <sys/upcall.h>
cb7f4ab1 76#include <sys/usched.h>
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77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
984263bc 105#include <machine/smp.h>
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106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
1f2de5d4 112#include <bus/isa/i386/isa_device.h>
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113#endif
114#include <i386/isa/intr_machdep.h>
1f2de5d4 115#include <bus/isa/rtc.h>
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116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
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121#define PHYSMAP_ENTRIES 10
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
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143int _udatasel, _ucodesel;
144u_int atdevbase;
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145#ifdef SMP
146int64_t tsc_offsets[MAXCPU];
147#else
148int64_t tsc_offsets[1];
149#endif
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150
151#if defined(SWTCH_OPTIM_STATS)
152extern int swtch_optim_stats;
153SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
157#endif
158
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159int physmem = 0;
160int cold = 1;
161
162static int
163sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
164{
165 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
166 return (error);
167}
168
169SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
170 0, 0, sysctl_hw_physmem, "IU", "");
171
172static int
173sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
174{
175 int error = sysctl_handle_int(oidp, 0,
12e4aaff 176 ctob(physmem - vmstats.v_wire_count), req);
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177 return (error);
178}
179
180SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
181 0, 0, sysctl_hw_usermem, "IU", "");
182
183static int
184sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
185{
186 int error = sysctl_handle_int(oidp, 0,
187 i386_btop(avail_end - avail_start), req);
188 return (error);
189}
190
191SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
192 0, 0, sysctl_hw_availpages, "I", "");
193
194static int
195sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
196{
197 int error;
198
199 /* Unwind the buffer, so that it's linear (possibly starting with
200 * some initial nulls).
201 */
202 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
203 msgbufp->msg_size-msgbufp->msg_bufr,req);
204 if(error) return(error);
205 if(msgbufp->msg_bufr>0) {
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
207 msgbufp->msg_bufr,req);
208 }
209 return(error);
210}
211
212SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
213 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
214
215static int msgbuf_clear;
216
217static int
218sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
219{
220 int error;
221 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
222 req);
223 if (!error && req->newptr) {
224 /* Clear the buffer and reset write pointer */
225 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
226 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
227 msgbuf_clear=0;
228 }
229 return (error);
230}
231
232SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
233 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
234 "Clear kernel message buffer");
235
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236int bootverbose = 0;
237vm_paddr_t Maxmem = 0;
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238long dumplo;
239
ff1a75a1 240vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
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241
242static vm_offset_t buffer_sva, buffer_eva;
243vm_offset_t clean_sva, clean_eva;
244static vm_offset_t pager_sva, pager_eva;
245static struct trapframe proc0_tf;
246
247static void
248cpu_startup(dummy)
249 void *dummy;
250{
c9faf524 251 caddr_t v;
cb840899 252 vm_offset_t minaddr;
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253 vm_offset_t maxaddr;
254 vm_size_t size = 0;
255 int firstaddr;
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256
257 if (boothowto & RB_VERBOSE)
258 bootverbose++;
259
260 /*
261 * Good {morning,afternoon,evening,night}.
262 */
263 printf("%s", version);
264 startrtclock();
265 printcpuinfo();
266 panicifcpuunsupported();
267#ifdef PERFMON
268 perfmon_init();
269#endif
6ef943a3 270 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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271 /*
272 * Display any holes after the first chunk of extended memory.
273 */
274 if (bootverbose) {
275 int indx;
276
277 printf("Physical memory chunk(s):\n");
278 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 279 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 280
6ef943a3 281 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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282 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
283 size1 / PAGE_SIZE);
284 }
285 }
286
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287 /*
288 * Allocate space for system data structures.
289 * The first available kernel virtual address is in "v".
290 * As pages of kernel virtual memory are allocated, "v" is incremented.
291 * As pages of memory are allocated and cleared,
292 * "firstaddr" is incremented.
293 * An index into the kernel page table corresponding to the
294 * virtual memory address maintained in "v" is kept in "mapaddr".
295 */
296
297 /*
298 * Make two passes. The first pass calculates how much memory is
299 * needed and allocates it. The second pass assigns virtual
300 * addresses to the various data structures.
301 */
302 firstaddr = 0;
303again:
304 v = (caddr_t)firstaddr;
305
306#define valloc(name, type, num) \
307 (name) = (type *)v; v = (caddr_t)((name)+(num))
308#define valloclim(name, type, num, lim) \
309 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
310
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311 /*
312 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
313 * For the first 64MB of ram nominally allocate sufficient buffers to
314 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
315 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
316 * the buffer cache we limit the eventual kva reservation to
317 * maxbcache bytes.
318 *
319 * factor represents the 1/4 x ram conversion.
320 */
321 if (nbuf == 0) {
322 int factor = 4 * BKVASIZE / 1024;
323 int kbytes = physmem * (PAGE_SIZE / 1024);
324
325 nbuf = 50;
326 if (kbytes > 4096)
327 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
328 if (kbytes > 65536)
329 nbuf += (kbytes - 65536) * 2 / (factor * 5);
330 if (maxbcache && nbuf > maxbcache / BKVASIZE)
331 nbuf = maxbcache / BKVASIZE;
332 }
333
334 /*
335 * Do not allow the buffer_map to be more then 1/2 the size of the
336 * kernel_map.
337 */
338 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
339 (BKVASIZE * 2)) {
340 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
341 (BKVASIZE * 2);
342 printf("Warning: nbufs capped at %d\n", nbuf);
343 }
344
345 nswbuf = max(min(nbuf/4, 256), 16);
346#ifdef NSWBUF_MIN
347 if (nswbuf < NSWBUF_MIN)
348 nswbuf = NSWBUF_MIN;
349#endif
350#ifdef DIRECTIO
351 ffs_rawread_setup();
352#endif
353
354 valloc(swbuf, struct buf, nswbuf);
355 valloc(buf, struct buf, nbuf);
356 v = bufhashinit(v);
357
358 /*
359 * End of first pass, size has been calculated so allocate memory
360 */
361 if (firstaddr == 0) {
362 size = (vm_size_t)(v - firstaddr);
363 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
364 if (firstaddr == 0)
365 panic("startup: no room for tables");
366 goto again;
367 }
368
369 /*
370 * End of second pass, addresses have been assigned
371 */
372 if ((vm_size_t)(v - firstaddr) != size)
373 panic("startup: table size inconsistency");
374
375 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
376 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
377 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
378 (nbuf*BKVASIZE));
379 buffer_map->system_map = 1;
380 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
381 (nswbuf*MAXPHYS) + pager_map_size);
382 pager_map->system_map = 1;
383 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
384 (16*(ARG_MAX+(PAGE_SIZE*3))));
385
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386#if defined(USERCONFIG)
387 userconfig();
388 cninit(); /* the preferred console may have changed */
389#endif
390
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391 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
392 ptoa(vmstats.v_free_count) / 1024);
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393
394 /*
395 * Set up buffers, so they can be used to read disk labels.
396 */
397 bufinit();
398 vm_pager_bufferinit();
399
400#ifdef SMP
401 /*
402 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
403 */
404 mp_start(); /* fire up the APs and APICs */
405 mp_announce();
406#endif /* SMP */
407 cpu_setregs();
408}
409
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410/*
411 * Send an interrupt to process.
412 *
413 * Stack is set up to allow sigcode stored
414 * at top to call routine, followed by kcall
415 * to sigreturn routine below. After sigreturn
416 * resets the signal mask, the stack, and the
417 * frame pointer, it returns to the user
418 * specified pc, psl.
419 */
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420void
421sendsig(catcher, sig, mask, code)
422 sig_t catcher;
423 int sig;
424 sigset_t *mask;
425 u_long code;
426{
065b709a
SS
427 struct lwp *lp = curthread->td_lwp;
428 struct proc *p = lp->lwp_proc;
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429 struct trapframe *regs;
430 struct sigacts *psp = p->p_sigacts;
431 struct sigframe sf, *sfp;
432 int oonstack;
433
065b709a
SS
434 regs = lp->lwp_md.md_regs;
435 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
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436
437 /* save user context */
438 bzero(&sf, sizeof(struct sigframe));
439 sf.sf_uc.uc_sigmask = *mask;
065b709a 440 sf.sf_uc.uc_stack = lp->lwp_sigstk;
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441 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
442 sf.sf_uc.uc_mcontext.mc_gs = rgs();
443 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
444
445 /* Allocate and validate space for the signal handler context. */
065b709a 446 /* XXX lwp flags */
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447 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
448 SIGISMEMBER(psp->ps_sigonstack, sig)) {
065b709a
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449 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
450 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
451 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
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452 }
453 else
454 sfp = (struct sigframe *)regs->tf_esp - 1;
455
456 /* Translate the signal is appropriate */
457 if (p->p_sysent->sv_sigtbl) {
458 if (sig <= p->p_sysent->sv_sigsize)
459 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
460 }
461
462 /* Build the argument list for the signal handler. */
463 sf.sf_signum = sig;
464 sf.sf_ucontext = (register_t)&sfp->sf_uc;
065b709a 465 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
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466 /* Signal handler installed with SA_SIGINFO. */
467 sf.sf_siginfo = (register_t)&sfp->sf_si;
468 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
469
470 /* fill siginfo structure */
471 sf.sf_si.si_signo = sig;
472 sf.sf_si.si_code = code;
473 sf.sf_si.si_addr = (void*)regs->tf_err;
474 }
475 else {
476 /* Old FreeBSD-style arguments. */
477 sf.sf_siginfo = code;
478 sf.sf_addr = regs->tf_err;
479 sf.sf_ahu.sf_handler = catcher;
480 }
481
482 /*
483 * If we're a vm86 process, we want to save the segment registers.
484 * We also change eflags to be our emulated eflags, not the actual
485 * eflags.
486 */
487 if (regs->tf_eflags & PSL_VM) {
488 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
065b709a 489 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
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490
491 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
492 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
493 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
494 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
495
496 if (vm86->vm86_has_vme == 0)
497 sf.sf_uc.uc_mcontext.mc_eflags =
498 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
499 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
500
501 /*
502 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
503 * syscalls made by the signal handler. This just avoids
504 * wasting time for our lazy fixup of such faults. PSL_NT
505 * does nothing in vm86 mode, but vm86 programs can set it
506 * almost legitimately in probes for old cpu types.
507 */
508 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
509 }
510
511 /*
512 * Copy the sigframe out to the user's stack.
513 */
514 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
515 /*
516 * Something is wrong with the stack pointer.
517 * ...Kill the process.
518 */
519 sigexit(p, SIGILL);
520 }
521
522 regs->tf_esp = (int)sfp;
523 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
524 regs->tf_eflags &= ~PSL_T;
525 regs->tf_cs = _ucodesel;
526 regs->tf_ds = _udatasel;
527 regs->tf_es = _udatasel;
528 regs->tf_fs = _udatasel;
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529 regs->tf_ss = _udatasel;
530}
531
532/*
65957d54 533 * sigreturn(ucontext_t *sigcntxp)
41c20dac 534 *
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535 * System call to cleanup state after a signal
536 * has been taken. Reset signal mask and
537 * stack state from context left by sendsig (above).
538 * Return to previous pc and psl as specified by
539 * context left by sendsig. Check carefully to
540 * make sure that the user has not modified the
541 * state to gain improper privileges.
542 */
543#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
544#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
545
984263bc 546int
41c20dac 547sigreturn(struct sigreturn_args *uap)
984263bc 548{
065b709a 549 struct lwp *lp = curthread->td_lwp;
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550 struct trapframe *regs;
551 ucontext_t *ucp;
552 int cs, eflags;
553
554 ucp = uap->sigcntxp;
555
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556 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
557 return (EFAULT);
558
065b709a 559 regs = lp->lwp_md.md_regs;
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560 eflags = ucp->uc_mcontext.mc_eflags;
561
562 if (eflags & PSL_VM) {
563 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
564 struct vm86_kernel *vm86;
565
566 /*
567 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
568 * set up the vm86 area, and we can't enter vm86 mode.
569 */
065b709a 570 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
984263bc 571 return (EINVAL);
065b709a 572 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
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573 if (vm86->vm86_inited == 0)
574 return (EINVAL);
575
576 /* go back to user mode if both flags are set */
577 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
065b709a 578 trapsignal(lp->lwp_proc, SIGBUS, 0);
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579
580 if (vm86->vm86_has_vme) {
581 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
582 (eflags & VME_USERCHANGE) | PSL_VM;
583 } else {
584 vm86->vm86_eflags = eflags; /* save VIF, VIP */
585 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
586 }
587 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
588 tf->tf_eflags = eflags;
589 tf->tf_vm86_ds = tf->tf_ds;
590 tf->tf_vm86_es = tf->tf_es;
591 tf->tf_vm86_fs = tf->tf_fs;
592 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
593 tf->tf_ds = _udatasel;
594 tf->tf_es = _udatasel;
595 tf->tf_fs = _udatasel;
596 } else {
597 /*
598 * Don't allow users to change privileged or reserved flags.
599 */
600 /*
601 * XXX do allow users to change the privileged flag PSL_RF.
602 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
603 * should sometimes set it there too. tf_eflags is kept in
604 * the signal context during signal handling and there is no
605 * other place to remember it, so the PSL_RF bit may be
606 * corrupted by the signal handler without us knowing.
607 * Corruption of the PSL_RF bit at worst causes one more or
608 * one less debugger trap, so allowing it is fairly harmless.
609 */
610 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
611 printf("sigreturn: eflags = 0x%x\n", eflags);
612 return(EINVAL);
613 }
614
615 /*
616 * Don't allow users to load a valid privileged %cs. Let the
617 * hardware check for invalid selectors, excess privilege in
618 * other selectors, invalid %eip's and invalid %esp's.
619 */
620 cs = ucp->uc_mcontext.mc_cs;
621 if (!CS_SECURE(cs)) {
622 printf("sigreturn: cs = 0x%x\n", cs);
065b709a 623 trapsignal(lp->lwp_proc, SIGBUS, T_PROTFLT);
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624 return(EINVAL);
625 }
626 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
627 }
628
629 if (ucp->uc_mcontext.mc_onstack & 1)
065b709a 630 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
984263bc 631 else
065b709a 632 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
984263bc 633
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634 lp->lwp_sigmask = ucp->uc_sigmask;
635 SIG_CANTMASK(lp->lwp_sigmask);
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636 return(EJUSTRETURN);
637}
638
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639/*
640 * Stack frame on entry to function. %eax will contain the function vector,
641 * %ecx will contain the function data. flags, ecx, and eax will have
642 * already been pushed on the stack.
643 */
644struct upc_frame {
645 register_t eax;
646 register_t ecx;
0a455ac5 647 register_t edx;
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648 register_t flags;
649 register_t oldip;
650};
651
652void
653sendupcall(struct vmupcall *vu, int morepending)
654{
065b709a 655 struct lwp *lp = curthread->td_lwp;
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656 struct trapframe *regs;
657 struct upcall upcall;
658 struct upc_frame upc_frame;
6e58b5df 659 int crit_count = 0;
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660
661 /*
662 * Get the upcall data structure
663 */
065b709a 664 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
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665 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
666 ) {
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667 vu->vu_pending = 0;
668 printf("bad upcall address\n");
669 return;
670 }
671
672 /*
673 * If the data structure is already marked pending or has a critical
674 * section count, mark the data structure as pending and return
675 * without doing an upcall. vu_pending is left set.
676 */
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677 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
678 if (upcall.upc_pending < vu->vu_pending) {
679 upcall.upc_pending = vu->vu_pending;
065b709a 680 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
6e58b5df 681 sizeof(upcall.upc_pending));
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682 }
683 return;
684 }
685
686 /*
687 * We can run this upcall now, clear vu_pending.
688 *
689 * Bump our critical section count and set or clear the
690 * user pending flag depending on whether more upcalls are
691 * pending. The user will be responsible for calling
692 * upc_dispatch(-1) to process remaining upcalls.
693 */
694 vu->vu_pending = 0;
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695 upcall.upc_pending = morepending;
696 crit_count += TDPRI_CRIT;
065b709a 697 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
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698 sizeof(upcall.upc_pending));
699 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
700 sizeof(int));
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701
702 /*
703 * Construct a stack frame and issue the upcall
704 */
065b709a 705 regs = lp->lwp_md.md_regs;
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706 upc_frame.eax = regs->tf_eax;
707 upc_frame.ecx = regs->tf_ecx;
0a455ac5 708 upc_frame.edx = regs->tf_edx;
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709 upc_frame.flags = regs->tf_eflags;
710 upc_frame.oldip = regs->tf_eip;
711 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
712 sizeof(upc_frame)) != 0) {
713 printf("bad stack on upcall\n");
714 } else {
715 regs->tf_eax = (register_t)vu->vu_func;
716 regs->tf_ecx = (register_t)vu->vu_data;
065b709a 717 regs->tf_edx = (register_t)lp->lwp_upcall;
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718 regs->tf_eip = (register_t)vu->vu_ctx;
719 regs->tf_esp -= sizeof(upc_frame);
720 }
721}
722
723/*
724 * fetchupcall occurs in the context of a system call, which means that
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725 * we have to return EJUSTRETURN in order to prevent eax and edx from
726 * being overwritten by the syscall return value.
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727 *
728 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
729 * and the function pointer in %eax.
730 */
731int
0a455ac5 732fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
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733{
734 struct upc_frame upc_frame;
065b709a 735 struct lwp *lp = curthread->td_lwp;
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736 struct trapframe *regs;
737 int error;
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738 struct upcall upcall;
739 int crit_count;
a722be49 740
065b709a 741 regs = lp->lwp_md.md_regs;
a722be49 742
065b709a 743 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
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744 if (error == 0) {
745 if (vu) {
746 /*
747 * This jumps us to the next ready context.
748 */
749 vu->vu_pending = 0;
065b709a 750 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
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751 crit_count = 0;
752 if (error == 0)
753 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
754 crit_count += TDPRI_CRIT;
a722be49 755 if (error == 0)
6e58b5df 756 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
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757 regs->tf_eax = (register_t)vu->vu_func;
758 regs->tf_ecx = (register_t)vu->vu_data;
065b709a 759 regs->tf_edx = (register_t)lp->lwp_upcall;
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760 regs->tf_eip = (register_t)vu->vu_ctx;
761 regs->tf_esp = (register_t)rsp;
762 } else {
763 /*
764 * This returns us to the originally interrupted code.
765 */
766 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
767 regs->tf_eax = upc_frame.eax;
768 regs->tf_ecx = upc_frame.ecx;
0a455ac5 769 regs->tf_edx = upc_frame.edx;
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770 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
771 (upc_frame.flags & PSL_USERCHANGE);
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772 regs->tf_eip = upc_frame.oldip;
773 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
774 }
775 }
776 if (error == 0)
777 error = EJUSTRETURN;
778 return(error);
779}
780
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781/*
782 * Machine dependent boot() routine
783 *
784 * I haven't seen anything to put here yet
785 * Possibly some stuff might be grafted back here from boot()
786 */
787void
788cpu_boot(int howto)
789{
790}
791
792/*
793 * Shutdown the CPU as much as possible
794 */
795void
796cpu_halt(void)
797{
798 for (;;)
799 __asm__ ("hlt");
800}
801
802/*
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803 * cpu_idle() represents the idle LWKT. You cannot return from this function
804 * (unless you want to blow things up!). Instead we look for runnable threads
805 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 806 *
26a0694b 807 * The main loop is entered with a critical section held, we must release
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808 * the critical section before doing anything else. lwkt_switch() will
809 * check for pending interrupts due to entering and exiting its own
810 * critical section.
26a0694b 811 *
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812 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
813 * to wake a HLTed cpu up. However, there are cases where the idlethread
814 * will be entered with the possibility that no IPI will occur and in such
815 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 816 */
96728c05 817static int cpu_idle_hlt = 1;
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818static int cpu_idle_hltcnt;
819static int cpu_idle_spincnt;
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820SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
821 &cpu_idle_hlt, 0, "Idle loop HLT enable");
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822SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
823 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
824SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
825 &cpu_idle_spincnt, 0, "Idle loop entry spins");
984263bc 826
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827static void
828cpu_idle_default_hook(void)
829{
830 /*
831 * We must guarentee that hlt is exactly the instruction
832 * following the sti.
833 */
834 __asm __volatile("sti; hlt");
835}
836
837/* Other subsystems (e.g., ACPI) can hook this later. */
838void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
839
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840void
841cpu_idle(void)
842{
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843 struct thread *td = curthread;
844
26a0694b 845 crit_exit();
a2a5ad0d 846 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 847 for (;;) {
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848 /*
849 * See if there are any LWKTs ready to go.
850 */
8ad65e08 851 lwkt_switch();
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852
853 /*
854 * If we are going to halt call splz unconditionally after
855 * CLIing to catch any interrupt races. Note that we are
856 * at SPL0 and interrupts are enabled.
857 */
858 if (cpu_idle_hlt && !lwkt_runnable() &&
859 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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860 __asm __volatile("cli");
861 splz();
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862 if (!lwkt_runnable())
863 cpu_idle_hook();
864#ifdef SMP
865 else
866 __asm __volatile("pause");
867#endif
60f945af 868 ++cpu_idle_hltcnt;
8ad65e08 869 } else {
a2a5ad0d 870 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 871 splz();
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872#ifdef SMP
873 __asm __volatile("sti; pause");
874#else
8ad65e08 875 __asm __volatile("sti");
8b6d0f3f 876#endif
60f945af 877 ++cpu_idle_spincnt;
8ad65e08 878 }
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879 }
880}
881
882/*
883 * Clear registers on exec
884 */
885void
886setregs(p, entry, stack, ps_strings)
887 struct proc *p;
888 u_long entry;
889 u_long stack;
890 u_long ps_strings;
891{
892 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 893 struct pcb *pcb = p->p_thread->td_pcb;
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894
895 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
896 pcb->pcb_gs = _udatasel;
897 load_gs(_udatasel);
898
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899 /* was i386_user_cleanup() in NetBSD */
900 user_ldt_free(pcb);
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901
902 bzero((char *)regs, sizeof(struct trapframe));
903 regs->tf_eip = entry;
904 regs->tf_esp = stack;
905 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
906 regs->tf_ss = _udatasel;
907 regs->tf_ds = _udatasel;
908 regs->tf_es = _udatasel;
909 regs->tf_fs = _udatasel;
910 regs->tf_cs = _ucodesel;
911
912 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
913 regs->tf_ebx = ps_strings;
914
915 /*
916 * Reset the hardware debug registers if they were in use.
917 * They won't have any meaning for the newly exec'd process.
918 */
919 if (pcb->pcb_flags & PCB_DBREGS) {
920 pcb->pcb_dr0 = 0;
921 pcb->pcb_dr1 = 0;
922 pcb->pcb_dr2 = 0;
923 pcb->pcb_dr3 = 0;
924 pcb->pcb_dr6 = 0;
925 pcb->pcb_dr7 = 0;
b7c628e4 926 if (pcb == curthread->td_pcb) {
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927 /*
928 * Clear the debug registers on the running
929 * CPU, otherwise they will end up affecting
930 * the next process we switch to.
931 */
932 reset_dbregs();
933 }
934 pcb->pcb_flags &= ~PCB_DBREGS;
935 }
936
937 /*
938 * Initialize the math emulator (if any) for the current process.
939 * Actually, just clear the bit that says that the emulator has
940 * been initialized. Initialization is delayed until the process
941 * traps to the emulator (if it is done at all) mainly because
942 * emulators don't provide an entry point for initialization.
943 */
b7c628e4 944 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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945
946 /*
a02705a9
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947 * note: do not set CR0_TS here. npxinit() must do it after clearing
948 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
949 * in npxdna().
984263bc 950 */
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951 crit_enter();
952 load_cr0(rcr0() | CR0_MP);
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953
954#if NNPX > 0
955 /* Initialize the npx (if any) for the current process. */
956 npxinit(__INITIAL_NPXCW__);
957#endif
a02705a9 958 crit_exit();
984263bc 959
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960 /*
961 * note: linux emulator needs edx to be 0x0 on entry, which is
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962 * handled in execve simply by setting the 64 bit syscall
963 * return value to 0.
90b9818c 964 */
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965}
966
967void
968cpu_setregs(void)
969{
970 unsigned int cr0;
971
972 cr0 = rcr0();
973 cr0 |= CR0_NE; /* Done by npxinit() */
974 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
975#ifdef I386_CPU
976 if (cpu_class != CPUCLASS_386)
977#endif
978 cr0 |= CR0_WP | CR0_AM;
979 load_cr0(cr0);
980 load_gs(_udatasel);
981}
982
983static int
984sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
985{
986 int error;
987 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
988 req);
989 if (!error && req->newptr)
990 resettodr();
991 return (error);
992}
993
994SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
995 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
996
997SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
998 CTLFLAG_RW, &disable_rtc_set, 0, "");
999
1000SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1001 CTLFLAG_RD, &bootinfo, bootinfo, "");
1002
1003SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1004 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1005
1006extern u_long bootdev; /* not a dev_t - encoding is different */
1007SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1008 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1009
1010/*
1011 * Initialize 386 and configure to run kernel
1012 */
1013
1014/*
1015 * Initialize segments & interrupt table
1016 */
1017
1018int _default_ldt;
1019union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1020static struct gate_descriptor idt0[NIDT];
1021struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1022union descriptor ldt[NLDT]; /* local descriptor table */
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MD
1023
1024/* table descriptors - used to load tables by cpu */
984263bc 1025struct region_descriptor r_gdt, r_idt;
984263bc 1026
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MD
1027#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1028extern int has_f00f_bug;
1029#endif
1030
1031static struct i386tss dblfault_tss;
1032static char dblfault_stack[PAGE_SIZE];
1033
1034extern struct user *proc0paddr;
1035
1036
1037/* software prototypes -- in more palatable form */
1038struct soft_segment_descriptor gdt_segs[] = {
1039/* GNULL_SEL 0 Null Descriptor */
1040{ 0x0, /* segment base address */
1041 0x0, /* length */
1042 0, /* segment type */
1043 0, /* segment descriptor priority level */
1044 0, /* segment descriptor present */
1045 0, 0,
1046 0, /* default 32 vs 16 bit size */
1047 0 /* limit granularity (byte/page units)*/ },
1048/* GCODE_SEL 1 Code Descriptor for kernel */
1049{ 0x0, /* segment base address */
1050 0xfffff, /* length - all address space */
1051 SDT_MEMERA, /* segment type */
1052 0, /* segment descriptor priority level */
1053 1, /* segment descriptor present */
1054 0, 0,
1055 1, /* default 32 vs 16 bit size */
1056 1 /* limit granularity (byte/page units)*/ },
1057/* GDATA_SEL 2 Data Descriptor for kernel */
1058{ 0x0, /* segment base address */
1059 0xfffff, /* length - all address space */
1060 SDT_MEMRWA, /* segment type */
1061 0, /* segment descriptor priority level */
1062 1, /* segment descriptor present */
1063 0, 0,
1064 1, /* default 32 vs 16 bit size */
1065 1 /* limit granularity (byte/page units)*/ },
1066/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1067{ 0x0, /* segment base address */
1068 0xfffff, /* length - all address space */
1069 SDT_MEMRWA, /* segment type */
1070 0, /* segment descriptor priority level */
1071 1, /* segment descriptor present */
1072 0, 0,
1073 1, /* default 32 vs 16 bit size */
1074 1 /* limit granularity (byte/page units)*/ },
1075/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1076{
1077 0x0, /* segment base address */
1078 sizeof(struct i386tss)-1,/* length - all address space */
1079 SDT_SYS386TSS, /* segment type */
1080 0, /* segment descriptor priority level */
1081 1, /* segment descriptor present */
1082 0, 0,
1083 0, /* unused - default 32 vs 16 bit size */
1084 0 /* limit granularity (byte/page units)*/ },
1085/* GLDT_SEL 5 LDT Descriptor */
1086{ (int) ldt, /* segment base address */
1087 sizeof(ldt)-1, /* length - all address space */
1088 SDT_SYSLDT, /* segment type */
1089 SEL_UPL, /* segment descriptor priority level */
1090 1, /* segment descriptor present */
1091 0, 0,
1092 0, /* unused - default 32 vs 16 bit size */
1093 0 /* limit granularity (byte/page units)*/ },
1094/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1095{ (int) ldt, /* segment base address */
1096 (512 * sizeof(union descriptor)-1), /* length */
1097 SDT_SYSLDT, /* segment type */
1098 0, /* segment descriptor priority level */
1099 1, /* segment descriptor present */
1100 0, 0,
1101 0, /* unused - default 32 vs 16 bit size */
1102 0 /* limit granularity (byte/page units)*/ },
1103/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1104{ 0x0, /* segment base address */
1105 0x0, /* length - all address space */
1106 0, /* segment type */
1107 0, /* segment descriptor priority level */
1108 0, /* segment descriptor present */
1109 0, 0,
1110 0, /* default 32 vs 16 bit size */
1111 0 /* limit granularity (byte/page units)*/ },
1112/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1113{ 0x400, /* segment base address */
1114 0xfffff, /* length */
1115 SDT_MEMRWA, /* segment type */
1116 0, /* segment descriptor priority level */
1117 1, /* segment descriptor present */
1118 0, 0,
1119 1, /* default 32 vs 16 bit size */
1120 1 /* limit granularity (byte/page units)*/ },
1121/* GPANIC_SEL 9 Panic Tss Descriptor */
1122{ (int) &dblfault_tss, /* segment base address */
1123 sizeof(struct i386tss)-1,/* length - all address space */
1124 SDT_SYS386TSS, /* segment type */
1125 0, /* segment descriptor priority level */
1126 1, /* segment descriptor present */
1127 0, 0,
1128 0, /* unused - default 32 vs 16 bit size */
1129 0 /* limit granularity (byte/page units)*/ },
1130/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1131{ 0, /* segment base address (overwritten) */
1132 0xfffff, /* length */
1133 SDT_MEMERA, /* segment type */
1134 0, /* segment descriptor priority level */
1135 1, /* segment descriptor present */
1136 0, 0,
1137 0, /* default 32 vs 16 bit size */
1138 1 /* limit granularity (byte/page units)*/ },
1139/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1140{ 0, /* segment base address (overwritten) */
1141 0xfffff, /* length */
1142 SDT_MEMERA, /* segment type */
1143 0, /* segment descriptor priority level */
1144 1, /* segment descriptor present */
1145 0, 0,
1146 0, /* default 32 vs 16 bit size */
1147 1 /* limit granularity (byte/page units)*/ },
1148/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1149{ 0, /* segment base address (overwritten) */
1150 0xfffff, /* length */
1151 SDT_MEMRWA, /* segment type */
1152 0, /* segment descriptor priority level */
1153 1, /* segment descriptor present */
1154 0, 0,
1155 1, /* default 32 vs 16 bit size */
1156 1 /* limit granularity (byte/page units)*/ },
1157/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1158{ 0, /* segment base address (overwritten) */
1159 0xfffff, /* length */
1160 SDT_MEMRWA, /* segment type */
1161 0, /* segment descriptor priority level */
1162 1, /* segment descriptor present */
1163 0, 0,
1164 0, /* default 32 vs 16 bit size */
1165 1 /* limit granularity (byte/page units)*/ },
1166/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1167{ 0, /* segment base address (overwritten) */
1168 0xfffff, /* length */
1169 SDT_MEMRWA, /* segment type */
1170 0, /* segment descriptor priority level */
1171 1, /* segment descriptor present */
1172 0, 0,
1173 0, /* default 32 vs 16 bit size */
1174 1 /* limit granularity (byte/page units)*/ },
806bf111
MD
1175/* GTLS_START 15 TLS */
1176{ 0x0, /* segment base address */
1177 0x0, /* length */
1178 0, /* segment type */
1179 0, /* segment descriptor priority level */
1180 0, /* segment descriptor present */
1181 0, 0,
1182 0, /* default 32 vs 16 bit size */
1183 0 /* limit granularity (byte/page units)*/ },
1184/* GTLS_START+1 16 TLS */
1185{ 0x0, /* segment base address */
1186 0x0, /* length */
1187 0, /* segment type */
1188 0, /* segment descriptor priority level */
1189 0, /* segment descriptor present */
1190 0, 0,
1191 0, /* default 32 vs 16 bit size */
1192 0 /* limit granularity (byte/page units)*/ },
1193/* GTLS_END 17 TLS */
1194{ 0x0, /* segment base address */
1195 0x0, /* length */
1196 0, /* segment type */
1197 0, /* segment descriptor priority level */
1198 0, /* segment descriptor present */
1199 0, 0,
1200 0, /* default 32 vs 16 bit size */
1201 0 /* limit granularity (byte/page units)*/ },
984263bc
MD
1202};
1203
1204static struct soft_segment_descriptor ldt_segs[] = {
1205 /* Null Descriptor - overwritten by call gate */
1206{ 0x0, /* segment base address */
1207 0x0, /* length - all address space */
1208 0, /* segment type */
1209 0, /* segment descriptor priority level */
1210 0, /* segment descriptor present */
1211 0, 0,
1212 0, /* default 32 vs 16 bit size */
1213 0 /* limit granularity (byte/page units)*/ },
1214 /* Null Descriptor - overwritten by call gate */
1215{ 0x0, /* segment base address */
1216 0x0, /* length - all address space */
1217 0, /* segment type */
1218 0, /* segment descriptor priority level */
1219 0, /* segment descriptor present */
1220 0, 0,
1221 0, /* default 32 vs 16 bit size */
1222 0 /* limit granularity (byte/page units)*/ },
1223 /* Null Descriptor - overwritten by call gate */
1224{ 0x0, /* segment base address */
1225 0x0, /* length - all address space */
1226 0, /* segment type */
1227 0, /* segment descriptor priority level */
1228 0, /* segment descriptor present */
1229 0, 0,
1230 0, /* default 32 vs 16 bit size */
1231 0 /* limit granularity (byte/page units)*/ },
1232 /* Code Descriptor for user */
1233{ 0x0, /* segment base address */
1234 0xfffff, /* length - all address space */
1235 SDT_MEMERA, /* segment type */
1236 SEL_UPL, /* segment descriptor priority level */
1237 1, /* segment descriptor present */
1238 0, 0,
1239 1, /* default 32 vs 16 bit size */
1240 1 /* limit granularity (byte/page units)*/ },
1241 /* Null Descriptor - overwritten by call gate */
1242{ 0x0, /* segment base address */
1243 0x0, /* length - all address space */
1244 0, /* segment type */
1245 0, /* segment descriptor priority level */
1246 0, /* segment descriptor present */
1247 0, 0,
1248 0, /* default 32 vs 16 bit size */
1249 0 /* limit granularity (byte/page units)*/ },
1250 /* Data Descriptor for user */
1251{ 0x0, /* segment base address */
1252 0xfffff, /* length - all address space */
1253 SDT_MEMRWA, /* segment type */
1254 SEL_UPL, /* segment descriptor priority level */
1255 1, /* segment descriptor present */
1256 0, 0,
1257 1, /* default 32 vs 16 bit size */
1258 1 /* limit granularity (byte/page units)*/ },
1259};
1260
1261void
1262setidt(idx, func, typ, dpl, selec)
1263 int idx;
1264 inthand_t *func;
1265 int typ;
1266 int dpl;
1267 int selec;
1268{
1269 struct gate_descriptor *ip;
1270
1271 ip = idt + idx;
1272 ip->gd_looffset = (int)func;
1273 ip->gd_selector = selec;
1274 ip->gd_stkcpy = 0;
1275 ip->gd_xx = 0;
1276 ip->gd_type = typ;
1277 ip->gd_dpl = dpl;
1278 ip->gd_p = 1;
1279 ip->gd_hioffset = ((int)func)>>16 ;
1280}
1281
1282#define IDTVEC(name) __CONCAT(X,name)
1283
1284extern inthand_t
1285 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1286 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1287 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1288 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1289 IDTVEC(xmm), IDTVEC(syscall),
1290 IDTVEC(rsvd0);
a64ba182 1291extern inthand_t
7062f5b4
EN
1292 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall),
1293 IDTVEC(int0x82_syscall);
984263bc 1294
f7bc9806
MD
1295#ifdef DEBUG_INTERRUPTS
1296extern inthand_t *Xrsvdary[256];
1297#endif
1298
984263bc
MD
1299void
1300sdtossd(sd, ssd)
1301 struct segment_descriptor *sd;
1302 struct soft_segment_descriptor *ssd;
1303{
1304 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1305 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1306 ssd->ssd_type = sd->sd_type;
1307 ssd->ssd_dpl = sd->sd_dpl;
1308 ssd->ssd_p = sd->sd_p;
1309 ssd->ssd_def32 = sd->sd_def32;
1310 ssd->ssd_gran = sd->sd_gran;
1311}
1312
984263bc
MD
1313/*
1314 * Populate the (physmap) array with base/bound pairs describing the
1315 * available physical memory in the system, then test this memory and
1316 * build the phys_avail array describing the actually-available memory.
1317 *
1318 * If we cannot accurately determine the physical memory map, then use
1319 * value from the 0xE801 call, and failing that, the RTC.
1320 *
1321 * Total memory size may be set by the kernel environment variable
1322 * hw.physmem or the compile-time define MAXMEM.
1323 */
1324static void
1325getmemsize(int first)
1326{
1327 int i, physmap_idx, pa_indx;
1328 int hasbrokenint12;
1329 u_int basemem, extmem;
1330 struct vm86frame vmf;
1331 struct vm86context vmc;
ff1a75a1
MD
1332 vm_offset_t pa;
1333 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
b5b32410 1334 pt_entry_t *pte;
984263bc
MD
1335 const char *cp;
1336 struct {
1337 u_int64_t base;
1338 u_int64_t length;
1339 u_int32_t type;
1340 } *smap;
28abdbbb 1341 quad_t dcons_addr, dcons_size;
984263bc
MD
1342
1343 hasbrokenint12 = 0;
1344 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1345 bzero(&vmf, sizeof(struct vm86frame));
1346 bzero(physmap, sizeof(physmap));
1347 basemem = 0;
1348
1349 /*
1350 * Some newer BIOSes has broken INT 12H implementation which cause
1351 * kernel panic immediately. In this case, we need to scan SMAP
1352 * with INT 15:E820 first, then determine base memory size.
1353 */
1354 if (hasbrokenint12) {
1355 goto int15e820;
1356 }
1357
1358 /*
7febcc6e
MD
1359 * Perform "base memory" related probes & setup. If we get a crazy
1360 * value give the bios some scribble space just in case.
984263bc
MD
1361 */
1362 vm86_intcall(0x12, &vmf);
1363 basemem = vmf.vmf_ax;
1364 if (basemem > 640) {
7febcc6e
MD
1365 printf("Preposterous BIOS basemem of %uK, "
1366 "truncating to < 640K\n", basemem);
1367 basemem = 636;
984263bc
MD
1368 }
1369
1370 /*
1371 * XXX if biosbasemem is now < 640, there is a `hole'
1372 * between the end of base memory and the start of
1373 * ISA memory. The hole may be empty or it may
1374 * contain BIOS code or data. Map it read/write so
1375 * that the BIOS can write to it. (Memory from 0 to
1376 * the physical end of the kernel is mapped read-only
1377 * to begin with and then parts of it are remapped.
1378 * The parts that aren't remapped form holes that
1379 * remain read-only and are unused by the kernel.
1380 * The base memory area is below the physical end of
1381 * the kernel and right now forms a read-only hole.
1382 * The part of it from PAGE_SIZE to
1383 * (trunc_page(biosbasemem * 1024) - 1) will be
1384 * remapped and used by the kernel later.)
1385 *
1386 * This code is similar to the code used in
1387 * pmap_mapdev, but since no memory needs to be
1388 * allocated we simply change the mapping.
1389 */
1390 for (pa = trunc_page(basemem * 1024);
1391 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1392 pte = vtopte(pa + KERNBASE);
984263bc
MD
1393 *pte = pa | PG_RW | PG_V;
1394 }
1395
1396 /*
1397 * if basemem != 640, map pages r/w into vm86 page table so
1398 * that the bios can scribble on it.
1399 */
b5b32410 1400 pte = vm86paddr;
984263bc
MD
1401 for (i = basemem / 4; i < 160; i++)
1402 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1403
1404int15e820:
1405 /*
1406 * map page 1 R/W into the kernel page table so we can use it
1407 * as a buffer. The kernel will unmap this page later.
1408 */
b5b32410 1409 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1410 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1411
1412 /*
1413 * get memory map with INT 15:E820
1414 */
1415#define SMAPSIZ sizeof(*smap)
1416#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1417
1418 vmc.npages = 0;
1419 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1420 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1421
1422 physmap_idx = 0;
1423 vmf.vmf_ebx = 0;
1424 do {
1425 vmf.vmf_eax = 0xE820;
1426 vmf.vmf_edx = SMAP_SIG;
1427 vmf.vmf_ecx = SMAPSIZ;
1428 i = vm86_datacall(0x15, &vmf, &vmc);
1429 if (i || vmf.vmf_eax != SMAP_SIG)
1430 break;
1431 if (boothowto & RB_VERBOSE)
1432 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1433 smap->type,
1434 *(u_int32_t *)((char *)&smap->base + 4),
1435 (u_int32_t)smap->base,
1436 *(u_int32_t *)((char *)&smap->length + 4),
1437 (u_int32_t)smap->length);
1438
1439 if (smap->type != 0x01)
1440 goto next_run;
1441
1442 if (smap->length == 0)
1443 goto next_run;
1444
1445 if (smap->base >= 0xffffffff) {
1446 printf("%uK of memory above 4GB ignored\n",
1447 (u_int)(smap->length / 1024));
1448 goto next_run;
1449 }
1450
1451 for (i = 0; i <= physmap_idx; i += 2) {
1452 if (smap->base < physmap[i + 1]) {
1453 if (boothowto & RB_VERBOSE)
1454 printf(
1455 "Overlapping or non-montonic memory region, ignoring second region\n");
1456 goto next_run;
1457 }
1458 }
1459
1460 if (smap->base == physmap[physmap_idx + 1]) {
1461 physmap[physmap_idx + 1] += smap->length;
1462 goto next_run;
1463 }
1464
1465 physmap_idx += 2;
ff1a75a1 1466 if (physmap_idx == PHYSMAP_ENTRIES*2) {
984263bc
MD
1467 printf(
1468 "Too many segments in the physical address map, giving up\n");
1469 break;
1470 }
1471 physmap[physmap_idx] = smap->base;
1472 physmap[physmap_idx + 1] = smap->base + smap->length;
1473next_run:
6b08710e 1474 ; /* fix GCC3.x warning */
984263bc
MD
1475 } while (vmf.vmf_ebx != 0);
1476
1477 /*
1478 * Perform "base memory" related probes & setup based on SMAP
1479 */
1480 if (basemem == 0) {
1481 for (i = 0; i <= physmap_idx; i += 2) {
1482 if (physmap[i] == 0x00000000) {
1483 basemem = physmap[i + 1] / 1024;
1484 break;
1485 }
1486 }
1487
1488 if (basemem == 0) {
1489 basemem = 640;
1490 }
1491
1492 if (basemem > 640) {
1493 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1494 basemem);
1495 basemem = 640;
1496 }
1497
1498 for (pa = trunc_page(basemem * 1024);
1499 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1500 pte = vtopte(pa + KERNBASE);
984263bc
MD
1501 *pte = pa | PG_RW | PG_V;
1502 }
1503
b5b32410 1504 pte = vm86paddr;
984263bc
MD
1505 for (i = basemem / 4; i < 160; i++)
1506 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1507 }
1508
1509 if (physmap[1] != 0)
1510 goto physmap_done;
1511
1512 /*
1513 * If we failed above, try memory map with INT 15:E801
1514 */
1515 vmf.vmf_ax = 0xE801;
1516 if (vm86_intcall(0x15, &vmf) == 0) {
1517 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1518 } else {
1519#if 0
1520 vmf.vmf_ah = 0x88;
1521 vm86_intcall(0x15, &vmf);
1522 extmem = vmf.vmf_ax;
1523#else
1524 /*
1525 * Prefer the RTC value for extended memory.
1526 */
1527 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1528#endif
1529 }
1530
1531 /*
1532 * Special hack for chipsets that still remap the 384k hole when
1533 * there's 16MB of memory - this really confuses people that
1534 * are trying to use bus mastering ISA controllers with the
1535 * "16MB limit"; they only have 16MB, but the remapping puts
1536 * them beyond the limit.
1537 *
1538 * If extended memory is between 15-16MB (16-17MB phys address range),
1539 * chop it to 15MB.
1540 */
1541 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1542 extmem = 15 * 1024;
1543
1544 physmap[0] = 0;
1545 physmap[1] = basemem * 1024;
1546 physmap_idx = 2;
1547 physmap[physmap_idx] = 0x100000;
1548 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1549
1550physmap_done:
1551 /*
1552 * Now, physmap contains a map of physical memory.
1553 */
1554
1555#ifdef SMP
17a9f566 1556 /* make hole for AP bootstrap code YYY */
984263bc
MD
1557 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1558
1559 /* look for the MP hardware - needed for apic addresses */
1560 mp_probe();
1561#endif
1562
1563 /*
1564 * Maxmem isn't the "maximum memory", it's one larger than the
1565 * highest page of the physical address space. It should be
1566 * called something like "Maxphyspage". We may adjust this
1567 * based on ``hw.physmem'' and the results of the memory test.
1568 */
1569 Maxmem = atop(physmap[physmap_idx + 1]);
1570
1571#ifdef MAXMEM
1572 Maxmem = MAXMEM / 4;
1573#endif
1574
1575 /*
eb7d35b8 1576 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1577 * for the appropriate modifiers. This overrides MAXMEM.
1578 */
1579 if ((cp = getenv("hw.physmem")) != NULL) {
1580 u_int64_t AllowMem, sanity;
1581 char *ep;
1582
1583 sanity = AllowMem = strtouq(cp, &ep, 0);
1584 if ((ep != cp) && (*ep != 0)) {
1585 switch(*ep) {
1586 case 'g':
1587 case 'G':
1588 AllowMem <<= 10;
1589 case 'm':
1590 case 'M':
1591 AllowMem <<= 10;
1592 case 'k':
1593 case 'K':
1594 AllowMem <<= 10;
1595 break;
1596 default:
1597 AllowMem = sanity = 0;
1598 }
1599 if (AllowMem < sanity)
1600 AllowMem = 0;
1601 }
1602 if (AllowMem == 0)
1603 printf("Ignoring invalid memory size of '%s'\n", cp);
1604 else
1605 Maxmem = atop(AllowMem);
1606 }
1607
1608 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1609 (boothowto & RB_VERBOSE))
6ef943a3 1610 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1611
1612 /*
1613 * If Maxmem has been increased beyond what the system has detected,
1614 * extend the last memory segment to the new limit.
1615 */
1616 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1617 physmap[physmap_idx + 1] = ptoa(Maxmem);
1618
1619 /* call pmap initialization to make new kernel address space */
1620 pmap_bootstrap(first, 0);
1621
1622 /*
1623 * Size up each available chunk of physical memory.
1624 */
1625 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1626 pa_indx = 0;
1627 phys_avail[pa_indx++] = physmap[0];
1628 phys_avail[pa_indx] = physmap[0];
b5b32410 1629 pte = CMAP1;
984263bc 1630
28abdbbb
HS
1631 /*
1632 * Get dcons buffer address
1633 */
1634 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1635 getenv_quad("dcons.size", &dcons_size) == 0)
1636 dcons_addr = 0;
1637
984263bc
MD
1638 /*
1639 * physmap is in bytes, so when converting to page boundaries,
1640 * round up the start address and round down the end address.
1641 */
1642 for (i = 0; i <= physmap_idx; i += 2) {
1643 vm_offset_t end;
1644
1645 end = ptoa(Maxmem);
1646 if (physmap[i + 1] < end)
1647 end = trunc_page(physmap[i + 1]);
1648 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1649 int tmp, page_bad;
1650#if 0
1651 int *ptr = 0;
1652#else
1653 int *ptr = (int *)CADDR1;
1654#endif
1655
1656 /*
1657 * block out kernel memory as not available.
1658 */
1659 if (pa >= 0x100000 && pa < first)
1660 continue;
1661
28abdbbb
HS
1662 /*
1663 * block out dcons buffer
1664 */
1665 if (dcons_addr > 0
1666 && pa >= trunc_page(dcons_addr)
1667 && pa < dcons_addr + dcons_size)
1668 continue;
1669
984263bc
MD
1670 page_bad = FALSE;
1671
1672 /*
1673 * map page into kernel: valid, read/write,non-cacheable
1674 */
1675 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1676 cpu_invltlb();
984263bc
MD
1677
1678 tmp = *(int *)ptr;
1679 /*
1680 * Test for alternating 1's and 0's
1681 */
1682 *(volatile int *)ptr = 0xaaaaaaaa;
1683 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1684 page_bad = TRUE;
1685 }
1686 /*
1687 * Test for alternating 0's and 1's
1688 */
1689 *(volatile int *)ptr = 0x55555555;
1690 if (*(volatile int *)ptr != 0x55555555) {
1691 page_bad = TRUE;
1692 }
1693 /*
1694 * Test for all 1's
1695 */
1696 *(volatile int *)ptr = 0xffffffff;
1697 if (*(volatile int *)ptr != 0xffffffff) {
1698 page_bad = TRUE;
1699 }
1700 /*
1701 * Test for all 0's
1702 */
1703 *(volatile int *)ptr = 0x0;
1704 if (*(volatile int *)ptr != 0x0) {
1705 page_bad = TRUE;
1706 }
1707 /*
1708 * Restore original value.
1709 */
1710 *(int *)ptr = tmp;
1711
1712 /*
1713 * Adjust array of valid/good pages.
1714 */
1715 if (page_bad == TRUE) {
1716 continue;
1717 }
1718 /*
1719 * If this good page is a continuation of the
1720 * previous set of good pages, then just increase
1721 * the end pointer. Otherwise start a new chunk.
1722 * Note that "end" points one higher than end,
1723 * making the range >= start and < end.
1724 * If we're also doing a speculative memory
1725 * test and we at or past the end, bump up Maxmem
1726 * so that we keep going. The first bad page
1727 * will terminate the loop.
1728 */
1729 if (phys_avail[pa_indx] == pa) {
1730 phys_avail[pa_indx] += PAGE_SIZE;
1731 } else {
1732 pa_indx++;
ff1a75a1 1733 if (pa_indx >= PHYSMAP_ENTRIES*2) {
984263bc
MD
1734 printf("Too many holes in the physical address space, giving up\n");
1735 pa_indx--;
1736 break;
1737 }
1738 phys_avail[pa_indx++] = pa; /* start */
1739 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1740 }
1741 physmem++;
1742 }
1743 }
1744 *pte = 0;
0f7a3396 1745 cpu_invltlb();
984263bc
MD
1746
1747 /*
1748 * XXX
1749 * The last chunk must contain at least one page plus the message
1750 * buffer to avoid complicating other code (message buffer address
1751 * calculation, etc.).
1752 */
1753 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1754 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1755 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1756 phys_avail[pa_indx--] = 0;
1757 phys_avail[pa_indx--] = 0;
1758 }
1759
1760 Maxmem = atop(phys_avail[pa_indx]);
1761
1762 /* Trim off space for the message buffer. */
1763 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1764
1765 avail_end = phys_avail[pa_indx];
1766}
1767
f7bc9806
MD
1768/*
1769 * IDT VECTORS:
1770 * 0 Divide by zero
1771 * 1 Debug
1772 * 2 NMI
1773 * 3 BreakPoint
1774 * 4 OverFlow
1775 * 5 Bound-Range
1776 * 6 Invalid OpCode
1777 * 7 Device Not Available (x87)
1778 * 8 Double-Fault
1779 * 9 Coprocessor Segment overrun (unsupported, reserved)
1780 * 10 Invalid-TSS
1781 * 11 Segment not present
1782 * 12 Stack
1783 * 13 General Protection
1784 * 14 Page Fault
1785 * 15 Reserved
1786 * 16 x87 FP Exception pending
1787 * 17 Alignment Check
1788 * 18 Machine Check
1789 * 19 SIMD floating point
1790 * 20-31 reserved
1791 * 32-255 INTn/external sources
1792 */
984263bc 1793void
17a9f566 1794init386(int first)
984263bc
MD
1795{
1796 struct gate_descriptor *gdp;
1797 int gsel_tss, metadata_missing, off, x;
85100692 1798 struct mdglobaldata *gd;
984263bc
MD
1799
1800 /*
1801 * Prevent lowering of the ipl if we call tsleep() early.
1802 */
85100692 1803 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1804 bzero(gd, sizeof(*gd));
984263bc 1805
85100692 1806 gd->mi.gd_curthread = &thread0;
984263bc
MD
1807
1808 atdevbase = ISA_HOLE_START + KERNBASE;
1809
1810 metadata_missing = 0;
1811 if (bootinfo.bi_modulep) {
1812 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1813 preload_bootstrap_relocate(KERNBASE);
1814 } else {
1815 metadata_missing = 1;
1816 }
1817 if (bootinfo.bi_envp)
1818 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1819
c5cc06e3
MD
1820 /*
1821 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1822 * at 0.
1823 */
4e8e646b 1824 ncpus = 1;
c5cc06e3 1825 ncpus2 = 1;
984263bc
MD
1826 /* Init basic tunables, hz etc */
1827 init_param1();
1828
1829 /*
1830 * make gdt memory segments, the code segment goes up to end of the
1831 * page with etext in it, the data segment goes to the end of
1832 * the address space
1833 */
1834 /*
1835 * XXX text protection is temporarily (?) disabled. The limit was
1836 * i386_btop(round_page(etext)) - 1.
1837 */
1838 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1839 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1840
984263bc
MD
1841 gdt_segs[GPRIV_SEL].ssd_limit =
1842 atop(sizeof(struct privatespace) - 1);
8ad65e08 1843 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1844 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1845 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1846
85100692 1847 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1848
84b592ba
MD
1849 /*
1850 * Note: on both UP and SMP curthread must be set non-NULL
1851 * early in the boot sequence because the system assumes
1852 * that 'curthread' is never NULL.
1853 */
984263bc
MD
1854
1855 for (x = 0; x < NGDT; x++) {
1856#ifdef BDE_DEBUGGER
1857 /* avoid overwriting db entries with APM ones */
1858 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1859 continue;
1860#endif
1861 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1862 }
1863
1864 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1865 r_gdt.rd_base = (int) gdt;
1866 lgdt(&r_gdt);
1867
73e4f7b9
MD
1868 mi_gdinit(&gd->mi, 0);
1869 cpu_gdinit(gd, 0);
f470d0c8 1870 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
73e4f7b9
MD
1871 lwkt_set_comm(&thread0, "thread0");
1872 proc0.p_addr = (void *)thread0.td_kstack;
065b709a
SS
1873 LIST_INIT(&proc0.p_lwps);
1874 LIST_INSERT_HEAD(&proc0.p_lwps, &proc0.p_lwp, lwp_list);
1875 proc0.p_lwp.lwp_thread = &thread0;
1876 proc0.p_lwp.lwp_proc = &proc0;
cb7f4ab1 1877 proc0.p_usched = usched_init();
98a7f915 1878 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1879 thread0.td_flags |= TDF_RUNNING;
73e4f7b9 1880 thread0.td_proc = &proc0;
ef09c3ed 1881 thread0.td_lwp = &proc0.p_lwp;
73e4f7b9 1882 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
e43a034f 1883 safepri = TDPRI_MAX;
73e4f7b9 1884
984263bc
MD
1885 /* make ldt memory segments */
1886 /*
1887 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1888 * should be spelled ...MAX_USER...
1889 */
1890 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1891 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1892 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1893 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1894
1895 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1896 lldt(_default_ldt);
17a9f566 1897 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1898 /* spinlocks and the BGL */
1899 init_locks();
984263bc
MD
1900
1901 /* exceptions */
f7bc9806
MD
1902 for (x = 0; x < NIDT; x++) {
1903#ifdef DEBUG_INTERRUPTS
1904 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1905#else
1906 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907#endif
1908 }
984263bc
MD
1909 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1913 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1916 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1917 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1918 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1919 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1920 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1923 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1924 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1925 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1926 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1927 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1928 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1929 setidt(0x80, &IDTVEC(int0x80_syscall),
1930 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1931 setidt(0x81, &IDTVEC(int0x81_syscall),
1932 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
7062f5b4
EN
1933 setidt(0x82, &IDTVEC(int0x82_syscall),
1934 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1935
1936 r_idt.rd_limit = sizeof(idt0) - 1;
1937 r_idt.rd_base = (int) idt;
1938 lidt(&r_idt);
1939
1940 /*
1941 * Initialize the console before we print anything out.
1942 */
1943 cninit();
1944
1945 if (metadata_missing)
1946 printf("WARNING: loader(8) metadata is missing!\n");
1947
984263bc
MD
1948#if NISA >0
1949 isa_defaultirq();
1950#endif
1951 rand_initialize();
1952
1953#ifdef DDB
1954 kdb_init();
1955 if (boothowto & RB_KDB)
1956 Debugger("Boot flags requested debugger");
1957#endif
1958
1959 finishidentcpu(); /* Final stage of CPU initialization */
1960 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 initializecpu(); /* Initialize CPU registers */
1963
b7c628e4
MD
1964 /*
1965 * make an initial tss so cpu can get interrupt stack on syscall!
1966 * The 16 bytes is to save room for a VM86 context.
1967 */
17a9f566
MD
1968 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1969 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1970 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1971 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1972 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1973 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1974 ltr(gsel_tss);
1975
1976 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1977 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1978 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1979 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1980 dblfault_tss.tss_cr3 = (int)IdlePTD;
1981 dblfault_tss.tss_eip = (int) dblfault_handler;
1982 dblfault_tss.tss_eflags = PSL_KERNEL;
1983 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1984 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1985 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1986 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1987 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1988
1989 vm86_initialize();
1990 getmemsize(first);
1991 init_param2(physmem);
1992
1993 /* now running on new page tables, configured,and u/iom is accessible */
1994
1995 /* Map the message buffer. */
1996 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1997 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1998
1999 msgbufinit(msgbufp, MSGBUF_SIZE);
2000
2001 /* make a call gate to reenter kernel with */
2002 gdp = &ldt[LSYS5CALLS_SEL].gd;
2003
2004 x = (int) &IDTVEC(syscall);
2005 gdp->gd_looffset = x++;
2006 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2007 gdp->gd_stkcpy = 1;
2008 gdp->gd_type = SDT_SYS386CGT;
2009 gdp->gd_dpl = SEL_UPL;
2010 gdp->gd_p = 1;
2011 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2012
2013 /* XXX does this work? */
2014 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2015 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2016
2017 /* transfer to user mode */
2018
2019 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2020 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2021
2022 /* setup proc 0's pcb */
b7c628e4
MD
2023 thread0.td_pcb->pcb_flags = 0;
2024 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2025 thread0.td_pcb->pcb_ext = 0;
065b709a 2026 proc0.p_lwp.lwp_md.md_regs = &proc0_tf;
984263bc
MD
2027}
2028
8ad65e08 2029/*
17a9f566
MD
2030 * Initialize machine-dependant portions of the global data structure.
2031 * Note that the global data area and cpu0's idlestack in the private
2032 * data space were allocated in locore.
ef0fdad1
MD
2033 *
2034 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2035 *
2036 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2037 */
2038void
85100692 2039cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08 2040{
7d0bac62 2041 if (cpu)
a2a5ad0d 2042 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2043
f470d0c8
MD
2044 lwkt_init_thread(&gd->mi.gd_idlethread,
2045 gd->mi.gd_prvspace->idlestack,
d3d32139
MD
2046 sizeof(gd->mi.gd_prvspace->idlestack),
2047 TDF_MPSAFE, &gd->mi);
a2a5ad0d
MD
2048 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2049 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2050 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2051 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2052}
2053
0cd275af
MD
2054int
2055is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2056{
2057 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2058 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2059 return (TRUE);
2060 }
2061 return (FALSE);
2062}
2063
12e4aaff
MD
2064struct globaldata *
2065globaldata_find(int cpu)
2066{
2067 KKASSERT(cpu >= 0 && cpu < ncpus);
2068 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2069}
2070
984263bc
MD
2071#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2072static void f00f_hack(void *unused);
2073SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2074
2075static void
17a9f566
MD
2076f00f_hack(void *unused)
2077{
984263bc 2078 struct gate_descriptor *new_idt;
984263bc
MD
2079 vm_offset_t tmp;
2080
2081 if (!has_f00f_bug)
2082 return;
2083
2084 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2085
2086 r_idt.rd_limit = sizeof(idt0) - 1;
2087
2088 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2089 if (tmp == 0)
2090 panic("kmem_alloc returned 0");
2091 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2092 panic("kmem_alloc returned non-page-aligned memory");
2093 /* Put the first seven entries in the lower page */
2094 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2095 bcopy(idt, new_idt, sizeof(idt0));
2096 r_idt.rd_base = (int)new_idt;
2097 lidt(&r_idt);
2098 idt = new_idt;
2099 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2100 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2101 panic("vm_map_protect failed");
2102 return;
2103}
2104#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2105
2106int
2107ptrace_set_pc(p, addr)
2108 struct proc *p;
2109 unsigned long addr;
2110{
2111 p->p_md.md_regs->tf_eip = addr;
2112 return (0);
2113}
2114
2115int
e9182c58 2116ptrace_single_step(struct lwp *lp)
984263bc 2117{
e9182c58 2118 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
984263bc
MD
2119 return (0);
2120}
2121
2122int ptrace_read_u_check(p, addr, len)
2123 struct proc *p;
2124 vm_offset_t addr;
2125 size_t len;
2126{
2127 vm_offset_t gap;
2128
2129 if ((vm_offset_t) (addr + len) < addr)
2130 return EPERM;
2131 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2132 return 0;
2133
2134 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2135
2136 if ((vm_offset_t) addr < gap)
2137 return EPERM;
2138 if ((vm_offset_t) (addr + len) <=
2139 (vm_offset_t) (gap + sizeof(struct trapframe)))
2140 return 0;
2141 return EPERM;
2142}
2143
2144int ptrace_write_u(p, off, data)
2145 struct proc *p;
2146 vm_offset_t off;
2147 long data;
2148{
2149 struct trapframe frame_copy;
2150 vm_offset_t min;
2151 struct trapframe *tp;
2152
2153 /*
2154 * Privileged kernel state is scattered all over the user area.
2155 * Only allow write access to parts of regs and to fpregs.
2156 */
2157 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2158 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2159 tp = p->p_md.md_regs;
2160 frame_copy = *tp;
2161 *(int *)((char *)&frame_copy + (off - min)) = data;
2162 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2163 !CS_SECURE(frame_copy.tf_cs))
2164 return (EINVAL);
2165 *(int*)((char *)p->p_addr + off) = data;
2166 return (0);
2167 }
b7c628e4
MD
2168
2169 /*
2170 * The PCB is at the end of the user area YYY
2171 */
2172 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2173 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2174 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2175 *(int*)((char *)p->p_addr + off) = data;
2176 return (0);
2177 }
2178 return (EFAULT);
2179}
2180
2181int
e9182c58 2182fill_regs(struct lwp *lp, struct reg *regs)
984263bc
MD
2183{
2184 struct pcb *pcb;
2185 struct trapframe *tp;
2186
e9182c58 2187 tp = lp->lwp_md.md_regs;
984263bc
MD
2188 regs->r_fs = tp->tf_fs;
2189 regs->r_es = tp->tf_es;
2190 regs->r_ds = tp->tf_ds;
2191 regs->r_edi = tp->tf_edi;
2192 regs->r_esi = tp->tf_esi;
2193 regs->r_ebp = tp->tf_ebp;
2194 regs->r_ebx = tp->tf_ebx;
2195 regs->r_edx = tp->tf_edx;
2196 regs->r_ecx = tp->tf_ecx;
2197 regs->r_eax = tp->tf_eax;
2198 regs->r_eip = tp->tf_eip;
2199 regs->r_cs = tp->tf_cs;
2200 regs->r_eflags = tp->tf_eflags;
2201 regs->r_esp = tp->tf_esp;
2202 regs->r_ss = tp->tf_ss;
e9182c58 2203 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2204 regs->r_gs = pcb->pcb_gs;
2205 return (0);
2206}
2207
2208int
e9182c58 2209set_regs(struct lwp *lp, struct reg *regs)
984263bc
MD
2210{
2211 struct pcb *pcb;
2212 struct trapframe *tp;
2213
e9182c58 2214 tp = lp->lwp_md.md_regs;
984263bc
MD
2215 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2216 !CS_SECURE(regs->r_cs))
2217 return (EINVAL);
2218 tp->tf_fs = regs->r_fs;
2219 tp->tf_es = regs->r_es;
2220 tp->tf_ds = regs->r_ds;
2221 tp->tf_edi = regs->r_edi;
2222 tp->tf_esi = regs->r_esi;
2223 tp->tf_ebp = regs->r_ebp;
2224 tp->tf_ebx = regs->r_ebx;
2225 tp->tf_edx = regs->r_edx;
2226 tp->tf_ecx = regs->r_ecx;
2227 tp->tf_eax = regs->r_eax;
2228 tp->tf_eip = regs->r_eip;
2229 tp->tf_cs = regs->r_cs;
2230 tp->tf_eflags = regs->r_eflags;
2231 tp->tf_esp = regs->r_esp;
2232 tp->tf_ss = regs->r_ss;
e9182c58 2233 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2234 pcb->pcb_gs = regs->r_gs;
2235 return (0);
2236}
2237
642a6e88 2238#ifndef CPU_DISABLE_SSE
984263bc
MD
2239static void
2240fill_fpregs_xmm(sv_xmm, sv_87)
2241 struct savexmm *sv_xmm;
2242 struct save87 *sv_87;
2243{
c9faf524
RG
2244 struct env87 *penv_87 = &sv_87->sv_env;
2245 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2246 int i;
2247
2248 /* FPU control/status */
2249 penv_87->en_cw = penv_xmm->en_cw;
2250 penv_87->en_sw = penv_xmm->en_sw;
2251 penv_87->en_tw = penv_xmm->en_tw;
2252 penv_87->en_fip = penv_xmm->en_fip;
2253 penv_87->en_fcs = penv_xmm->en_fcs;
2254 penv_87->en_opcode = penv_xmm->en_opcode;
2255 penv_87->en_foo = penv_xmm->en_foo;
2256 penv_87->en_fos = penv_xmm->en_fos;
2257
2258 /* FPU registers */
2259 for (i = 0; i < 8; ++i)
2260 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2261
2262 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2263}
2264
2265static void
2266set_fpregs_xmm(sv_87, sv_xmm)
2267 struct save87 *sv_87;
2268 struct savexmm *sv_xmm;
2269{
c9faf524
RG
2270 struct env87 *penv_87 = &sv_87->sv_env;
2271 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2272 int i;
2273
2274 /* FPU control/status */
2275 penv_xmm->en_cw = penv_87->en_cw;
2276 penv_xmm->en_sw = penv_87->en_sw;
2277 penv_xmm->en_tw = penv_87->en_tw;
2278 penv_xmm->en_fip = penv_87->en_fip;
2279 penv_xmm->en_fcs = penv_87->en_fcs;
2280 penv_xmm->en_opcode = penv_87->en_opcode;
2281 penv_xmm->en_foo = penv_87->en_foo;
2282 penv_xmm->en_fos = penv_87->en_fos;
2283
2284 /* FPU registers */
2285 for (i = 0; i < 8; ++i)
2286 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2287
2288 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2289}
642a6e88 2290#endif /* CPU_DISABLE_SSE */
984263bc
MD
2291
2292int
e9182c58 2293fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
984263bc 2294{
642a6e88 2295#ifndef CPU_DISABLE_SSE
984263bc 2296 if (cpu_fxsr) {
e9182c58
SZ
2297 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2298 (struct save87 *)fpregs);
984263bc
MD
2299 return (0);
2300 }
642a6e88 2301#endif /* CPU_DISABLE_SSE */
e9182c58 2302 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2303 return (0);
2304}
2305
2306int
e9182c58 2307set_fpregs(struct lwp *lp, struct fpreg *fpregs)
984263bc 2308{
642a6e88 2309#ifndef CPU_DISABLE_SSE
984263bc
MD
2310 if (cpu_fxsr) {
2311 set_fpregs_xmm((struct save87 *)fpregs,
e9182c58 2312 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2313 return (0);
2314 }
642a6e88 2315#endif /* CPU_DISABLE_SSE */
e9182c58 2316 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2317 return (0);
2318}
2319
2320int
e9182c58 2321fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
984263bc 2322{
e9182c58 2323 if (lp == NULL) {
984263bc
MD
2324 dbregs->dr0 = rdr0();
2325 dbregs->dr1 = rdr1();
2326 dbregs->dr2 = rdr2();
2327 dbregs->dr3 = rdr3();
2328 dbregs->dr4 = rdr4();
2329 dbregs->dr5 = rdr5();
2330 dbregs->dr6 = rdr6();
2331 dbregs->dr7 = rdr7();
e9182c58
SZ
2332 } else {
2333 struct pcb *pcb;
2334
2335 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2336 dbregs->dr0 = pcb->pcb_dr0;
2337 dbregs->dr1 = pcb->pcb_dr1;
2338 dbregs->dr2 = pcb->pcb_dr2;
2339 dbregs->dr3 = pcb->pcb_dr3;
2340 dbregs->dr4 = 0;
2341 dbregs->dr5 = 0;
2342 dbregs->dr6 = pcb->pcb_dr6;
2343 dbregs->dr7 = pcb->pcb_dr7;
2344 }
2345 return (0);
2346}
2347
2348int
e9182c58 2349set_dbregs(struct lwp *lp, struct dbreg *dbregs)
984263bc 2350{
e9182c58 2351 if (lp == NULL) {
984263bc
MD
2352 load_dr0(dbregs->dr0);
2353 load_dr1(dbregs->dr1);
2354 load_dr2(dbregs->dr2);
2355 load_dr3(dbregs->dr3);
2356 load_dr4(dbregs->dr4);
2357 load_dr5(dbregs->dr5);
2358 load_dr6(dbregs->dr6);
2359 load_dr7(dbregs->dr7);
e9182c58
SZ
2360 } else {
2361 struct pcb *pcb;
2362 struct ucred *ucred;
2363 int i;
2364 uint32_t mask1, mask2;
2365
984263bc
MD
2366 /*
2367 * Don't let an illegal value for dr7 get set. Specifically,
2368 * check for undefined settings. Setting these bit patterns
2369 * result in undefined behaviour and can lead to an unexpected
2370 * TRCTRAP.
2371 */
2372 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2373 i++, mask1 <<= 2, mask2 <<= 2)
2374 if ((dbregs->dr7 & mask1) == mask2)
2375 return (EINVAL);
2376
e9182c58
SZ
2377 pcb = lp->lwp_thread->td_pcb;
2378 ucred = lp->lwp_proc->p_ucred;
2379
984263bc
MD
2380 /*
2381 * Don't let a process set a breakpoint that is not within the
2382 * process's address space. If a process could do this, it
2383 * could halt the system by setting a breakpoint in the kernel
2384 * (if ddb was enabled). Thus, we need to check to make sure
2385 * that no breakpoints are being enabled for addresses outside
2386 * process's address space, unless, perhaps, we were called by
2387 * uid 0.
2388 *
2389 * XXX - what about when the watched area of the user's
2390 * address space is written into from within the kernel
2391 * ... wouldn't that still cause a breakpoint to be generated
2392 * from within kernel mode?
2393 */
e9182c58
SZ
2394
2395 if (suser_cred(ucred, 0) != 0) {
984263bc
MD
2396 if (dbregs->dr7 & 0x3) {
2397 /* dr0 is enabled */
2398 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2399 return (EINVAL);
2400 }
e9182c58 2401
984263bc
MD
2402 if (dbregs->dr7 & (0x3<<2)) {
2403 /* dr1 is enabled */
2404 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2405 return (EINVAL);
2406 }
e9182c58 2407
984263bc
MD
2408 if (dbregs->dr7 & (0x3<<4)) {
2409 /* dr2 is enabled */
2410 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2411 return (EINVAL);
2412 }
e9182c58 2413
984263bc
MD
2414 if (dbregs->dr7 & (0x3<<6)) {
2415 /* dr3 is enabled */
2416 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2417 return (EINVAL);
2418 }
2419 }
e9182c58 2420
984263bc
MD
2421 pcb->pcb_dr0 = dbregs->dr0;
2422 pcb->pcb_dr1 = dbregs->dr1;
2423 pcb->pcb_dr2 = dbregs->dr2;
2424 pcb->pcb_dr3 = dbregs->dr3;
2425 pcb->pcb_dr6 = dbregs->dr6;
2426 pcb->pcb_dr7 = dbregs->dr7;
e9182c58 2427
984263bc
MD
2428 pcb->pcb_flags |= PCB_DBREGS;
2429 }
2430
2431 return (0);
2432}
2433
2434/*
2435 * Return > 0 if a hardware breakpoint has been hit, and the
2436 * breakpoint was in user space. Return 0, otherwise.
2437 */
2438int
2439user_dbreg_trap(void)
2440{
2441 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2442 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2443 int nbp; /* number of breakpoints that triggered */
2444 caddr_t addr[4]; /* breakpoint addresses */
2445 int i;
2446
2447 dr7 = rdr7();
2448 if ((dr7 & 0x000000ff) == 0) {
2449 /*
2450 * all GE and LE bits in the dr7 register are zero,
2451 * thus the trap couldn't have been caused by the
2452 * hardware debug registers
2453 */
2454 return 0;
2455 }
2456
2457 nbp = 0;
2458 dr6 = rdr6();
2459 bp = dr6 & 0x0000000f;
2460
2461 if (!bp) {
2462 /*
2463 * None of the breakpoint bits are set meaning this
2464 * trap was not caused by any of the debug registers
2465 */
2466 return 0;
2467 }
2468
2469 /*
2470 * at least one of the breakpoints were hit, check to see
2471 * which ones and if any of them are user space addresses
2472 */
2473
2474 if (bp & 0x01) {
2475 addr[nbp++] = (caddr_t)rdr0();
2476 }
2477 if (bp & 0x02) {
2478 addr[nbp++] = (caddr_t)rdr1();
2479 }
2480 if (bp & 0x04) {
2481 addr[nbp++] = (caddr_t)rdr2();
2482 }
2483 if (bp & 0x08) {
2484 addr[nbp++] = (caddr_t)rdr3();
2485 }
2486
2487 for (i=0; i<nbp; i++) {
2488 if (addr[i] <
2489 (caddr_t)VM_MAXUSER_ADDRESS) {
2490 /*
2491 * addr[i] is in user space
2492 */
2493 return nbp;
2494 }
2495 }
2496
2497 /*
2498 * None of the breakpoints are in user space.
2499 */
2500 return 0;
2501}
2502
2503
2504#ifndef DDB
2505void
2506Debugger(const char *msg)
2507{
2508 printf("Debugger(\"%s\") called.\n", msg);
2509}
2510#endif /* no DDB */
2511
2512#include <sys/disklabel.h>
2513
2514/*
2515 * Determine the size of the transfer, and make sure it is
2516 * within the boundaries of the partition. Adjust transfer
2517 * if needed, and signal errors or early completion.
2518 */
2519int
2520bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2521{
2522 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2523 int labelsect = lp->d_partitions[0].p_offset;
2524 int maxsz = p->p_size,
2525 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2526
2527 /* overwriting disk label ? */
2528 /* XXX should also protect bootstrap in first 8K */
2529 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2530#if LABELSECTOR != 0
2531 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2532#endif
2533 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2534 bp->b_error = EROFS;
2535 goto bad;
2536 }
2537
2538#if defined(DOSBBSECTOR) && defined(notyet)
2539 /* overwriting master boot record? */
2540 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2541 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2542 bp->b_error = EROFS;
2543 goto bad;
2544 }
2545#endif
2546
2547 /* beyond partition? */
2548 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2549 /* if exactly at end of disk, return an EOF */
2550 if (bp->b_blkno == maxsz) {
2551 bp->b_resid = bp->b_bcount;
2552 return(0);
2553 }
2554 /* or truncate if part of it fits */
2555 sz = maxsz - bp->b_blkno;
2556 if (sz <= 0) {
2557 bp->b_error = EINVAL;
2558 goto bad;
2559 }
2560 bp->b_bcount = sz << DEV_BSHIFT;
2561 }
2562
2563 bp->b_pblkno = bp->b_blkno + p->p_offset;
2564 return(1);
2565
2566bad:
2567 bp->b_flags |= B_ERROR;
2568 return(-1);
2569}
2570
2571#ifdef DDB
2572
2573/*
2574 * Provide inb() and outb() as functions. They are normally only
2575 * available as macros calling inlined functions, thus cannot be
2576 * called inside DDB.
2577 *
2578 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2579 */
2580
2581#undef inb
2582#undef outb
2583
2584/* silence compiler warnings */
2585u_char inb(u_int);
2586void outb(u_int, u_char);
2587
2588u_char
2589inb(u_int port)
2590{
2591 u_char data;
2592 /*
2593 * We use %%dx and not %1 here because i/o is done at %dx and not at
2594 * %edx, while gcc generates inferior code (movw instead of movl)
2595 * if we tell it to load (u_short) port.
2596 */
2597 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2598 return (data);
2599}
2600
2601void
2602outb(u_int port, u_char data)
2603{
2604 u_char al;
2605 /*
2606 * Use an unnecessary assignment to help gcc's register allocator.
2607 * This make a large difference for gcc-1.40 and a tiny difference
2608 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2609 * best results. gcc-2.6.0 can't handle this.
2610 */
2611 al = data;
2612 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2613}
2614
2615#endif /* DDB */
8a8d5d85
MD
2616
2617
2618
2619#include "opt_cpu.h"
8a8d5d85
MD
2620
2621
2622/*
2623 * initialize all the SMP locks
2624 */
2625
97359a5b 2626/* critical region when masking or unmasking interupts */
b1af91cb 2627struct spinlock_deprecated imen_spinlock;
8a8d5d85
MD
2628
2629/* Make FAST_INTR() routines sequential */
b1af91cb 2630struct spinlock_deprecated fast_intr_spinlock;
8a8d5d85
MD
2631
2632/* critical region for old style disable_intr/enable_intr */
b1af91cb 2633struct spinlock_deprecated mpintr_spinlock;
8a8d5d85
MD
2634
2635/* critical region around INTR() routines */
b1af91cb 2636struct spinlock_deprecated intr_spinlock;
8a8d5d85
MD
2637
2638/* lock region used by kernel profiling */
b1af91cb 2639struct spinlock_deprecated mcount_spinlock;
8a8d5d85
MD
2640
2641/* locks com (tty) data/hardware accesses: a FASTINTR() */
b1af91cb 2642struct spinlock_deprecated com_spinlock;
8a8d5d85
MD
2643
2644/* locks kernel printfs */
b1af91cb 2645struct spinlock_deprecated cons_spinlock;
8a8d5d85
MD
2646
2647/* lock regions around the clock hardware */
b1af91cb 2648struct spinlock_deprecated clock_spinlock;
8a8d5d85
MD
2649
2650/* lock around the MP rendezvous */
b1af91cb 2651struct spinlock_deprecated smp_rv_spinlock;
8a8d5d85
MD
2652
2653static void
2654init_locks(void)
2655{
2656 /*
2657 * mp_lock = 0; BSP already owns the MP lock
2658 */
2659 /*
2660 * Get the initial mp_lock with a count of 1 for the BSP.
2661 * This uses a LOGICAL cpu ID, ie BSP == 0.
2662 */
2663#ifdef SMP
2664 cpu_get_initial_mplock();
2665#endif
41a01a4d 2666 /* DEPRECATED */
8a8d5d85
MD
2667 spin_lock_init(&mcount_spinlock);
2668 spin_lock_init(&fast_intr_spinlock);
2669 spin_lock_init(&intr_spinlock);
2670 spin_lock_init(&mpintr_spinlock);
2671 spin_lock_init(&imen_spinlock);
2672 spin_lock_init(&smp_rv_spinlock);
2673 spin_lock_init(&com_spinlock);
2674 spin_lock_init(&clock_spinlock);
2675 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2676
2677 /* our token pool needs to work early */
2678 lwkt_token_pool_init();
8a8d5d85
MD
2679}
2680