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mpt(4): Sync with FreeBSD.
[dragonfly.git] / sys / dev / disk / mpt / mpt.h
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4c42baf4 1/* $FreeBSD: src/sys/dev/mpt/mpt.h,v 1.60 2012/03/24 00:30:17 marius Exp $ */
d751f32e 2/*-
984263bc
MD		 3 * Generic defines for LSI '909 FC adapters.
4 * FreeBSD Version.
5 *
6 * Copyright (c) 2000, 2001 by Greg Ansley
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
d751f32e
MD		 29/*-
30 * Copyright (c) 2002, 2006 by Matthew Jacob
31 * All rights reserved.
32 *
33 * Redistribution and use in source and binary forms, with or without
34 * modification, are permitted provided that the following conditions are
35 * met:
36 * 1. Redistributions of source code must retain the above copyright
37 * notice, this list of conditions and the following disclaimer.
38 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
39 * substantially similar to the "NO WARRANTY" disclaimer below
40 * ("Disclaimer") and any redistribution must be conditioned upon including
41 * a substantially similar Disclaimer requirement for further binary
42 * redistribution.
43 * 3. Neither the names of the above listed copyright holders nor the names
44 * of any contributors may be used to endorse or promote products derived
45 * from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
48 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
51 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
52 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
53 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
54 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
57 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58 *
59 * Support from Chris Ellsworth in order to make SAS adapters work
60 * is gratefully acknowledged.
61 *
62 *
63 * Support from LSI-Logic has also gone a great deal toward making this a
64 * workable subsystem and is gratefully acknowledged.
65 */
984263bc 66/*
d751f32e
MD		 67 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
68 * Copyright (c) 2004, 2005 Justin T. Gibbs
69 * Copyright (c) 2005, WHEEL Sp. z o.o.
70 * All rights reserved.
71 *
72 * Redistribution and use in source and binary forms, with or without
73 * modification, are permitted provided that the following conditions are
74 * met:
75 * 1. Redistributions of source code must retain the above copyright
76 * notice, this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
78 * substantially similar to the "NO WARRANTY" disclaimer below
79 * ("Disclaimer") and any redistribution must be conditioned upon including
80 * a substantially similar Disclaimer requirement for further binary
81 * redistribution.
82 * 3. Neither the names of the above listed copyright holders nor the names
83 * of any contributors may be used to endorse or promote products derived
84 * from this software without specific prior written permission.
85 *
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
89 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
90 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
91 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
92 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
93 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
94 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
95 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
96 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
984263bc
MD		 97 */
98
99#ifndef _MPT_H_
100#define _MPT_H_
d751f32e
MD		 101
102/********************************* OS Includes ********************************/
103#include <sys/types.h>
104#include <sys/param.h>
105#include <sys/systm.h>
106#include <sys/endian.h>
107#include <sys/eventhandler.h>
d751f32e
MD		 108#include <sys/kernel.h>
109#include <sys/queue.h>
110#include <sys/malloc.h>
111#include <sys/devicestat.h>
d751f32e
MD		 112#include <sys/proc.h>
113#include <sys/bus.h>
114#include <sys/module.h>
cd8ab232
MD		 115#include <sys/thread2.h>
116#include <sys/mplock2.h>
117
d751f32e 118#include <sys/rman.h>
6d259fc1 119#include <sys/sysctl.h>
d751f32e 120
d751f32e
MD		 121#include <bus/pci/pcireg.h>
122#include <bus/pci/pcivar.h>
d751f32e
MD		 123
124#include "opt_ddb.h"
125
126/**************************** Register Definitions ****************************/
127#include <dev/disk/mpt/mpt_reg.h>
128
129/******************************* MPI Definitions ******************************/
130#include <dev/disk/mpt/mpilib/mpi_type.h>
131#include <dev/disk/mpt/mpilib/mpi.h>
132#include <dev/disk/mpt/mpilib/mpi_cnfg.h>
133#include <dev/disk/mpt/mpilib/mpi_ioc.h>
134#include <dev/disk/mpt/mpilib/mpi_raid.h>
135
136/* XXX For mpt_debug.c */
137#include <dev/disk/mpt/mpilib/mpi_init.h>
138
139#define MPT_S64_2_SCALAR(y) ((((int64_t)y.High) << 32) | (y.Low))
140#define MPT_U64_2_SCALAR(y) ((((uint64_t)y.High) << 32) | (y.Low))
141
142/****************************** Misc Definitions ******************************/
143/* #define MPT_TEST_MULTIPATH 1 */
984263bc
MD		 144#define MPT_OK (0)
145#define MPT_FAIL (0x10000)
146
d751f32e
MD		 147#define NUM_ELEMENTS(array) (sizeof(array) / sizeof(*array))
148
149#define MPT_ROLE_NONE 0
150#define MPT_ROLE_INITIATOR 1
151#define MPT_ROLE_TARGET 2
152#define MPT_ROLE_BOTH 3
153#define MPT_ROLE_DEFAULT MPT_ROLE_INITIATOR
154
6d259fc1
SW		 155#define MPT_INI_ID_NONE -1
156
d751f32e
MD		 157/**************************** Forward Declarations ****************************/
158struct mpt_softc;
159struct mpt_personality;
160typedef struct req_entry request_t;
161
162/************************* Personality Module Support *************************/
163typedef int mpt_load_handler_t(struct mpt_personality *);
164typedef int mpt_probe_handler_t(struct mpt_softc *);
165typedef int mpt_attach_handler_t(struct mpt_softc *);
166typedef int mpt_enable_handler_t(struct mpt_softc *);
167typedef void mpt_ready_handler_t(struct mpt_softc *);
168typedef int mpt_event_handler_t(struct mpt_softc *, request_t *,
169 MSG_EVENT_NOTIFY_REPLY *);
170typedef void mpt_reset_handler_t(struct mpt_softc *, int /*type*/);
171/* XXX Add return value and use for veto? */
172typedef void mpt_shutdown_handler_t(struct mpt_softc *);
173typedef void mpt_detach_handler_t(struct mpt_softc *);
174typedef int mpt_unload_handler_t(struct mpt_personality *);
175
176struct mpt_personality
177{
178 const char *name;
179 uint32_t id; /* Assigned identifier. */
180 u_int use_count; /* Instances using personality*/
181 mpt_load_handler_t *load; /* configure personailty */
182#define MPT_PERS_FIRST_HANDLER(pers) (&(pers)->load)
183 mpt_probe_handler_t *probe; /* configure personailty */
184 mpt_attach_handler_t *attach; /* initialize device instance */
185 mpt_enable_handler_t *enable; /* enable device */
186 mpt_ready_handler_t *ready; /* final open for business */
187 mpt_event_handler_t *event; /* Handle MPI event. */
188 mpt_reset_handler_t *reset; /* Re-init after reset. */
189 mpt_shutdown_handler_t *shutdown; /* Shutdown instance. */
190 mpt_detach_handler_t *detach; /* release device instance */
191 mpt_unload_handler_t *unload; /* Shutdown personality */
192#define MPT_PERS_LAST_HANDLER(pers) (&(pers)->unload)
193};
194
195int mpt_modevent(module_t, int, void *);
196
197/* Maximum supported number of personalities. */
198#define MPT_MAX_PERSONALITIES (15)
199
200#define MPT_PERSONALITY_DEPEND(name, dep, vmin, vpref, vmax) \
201 MODULE_DEPEND(name, dep, vmin, vpref, vmax)
202
203#define DECLARE_MPT_PERSONALITY(name, order) \
204 static moduledata_t name##_mod = { \
205 #name, mpt_modevent, &name##_personality \
206 }; \
207 DECLARE_MODULE(name, name##_mod, SI_SUB_DRIVERS, order); \
208 MODULE_VERSION(name, 1); \
209 MPT_PERSONALITY_DEPEND(name, mpt_core, 1, 1, 1)
210
211/******************************* Bus DMA Support ******************************/
212/* XXX Need to update bus_dmamap_sync to take a range argument. */
213#define bus_dmamap_sync_range(dma_tag, dmamap, offset, len, op) \
214 bus_dmamap_sync(dma_tag, dmamap, op)
215
d751f32e
MD		 216#define mpt_dma_tag_create(mpt, parent_tag, alignment, boundary, \
217 lowaddr, highaddr, filter, filterarg, \
218 maxsize, nsegments, maxsegsz, flags, \
219 dma_tagp) \
220 bus_dma_tag_create(parent_tag, alignment, boundary, \
221 lowaddr, highaddr, filter, filterarg, \
222 maxsize, nsegments, maxsegsz, flags, \
223 dma_tagp)
d751f32e
MD		 224
225struct mpt_map_info {
226 struct mpt_softc *mpt;
227 int error;
228 uint32_t phys;
229};
230
231void mpt_map_rquest(void *, bus_dma_segment_t *, int, int);
232/* **************************** NewBUS interrupt Crock ************************/
d751f32e 233#define mpt_setup_intr(d, i, f, U, if, ifa, hp) \
6d259fc1 234 bus_setup_intr(d, i, f, if, ifa, hp, NULL)
d751f32e
MD		 235
236/* **************************** NewBUS CAM Support ****************************/
d751f32e
MD		 237#define mpt_xpt_bus_register(sim, parent, bus) \
238 xpt_bus_register(sim, bus)
d751f32e
MD		 239
240/**************************** Kernel Thread Support ***************************/
d751f32e
MD		 241#define mpt_kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
242 kthread_create(func, farg, proc_ptr, fmtstr, arg)
243#define mpt_kthread_exit(status) \
2545bca0 244 kthread_exit()
d751f32e
MD		 245
246/********************************** Endianess *********************************/
247#define MPT_2_HOST64(ptr, tag) ptr->tag = le64toh(ptr->tag)
248#define MPT_2_HOST32(ptr, tag) ptr->tag = le32toh(ptr->tag)
249#define MPT_2_HOST16(ptr, tag) ptr->tag = le16toh(ptr->tag)
250
251#define HOST_2_MPT64(ptr, tag) ptr->tag = htole64(ptr->tag)
252#define HOST_2_MPT32(ptr, tag) ptr->tag = htole32(ptr->tag)
253#define HOST_2_MPT16(ptr, tag) ptr->tag = htole16(ptr->tag)
254
255#if _BYTE_ORDER == _BIG_ENDIAN
256void mpt2host_sge_simple_union(SGE_SIMPLE_UNION *);
257void mpt2host_iocfacts_reply(MSG_IOC_FACTS_REPLY *);
258void mpt2host_portfacts_reply(MSG_PORT_FACTS_REPLY *);
259void mpt2host_config_page_ioc2(CONFIG_PAGE_IOC_2 *);
260void mpt2host_config_page_ioc3(CONFIG_PAGE_IOC_3 *);
261void mpt2host_config_page_scsi_port_0(CONFIG_PAGE_SCSI_PORT_0 *);
262void mpt2host_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *);
263void host2mpt_config_page_scsi_port_1(CONFIG_PAGE_SCSI_PORT_1 *);
264void mpt2host_config_page_scsi_port_2(CONFIG_PAGE_SCSI_PORT_2 *);
265void mpt2host_config_page_scsi_device_0(CONFIG_PAGE_SCSI_DEVICE_0 *);
266void mpt2host_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *);
267void host2mpt_config_page_scsi_device_1(CONFIG_PAGE_SCSI_DEVICE_1 *);
268void mpt2host_config_page_fc_port_0(CONFIG_PAGE_FC_PORT_0 *);
269void mpt2host_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *);
270void host2mpt_config_page_fc_port_1(CONFIG_PAGE_FC_PORT_1 *);
271void mpt2host_config_page_raid_vol_0(CONFIG_PAGE_RAID_VOL_0 *);
272void mpt2host_config_page_raid_phys_disk_0(CONFIG_PAGE_RAID_PHYS_DISK_0 *);
273void mpt2host_mpi_raid_vol_indicator(MPI_RAID_VOL_INDICATOR *);
274#else
275#define mpt2host_sge_simple_union(x) do { ; } while (0)
276#define mpt2host_iocfacts_reply(x) do { ; } while (0)
277#define mpt2host_portfacts_reply(x) do { ; } while (0)
278#define mpt2host_config_page_ioc2(x) do { ; } while (0)
279#define mpt2host_config_page_ioc3(x) do { ; } while (0)
280#define mpt2host_config_page_scsi_port_0(x) do { ; } while (0)
281#define mpt2host_config_page_scsi_port_1(x) do { ; } while (0)
282#define host2mpt_config_page_scsi_port_1(x) do { ; } while (0)
283#define mpt2host_config_page_scsi_port_2(x) do { ; } while (0)
284#define mpt2host_config_page_scsi_device_0(x) do { ; } while (0)
285#define mpt2host_config_page_scsi_device_1(x) do { ; } while (0)
286#define host2mpt_config_page_scsi_device_1(x) do { ; } while (0)
287#define mpt2host_config_page_fc_port_0(x) do { ; } while (0)
288#define mpt2host_config_page_fc_port_1(x) do { ; } while (0)
289#define host2mpt_config_page_fc_port_1(x) do { ; } while (0)
290#define mpt2host_config_page_raid_vol_0(x) do { ; } while (0)
291#define mpt2host_config_page_raid_phys_disk_0(x) \
292 do { ; } while (0)
293#define mpt2host_mpi_raid_vol_indicator(x) do { ; } while (0)
294#endif
295
296/**************************** MPI Transaction State ***************************/
297typedef enum {
298 REQ_STATE_NIL = 0x00,
299 REQ_STATE_FREE = 0x01,
300 REQ_STATE_ALLOCATED = 0x02,
301 REQ_STATE_QUEUED = 0x04,
302 REQ_STATE_DONE = 0x08,
303 REQ_STATE_TIMEDOUT = 0x10,
304 REQ_STATE_NEED_WAKEUP = 0x20,
305 REQ_STATE_LOCKED = 0x80, /* can't be freed */
306 REQ_STATE_MASK = 0xFF
307} mpt_req_state_t;
308
309struct req_entry {
310 TAILQ_ENTRY(req_entry) links; /* Pointer to next in list */
311 mpt_req_state_t state; /* Request State Information */
312 uint16_t index; /* Index of this entry */
313 uint16_t IOCStatus; /* Completion status */
6d259fc1 314 uint16_t ResponseCode; /* TMF Response Code */
d751f32e
MD		 315 uint16_t serno; /* serial number */
316 union ccb *ccb; /* CAM request */
317 void *req_vbuf; /* Virtual Address of Entry */
318 void *sense_vbuf; /* Virtual Address of sense data */
319 bus_addr_t req_pbuf; /* Physical Address of Entry */
320 bus_addr_t sense_pbuf; /* Physical Address of sense data */
321 bus_dmamap_t dmap; /* DMA map for data buffers */
322 struct req_entry *chain; /* for SGE overallocations */
323 struct callout callout; /* Timeout for the request */
984263bc
MD		 324};
325
d751f32e
MD		 326typedef struct mpt_config_params {
327 u_int Action;
328 u_int PageVersion;
329 u_int PageLength;
330 u_int PageNumber;
331 u_int PageType;
332 u_int PageAddress;
333 u_int ExtPageLength;
334 u_int ExtPageType;
335} cfgparms_t;
984263bc 336
d751f32e 337/**************************** MPI Target State Info ***************************/
984263bc 338
d751f32e
MD		 339typedef struct {
340 uint32_t reply_desc; /* current reply descriptor */
341 uint32_t resid; /* current data residual */
342 uint32_t bytes_xfered; /* current relative offset */
343 union ccb *ccb; /* pointer to currently active ccb */
344 request_t *req; /* pointer to currently active assist request */
345 uint32_t
346 is_local : 1,
347 nxfers : 31;
348 uint32_t tag_id;
349 enum {
350 TGT_STATE_NIL,
351 TGT_STATE_LOADING,
352 TGT_STATE_LOADED,
353 TGT_STATE_IN_CAM,
354 TGT_STATE_SETTING_UP_FOR_DATA,
355 TGT_STATE_MOVING_DATA,
356 TGT_STATE_MOVING_DATA_AND_STATUS,
357 TGT_STATE_SENDING_STATUS
358 } state;
359} mpt_tgt_state_t;
984263bc
MD		 360
361/*
d751f32e
MD		 362 * When we get an incoming command it has its own tag which is called the
363 * IoIndex. This is the value we gave that particular command buffer when
364 * we originally assigned it. It's just a number, really. The FC card uses
365 * it as an RX_ID. We can use it to index into mpt->tgt_cmd_ptrs, which
366 * contains pointers the request_t structures related to that IoIndex.
367 *
368 * What *we* do is construct a tag out of the index for the target command
369 * which owns the incoming ATIO plus a rolling sequence number.
370 */
371#define MPT_MAKE_TAGID(mpt, req, ioindex) \
372 ((ioindex << 18) | (((mpt->sequence++) & 0x3f) << 12) | (req->index & 0xfff))
373
374#ifdef INVARIANTS
375#define MPT_TAG_2_REQ(a, b) mpt_tag_2_req(a, (uint32_t) b)
376#else
377#define MPT_TAG_2_REQ(mpt, tag) mpt->tgt_cmd_ptrs[tag >> 18]
378#endif
379
380#define MPT_TGT_STATE(mpt, req) ((mpt_tgt_state_t *) \
381 (&((uint8_t *)req->req_vbuf)[MPT_RQSL(mpt) - sizeof (mpt_tgt_state_t)]))
382
383STAILQ_HEAD(mpt_hdr_stailq, ccb_hdr);
384#define MPT_MAX_LUNS 256
385typedef struct {
386 struct mpt_hdr_stailq atios;
387 struct mpt_hdr_stailq inots;
388 int enabled;
389} tgt_resource_t;
390#define MPT_MAX_ELS 64
391
392/**************************** Handler Registration ****************************/
393/*
394 * Global table of registered reply handlers. The
395 * handler is indicated by byte 3 of the request
396 * index submitted to the IOC. This allows the
397 * driver core to perform generic processing without
398 * any knowledge of per-personality behavior.
399 *
400 * MPT_NUM_REPLY_HANDLERS must be a power of 2
401 * to allow the easy generation of a mask.
402 *
403 * The handler offsets used by the core are hard coded
404 * allowing faster code generation when assigning a handler
405 * to a request. All "personalities" must use the
406 * the handler registration mechanism.
407 *
408 * The IOC handlers that are rarely executed are placed
409 * at the tail of the table to make it more likely that
410 * all commonly executed handlers fit in a single cache
411 * line.
412 */
413#define MPT_NUM_REPLY_HANDLERS (32)
414#define MPT_REPLY_HANDLER_EVENTS MPT_CBI_TO_HID(0)
415#define MPT_REPLY_HANDLER_CONFIG MPT_CBI_TO_HID(MPT_NUM_REPLY_HANDLERS-1)
416#define MPT_REPLY_HANDLER_HANDSHAKE MPT_CBI_TO_HID(MPT_NUM_REPLY_HANDLERS-2)
417typedef int mpt_reply_handler_t(struct mpt_softc *mpt, request_t *request,
418 uint32_t reply_desc, MSG_DEFAULT_REPLY *reply_frame);
419typedef union {
420 mpt_reply_handler_t *reply_handler;
421} mpt_handler_t;
422
423typedef enum {
424 MPT_HANDLER_REPLY,
425 MPT_HANDLER_EVENT,
426 MPT_HANDLER_RESET,
427 MPT_HANDLER_SHUTDOWN
428} mpt_handler_type;
429
430struct mpt_handler_record
431{
432 LIST_ENTRY(mpt_handler_record) links;
433 mpt_handler_t handler;
984263bc
MD		 434};
435
d751f32e
MD		 436LIST_HEAD(mpt_handler_list, mpt_handler_record);
437
438/*
439 * The handler_id is currently unused but would contain the
440 * handler ID used in the MsgContext field to allow direction
441 * of replies to the handler. Registrations that don't require
442 * a handler id can pass in NULL for the handler_id.
443 *
444 * Deregistrations for handlers without a handler id should
445 * pass in MPT_HANDLER_ID_NONE.
446 */
447#define MPT_HANDLER_ID_NONE (0xFFFFFFFF)
448int mpt_register_handler(struct mpt_softc *, mpt_handler_type,
449 mpt_handler_t, uint32_t *);
450int mpt_deregister_handler(struct mpt_softc *, mpt_handler_type,
451 mpt_handler_t, uint32_t);
452
453/******************* Per-Controller Instance Data Structures ******************/
454TAILQ_HEAD(req_queue, req_entry);
455
456/* Structure for saving proper values for modifyable PCI config registers */
457struct mpt_pci_cfg {
458 uint16_t Command;
459 uint16_t LatencyTimer_LineSize;
460 uint32_t IO_BAR;
461 uint32_t Mem0_BAR[2];
462 uint32_t Mem1_BAR[2];
463 uint32_t ROM_BAR;
464 uint8_t IntLine;
465 uint32_t PMCSR;
984263bc
MD		 466};
467
d751f32e
MD		 468typedef enum {
469 MPT_RVF_NONE = 0x0,
470 MPT_RVF_ACTIVE = 0x1,
471 MPT_RVF_ANNOUNCED = 0x2,
472 MPT_RVF_UP2DATE = 0x4,
473 MPT_RVF_REFERENCED = 0x8,
474 MPT_RVF_WCE_CHANGED = 0x10
475} mpt_raid_volume_flags;
984263bc 476
d751f32e
MD		 477struct mpt_raid_volume {
478 CONFIG_PAGE_RAID_VOL_0 *config_page;
479 MPI_RAID_VOL_INDICATOR sync_progress;
480 mpt_raid_volume_flags flags;
481 u_int quiesced_disks;
984263bc
MD		 482};
483
d751f32e
MD		 484typedef enum {
485 MPT_RDF_NONE = 0x00,
486 MPT_RDF_ACTIVE = 0x01,
487 MPT_RDF_ANNOUNCED = 0x02,
488 MPT_RDF_UP2DATE = 0x04,
489 MPT_RDF_REFERENCED = 0x08,
490 MPT_RDF_QUIESCING = 0x10,
491 MPT_RDF_QUIESCED = 0x20
492} mpt_raid_disk_flags;
493
494struct mpt_raid_disk {
495 CONFIG_PAGE_RAID_PHYS_DISK_0 config_page;
496 struct mpt_raid_volume *volume;
497 u_int member_number;
498 u_int pass_thru_active;
499 mpt_raid_disk_flags flags;
984263bc
MD		 500};
501
d751f32e
MD		 502struct mpt_evtf_record {
503 MSG_EVENT_NOTIFY_REPLY reply;
504 uint32_t context;
505 LIST_ENTRY(mpt_evtf_record) links;
506};
507
508LIST_HEAD(mpt_evtf_list, mpt_evtf_record);
509
510struct mptsas_devinfo {
511 uint16_t dev_handle;
512 uint16_t parent_dev_handle;
513 uint16_t enclosure_handle;
514 uint16_t slot;
515 uint8_t phy_num;
516 uint8_t physical_port;
517 uint8_t target_id;
518 uint8_t bus;
519 uint64_t sas_address;
520 uint32_t device_info;
521};
522
523struct mptsas_phyinfo {
524 uint16_t handle;
525 uint8_t phy_num;
526 uint8_t port_id;
527 uint8_t negotiated_link_rate;
528 uint8_t hw_link_rate;
529 uint8_t programmed_link_rate;
530 uint8_t sas_port_add_phy;
531 struct mptsas_devinfo identify;
532 struct mptsas_devinfo attached;
533};
534
535struct mptsas_portinfo {
536 uint16_t num_phys;
537 struct mptsas_phyinfo *phy_info;
538};
539
540struct mpt_softc {
541 device_t dev;
6d259fc1 542 struct lock mpt_lock;
d751f32e 543 int mpt_locksetup;
d751f32e
MD		 544 uint32_t mpt_pers_mask;
545 uint32_t
4c42baf4 546 : 7,
d751f32e
MD		 547 unit : 8,
548 ready : 1,
549 fw_uploaded : 1,
550 msi_enable : 1,
551 twildcard : 1,
552 tenabled : 1,
553 do_cfg_role : 1,
554 raid_enabled : 1,
555 raid_mwce_set : 1,
556 getreqwaiter : 1,
557 shutdwn_raid : 1,
558 shutdwn_recovery: 1,
559 outofbeer : 1,
560 disabled : 1,
561 is_spi : 1,
562 is_sas : 1,
4c42baf4
SW		 563 is_fc : 1,
564 is_1078 : 1;
d751f32e
MD		 565
566 u_int cfg_role;
567 u_int role; /* role: none, ini, target, both */
568
569 u_int verbose;
570#ifdef MPT_TEST_MULTIPATH
571 int failure_id;
572#endif
573
574 /*
575 * IOC Facts
576 */
577 MSG_IOC_FACTS_REPLY ioc_facts;
578
579 /*
580 * Port Facts
581 */
582 MSG_PORT_FACTS_REPLY * port_facts;
d751f32e
MD		 583#define mpt_max_tgtcmds port_facts[0].MaxPostedCmdBuffers
584
585 /*
586 * Device Configuration Information
587 */
588 union {
589 struct mpt_spi_cfg {
590 CONFIG_PAGE_SCSI_PORT_0 _port_page0;
591 CONFIG_PAGE_SCSI_PORT_1 _port_page1;
592 CONFIG_PAGE_SCSI_PORT_2 _port_page2;
593 CONFIG_PAGE_SCSI_DEVICE_0 _dev_page0[16];
594 CONFIG_PAGE_SCSI_DEVICE_1 _dev_page1[16];
6d259fc1 595 int _ini_id;
d751f32e
MD		 596 uint16_t _tag_enable;
597 uint16_t _disc_enable;
598 } spi;
599#define mpt_port_page0 cfg.spi._port_page0
600#define mpt_port_page1 cfg.spi._port_page1
601#define mpt_port_page2 cfg.spi._port_page2
602#define mpt_dev_page0 cfg.spi._dev_page0
603#define mpt_dev_page1 cfg.spi._dev_page1
6d259fc1 604#define mpt_ini_id cfg.spi._ini_id
d751f32e
MD		 605#define mpt_tag_enable cfg.spi._tag_enable
606#define mpt_disc_enable cfg.spi._disc_enable
607 struct mpi_fc_cfg {
608 CONFIG_PAGE_FC_PORT_0 _port_page0;
609 uint32_t _port_speed;
610#define mpt_fcport_page0 cfg.fc._port_page0
611#define mpt_fcport_speed cfg.fc._port_speed
612 } fc;
613 } cfg;
d751f32e
MD		 614 /*
615 * Device config information stored up for sysctl to access
616 */
617 union {
618 struct {
619 unsigned int initiator_id;
620 } spi;
621 struct {
622 char wwnn[19];
623 char wwpn[19];
624 } fc;
625 } scinfo;
d751f32e
MD		 626
627 /* Controller Info for RAID information */
628 CONFIG_PAGE_IOC_2 * ioc_page2;
629 CONFIG_PAGE_IOC_3 * ioc_page3;
630
631 /* Raid Data */
632 struct mpt_raid_volume* raid_volumes;
633 struct mpt_raid_disk* raid_disks;
634 u_int raid_max_volumes;
635 u_int raid_max_disks;
636 u_int raid_page0_len;
637 u_int raid_wakeup;
638 u_int raid_rescan;
639 u_int raid_resync_rate;
640 u_int raid_mwce_setting;
641 u_int raid_queue_depth;
642 u_int raid_nonopt_volumes;
2545bca0 643 thread_t raid_thread;
d751f32e
MD		 644 struct callout raid_timer;
645
646 /*
647 * PCI Hardware info
648 */
649 int pci_msi_count;
650 struct resource * pci_irq; /* Interrupt map for chip */
6d259fc1 651 void * ih; /* Interrupt handle */
4c42baf4 652#if 0
d751f32e 653 struct mpt_pci_cfg pci_cfg; /* saved PCI conf registers */
4c42baf4 654#endif
d751f32e
MD		 655
656 /*
657 * DMA Mapping Stuff
658 */
659 struct resource * pci_reg; /* Register map for chip */
d751f32e
MD		 660 bus_space_tag_t pci_st; /* Bus tag for registers */
661 bus_space_handle_t pci_sh; /* Bus handle for registers */
662 /* PIO versions of above. */
d751f32e
MD		 663 struct resource * pci_pio_reg;
664 bus_space_tag_t pci_pio_st;
665 bus_space_handle_t pci_pio_sh;
666
667 bus_dma_tag_t parent_dmat; /* DMA tag for parent PCI bus */
668 bus_dma_tag_t reply_dmat; /* DMA tag for reply memory */
669 bus_dmamap_t reply_dmap; /* DMA map for reply memory */
670 uint8_t *reply; /* KVA of reply memory */
671 bus_addr_t reply_phys; /* BusAddr of reply memory */
672
673 bus_dma_tag_t buffer_dmat; /* DMA tag for buffers */
674 bus_dma_tag_t request_dmat; /* DMA tag for request memroy */
675 bus_dmamap_t request_dmap; /* DMA map for request memroy */
676 uint8_t *request; /* KVA of Request memory */
677 bus_addr_t request_phys; /* BusAddr of request memory */
678
679 uint32_t max_seg_cnt; /* calculated after IOC facts */
6d259fc1 680 uint32_t max_cam_seg_cnt;/* calculated from MAXPHYS*/
d751f32e
MD		 681
682 /*
683 * Hardware management
684 */
685 u_int reset_cnt;
686
687 /*
688 * CAM && Software Management
689 */
690 request_t *request_pool;
691 struct req_queue request_free_list;
692 struct req_queue request_pending_list;
693 struct req_queue request_timeout_list;
984263bc 694
d751f32e
MD		 695
696 struct cam_sim *sim;
697 struct cam_path *path;
698
699 struct cam_sim *phydisk_sim;
700 struct cam_path *phydisk_path;
701
2545bca0 702 thread_t recovery_thread;
d751f32e
MD		 703 request_t *tmf_req;
704
705 /*
706 * Deferred frame acks due to resource shortage.
707 */
708 struct mpt_evtf_list ack_frames;
709
710 /*
711 * Target Mode Support
712 */
713 uint32_t scsi_tgt_handler_id;
714 request_t ** tgt_cmd_ptrs;
715 request_t ** els_cmd_ptrs; /* FC only */
716
717 /*
718 * *snork*- this is chosen to be here *just in case* somebody
719 * forgets to point to it exactly and we index off of trt with
720 * CAM_LUN_WILDCARD.
721 */
722 tgt_resource_t trt_wildcard; /* wildcard luns */
723 tgt_resource_t trt[MPT_MAX_LUNS];
724 uint16_t tgt_cmds_allocated;
725 uint16_t els_cmds_allocated; /* FC only */
726
727 uint16_t timeouts; /* timeout count */
728 uint16_t success; /* successes afer timeout */
729 uint16_t sequence; /* Sequence Number */
730 uint16_t pad3;
731
732
733 /* Paired port in some dual adapters configurations */
734 struct mpt_softc * mpt2;
735
736 /* FW Image management */
737 uint32_t fw_image_size;
738 uint8_t *fw_image;
739 bus_dma_tag_t fw_dmat; /* DMA tag for firmware image */
740 bus_dmamap_t fw_dmap; /* DMA map for firmware image */
741 bus_addr_t fw_phys; /* BusAddr of firmware image */
742
743 /* SAS Topology */
744 struct mptsas_portinfo *sas_portinfo;
745
746 /* Shutdown Event Handler. */
747 eventhandler_tag eh;
748
749 /* Userland management interface. */
750 struct cdev *cdev;
751
6d259fc1
SW		 752 struct sysctl_ctx_list mpt_sysctl_ctx;
753 struct sysctl_oid *mpt_sysctl_tree;
754
d751f32e
MD		 755 TAILQ_ENTRY(mpt_softc) links;
756};
757
758static __inline void mpt_assign_serno(struct mpt_softc *, request_t *);
759
760static __inline void
761mpt_assign_serno(struct mpt_softc *mpt, request_t *req)
762{
763 if ((req->serno = mpt->sequence++) == 0) {
764 req->serno = mpt->sequence++;
765 }
766}
767
768/***************************** Locking Primitives *****************************/
3592c6a6 769#define MPT_IFLAGS INTR_MPSAFE
d751f32e 770#define MPT_LOCK_SETUP(mpt) \
6d259fc1 771 lockinit(&mpt->mpt_lock, "mpt", 0, LK_CANRECURSE); \
d751f32e
MD		 772 mpt->mpt_locksetup = 1
773#define MPT_LOCK_DESTROY(mpt) \
774 if (mpt->mpt_locksetup) { \
6d259fc1 775 lockuninit(&mpt->mpt_lock); \
d751f32e
MD		 776 mpt->mpt_locksetup = 0; \
777 }
778
6d259fc1
SW		 779#define MPT_LOCK(mpt) lockmgr(&(mpt)->mpt_lock, LK_EXCLUSIVE)
780#define MPT_UNLOCK(mpt) lockmgr(&(mpt)->mpt_lock, LK_RELEASE)
781#define MPT_OWNED(mpt) lockstatus(&(mpt)->mpt_lock, curthread)
782#define MPT_LOCK_ASSERT(mpt) KKASSERT(lockstatus(&(mpt)->mpt_lock, curthread) != 0)
d751f32e
MD		 783#define MPTLOCK_2_CAMLOCK(mpt)
784#define CAMLOCK_2_MPTLOCK(mpt)
785#define mpt_sleep(mpt, ident, priority, wmesg, timo) \
6d259fc1 786 lksleep(ident, &(mpt)->mpt_lock, priority, wmesg, timo)
d751f32e 787#define mpt_req_timeout(req, ticks, func, arg) \
6d259fc1 788 callout_reset(&(req)->callout, (ticks), (func), (arg))
d751f32e
MD		 789#define mpt_req_untimeout(req, func, arg) \
790 callout_stop(&(req)->callout)
6d259fc1
SW		 791#define mpt_callout_init(mpt, c) \
792 callout_init(c)
d751f32e
MD		 793
794/******************************* Register Access ******************************/
795static __inline void mpt_write(struct mpt_softc *, size_t, uint32_t);
796static __inline uint32_t mpt_read(struct mpt_softc *, int);
797static __inline void mpt_pio_write(struct mpt_softc *, size_t, uint32_t);
798static __inline uint32_t mpt_pio_read(struct mpt_softc *, int);
799
800static __inline void
801mpt_write(struct mpt_softc *mpt, size_t offset, uint32_t val)
802{
803 bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);
804}
805
806static __inline uint32_t
807mpt_read(struct mpt_softc *mpt, int offset)
808{
809 return (bus_space_read_4(mpt->pci_st, mpt->pci_sh, offset));
810}
811
812/*
813 * Some operations (e.g. diagnostic register writes while the ARM proccessor
814 * is disabled), must be performed using "PCI pio" operations. On non-PCI
815 * busses, these operations likely map to normal register accesses.
816 */
817static __inline void
818mpt_pio_write(struct mpt_softc *mpt, size_t offset, uint32_t val)
819{
4c42baf4 820 KASSERT(mpt->pci_pio_reg != NULL, ("no PIO resource"));
d751f32e
MD		 821 bus_space_write_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset, val);
822}
823
824static __inline uint32_t
825mpt_pio_read(struct mpt_softc *mpt, int offset)
826{
4c42baf4 827 KASSERT(mpt->pci_pio_reg != NULL, ("no PIO resource"));
d751f32e
MD		 828 return (bus_space_read_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset));
829}
830/*********************** Reply Frame/Request Management ***********************/
831/* Max MPT Reply we are willing to accept (must be power of 2) */
832#define MPT_REPLY_SIZE 256
833
d751f32e
MD		 834/*
835 * Must be less than 16384 in order for target mode to work
836 */
837#define MPT_MAX_REQUESTS(mpt) 512
838#define MPT_REQUEST_AREA 512
839#define MPT_SENSE_SIZE 32 /* included in MPT_REQUEST_AREA */
840#define MPT_REQ_MEM_SIZE(mpt) (MPT_MAX_REQUESTS(mpt) * MPT_REQUEST_AREA)
841
842#define MPT_CONTEXT_CB_SHIFT (16)
843#define MPT_CBI(handle) (handle >> MPT_CONTEXT_CB_SHIFT)
844#define MPT_CBI_TO_HID(cbi) ((cbi) << MPT_CONTEXT_CB_SHIFT)
845#define MPT_CONTEXT_TO_CBI(x) \
846 (((x) >> MPT_CONTEXT_CB_SHIFT) & (MPT_NUM_REPLY_HANDLERS - 1))
847#define MPT_CONTEXT_REQI_MASK 0xFFFF
848#define MPT_CONTEXT_TO_REQI(x) ((x) & MPT_CONTEXT_REQI_MASK)
849
850/*
851 * Convert a 32bit physical address returned from IOC to an
852 * offset into our reply frame memory or the kvm address needed
853 * to access the data. The returned address is only the low
854 * 32 bits, so mask our base physical address accordingly.
855 */
856#define MPT_REPLY_BADDR(x) \
857 (x << 1)
858#define MPT_REPLY_OTOV(m, i) \
859 ((void *)(&m->reply[i]))
860
861#define MPT_DUMP_REPLY_FRAME(mpt, reply_frame) \
862do { \
863 if (mpt->verbose > MPT_PRT_DEBUG) \
864 mpt_dump_reply_frame(mpt, reply_frame); \
865} while(0)
866
867static __inline uint32_t mpt_pop_reply_queue(struct mpt_softc *mpt);
868static __inline void mpt_free_reply(struct mpt_softc *mpt, uint32_t ptr);
869
870/*
871 * Give the reply buffer back to the IOC after we have
872 * finished processing it.
873 */
874static __inline void
875mpt_free_reply(struct mpt_softc *mpt, uint32_t ptr)
876{
877 mpt_write(mpt, MPT_OFFSET_REPLY_Q, ptr);
878}
879
880/* Get a reply from the IOC */
881static __inline uint32_t
882mpt_pop_reply_queue(struct mpt_softc *mpt)
883{
884 return mpt_read(mpt, MPT_OFFSET_REPLY_Q);
885}
886
887void
888mpt_complete_request_chain(struct mpt_softc *, struct req_queue *, u_int);
889
6d259fc1 890/************************** Scatter Gather Management **************************/
d751f32e
MD		 891/* MPT_RQSL- size of request frame, in bytes */
892#define MPT_RQSL(mpt) (mpt->ioc_facts.RequestFrameSize << 2)
893
894/* MPT_NSGL- how many SG entries can fit in a request frame size */
895#define MPT_NSGL(mpt) (MPT_RQSL(mpt) / sizeof (SGE_IO_UNION))
896
897/* MPT_NRFM- how many request frames can fit in each request alloc we make */
898#define MPT_NRFM(mpt) (MPT_REQUEST_AREA / MPT_RQSL(mpt))
899
900/*
901 * MPT_NSGL_FIRST- # of SG elements that can fit after
902 * an I/O request but still within the request frame.
903 * Do this safely based upon SGE_IO_UNION.
904 *
905 * Note that the first element is *within* the SCSI request.
906 */
907#define MPT_NSGL_FIRST(mpt) \
908 ((MPT_RQSL(mpt) - sizeof (MSG_SCSI_IO_REQUEST) + sizeof (SGE_IO_UNION)) / \
909 sizeof (SGE_IO_UNION))
910
911/***************************** IOC Initialization *****************************/
912int mpt_reset(struct mpt_softc *, int /*reinit*/);
913
914/****************************** Debugging ************************************/
d751f32e
MD		 915void mpt_dump_data(struct mpt_softc *, const char *, void *, int);
916void mpt_dump_request(struct mpt_softc *, request_t *);
917
918enum {
919 MPT_PRT_ALWAYS,
920 MPT_PRT_FATAL,
921 MPT_PRT_ERROR,
922 MPT_PRT_WARN,
923 MPT_PRT_INFO,
924 MPT_PRT_NEGOTIATION,
925 MPT_PRT_DEBUG,
926 MPT_PRT_DEBUG1,
927 MPT_PRT_DEBUG2,
928 MPT_PRT_DEBUG3,
929 MPT_PRT_TRACE,
930 MPT_PRT_NONE=100
931};
932
d751f32e
MD		 933#define mpt_lprt(mpt, level, ...) \
934do { \
935 if (level <= (mpt)->verbose) \
936 mpt_prt(mpt, __VA_ARGS__); \
937} while (0)
938
4c42baf4 939#if 0
6d259fc1
SW		 940#define mpt_lprtc(mpt, level, ...) \
941do { \
942 if (level <= (mpt)->verbose) \
943 mpt_prtc(mpt, __VA_ARGS__); \
d751f32e 944} while (0)
4c42baf4 945#endif
d751f32e
MD		 946void mpt_prt(struct mpt_softc *, const char *, ...)
947 __printflike(2, 3);
948void mpt_prtc(struct mpt_softc *, const char *, ...)
949 __printflike(2, 3);
950
951/**************************** Target Mode Related ***************************/
952static __inline int mpt_cdblen(uint8_t, int);
953static __inline int
954mpt_cdblen(uint8_t cdb0, int maxlen)
955{
956 int group = cdb0 >> 5;
957 switch (group) {
958 case 0:
959 return (6);
960 case 1:
961 return (10);
962 case 4:
963 case 5:
964 return (12);
965 default:
966 return (16);
967 }
968}
969#ifdef INVARIANTS
970static __inline request_t * mpt_tag_2_req(struct mpt_softc *, uint32_t);
971static __inline request_t *
972mpt_tag_2_req(struct mpt_softc *mpt, uint32_t tag)
973{
974 uint16_t rtg = (tag >> 18);
4c42baf4 975 KASSERT(rtg < mpt->tgt_cmds_allocated, ("bad tag %d", tag));
d751f32e
MD		 976 KASSERT(mpt->tgt_cmd_ptrs, ("no cmd backpointer array"));
977 KASSERT(mpt->tgt_cmd_ptrs[rtg], ("no cmd backpointer"));
978 return (mpt->tgt_cmd_ptrs[rtg]);
979}
6d259fc1 980#endif
d751f32e
MD		 981
982static __inline int
983mpt_req_on_free_list(struct mpt_softc *, request_t *);
984static __inline int
985mpt_req_on_pending_list(struct mpt_softc *, request_t *);
986
d751f32e
MD		 987/*
988 * Is request on freelist?
989 */
990static __inline int
991mpt_req_on_free_list(struct mpt_softc *mpt, request_t *req)
992{
993 request_t *lrq;
994
995 TAILQ_FOREACH(lrq, &mpt->request_free_list, links) {
996 if (lrq == req) {
997 return (1);
998 }
999 }
1000 return (0);
1001}
1002
1003/*
1004 * Is request on pending list?
1005 */
1006static __inline int
1007mpt_req_on_pending_list(struct mpt_softc *mpt, request_t *req)
1008{
1009 request_t *lrq;
1010
1011 TAILQ_FOREACH(lrq, &mpt->request_pending_list, links) {
1012 if (lrq == req) {
1013 return (1);
1014 }
1015 }
1016 return (0);
1017}
1018
6d259fc1
SW		 1019#ifdef INVARIANTS
1020static __inline void
1021mpt_req_spcl(struct mpt_softc *, request_t *, const char *, int);
1022static __inline void
1023mpt_req_not_spcl(struct mpt_softc *, request_t *, const char *, int);
1024
d751f32e
MD		 1025/*
1026 * Make sure that req *is* part of one of the special lists
1027 */
1028static __inline void
1029mpt_req_spcl(struct mpt_softc *mpt, request_t *req, const char *s, int line)
1030{
1031 int i;
1032 for (i = 0; i < mpt->els_cmds_allocated; i++) {
1033 if (req == mpt->els_cmd_ptrs[i]) {
1034 return;
1035 }
1036 }
1037 for (i = 0; i < mpt->tgt_cmds_allocated; i++) {
1038 if (req == mpt->tgt_cmd_ptrs[i]) {
1039 return;
1040 }
1041 }
4c42baf4 1042 panic("%s(%d): req %p:%u function %x not in els or tgt ptrs",
d751f32e
MD		 1043 s, line, req, req->serno,
1044 ((PTR_MSG_REQUEST_HEADER)req->req_vbuf)->Function);
1045}
1046
1047/*
1048 * Make sure that req is *not* part of one of the special lists.
1049 */
1050static __inline void
1051mpt_req_not_spcl(struct mpt_softc *mpt, request_t *req, const char *s, int line)
1052{
1053 int i;
1054 for (i = 0; i < mpt->els_cmds_allocated; i++) {
1055 KASSERT(req != mpt->els_cmd_ptrs[i],
4c42baf4 1056 ("%s(%d): req %p:%u func %x in els ptrs at ioindex %d",
d751f32e
MD		 1057 s, line, req, req->serno,
1058 ((PTR_MSG_REQUEST_HEADER)req->req_vbuf)->Function, i));
1059 }
1060 for (i = 0; i < mpt->tgt_cmds_allocated; i++) {
1061 KASSERT(req != mpt->tgt_cmd_ptrs[i],
4c42baf4 1062 ("%s(%d): req %p:%u func %x in tgt ptrs at ioindex %d",
d751f32e
MD		 1063 s, line, req, req->serno,
1064 ((PTR_MSG_REQUEST_HEADER)req->req_vbuf)->Function, i));
1065 }
1066}
1067#endif
1068
1069/*
1070 * Task Management Types, purely for internal consumption
1071 */
1072typedef enum {
1073 MPT_ABORT_TASK_SET=1234,
1074 MPT_CLEAR_TASK_SET,
1075 MPT_TARGET_RESET,
1076 MPT_CLEAR_ACA,
1077 MPT_TERMINATE_TASK,
1078 MPT_NIL_TMT_VALUE=5678
1079} mpt_task_mgmt_t;
1080
1081/**************************** Unclassified Routines ***************************/
1082void mpt_send_cmd(struct mpt_softc *mpt, request_t *req);
1083int mpt_recv_handshake_reply(struct mpt_softc *mpt,
1084 size_t reply_len, void *reply);
1085int mpt_wait_req(struct mpt_softc *mpt, request_t *req,
1086 mpt_req_state_t state, mpt_req_state_t mask,
1087 int sleep_ok, int time_ms);
1088void mpt_enable_ints(struct mpt_softc *mpt);
1089void mpt_disable_ints(struct mpt_softc *mpt);
1090int mpt_attach(struct mpt_softc *mpt);
1091int mpt_shutdown(struct mpt_softc *mpt);
1092int mpt_detach(struct mpt_softc *mpt);
1093int mpt_send_handshake_cmd(struct mpt_softc *mpt,
1094 size_t len, void *cmd);
1095request_t * mpt_get_request(struct mpt_softc *mpt, int sleep_ok);
1096void mpt_free_request(struct mpt_softc *mpt, request_t *req);
1097void mpt_intr(void *arg);
1098void mpt_check_doorbell(struct mpt_softc *mpt);
1099void mpt_dump_reply_frame(struct mpt_softc *mpt,
1100 MSG_DEFAULT_REPLY *reply_frame);
1101
d751f32e
MD		 1102int mpt_issue_cfg_req(struct mpt_softc */*mpt*/, request_t */*req*/,
1103 cfgparms_t *params,
1104 bus_addr_t /*addr*/, bus_size_t/*len*/,
1105 int /*sleep_ok*/, int /*timeout_ms*/);
1106int mpt_read_extcfg_header(struct mpt_softc *mpt, int PageVersion,
1107 int PageNumber, uint32_t PageAddress,
1108 int ExtPageType,
1109 CONFIG_EXTENDED_PAGE_HEADER *rslt,
1110 int sleep_ok, int timeout_ms);
1111int mpt_read_extcfg_page(struct mpt_softc *mpt, int Action,
1112 uint32_t PageAddress,
1113 CONFIG_EXTENDED_PAGE_HEADER *hdr,
1114 void *buf, size_t len, int sleep_ok,
1115 int timeout_ms);
1116int mpt_read_cfg_header(struct mpt_softc *, int /*PageType*/,
1117 int /*PageNumber*/,
1118 uint32_t /*PageAddress*/,
1119 CONFIG_PAGE_HEADER *,
1120 int /*sleep_ok*/, int /*timeout_ms*/);
1121int mpt_read_cfg_page(struct mpt_softc *t, int /*Action*/,
1122 uint32_t /*PageAddress*/,
1123 CONFIG_PAGE_HEADER *, size_t /*len*/,
1124 int /*sleep_ok*/, int /*timeout_ms*/);
1125int mpt_write_cfg_page(struct mpt_softc *, int /*Action*/,
1126 uint32_t /*PageAddress*/,
1127 CONFIG_PAGE_HEADER *, size_t /*len*/,
1128 int /*sleep_ok*/, int /*timeout_ms*/);
1129static __inline int
1130mpt_read_cur_cfg_page(struct mpt_softc *mpt, uint32_t PageAddress,
1131 CONFIG_PAGE_HEADER *hdr, size_t len,
1132 int sleep_ok, int timeout_ms)
1133{
1134 return (mpt_read_cfg_page(mpt, MPI_CONFIG_ACTION_PAGE_READ_CURRENT,
1135 PageAddress, hdr, len, sleep_ok, timeout_ms));
1136}
1137
1138static __inline int
1139mpt_write_cur_cfg_page(struct mpt_softc *mpt, uint32_t PageAddress,
1140 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok,
1141 int timeout_ms)
1142{
1143 return (mpt_write_cfg_page(mpt, MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT,
1144 PageAddress, hdr, len, sleep_ok,
1145 timeout_ms));
1146}
984263bc
MD		 1147/* mpt_debug.c functions */
1148void mpt_print_reply(void *vmsg);
d751f32e 1149void mpt_print_db(uint32_t mb);
984263bc 1150void mpt_print_config_reply(void *vmsg);
d751f32e
MD		 1151char *mpt_ioc_diag(uint32_t diag);
1152void mpt_req_state(mpt_req_state_t state);
984263bc
MD		 1153void mpt_print_config_request(void *vmsg);
1154void mpt_print_request(void *vmsg);
d751f32e 1155void mpt_dump_sgl(SGE_IO_UNION *se, int offset);
984263bc 1156#endif /* _MPT_H_ */
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