Fix typo.
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
17b71a59 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.26 2005/06/11 04:26:53 hsu Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
41d6c56f 103#include <sys/thread2.h>
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104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
317 struct an_ltv_ssidlist ssid;
318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
323 if (error != 0)
324 return (0);
325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
328 return(0);
329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
342 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
343 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
344
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345 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
346 device_get_unit(dev));
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347 an_reset(sc);
348 /* No need for an_init_mpi350_desc since it will be done in attach */
349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
351 return(0);
352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
354 return(0);
355
356 /* See if the ssid matches what we expect ... but doesn't have to */
357 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
358 return(0);
359
360 return(AN_IOSIZ);
361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
c45c9d6a 472 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
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473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 477 BUS_DMA_WAITOK, &dma->an_dma_map);
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478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
c45c9d6a 485 mapflags);
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486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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591 if_printf(&sc->arpcom.ac_if,
592 "failed to allocate RX descriptor\n");
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593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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620 if_printf(&sc->arpcom.ac_if,
621 "failed to allocate TX descriptor\n");
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622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
650 if_printf(&sc->arpcom.ac_if,
651 "failed to allocate host descriptor\n");
984263bc
MD
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
1c70eebf 669an_attach(sc, dev, flags)
984263bc 670 struct an_softc *sc;
1c70eebf 671 device_t dev;
984263bc
MD
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
984263bc
MD
678 sc->an_associated = 0;
679 sc->an_monitor = 0;
680 sc->an_was_monitor = 0;
681 sc->an_flash_buffer = NULL;
682
1c70eebf
JS
683 ifp->if_softc = sc;
684 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
685
984263bc
MD
686 /* Reset the NIC. */
687 an_reset(sc);
688 if (sc->mpi350) {
689 error = an_init_mpi350_desc(sc);
690 if (error)
691 return(error);
692 }
693
694 /* Load factory config */
695 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 696 device_printf(dev, "failed to load config data\n");
984263bc
MD
697 return(EIO);
698 }
699
700 /* Read the current configuration */
701 sc->an_config.an_type = AN_RID_GENCONFIG;
702 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
703 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 704 device_printf(dev, "read record failed\n");
984263bc
MD
705 return(EIO);
706 }
707
708 /* Read the card capabilities */
709 sc->an_caps.an_type = AN_RID_CAPABILITIES;
710 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
711 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 712 device_printf(dev, "read record failed\n");
984263bc
MD
713 return(EIO);
714 }
715
716 /* Read ssid list */
717 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
718 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
719 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 720 device_printf(dev, "read record failed\n");
984263bc
MD
721 return(EIO);
722 }
723
724 /* Read AP list */
725 sc->an_aplist.an_type = AN_RID_APLIST;
726 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
727 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 728 device_printf(dev, "read record failed\n");
984263bc
MD
729 return(EIO);
730 }
731
732#ifdef ANCACHE
733 /* Read the RSSI <-> dBm map */
734 sc->an_have_rssimap = 0;
735 if (sc->an_caps.an_softcaps & 8) {
736 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
737 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
738 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 739 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 740 } else {
1c70eebf 741 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
742 sc->an_have_rssimap = 1;
743 }
744 } else {
1c70eebf 745 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
746 }
747#endif
748
984263bc
MD
749 ifp->if_mtu = ETHERMTU;
750 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
751 ifp->if_ioctl = an_ioctl;
984263bc
MD
752 ifp->if_start = an_start;
753 ifp->if_watchdog = an_watchdog;
754 ifp->if_init = an_init;
755 ifp->if_baudrate = 10000000;
38de8487
JS
756 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
757 ifq_set_ready(&ifp->if_snd);
984263bc
MD
758
759 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
760 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
761 sizeof(AN_DEFAULT_NODENAME) - 1);
762
763 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
764 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
765 sizeof(AN_DEFAULT_NETNAME) - 1);
766 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
767
768 sc->an_config.an_opmode =
769 AN_OPMODE_INFRASTRUCTURE_STATION;
770
771 sc->an_tx_rate = 0;
772 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
773
774 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
775#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
776 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
777 IFM_IEEE80211_ADHOC, 0), 0);
778 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
780 IFM_IEEE80211_ADHOC, 0), 0);
781 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
782 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
784 IFM_IEEE80211_ADHOC, 0), 0);
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
786 }
787 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
788 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
789 IFM_IEEE80211_ADHOC, 0), 0);
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
791 }
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
793 IFM_IEEE80211_ADHOC, 0), 0);
794 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
795#undef ADD
796 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
797 0, 0));
798
799 /*
800 * Call MI attach routine.
801 */
0a8b5977 802 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
MD
803
804 return(0);
805}
806
807static void
808an_rxeof(sc)
809 struct an_softc *sc;
810{
811 struct ifnet *ifp;
812 struct ether_header *eh;
813 struct ieee80211_frame *ih;
814 struct an_rxframe rx_frame;
815 struct an_rxframe_802_3 rx_frame_802_3;
816 struct mbuf *m;
817 int len, id, error = 0, i, count = 0;
818 int ieee80211_header_len;
819 u_char *bpf_buf;
820 u_short fc1;
821 struct an_card_rx_desc an_rx_desc;
822 u_int8_t *buf;
823
824 ifp = &sc->arpcom.ac_if;
825
826 if (!sc->mpi350) {
827 id = CSR_READ_2(sc, AN_RX_FID);
828
829 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
830 /* read raw 802.11 packet */
831 bpf_buf = sc->buf_802_11;
832
833 /* read header */
834 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
835 sizeof(rx_frame))) {
836 ifp->if_ierrors++;
837 return;
838 }
839
840 /*
841 * skip beacon by default since this increases the
842 * system load a lot
843 */
844
845 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
846 (rx_frame.an_frame_ctl &
847 IEEE80211_FC0_SUBTYPE_BEACON)) {
848 return;
849 }
850
851 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
852 len = rx_frame.an_rx_payload_len
853 + sizeof(rx_frame);
854 /* Check for insane frame length */
855 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
856 if_printf(ifp,
857 "oversized packet received "
858 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
859 ifp->if_ierrors++;
860 return;
861 }
862
863 bcopy((char *)&rx_frame,
864 bpf_buf, sizeof(rx_frame));
865
866 error = an_read_data(sc, id, sizeof(rx_frame),
867 (caddr_t)bpf_buf+sizeof(rx_frame),
868 rx_frame.an_rx_payload_len);
869 } else {
870 fc1=rx_frame.an_frame_ctl >> 8;
871 ieee80211_header_len =
872 sizeof(struct ieee80211_frame);
873 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
874 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
875 ieee80211_header_len += ETHER_ADDR_LEN;
876 }
877
878 len = rx_frame.an_rx_payload_len
879 + ieee80211_header_len;
880 /* Check for insane frame length */
881 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
882 if_printf(ifp,
883 "oversized packet received "
884 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
885 ifp->if_ierrors++;
886 return;
887 }
888
889 ih = (struct ieee80211_frame *)bpf_buf;
890
891 bcopy((char *)&rx_frame.an_frame_ctl,
892 (char *)ih, ieee80211_header_len);
893
894 error = an_read_data(sc, id, sizeof(rx_frame) +
895 rx_frame.an_gaplen,
896 (caddr_t)ih +ieee80211_header_len,
897 rx_frame.an_rx_payload_len);
898 }
7600679e 899 BPF_TAP(ifp, bpf_buf, len);
984263bc 900 } else {
17b71a59 901 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
902 if (m == NULL) {
903 ifp->if_ierrors++;
904 return;
905 }
984263bc
MD
906 m->m_pkthdr.rcvif = ifp;
907 /* Read Ethernet encapsulated packet */
908
909#ifdef ANCACHE
910 /* Read NIC frame header */
911 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
912 sizeof(rx_frame))) {
913 ifp->if_ierrors++;
914 return;
915 }
916#endif
917 /* Read in the 802_3 frame header */
918 if (an_read_data(sc, id, 0x34,
919 (caddr_t)&rx_frame_802_3,
920 sizeof(rx_frame_802_3))) {
921 ifp->if_ierrors++;
922 return;
923 }
924 if (rx_frame_802_3.an_rx_802_3_status != 0) {
925 ifp->if_ierrors++;
926 return;
927 }
928 /* Check for insane frame length */
929 len = rx_frame_802_3.an_rx_802_3_payload_len;
930 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
931 if_printf(ifp,
932 "oversized packet received (%d, %d)\n",
933 len, MCLBYTES);
984263bc
MD
934 ifp->if_ierrors++;
935 return;
936 }
937 m->m_pkthdr.len = m->m_len =
938 rx_frame_802_3.an_rx_802_3_payload_len + 12;
939
940 eh = mtod(m, struct ether_header *);
941
942 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
943 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
944 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
945 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
946
947 /* in mbuf header type is just before payload */
948 error = an_read_data(sc, id, 0x44,
949 (caddr_t)&(eh->ether_type),
950 rx_frame_802_3.an_rx_802_3_payload_len);
951
952 if (error) {
953 m_freem(m);
954 ifp->if_ierrors++;
955 return;
956 }
957 ifp->if_ipackets++;
958
984263bc 959#ifdef ANCACHE
3013ac0e 960 an_cache_store(sc, m,
984263bc
MD
961 rx_frame.an_rx_signal_strength,
962 rx_frame.an_rsvd0);
963#endif
3013ac0e 964 (*ifp->if_input)(ifp, m);
984263bc
MD
965 }
966
967 } else { /* MPI-350 */
968 for (count = 0; count < AN_MAX_RX_DESC; count++){
969 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
970 ((u_int32_t*)&an_rx_desc)[i]
971 = CSR_MEM_AUX_READ_4(sc,
972 AN_RX_DESC_OFFSET
973 + (count * sizeof(an_rx_desc))
974 + (i * 4));
975
976 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
977 buf = sc->an_rx_buffer[count].an_dma_vaddr;
978
17b71a59 979 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
980 if (m == NULL) {
981 ifp->if_ierrors++;
982 return;
983 }
984263bc
MD
984 m->m_pkthdr.rcvif = ifp;
985 /* Read Ethernet encapsulated packet */
986
987 /*
988 * No ANCACHE support since we just get back
989 * an Ethernet packet no 802.11 info
990 */
991#if 0
992#ifdef ANCACHE
993 /* Read NIC frame header */
994 bcopy(buf, (caddr_t)&rx_frame,
995 sizeof(rx_frame));
996#endif
997#endif
998 /* Check for insane frame length */
999 len = an_rx_desc.an_len + 12;
1000 if (len > MCLBYTES) {
1c70eebf
JS
1001 if_printf(ifp,
1002 "oversized packet received "
1003 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1004 ifp->if_ierrors++;
1005 return;
1006 }
1007
1008 m->m_pkthdr.len = m->m_len =
1009 an_rx_desc.an_len + 12;
1010
1011 eh = mtod(m, struct ether_header *);
1012
1013 bcopy(buf, (char *)eh,
1014 m->m_pkthdr.len);
1015
1016 ifp->if_ipackets++;
1017
984263bc
MD
1018#if 0
1019#ifdef ANCACHE
3013ac0e 1020 an_cache_store(sc, m,
984263bc
MD
1021 rx_frame.an_rx_signal_strength,
1022 rx_frame.an_rsvd0);
1023#endif
1024#endif
3013ac0e 1025 (*ifp->if_input)(ifp, m);
984263bc
MD
1026
1027 an_rx_desc.an_valid = 1;
1028 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1029 an_rx_desc.an_done = 0;
1030 an_rx_desc.an_phys =
1031 sc->an_rx_buffer[count].an_dma_paddr;
1032
1033 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1034 CSR_MEM_AUX_WRITE_4(sc,
1035 AN_RX_DESC_OFFSET
1036 + (count * sizeof(an_rx_desc))
1037 + (i * 4),
1038 ((u_int32_t*)&an_rx_desc)[i]);
1039
1040 } else {
1c70eebf
JS
1041 if_printf(ifp, "Didn't get valid RX packet "
1042 "%x %x %d\n",
1043 an_rx_desc.an_done,
1044 an_rx_desc.an_valid,
1045 an_rx_desc.an_len);
984263bc
MD
1046 }
1047 }
1048 }
1049}
1050
1051static void
1052an_txeof(sc, status)
1053 struct an_softc *sc;
1054 int status;
1055{
1056 struct ifnet *ifp;
1057 int id, i;
1058
1059 ifp = &sc->arpcom.ac_if;
1060
1061 ifp->if_timer = 0;
1062 ifp->if_flags &= ~IFF_OACTIVE;
1063
1064 if (!sc->mpi350) {
1065 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1066
1067 if (status & AN_EV_TX_EXC) {
1068 ifp->if_oerrors++;
1069 } else
1070 ifp->if_opackets++;
1071
1072 for (i = 0; i < AN_TX_RING_CNT; i++) {
1073 if (id == sc->an_rdata.an_tx_ring[i]) {
1074 sc->an_rdata.an_tx_ring[i] = 0;
1075 break;
1076 }
1077 }
1078
1079 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1080 } else { /* MPI 350 */
1081 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1082 if (sc->an_rdata.an_tx_prod ==
1083 sc->an_rdata.an_tx_cons)
1084 sc->an_rdata.an_tx_empty = 1;
1085 }
1086
1087 return;
1088}
1089
1090/*
1091 * We abuse the stats updater to check the current NIC status. This
1092 * is important because we don't want to allow transmissions until
1093 * the NIC has synchronized to the current cell (either as the master
1094 * in an ad-hoc group, or as a station connected to an access point).
1095 */
1096static void
1097an_stats_update(xsc)
1098 void *xsc;
1099{
1100 struct an_softc *sc;
1101 struct ifnet *ifp;
984263bc
MD
1102
1103 sc = xsc;
1104 ifp = &sc->arpcom.ac_if;
1105
41d6c56f
JS
1106 crit_enter();
1107
984263bc
MD
1108 sc->an_status.an_type = AN_RID_STATUS;
1109 sc->an_status.an_len = sizeof(struct an_ltv_status);
1110 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1111
1112 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1113 sc->an_associated = 1;
1114 else
1115 sc->an_associated = 0;
1116
41d6c56f
JS
1117 /* Don't do this while we're not transmitting */
1118 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
1119 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1120 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1121 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
984263bc
MD
1122 }
1123
89c0f216 1124 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 1125
41d6c56f 1126 crit_exit();
984263bc
MD
1127}
1128
1129void
1130an_intr(xsc)
1131 void *xsc;
1132{
1133 struct an_softc *sc;
1134 struct ifnet *ifp;
1135 u_int16_t status;
1136
1137 sc = (struct an_softc*)xsc;
1138
984263bc
MD
1139 ifp = &sc->arpcom.ac_if;
1140
1141 /* Disable interrupts. */
1142 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1143
1144 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1145 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1146
1147 if (status & AN_EV_AWAKE) {
1148 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1149 }
1150
1151 if (status & AN_EV_LINKSTAT) {
1152 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1153 == AN_LINKSTAT_ASSOCIATED)
1154 sc->an_associated = 1;
1155 else
1156 sc->an_associated = 0;
1157 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1158 }
1159
1160 if (status & AN_EV_RX) {
1161 an_rxeof(sc);
1162 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1163 }
1164
1165 if (status & AN_EV_TX) {
1166 an_txeof(sc, status);
1167 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1168 }
1169
1170 if (status & AN_EV_TX_EXC) {
1171 an_txeof(sc, status);
1172 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1173 }
1174
1175 if (status & AN_EV_ALLOC)
1176 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1177
1178 /* Re-enable interrupts. */
1179 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1180
38de8487 1181 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1182 an_start(ifp);
1183
1184 return;
1185}
1186
1187static int
1188an_cmd_struct(sc, cmd, reply)
1189 struct an_softc *sc;
1190 struct an_command *cmd;
1191 struct an_reply *reply;
1192{
1193 int i;
1194
1195 for (i = 0; i != AN_TIMEOUT; i++) {
1196 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1197 DELAY(1000);
1198 } else
1199 break;
1200 }
1201 if( i == AN_TIMEOUT) {
1202 printf("BUSY\n");
1203 return(ETIMEDOUT);
1204 }
1205
1206 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1207 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1208 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1209 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1210
1211 for (i = 0; i < AN_TIMEOUT; i++) {
1212 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1213 break;
1214 DELAY(1000);
1215 }
1216
1217 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1218 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1219 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1220 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1221
1222 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1223 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1224
1225 /* Ack the command */
1226 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1227
1228 if (i == AN_TIMEOUT)
1229 return(ETIMEDOUT);
1230
1231 return(0);
1232}
1233
1234static int
1235an_cmd(sc, cmd, val)
1236 struct an_softc *sc;
1237 int cmd;
1238 int val;
1239{
1240 int i, s = 0;
1241
1242 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1243 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1244 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1245 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1246
1247 for (i = 0; i < AN_TIMEOUT; i++) {
1248 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1249 break;
1250 else {
1251 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1252 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1253 }
1254 }
1255
1256 for (i = 0; i < AN_TIMEOUT; i++) {
1257 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1258 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1259 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1260 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1261 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1262 break;
1263 }
1264
1265 /* Ack the command */
1266 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1267
1268 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1269 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1270
1271 if (i == AN_TIMEOUT)
1272 return(ETIMEDOUT);
1273
1274 return(0);
1275}
1276
1277/*
1278 * This reset sequence may look a little strange, but this is the
1279 * most reliable method I've found to really kick the NIC in the
1280 * head and force it to reboot correctly.
1281 */
1282static void
1283an_reset(sc)
1284 struct an_softc *sc;
1285{
984263bc
MD
1286 an_cmd(sc, AN_CMD_ENABLE, 0);
1287 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1288 an_cmd(sc, AN_CMD_NOOP2, 0);
1289
1290 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1291 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1292
1293 an_cmd(sc, AN_CMD_DISABLE, 0);
1294
1295 return;
1296}
1297
1298/*
1299 * Read an LTV record from the NIC.
1300 */
1301static int
1302an_read_record(sc, ltv)
1303 struct an_softc *sc;
1304 struct an_ltv_gen *ltv;
1305{
1306 struct an_ltv_gen *an_ltv;
1307 struct an_card_rid_desc an_rid_desc;
1308 struct an_command cmd;
1309 struct an_reply reply;
1310 u_int16_t *ptr;
1311 u_int8_t *ptr2;
1312 int i, len;
1313
1314 if (ltv->an_len < 4 || ltv->an_type == 0)
1315 return(EINVAL);
1316
1317 if (!sc->mpi350){
1318 /* Tell the NIC to enter record read mode. */
1319 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1320 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1321 return(EIO);
1322 }
1323
1324 /* Seek to the record. */
1325 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1326 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1327 return(EIO);
1328 }
1329
1330 /*
1331 * Read the length and record type and make sure they
1332 * match what we expect (this verifies that we have enough
1333 * room to hold all of the returned data).
1334 * Length includes type but not length.
1335 */
1336 len = CSR_READ_2(sc, AN_DATA1);
1337 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1338 if_printf(&sc->arpcom.ac_if,
1339 "record length mismatch -- expected %d, "
1340 "got %d for Rid %x\n",
1341 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1342 len = ltv->an_len - 2;
1343 } else {
1344 ltv->an_len = len + 2;
1345 }
1346
1347 /* Now read the data. */
1348 len -= 2; /* skip the type */
1349 ptr = &ltv->an_val;
1350 for (i = len; i > 1; i -= 2)
1351 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1352 if (i) {
1353 ptr2 = (u_int8_t *)ptr;
1354 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1355 }
1356 } else { /* MPI-350 */
1357 an_rid_desc.an_valid = 1;
1358 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1359 an_rid_desc.an_rid = 0;
1360 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1361 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1362
1363 bzero(&cmd, sizeof(cmd));
1364 bzero(&reply, sizeof(reply));
1365 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1366 cmd.an_parm0 = ltv->an_type;
1367
1368 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1369 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1370 ((u_int32_t*)&an_rid_desc)[i]);
1371
1372 if (an_cmd_struct(sc, &cmd, &reply)
1373 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1374 if_printf(&sc->arpcom.ac_if,
1375 "failed to read RID %x %x %x %x %x, %d\n",
1376 ltv->an_type,
1377 reply.an_status,
1378 reply.an_resp0,
1379 reply.an_resp1,
1380 reply.an_resp2,
1381 i);
984263bc
MD
1382 return(EIO);
1383 }
1384
1385 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1386 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1387 an_rid_desc.an_len = an_ltv->an_len;
1388 }
1389
1390 if (an_rid_desc.an_len > 2)
1391 bcopy(&an_ltv->an_type,
1392 &ltv->an_val,
1393 an_rid_desc.an_len - 2);
1394 ltv->an_len = an_rid_desc.an_len + 2;
1395 }
1396
1397 if (an_dump)
1398 an_dump_record(sc, ltv, "Read");
1399
1400 return(0);
1401}
1402
1403/*
1404 * Same as read, except we inject data instead of reading it.
1405 */
1406static int
1407an_write_record(sc, ltv)
1408 struct an_softc *sc;
1409 struct an_ltv_gen *ltv;
1410{
1411 struct an_card_rid_desc an_rid_desc;
1412 struct an_command cmd;
1413 struct an_reply reply;
1414 char *buf;
1415 u_int16_t *ptr;
1416 u_int8_t *ptr2;
1417 int i, len;
1418
1419 if (an_dump)
1420 an_dump_record(sc, ltv, "Write");
1421
1422 if (!sc->mpi350){
1423 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1424 return(EIO);
1425
1426 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1427 return(EIO);
1428
1429 /*
1430 * Length includes type but not length.
1431 */
1432 len = ltv->an_len - 2;
1433 CSR_WRITE_2(sc, AN_DATA1, len);
1434
1435 len -= 2; /* skip the type */
1436 ptr = &ltv->an_val;
1437 for (i = len; i > 1; i -= 2)
1438 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1439 if (i) {
1440 ptr2 = (u_int8_t *)ptr;
1441 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1442 }
1443
1444 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1445 return(EIO);
1446 } else {
1447 /* MPI-350 */
1448
1449 for (i = 0; i != AN_TIMEOUT; i++) {
1450 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1451 & AN_CMD_BUSY) {
1452 DELAY(10);
1453 } else
1454 break;
1455 }
1456 if (i == AN_TIMEOUT) {
1457 printf("BUSY\n");
1458 }
1459
1460 an_rid_desc.an_valid = 1;
1461 an_rid_desc.an_len = ltv->an_len - 2;
1462 an_rid_desc.an_rid = ltv->an_type;
1463 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1464
1465 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1466 an_rid_desc.an_len);
1467
1468 bzero(&cmd,sizeof(cmd));
1469 bzero(&reply,sizeof(reply));
1470 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1471 cmd.an_parm0 = ltv->an_type;
1472
1473 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1474 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1475 ((u_int32_t*)&an_rid_desc)[i]);
1476
1477 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1478 if_printf(&sc->arpcom.ac_if,
1479 "failed to write RID 1 %x %x %x %x %x, %d\n",
1480 ltv->an_type,
984263bc
MD
1481 reply.an_status,
1482 reply.an_resp0,
1483 reply.an_resp1,
1484 reply.an_resp2,
1485 i);
1486 return(EIO);
1487 }
1488
1489 ptr = (u_int16_t *)buf;
1490
1491 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1492 if_printf(&sc->arpcom.ac_if,
1493 "failed to write RID 2 %x %x %x %x %x, %d\n",
1494 ltv->an_type,
984263bc
MD
1495 reply.an_status,
1496 reply.an_resp0,
1497 reply.an_resp1,
1498 reply.an_resp2,
1499 i);
1500 return(EIO);
1501 }
1502 }
1503
1504 return(0);
1505}
1506
1507static void
1508an_dump_record(sc, ltv, string)
1509 struct an_softc *sc;
1510 struct an_ltv_gen *ltv;
1511 char *string;
1512{
1513 u_int8_t *ptr2;
1514 int len;
1515 int i;
1516 int count = 0;
1517 char buf[17], temp;
1518
1519 len = ltv->an_len - 4;
1c70eebf
JS
1520 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1521 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1522
1523 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1524 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1525 bzero(buf,sizeof(buf));
1526
1527 ptr2 = (u_int8_t *)&ltv->an_val;
1528 for (i = len; i > 0; i--) {
1529 printf("%02x ", *ptr2);
1530
1531 temp = *ptr2++;
1532 if (temp >= ' ' && temp <= '~')
1533 buf[count] = temp;
1534 else if (temp >= 'A' && temp <= 'Z')
1535 buf[count] = temp;
1536 else
1537 buf[count] = '.';
1538 if (++count == 16) {
1539 count = 0;
1540 printf("%s\n",buf);
1c70eebf 1541 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1542 bzero(buf,sizeof(buf));
1543 }
1544 }
1545 for (; count != 16; count++) {
1546 printf(" ");
1547 }
1548 printf(" %s\n",buf);
1549 }
1550}
1551
1552static int
1553an_seek(sc, id, off, chan)
1554 struct an_softc *sc;
1555 int id, off, chan;
1556{
1557 int i;
1558 int selreg, offreg;
1559
1560 switch (chan) {
1561 case AN_BAP0:
1562 selreg = AN_SEL0;
1563 offreg = AN_OFF0;
1564 break;
1565 case AN_BAP1:
1566 selreg = AN_SEL1;
1567 offreg = AN_OFF1;
1568 break;
1569 default:
1c70eebf 1570 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1571 return(EIO);
1572 }
1573
1574 CSR_WRITE_2(sc, selreg, id);
1575 CSR_WRITE_2(sc, offreg, off);
1576
1577 for (i = 0; i < AN_TIMEOUT; i++) {
1578 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1579 break;
1580 }
1581
1582 if (i == AN_TIMEOUT)
1583 return(ETIMEDOUT);
1584
1585 return(0);
1586}
1587
1588static int
1589an_read_data(sc, id, off, buf, len)
1590 struct an_softc *sc;
1591 int id, off;
1592 caddr_t buf;
1593 int len;
1594{
1595 int i;
1596 u_int16_t *ptr;
1597 u_int8_t *ptr2;
1598
1599 if (off != -1) {
1600 if (an_seek(sc, id, off, AN_BAP1))
1601 return(EIO);
1602 }
1603
1604 ptr = (u_int16_t *)buf;
1605 for (i = len; i > 1; i -= 2)
1606 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1607 if (i) {
1608 ptr2 = (u_int8_t *)ptr;
1609 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1610 }
1611
1612 return(0);
1613}
1614
1615static int
1616an_write_data(sc, id, off, buf, len)
1617 struct an_softc *sc;
1618 int id, off;
1619 caddr_t buf;
1620 int len;
1621{
1622 int i;
1623 u_int16_t *ptr;
1624 u_int8_t *ptr2;
1625
1626 if (off != -1) {
1627 if (an_seek(sc, id, off, AN_BAP0))
1628 return(EIO);
1629 }
1630
1631 ptr = (u_int16_t *)buf;
1632 for (i = len; i > 1; i -= 2)
1633 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1634 if (i) {
1635 ptr2 = (u_int8_t *)ptr;
1636 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1637 }
1638
1639 return(0);
1640}
1641
1642/*
1643 * Allocate a region of memory inside the NIC and zero
1644 * it out.
1645 */
1646static int
1647an_alloc_nicmem(sc, len, id)
1648 struct an_softc *sc;
1649 int len;
1650 int *id;
1651{
1652 int i;
1653
1654 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1655 if_printf(&sc->arpcom.ac_if,
1656 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1657 return(ENOMEM);
1658 }
1659
1660 for (i = 0; i < AN_TIMEOUT; i++) {
1661 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1662 break;
1663 }
1664
1665 if (i == AN_TIMEOUT)
1666 return(ETIMEDOUT);
1667
1668 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1669 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1670
1671 if (an_seek(sc, *id, 0, AN_BAP0))
1672 return(EIO);
1673
1674 for (i = 0; i < len / 2; i++)
1675 CSR_WRITE_2(sc, AN_DATA0, 0);
1676
1677 return(0);
1678}
1679
1680static void
1681an_setdef(sc, areq)
1682 struct an_softc *sc;
1683 struct an_req *areq;
1684{
984263bc
MD
1685 struct ifnet *ifp;
1686 struct an_ltv_genconfig *cfg;
1687 struct an_ltv_ssidlist *ssid;
1688 struct an_ltv_aplist *ap;
1689 struct an_ltv_gen *sp;
1690
1691 ifp = &sc->arpcom.ac_if;
1692
1693 switch (areq->an_type) {
1694 case AN_RID_GENCONFIG:
1695 cfg = (struct an_ltv_genconfig *)areq;
1696
984263bc
MD
1697 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1698 ETHER_ADDR_LEN);
f2682cb9 1699 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1700
1701 bcopy((char *)cfg, (char *)&sc->an_config,
1702 sizeof(struct an_ltv_genconfig));
1703 break;
1704 case AN_RID_SSIDLIST:
1705 ssid = (struct an_ltv_ssidlist *)areq;
1706 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1707 sizeof(struct an_ltv_ssidlist));
1708 break;
1709 case AN_RID_APLIST:
1710 ap = (struct an_ltv_aplist *)areq;
1711 bcopy((char *)ap, (char *)&sc->an_aplist,
1712 sizeof(struct an_ltv_aplist));
1713 break;
1714 case AN_RID_TX_SPEED:
1715 sp = (struct an_ltv_gen *)areq;
1716 sc->an_tx_rate = sp->an_val;
1717
1718 /* Read the current configuration */
1719 sc->an_config.an_type = AN_RID_GENCONFIG;
1720 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1721 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1722 cfg = &sc->an_config;
1723
1724 /* clear other rates and set the only one we want */
1725 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1726 cfg->an_rates[0] = sc->an_tx_rate;
1727
1728 /* Save the new rate */
1729 sc->an_config.an_type = AN_RID_GENCONFIG;
1730 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1731 break;
1732 case AN_RID_WEP_TEMP:
1733 /* Cache the temp keys */
1734 bcopy(areq,
1735 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1736 sizeof(struct an_ltv_key));
1737 case AN_RID_WEP_PERM:
1738 case AN_RID_LEAPUSERNAME:
1739 case AN_RID_LEAPPASSWORD:
1740 /* Disable the MAC. */
1741 an_cmd(sc, AN_CMD_DISABLE, 0);
1742
1743 /* Write the key */
1744 an_write_record(sc, (struct an_ltv_gen *)areq);
1745
1746 /* Turn the MAC back on. */
1747 an_cmd(sc, AN_CMD_ENABLE, 0);
1748
1749 break;
1750 case AN_RID_MONITOR_MODE:
1751 cfg = (struct an_ltv_genconfig *)areq;
1752 bpfdetach(ifp);
1753 if (ng_ether_detach_p != NULL)
1754 (*ng_ether_detach_p) (ifp);
1755 sc->an_monitor = cfg->an_len;
1756
1757 if (sc->an_monitor & AN_MONITOR) {
1758 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1759 bpfattach(ifp, DLT_AIRONET_HEADER,
1760 sizeof(struct ether_header));
1761 } else {
1762 bpfattach(ifp, DLT_IEEE802_11,
1763 sizeof(struct ether_header));
1764 }
1765 } else {
1766 bpfattach(ifp, DLT_EN10MB,
1767 sizeof(struct ether_header));
1768 if (ng_ether_attach_p != NULL)
1769 (*ng_ether_attach_p) (ifp);
1770 }
1771 break;
1772 default:
1c70eebf 1773 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc
MD
1774 return;
1775 break;
1776 }
1777
1778
1779 /* Reinitialize the card. */
1780 if (ifp->if_flags)
1781 an_init(sc);
1782
1783 return;
1784}
1785
1786/*
1787 * Derived from Linux driver to enable promiscious mode.
1788 */
1789
1790static void
1791an_promisc(sc, promisc)
1792 struct an_softc *sc;
1793 int promisc;
1794{
1795 if (sc->an_was_monitor)
1796 an_reset(sc);
1c70eebf
JS
1797 if (sc->mpi350)
1798 an_init_mpi350_desc(sc);
984263bc
MD
1799 if (sc->an_monitor || sc->an_was_monitor)
1800 an_init(sc);
1801
1802 sc->an_was_monitor = sc->an_monitor;
1803 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1804
1805 return;
1806}
1807
1808static int
bd4539cc 1809an_ioctl(ifp, command, data, cr)
984263bc
MD
1810 struct ifnet *ifp;
1811 u_long command;
1812 caddr_t data;
bd4539cc 1813 struct ucred *cr;
984263bc 1814{
41d6c56f 1815 int error = 0;
984263bc
MD
1816 int len;
1817 int i;
1818 struct an_softc *sc;
1819 struct ifreq *ifr;
984263bc
MD
1820 struct ieee80211req *ireq;
1821 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1822 u_int8_t *tmpptr;
1823 struct an_ltv_genconfig *config;
1824 struct an_ltv_key *key;
1825 struct an_ltv_status *status;
1826 struct an_ltv_ssidlist *ssids;
1827 int mode;
1828 struct aironet_ioctl l_ioctl;
1829
1830 sc = ifp->if_softc;
984263bc
MD
1831 ifr = (struct ifreq *)data;
1832 ireq = (struct ieee80211req *)data;
1833
41d6c56f
JS
1834 crit_enter();
1835
984263bc
MD
1836 config = (struct an_ltv_genconfig *)&sc->areq;
1837 key = (struct an_ltv_key *)&sc->areq;
1838 status = (struct an_ltv_status *)&sc->areq;
1839 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1840
984263bc 1841 switch (command) {
984263bc
MD
1842 case SIOCSIFFLAGS:
1843 if (ifp->if_flags & IFF_UP) {
1844 if (ifp->if_flags & IFF_RUNNING &&
1845 ifp->if_flags & IFF_PROMISC &&
1846 !(sc->an_if_flags & IFF_PROMISC)) {
1847 an_promisc(sc, 1);
1848 } else if (ifp->if_flags & IFF_RUNNING &&
1849 !(ifp->if_flags & IFF_PROMISC) &&
1850 sc->an_if_flags & IFF_PROMISC) {
1851 an_promisc(sc, 0);
1852 } else
1853 an_init(sc);
1854 } else {
1855 if (ifp->if_flags & IFF_RUNNING)
1856 an_stop(sc);
1857 }
1858 sc->an_if_flags = ifp->if_flags;
1859 error = 0;
1860 break;
1861 case SIOCSIFMEDIA:
1862 case SIOCGIFMEDIA:
1863 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1864 break;
1865 case SIOCADDMULTI:
1866 case SIOCDELMULTI:
1867 /* The Aironet has no multicast filter. */
1868 error = 0;
1869 break;
1870 case SIOCGAIRONET:
1871 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1872 if (error != 0)
1873 break;
1874#ifdef ANCACHE
1875 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1876 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1877 if (error)
1878 break;
1879 sc->an_sigitems = sc->an_nextitem = 0;
1880 break;
1881 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1882 char *pt = (char *)&sc->areq.an_val;
1883 bcopy((char *)&sc->an_sigitems, (char *)pt,
1884 sizeof(int));
1885 pt += sizeof(int);
1886 sc->areq.an_len = sizeof(int) / 2;
1887 bcopy((char *)&sc->an_sigcache, (char *)pt,
1888 sizeof(struct an_sigcache) * sc->an_sigitems);
1889 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1890 sc->an_sigitems) / 2) + 1;
1891 } else
1892#endif
1893 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1894 error = EINVAL;
1895 break;
1896 }
1897 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1898 break;
1899 case SIOCSAIRONET:
bd4539cc 1900 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1901 break;
984263bc
MD
1902 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1903 if (error != 0)
1904 break;
1905 an_setdef(sc, &sc->areq);
1906 break;
1907 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1908 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1909 break;
984263bc
MD
1910 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1911 mode = l_ioctl.command;
1912
1913 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1914 error = readrids(ifp, &l_ioctl);
1915 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1916 error = writerids(ifp, &l_ioctl);
1917 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1918 error = flashcard(ifp, &l_ioctl);
1919 } else {
1920 error =-1;
1921 }
1922
1923 /* copy out the updated command info */
1924 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1925
1926 break;
1927 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1928 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1929 break;
984263bc
MD
1930 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1931 l_ioctl.command = 0;
1932 error = AIROMAGIC;
1933 copyout(&error, l_ioctl.data, sizeof(error));
1934 error = 0;
1935 break;
1936 case SIOCG80211:
1937 sc->areq.an_len = sizeof(sc->areq);
1938 /* was that a good idea DJA we are doing a short-cut */
1939 switch (ireq->i_type) {
1940 case IEEE80211_IOC_SSID:
1941 if (ireq->i_val == -1) {
1942 sc->areq.an_type = AN_RID_STATUS;
1943 if (an_read_record(sc,
1944 (struct an_ltv_gen *)&sc->areq)) {
1945 error = EINVAL;
1946 break;
1947 }
1948 len = status->an_ssidlen;
1949 tmpptr = status->an_ssid;
1950 } else if (ireq->i_val >= 0) {
1951 sc->areq.an_type = AN_RID_SSIDLIST;
1952 if (an_read_record(sc,
1953 (struct an_ltv_gen *)&sc->areq)) {
1954 error = EINVAL;
1955 break;
1956 }
1957 if (ireq->i_val == 0) {
1958 len = ssids->an_ssid1_len;
1959 tmpptr = ssids->an_ssid1;
1960 } else if (ireq->i_val == 1) {
1961 len = ssids->an_ssid2_len;
1962 tmpptr = ssids->an_ssid2;
1963 } else if (ireq->i_val == 2) {
1964 len = ssids->an_ssid3_len;
1965 tmpptr = ssids->an_ssid3;
1966 } else {
1967 error = EINVAL;
1968 break;
1969 }
1970 } else {
1971 error = EINVAL;
1972 break;
1973 }
1974 if (len > IEEE80211_NWID_LEN) {
1975 error = EINVAL;
1976 break;
1977 }
1978 ireq->i_len = len;
1979 bzero(tmpstr, IEEE80211_NWID_LEN);
1980 bcopy(tmpptr, tmpstr, len);
1981 error = copyout(tmpstr, ireq->i_data,
1982 IEEE80211_NWID_LEN);
1983 break;
1984 case IEEE80211_IOC_NUMSSIDS:
1985 ireq->i_val = 3;
1986 break;
1987 case IEEE80211_IOC_WEP:
1988 sc->areq.an_type = AN_RID_ACTUALCFG;
1989 if (an_read_record(sc,
1990 (struct an_ltv_gen *)&sc->areq)) {
1991 error = EINVAL;
1992 break;
1993 }
1994 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
1995 if (config->an_authtype &
1996 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
1997 ireq->i_val = IEEE80211_WEP_MIXED;
1998 else
1999 ireq->i_val = IEEE80211_WEP_ON;
2000 } else {
2001 ireq->i_val = IEEE80211_WEP_OFF;
2002 }
2003 break;
2004 case IEEE80211_IOC_WEPKEY:
2005 /*
2006 * XXX: I'm not entierly convinced this is
2007 * correct, but it's what is implemented in
2008 * ancontrol so it will have to do until we get
2009 * access to actual Cisco code.
2010 */
2011 if (ireq->i_val < 0 || ireq->i_val > 8) {
2012 error = EINVAL;
2013 break;
2014 }
2015 len = 0;
2016 if (ireq->i_val < 5) {
2017 sc->areq.an_type = AN_RID_WEP_TEMP;
2018 for (i = 0; i < 5; i++) {
2019 if (an_read_record(sc,
2020 (struct an_ltv_gen *)&sc->areq)) {
2021 error = EINVAL;
2022 break;
2023 }
2024 if (key->kindex == 0xffff)
2025 break;
2026 if (key->kindex == ireq->i_val)
2027 len = key->klen;
2028 /* Required to get next entry */
2029 sc->areq.an_type = AN_RID_WEP_PERM;
2030 }
2031 if (error != 0)
2032 break;
2033 }
2034 /* We aren't allowed to read the value of the
2035 * key from the card so we just output zeros
2036 * like we would if we could read the card, but
2037 * denied the user access.
2038 */
2039 bzero(tmpstr, len);
2040 ireq->i_len = len;
2041 error = copyout(tmpstr, ireq->i_data, len);
2042 break;
2043 case IEEE80211_IOC_NUMWEPKEYS:
2044 ireq->i_val = 9; /* include home key */
2045 break;
2046 case IEEE80211_IOC_WEPTXKEY:
2047 /*
2048 * For some strange reason, you have to read all
2049 * keys before you can read the txkey.
2050 */
2051 sc->areq.an_type = AN_RID_WEP_TEMP;
2052 for (i = 0; i < 5; i++) {
2053 if (an_read_record(sc,
2054 (struct an_ltv_gen *) &sc->areq)) {
2055 error = EINVAL;
2056 break;
2057 }
2058 if (key->kindex == 0xffff)
2059 break;
2060 /* Required to get next entry */
2061 sc->areq.an_type = AN_RID_WEP_PERM;
2062 }
2063 if (error != 0)
2064 break;
2065
2066 sc->areq.an_type = AN_RID_WEP_PERM;
2067 key->kindex = 0xffff;
2068 if (an_read_record(sc,
2069 (struct an_ltv_gen *)&sc->areq)) {
2070 error = EINVAL;
2071 break;
2072 }
2073 ireq->i_val = key->mac[0];
2074 /*
2075 * Check for home mode. Map home mode into
2076 * 5th key since that is how it is stored on
2077 * the card
2078 */
2079 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2080 sc->areq.an_type = AN_RID_GENCONFIG;
2081 if (an_read_record(sc,
2082 (struct an_ltv_gen *)&sc->areq)) {
2083 error = EINVAL;
2084 break;
2085 }
2086 if (config->an_home_product & AN_HOME_NETWORK)
2087 ireq->i_val = 4;
2088 break;
2089 case IEEE80211_IOC_AUTHMODE:
2090 sc->areq.an_type = AN_RID_ACTUALCFG;
2091 if (an_read_record(sc,
2092 (struct an_ltv_gen *)&sc->areq)) {
2093 error = EINVAL;
2094 break;
2095 }
2096 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2097 AN_AUTHTYPE_NONE) {
2098 ireq->i_val = IEEE80211_AUTH_NONE;
2099 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2100 AN_AUTHTYPE_OPEN) {
2101 ireq->i_val = IEEE80211_AUTH_OPEN;
2102 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2103 AN_AUTHTYPE_SHAREDKEY) {
2104 ireq->i_val = IEEE80211_AUTH_SHARED;
2105 } else
2106 error = EINVAL;
2107 break;
2108 case IEEE80211_IOC_STATIONNAME:
2109 sc->areq.an_type = AN_RID_ACTUALCFG;
2110 if (an_read_record(sc,
2111 (struct an_ltv_gen *)&sc->areq)) {
2112 error = EINVAL;
2113 break;
2114 }
2115 ireq->i_len = sizeof(config->an_nodename);
2116 tmpptr = config->an_nodename;
2117 bzero(tmpstr, IEEE80211_NWID_LEN);
2118 bcopy(tmpptr, tmpstr, ireq->i_len);
2119 error = copyout(tmpstr, ireq->i_data,
2120 IEEE80211_NWID_LEN);
2121 break;
2122 case IEEE80211_IOC_CHANNEL:
2123 sc->areq.an_type = AN_RID_STATUS;
2124 if (an_read_record(sc,
2125 (struct an_ltv_gen *)&sc->areq)) {
2126 error = EINVAL;
2127 break;
2128 }
2129 ireq->i_val = status->an_cur_channel;
2130 break;
2131 case IEEE80211_IOC_POWERSAVE:
2132 sc->areq.an_type = AN_RID_ACTUALCFG;
2133 if (an_read_record(sc,
2134 (struct an_ltv_gen *)&sc->areq)) {
2135 error = EINVAL;
2136 break;
2137 }
2138 if (config->an_psave_mode == AN_PSAVE_NONE) {
2139 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2140 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2141 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2142 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2143 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2144 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2145 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2146 } else
2147 error = EINVAL;
2148 break;
2149 case IEEE80211_IOC_POWERSAVESLEEP:
2150 sc->areq.an_type = AN_RID_ACTUALCFG;
2151 if (an_read_record(sc,
2152 (struct an_ltv_gen *)&sc->areq)) {
2153 error = EINVAL;
2154 break;
2155 }
2156 ireq->i_val = config->an_listen_interval;
2157 break;
2158 }
2159 break;
2160 case SIOCS80211:
bd4539cc 2161 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 2162 break;
984263bc
MD
2163 sc->areq.an_len = sizeof(sc->areq);
2164 /*
2165 * We need a config structure for everything but the WEP
2166 * key management and SSIDs so we get it now so avoid
2167 * duplicating this code every time.
2168 */
2169 if (ireq->i_type != IEEE80211_IOC_SSID &&
2170 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2171 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2172 sc->areq.an_type = AN_RID_GENCONFIG;
2173 if (an_read_record(sc,
2174 (struct an_ltv_gen *)&sc->areq)) {
2175 error = EINVAL;
2176 break;
2177 }
2178 }
2179 switch (ireq->i_type) {
2180 case IEEE80211_IOC_SSID:
2181 sc->areq.an_type = AN_RID_SSIDLIST;
2182 if (an_read_record(sc,
2183 (struct an_ltv_gen *)&sc->areq)) {
2184 error = EINVAL;
2185 break;
2186 }
2187 if (ireq->i_len > IEEE80211_NWID_LEN) {
2188 error = EINVAL;
2189 break;
2190 }
2191 switch (ireq->i_val) {
2192 case 0:
2193 error = copyin(ireq->i_data,
2194 ssids->an_ssid1, ireq->i_len);
2195 ssids->an_ssid1_len = ireq->i_len;
2196 break;
2197 case 1:
2198 error = copyin(ireq->i_data,
2199 ssids->an_ssid2, ireq->i_len);
2200 ssids->an_ssid2_len = ireq->i_len;
2201 break;
2202 case 2:
2203 error = copyin(ireq->i_data,
2204 ssids->an_ssid3, ireq->i_len);
2205 ssids->an_ssid3_len = ireq->i_len;
2206 break;
2207 default:
2208 error = EINVAL;
2209 break;
2210 }
2211 break;
2212 case IEEE80211_IOC_WEP:
2213 switch (ireq->i_val) {
2214 case IEEE80211_WEP_OFF:
2215 config->an_authtype &=
2216 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2217 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2218 break;
2219 case IEEE80211_WEP_ON:
2220 config->an_authtype |=
2221 AN_AUTHTYPE_PRIVACY_IN_USE;
2222 config->an_authtype &=
2223 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2224 break;
2225 case IEEE80211_WEP_MIXED:
2226 config->an_authtype |=
2227 AN_AUTHTYPE_PRIVACY_IN_USE |
2228 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2229 break;
2230 default:
2231 error = EINVAL;
2232 break;
2233 }
2234 break;
2235 case IEEE80211_IOC_WEPKEY:
2236 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2237 ireq->i_len > 13) {
2238 error = EINVAL;
2239 break;
2240 }
2241 error = copyin(ireq->i_data, tmpstr, 13);
2242 if (error != 0)
2243 break;
2244 /*
2245 * Map the 9th key into the home mode
2246 * since that is how it is stored on
2247 * the card
2248 */
2249 bzero(&sc->areq, sizeof(struct an_ltv_key));
2250 sc->areq.an_len = sizeof(struct an_ltv_key);
2251 key->mac[0] = 1; /* The others are 0. */
2252 if (ireq->i_val < 4) {
2253 sc->areq.an_type = AN_RID_WEP_TEMP;
2254 key->kindex = ireq->i_val;
2255 } else {
2256 sc->areq.an_type = AN_RID_WEP_PERM;
2257 key->kindex = ireq->i_val - 4;
2258 }
2259 key->klen = ireq->i_len;
2260 bcopy(tmpstr, key->key, key->klen);
2261 break;
2262 case IEEE80211_IOC_WEPTXKEY:
2263 if (ireq->i_val < 0 || ireq->i_val > 4) {
2264 error = EINVAL;
2265 break;
2266 }
2267
2268 /*
2269 * Map the 5th key into the home mode
2270 * since that is how it is stored on
2271 * the card
2272 */
2273 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2274 sc->areq.an_type = AN_RID_ACTUALCFG;
2275 if (an_read_record(sc,
2276 (struct an_ltv_gen *)&sc->areq)) {
2277 error = EINVAL;
2278 break;
2279 }
2280 if (ireq->i_val == 4) {
2281 config->an_home_product |= AN_HOME_NETWORK;
2282 ireq->i_val = 0;
2283 } else {
2284 config->an_home_product &= ~AN_HOME_NETWORK;
2285 }
2286
2287 sc->an_config.an_home_product
2288 = config->an_home_product;
2289
2290 /* update configuration */
2291 an_init(sc);
2292
2293 bzero(&sc->areq, sizeof(struct an_ltv_key));
2294 sc->areq.an_len = sizeof(struct an_ltv_key);
2295 sc->areq.an_type = AN_RID_WEP_PERM;
2296 key->kindex = 0xffff;
2297 key->mac[0] = ireq->i_val;
2298 break;
2299 case IEEE80211_IOC_AUTHMODE:
2300 switch (ireq->i_val) {
2301 case IEEE80211_AUTH_NONE:
2302 config->an_authtype = AN_AUTHTYPE_NONE |
2303 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2304 break;
2305 case IEEE80211_AUTH_OPEN:
2306 config->an_authtype = AN_AUTHTYPE_OPEN |
2307 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2308 break;
2309 case IEEE80211_AUTH_SHARED:
2310 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2311 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2312 break;
2313 default:
2314 error = EINVAL;
2315 }
2316 break;
2317 case IEEE80211_IOC_STATIONNAME:
2318 if (ireq->i_len > 16) {
2319 error = EINVAL;
2320 break;
2321 }
2322 bzero(config->an_nodename, 16);
2323 error = copyin(ireq->i_data,
2324 config->an_nodename, ireq->i_len);
2325 break;
2326 case IEEE80211_IOC_CHANNEL:
2327 /*
2328 * The actual range is 1-14, but if you set it
2329 * to 0 you get the default so we let that work
2330 * too.
2331 */
2332 if (ireq->i_val < 0 || ireq->i_val >14) {
2333 error = EINVAL;
2334 break;
2335 }
2336 config->an_ds_channel = ireq->i_val;
2337 break;
2338 case IEEE80211_IOC_POWERSAVE:
2339 switch (ireq->i_val) {
2340 case IEEE80211_POWERSAVE_OFF:
2341 config->an_psave_mode = AN_PSAVE_NONE;
2342 break;
2343 case IEEE80211_POWERSAVE_CAM:
2344 config->an_psave_mode = AN_PSAVE_CAM;
2345 break;
2346 case IEEE80211_POWERSAVE_PSP:
2347 config->an_psave_mode = AN_PSAVE_PSP;
2348 break;
2349 case IEEE80211_POWERSAVE_PSP_CAM:
2350 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2351 break;
2352 default:
2353 error = EINVAL;
2354 break;
2355 }
2356 break;
2357 case IEEE80211_IOC_POWERSAVESLEEP:
2358 config->an_listen_interval = ireq->i_val;
2359 break;
2360 }
2361
2362 if (!error)
2363 an_setdef(sc, &sc->areq);
2364 break;
2365 default:
4cde4dd5 2366 error = ether_ioctl(ifp, command, data);
984263bc
MD
2367 break;
2368 }
41d6c56f
JS
2369
2370 crit_exit();
984263bc
MD
2371
2372 return(error != 0);
2373}
2374
2375static int
2376an_init_tx_ring(sc)
2377 struct an_softc *sc;
2378{
2379 int i;
2380 int id;
2381
984263bc
MD
2382 if (!sc->mpi350) {
2383 for (i = 0; i < AN_TX_RING_CNT; i++) {
2384 if (an_alloc_nicmem(sc, 1518 +
2385 0x44, &id))
2386 return(ENOMEM);
2387 sc->an_rdata.an_tx_fids[i] = id;
2388 sc->an_rdata.an_tx_ring[i] = 0;
2389 }
2390 }
2391
2392 sc->an_rdata.an_tx_prod = 0;
2393 sc->an_rdata.an_tx_cons = 0;
2394 sc->an_rdata.an_tx_empty = 1;
2395
2396 return(0);
2397}
2398
2399static void
2400an_init(xsc)
2401 void *xsc;
2402{
2403 struct an_softc *sc = xsc;
2404 struct ifnet *ifp = &sc->arpcom.ac_if;
984263bc 2405
41d6c56f 2406 crit_enter();
984263bc
MD
2407 if (ifp->if_flags & IFF_RUNNING)
2408 an_stop(sc);
2409
2410 sc->an_associated = 0;
2411
2412 /* Allocate the TX buffers */
2413 if (an_init_tx_ring(sc)) {
2414 an_reset(sc);
2415 if (sc->mpi350)
2416 an_init_mpi350_desc(sc);
2417 if (an_init_tx_ring(sc)) {
41d6c56f 2418 crit_exit();
1c70eebf 2419 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2420 return;
2421 }
2422 }
2423
2424 /* Set our MAC address. */
2425 bcopy((char *)&sc->arpcom.ac_enaddr,
2426 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2427
2428 if (ifp->if_flags & IFF_BROADCAST)
2429 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2430 else
2431 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2432
2433 if (ifp->if_flags & IFF_MULTICAST)
2434 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2435
2436 if (ifp->if_flags & IFF_PROMISC) {
2437 if (sc->an_monitor & AN_MONITOR) {
2438 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2439 sc->an_config.an_rxmode |=
2440 AN_RXMODE_80211_MONITOR_ANYBSS |
2441 AN_RXMODE_NO_8023_HEADER;
2442 } else {
2443 sc->an_config.an_rxmode |=
2444 AN_RXMODE_80211_MONITOR_CURBSS |
2445 AN_RXMODE_NO_8023_HEADER;
2446 }
2447 }
2448 }
2449
2450 if (sc->an_have_rssimap)
2451 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2452
2453 /* Set the ssid list */
2454 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2455 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2456 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
41d6c56f 2457 crit_exit();
1c70eebf 2458 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2459 return;
2460 }
2461
2462 /* Set the AP list */
2463 sc->an_aplist.an_type = AN_RID_APLIST;
2464 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2465 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
41d6c56f 2466 crit_exit();
1c70eebf 2467 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2468 return;
2469 }
2470
2471 /* Set the configuration in the NIC */
2472 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2473 sc->an_config.an_type = AN_RID_GENCONFIG;
2474 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
41d6c56f 2475 crit_exit();
1c70eebf 2476 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2477 return;
2478 }
2479
2480 /* Enable the MAC */
2481 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
41d6c56f 2482 crit_exit();
1c70eebf 2483 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2484 return;
2485 }
2486
2487 if (ifp->if_flags & IFF_PROMISC)
2488 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2489
2490 /* enable interrupts */
2491 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2492
2493 ifp->if_flags |= IFF_RUNNING;
2494 ifp->if_flags &= ~IFF_OACTIVE;
2495
89c0f216 2496 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 2497
41d6c56f 2498 crit_exit();
984263bc
MD
2499}
2500
2501static void
2502an_start(ifp)
2503 struct ifnet *ifp;
2504{
2505 struct an_softc *sc;
2506 struct mbuf *m0 = NULL;
2507 struct an_txframe_802_3 tx_frame_802_3;
2508 struct ether_header *eh;
2509 int id, idx, i;
2510 unsigned char txcontrol;
2511 struct an_card_tx_desc an_tx_desc;
2512 u_int8_t *ptr;
2513 u_int8_t *buf;
2514
2515 sc = ifp->if_softc;
2516
984263bc
MD
2517 if (ifp->if_flags & IFF_OACTIVE)
2518 return;
2519
2520 if (!sc->an_associated)
2521 return;
2522
2523 /* We can't send in monitor mode so toss any attempts. */
2524 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2525 ifq_purge(&ifp->if_snd);
984263bc
MD
2526 return;
2527 }
2528
2529 idx = sc->an_rdata.an_tx_prod;
2530
2531 if (!sc->mpi350) {
2532 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2533
2534 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2535 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2536 if (m0 == NULL)
2537 break;
2538
2539 id = sc->an_rdata.an_tx_fids[idx];
2540 eh = mtod(m0, struct ether_header *);
2541
2542 bcopy((char *)&eh->ether_dhost,
2543 (char *)&tx_frame_802_3.an_tx_dst_addr,
2544 ETHER_ADDR_LEN);
2545 bcopy((char *)&eh->ether_shost,
2546 (char *)&tx_frame_802_3.an_tx_src_addr,
2547 ETHER_ADDR_LEN);
2548
2549 /* minus src/dest mac & type */
2550 tx_frame_802_3.an_tx_802_3_payload_len =
2551 m0->m_pkthdr.len - 12;
2552
2553 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2554 tx_frame_802_3.an_tx_802_3_payload_len,
2555 (caddr_t)&sc->an_txbuf);
2556
2557 txcontrol = AN_TXCTL_8023;
2558 /* write the txcontrol only */
2559 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2560 sizeof(txcontrol));
2561
2562 /* 802_3 header */
2563 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2564 sizeof(struct an_txframe_802_3));
2565
2566 /* in mbuf header type is just before payload */
2567 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2568 tx_frame_802_3.an_tx_802_3_payload_len);
2569
7600679e 2570 BPF_MTAP(ifp, m0);
984263bc
MD
2571
2572 m_freem(m0);
2573 m0 = NULL;
2574
2575 sc->an_rdata.an_tx_ring[idx] = id;
2576 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2577 if_printf(ifp, "xmit failed\n");
984263bc
MD
2578
2579 AN_INC(idx, AN_TX_RING_CNT);
2580 }
2581 } else { /* MPI-350 */
2582 while (sc->an_rdata.an_tx_empty ||
2583 idx != sc->an_rdata.an_tx_cons) {
38de8487 2584 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2585 if (m0 == NULL) {
2586 break;
2587 }
2588 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2589
2590 eh = mtod(m0, struct ether_header *);
2591
2592 /* DJA optimize this to limit bcopy */
2593 bcopy((char *)&eh->ether_dhost,
2594 (char *)&tx_frame_802_3.an_tx_dst_addr,
2595 ETHER_ADDR_LEN);
2596 bcopy((char *)&eh->ether_shost,
2597 (char *)&tx_frame_802_3.an_tx_src_addr,
2598 ETHER_ADDR_LEN);
2599
2600 /* minus src/dest mac & type */
2601 tx_frame_802_3.an_tx_802_3_payload_len =
2602 m0->m_pkthdr.len - 12;
2603
2604 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2605 tx_frame_802_3.an_tx_802_3_payload_len,
2606 (caddr_t)&sc->an_txbuf);
2607
2608 txcontrol = AN_TXCTL_8023;
2609 /* write the txcontrol only */
2610 bcopy((caddr_t)&txcontrol, &buf[0x08],
2611 sizeof(txcontrol));
2612
2613 /* 802_3 header */
2614 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2615 sizeof(struct an_txframe_802_3));
2616
2617 /* in mbuf header type is just before payload */
2618 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2619 tx_frame_802_3.an_tx_802_3_payload_len);
2620
2621
2622 bzero(&an_tx_desc, sizeof(an_tx_desc));
2623 an_tx_desc.an_offset = 0;
2624 an_tx_desc.an_eoc = 1;
2625 an_tx_desc.an_valid = 1;
2626 an_tx_desc.an_len = 0x44 +
2627 tx_frame_802_3.an_tx_802_3_payload_len;
2628 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2629 ptr = (u_int8_t*)&an_tx_desc;
2630 for (i = 0; i < sizeof(an_tx_desc); i++) {
2631 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2632 ptr[i]);
2633 }
2634
7600679e 2635 BPF_MTAP(ifp, m0);
984263bc
MD
2636
2637 m_freem(m0);
2638 m0 = NULL;
2639
2640 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2641
2642 AN_INC(idx, AN_MAX_TX_DESC);
2643 sc->an_rdata.an_tx_empty = 0;
2644 }
2645 }
2646
2647 if (m0 != NULL)
2648 ifp->if_flags |= IFF_OACTIVE;
2649
2650 sc->an_rdata.an_tx_prod = idx;
2651
2652 /*
2653 * Set a timeout in case the chip goes out to lunch.
2654 */
2655 ifp->if_timer = 5;
2656
2657 return;
2658}
2659
2660void
2661an_stop(sc)
2662 struct an_softc *sc;
2663{
2664 struct ifnet *ifp;
2665 int i;
984263bc 2666
984263bc
MD
2667 ifp = &sc->arpcom.ac_if;
2668
41d6c56f
JS
2669 crit_enter();
2670
984263bc
MD
2671 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2672 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2673 an_cmd(sc, AN_CMD_DISABLE, 0);
2674
2675 for (i = 0; i < AN_TX_RING_CNT; i++)
2676 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2677
89c0f216 2678 callout_stop(&sc->an_stat_timer);
984263bc
MD
2679
2680 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2681
2682 if (sc->an_flash_buffer) {
2683 free(sc->an_flash_buffer, M_DEVBUF);
2684 sc->an_flash_buffer = NULL;
2685 }
2686
41d6c56f 2687 crit_exit();
984263bc
MD
2688}
2689
2690static void
2691an_watchdog(ifp)
2692 struct ifnet *ifp;
2693{
2694 struct an_softc *sc;
984263bc
MD
2695
2696 sc = ifp->if_softc;
984263bc 2697
41d6c56f 2698 crit_enter();
984263bc
MD
2699 an_reset(sc);
2700 if (sc->mpi350)
2701 an_init_mpi350_desc(sc);
2702 an_init(sc);
2703
2704 ifp->if_oerrors++;
41d6c56f 2705 crit_exit();
984263bc 2706
41d6c56f 2707 if_printf(ifp, "device timeout\n");
984263bc
MD
2708}
2709
2710void
2711an_shutdown(dev)
2712 device_t dev;
2713{
2714 struct an_softc *sc;
2715
2716 sc = device_get_softc(dev);
2717 an_stop(sc);
2718
2719 return;
2720}
2721
2722void
2723an_resume(dev)
2724 device_t dev;
2725{
2726 struct an_softc *sc;
2727 struct ifnet *ifp;
2728 int i;
2729
2730 sc = device_get_softc(dev);
2731 ifp = &sc->arpcom.ac_if;
2732
2733 an_reset(sc);
2734 if (sc->mpi350)
2735 an_init_mpi350_desc(sc);
2736 an_init(sc);
2737
2738 /* Recovery temporary keys */
2739 for (i = 0; i < 4; i++) {
2740 sc->areq.an_type = AN_RID_WEP_TEMP;
2741 sc->areq.an_len = sizeof(struct an_ltv_key);
2742 bcopy(&sc->an_temp_keys[i],
2743 &sc->areq, sizeof(struct an_ltv_key));
2744 an_setdef(sc, &sc->areq);
2745 }
2746
2747 if (ifp->if_flags & IFF_UP)
2748 an_start(ifp);
2749
2750 return;
2751}
2752
2753#ifdef ANCACHE
2754/* Aironet signal strength cache code.
2755 * store signal/noise/quality on per MAC src basis in
2756 * a small fixed cache. The cache wraps if > MAX slots
2757 * used. The cache may be zeroed out to start over.
2758 * Two simple filters exist to reduce computation:
2759 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2760 * to ignore some packets. It defaults to ip only.
2761 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2762 * 2. multicast/broadcast only. This may be used to
2763 * ignore unicast packets and only cache signal strength
2764 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2765 * beacons and not unicast traffic.
2766 *
2767 * The cache stores (MAC src(index), IP src (major clue), signal,
2768 * quality, noise)
2769 *
2770 * No apologies for storing IP src here. It's easy and saves much
2771 * trouble elsewhere. The cache is assumed to be INET dependent,
2772 * although it need not be.
2773 *
2774 * Note: the Aironet only has a single byte of signal strength value
2775 * in the rx frame header, and it's not scaled to anything sensible.
2776 * This is kind of lame, but it's all we've got.
2777 */
2778
2779#ifdef documentation
2780
2781int an_sigitems; /* number of cached entries */
2782struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2783int an_nextitem; /* index/# of entries */
2784
2785
2786#endif
2787
2788/* control variables for cache filtering. Basic idea is
2789 * to reduce cost (e.g., to only Mobile-IP agent beacons
2790 * which are broadcast or multicast). Still you might
2791 * want to measure signal strength anth unicast ping packets
2792 * on a pt. to pt. ant. setup.
2793 */
2794/* set true if you want to limit cache items to broadcast/mcast
2795 * only packets (not unicast). Useful for mobile-ip beacons which
2796 * are broadcast/multicast at network layer. Default is all packets
2797 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2798 */
2799static int an_cache_mcastonly = 0;
2800SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2801 &an_cache_mcastonly, 0, "");
2802
2803/* set true if you want to limit cache items to IP packets only
2804*/
2805static int an_cache_iponly = 1;
2806SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2807 &an_cache_iponly, 0, "");
2808
2809/*
2810 * an_cache_store, per rx packet store signal
2811 * strength in MAC (src) indexed cache.
2812 */
2813static void
3013ac0e 2814an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2815 struct an_softc *sc;
984263bc
MD
2816 struct mbuf *m;
2817 u_int8_t rx_rssi;
2818 u_int8_t rx_quality;
2819{
3013ac0e
JS
2820 struct ether_header *eh = mtod(m, struct ether_header *);
2821 struct ip *ip = NULL;
984263bc
MD
2822 int i;
2823 static int cache_slot = 0; /* use this cache entry */
2824 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2825
2826 /* filters:
2827 * 1. ip only
2828 * 2. configurable filter to throw out unicast packets,
2829 * keep multicast only.
2830 */
2831
3013ac0e
JS
2832 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2833 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2834 else if (an_cache_iponly)
984263bc 2835 return;
984263bc
MD
2836
2837 /* filter for broadcast/multicast only
2838 */
2839 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2840 return;
2841 }
2842
2843#ifdef SIGDEBUG
1c70eebf
JS
2844 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2845 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2846#endif
2847
984263bc
MD
2848 /* do a linear search for a matching MAC address
2849 * in the cache table
2850 * . MAC address is 6 bytes,
2851 * . var w_nextitem holds total number of entries already cached
2852 */
2853 for (i = 0; i < sc->an_nextitem; i++) {
2854 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2855 /* Match!,
2856 * so we already have this entry,
2857 * update the data
2858 */
2859 break;
2860 }
2861 }
2862
2863 /* did we find a matching mac address?
2864 * if yes, then overwrite a previously existing cache entry
2865 */
2866 if (i < sc->an_nextitem ) {
2867 cache_slot = i;
2868 }
2869 /* else, have a new address entry,so
2870 * add this new entry,
2871 * if table full, then we need to replace LRU entry
2872 */
2873 else {
2874
2875 /* check for space in cache table
2876 * note: an_nextitem also holds number of entries
2877 * added in the cache table
2878 */
2879 if ( sc->an_nextitem < MAXANCACHE ) {
2880 cache_slot = sc->an_nextitem;
2881 sc->an_nextitem++;
2882 sc->an_sigitems = sc->an_nextitem;
2883 }
2884 /* no space found, so simply wrap anth wrap index
2885 * and "zap" the next entry
2886 */
2887 else {
2888 if (wrapindex == MAXANCACHE) {
2889 wrapindex = 0;
2890 }
2891 cache_slot = wrapindex++;
2892 }
2893 }
2894
2895 /* invariant: cache_slot now points at some slot
2896 * in cache.
2897 */
2898 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2899 log(LOG_ERR, "an_cache_store, bad index: %d of "
2900 "[0..%d], gross cache error\n",
2901 cache_slot, MAXANCACHE);
2902 return;
2903 }
2904
2905 /* store items in cache
2906 * .ip source address
2907 * .mac src
2908 * .signal, etc.
2909 */
3013ac0e 2910 if (ip != NULL) {
984263bc
MD
2911 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2912 }
2913 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2914
2915
2916 switch (an_cache_mode) {
2917 case DBM:
2918 if (sc->an_have_rssimap) {
2919 sc->an_sigcache[cache_slot].signal =
2920 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2921 sc->an_sigcache[cache_slot].quality =
2922 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2923 } else {
2924 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2925 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2926 }
2927 break;
2928 case PERCENT:
2929 if (sc->an_have_rssimap) {
2930 sc->an_sigcache[cache_slot].signal =
2931 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2932 sc->an_sigcache[cache_slot].quality =
2933 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2934 } else {
2935 if (rx_rssi > 100)
2936 rx_rssi = 100;
2937 if (rx_quality > 100)
2938 rx_quality = 100;
2939 sc->an_sigcache[cache_slot].signal = rx_rssi;
2940 sc->an_sigcache[cache_slot].quality = rx_quality;
2941 }
2942 break;
2943 case RAW:
2944 sc->an_sigcache[cache_slot].signal = rx_rssi;
2945 sc->an_sigcache[cache_slot].quality = rx_quality;
2946 break;
2947 }
2948
2949 sc->an_sigcache[cache_slot].noise = 0;
2950
2951 return;
2952}
2953#endif
2954
2955static int
2956an_media_change(ifp)
2957 struct ifnet *ifp;
2958{
2959 struct an_softc *sc = ifp->if_softc;
2960 struct an_ltv_genconfig *cfg;
2961 int otype = sc->an_config.an_opmode;
2962 int orate = sc->an_tx_rate;
2963
2964 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
2965 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
2966 else
2967 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
2968
2969 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
2970 case IFM_IEEE80211_DS1:
2971 sc->an_tx_rate = AN_RATE_1MBPS;
2972 break;
2973 case IFM_IEEE80211_DS2:
2974 sc->an_tx_rate = AN_RATE_2MBPS;
2975 break;
2976 case IFM_IEEE80211_DS5:
2977 sc->an_tx_rate = AN_RATE_5_5MBPS;
2978 break;
2979 case IFM_IEEE80211_DS11:
2980 sc->an_tx_rate = AN_RATE_11MBPS;
2981 break;
2982 case IFM_AUTO:
2983 sc->an_tx_rate = 0;
2984 break;
2985 }
2986
2987 if (orate != sc->an_tx_rate) {
2988 /* Read the current configuration */
2989 sc->an_config.an_type = AN_RID_GENCONFIG;
2990 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2991 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
2992 cfg = &sc->an_config;
2993
2994 /* clear other rates and set the only one we want */
2995 bzero(cfg->an_rates, sizeof(cfg->an_rates));
2996 cfg->an_rates[0] = sc->an_tx_rate;
2997
2998 /* Save the new rate */
2999 sc->an_config.an_type = AN_RID_GENCONFIG;
3000 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3001 }
3002
3003 if (otype != sc->an_config.an_opmode ||
3004 orate != sc->an_tx_rate)
3005 an_init(sc);
3006
3007 return(0);
3008}
3009
3010static void
3011an_media_status(ifp, imr)
3012 struct ifnet *ifp;
3013 struct ifmediareq *imr;
3014{
3015 struct an_ltv_status status;
3016 struct an_softc *sc = ifp->if_softc;
3017
3018 status.an_len = sizeof(status);
3019 status.an_type = AN_RID_STATUS;
3020 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3021 /* If the status read fails, just lie. */
3022 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3023 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3024 }
3025
3026 if (sc->an_tx_rate == 0) {
3027 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3028 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3029 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3030 switch (status.an_current_tx_rate) {
3031 case AN_RATE_1MBPS:
3032 imr->ifm_active |= IFM_IEEE80211_DS1;
3033 break;
3034 case AN_RATE_2MBPS:
3035 imr->ifm_active |= IFM_IEEE80211_DS2;
3036 break;
3037 case AN_RATE_5_5MBPS:
3038 imr->ifm_active |= IFM_IEEE80211_DS5;
3039 break;
3040 case AN_RATE_11MBPS:
3041 imr->ifm_active |= IFM_IEEE80211_DS11;
3042 break;
3043 }
3044 } else {
3045 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3046 }
3047
3048 imr->ifm_status = IFM_AVALID;
3049 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3050 imr->ifm_status |= IFM_ACTIVE;
3051}
3052
3053/********************** Cisco utility support routines *************/
3054
3055/*
3056 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3057 * Linux driver
3058 */
3059
3060static int
3061readrids(ifp, l_ioctl)
3062 struct ifnet *ifp;
3063 struct aironet_ioctl *l_ioctl;
3064{
3065 unsigned short rid;
3066 struct an_softc *sc;
3067
3068 switch (l_ioctl->command) {
3069 case AIROGCAP:
3070 rid = AN_RID_CAPABILITIES;
3071 break;
3072 case AIROGCFG:
3073 rid = AN_RID_GENCONFIG;
3074 break;
3075 case AIROGSLIST:
3076 rid = AN_RID_SSIDLIST;
3077 break;
3078 case AIROGVLIST:
3079 rid = AN_RID_APLIST;
3080 break;
3081 case AIROGDRVNAM:
3082 rid = AN_RID_DRVNAME;
3083 break;
3084 case AIROGEHTENC:
3085 rid = AN_RID_ENCAPPROTO;
3086 break;
3087 case AIROGWEPKTMP:
3088 rid = AN_RID_WEP_TEMP;
3089 break;
3090 case AIROGWEPKNV:
3091 rid = AN_RID_WEP_PERM;
3092 break;
3093 case AIROGSTAT:
3094 rid = AN_RID_STATUS;
3095 break;
3096 case AIROGSTATSD32:
3097 rid = AN_RID_32BITS_DELTA;
3098 break;
3099 case AIROGSTATSC32:
3100 rid = AN_RID_32BITS_CUM;
3101 break;
3102 default:
3103 rid = 999;
3104 break;
3105 }
3106
3107 if (rid == 999) /* Is bad command */
3108 return -EINVAL;
3109
3110 sc = ifp->if_softc;
3111 sc->areq.an_len = AN_MAX_DATALEN;
3112 sc->areq.an_type = rid;
3113
3114 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3115
3116 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3117
3118 /* the data contains the length at first */
3119 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3120 sizeof(sc->areq.an_len))) {
3121 return -EFAULT;
3122 }
3123 /* Just copy the data back */
3124 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3125 l_ioctl->len)) {
3126 return -EFAULT;
3127 }
3128 return 0;
3129}
3130
3131static int
3132writerids(ifp, l_ioctl)
3133 struct ifnet *ifp;
3134 struct aironet_ioctl *l_ioctl;
3135{
3136 struct an_softc *sc;
3137 int rid, command;
3138
3139 sc = ifp->if_softc;
3140 rid = 0;
3141 command = l_ioctl->command;
3142
3143 switch (command) {
3144 case AIROPSIDS:
3145 rid = AN_RID_SSIDLIST;
3146 break;
3147 case AIROPCAP:
3148 rid = AN_RID_CAPABILITIES;
3149 break;
3150 case AIROPAPLIST:
3151 rid = AN_RID_APLIST;
3152 break;
3153 case AIROPCFG:
3154 rid = AN_RID_GENCONFIG;
3155 break;
3156 case AIROPMACON:
3157 an_cmd(sc, AN_CMD_ENABLE, 0);
3158 return 0;
3159 break;
3160 case AIROPMACOFF:
3161 an_cmd(sc, AN_CMD_DISABLE, 0);
3162 return 0;
3163 break;
3164 case AIROPSTCLR:
3165 /*
3166 * This command merely clears the counts does not actually
3167 * store any data only reads rid. But as it changes the cards
3168 * state, I put it in the writerid routines.
3169 */
3170
3171 rid = AN_RID_32BITS_DELTACLR;
3172 sc = ifp->if_softc;
3173 sc->areq.an_len = AN_MAX_DATALEN;
3174 sc->areq.an_type = rid;
3175
3176 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3177 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3178
3179 /* the data contains the length at first */
3180 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3181 sizeof(sc->areq.an_len))) {
3182 return -EFAULT;
3183 }
3184 /* Just copy the data */
3185 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3186 l_ioctl->len)) {
3187 return -EFAULT;
3188 }
3189 return 0;
3190 break;
3191 case AIROPWEPKEY:
3192 rid = AN_RID_WEP_TEMP;
3193 break;
3194 case AIROPWEPKEYNV:
3195 rid = AN_RID_WEP_PERM;
3196 break;
3197 case AIROPLEAPUSR:
3198 rid = AN_RID_LEAPUSERNAME;
3199 break;
3200 case AIROPLEAPPWD:
3201 rid = AN_RID_LEAPPASSWORD;
3202 break;
3203 default:
3204 return -EOPNOTSUPP;
3205 }
3206
3207 if (rid) {
3208 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3209 return -EINVAL;
3210 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3211 sc->areq.an_type = rid;
3212
3213 /* Just copy the data back */
3214 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3215 l_ioctl->len);
3216
3217 an_cmd(sc, AN_CMD_DISABLE, 0);
3218 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3219 an_cmd(sc, AN_CMD_ENABLE, 0);
3220 return 0;
3221 }
3222 return -EOPNOTSUPP;
3223}
3224
3225/*
3226 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3227 * Linux driver
3228 */
3229
377d4740 3230#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3231#define FLASH_COMMAND 0x7e7e
3232#define FLASH_SIZE 32 * 1024
3233
3234static int
3235unstickbusy(ifp)
3236 struct ifnet *ifp;
3237{
3238 struct an_softc *sc = ifp->if_softc;
3239
3240 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3241 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3242 AN_EV_CLR_STUCK_BUSY);
3243 return 1;
3244 }
3245 return 0;
3246}
3247
3248/*
3249 * Wait for busy completion from card wait for delay uSec's Return true for
3250 * success meaning command reg is clear
3251 */
3252
3253static int
3254WaitBusy(ifp, uSec)
3255 struct ifnet *ifp;
3256 int uSec;
3257{
3258 int statword = 0xffff;
3259 int delay = 0;
3260 struct an_softc *sc = ifp->if_softc;
3261
3262 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3263 FLASH_DELAY(10);
3264 delay += 10;
3265 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3266
3267 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3268 unstickbusy(ifp);
3269 }
3270 }
3271
3272 return 0 == (AN_CMD_BUSY & statword);
3273}
3274
3275/*
3276 * STEP 1) Disable MAC and do soft reset on card.
3277 */
3278
3279static int
3280cmdreset(ifp)
3281 struct ifnet *ifp;
3282{
3283 int status;
3284 struct an_softc *sc = ifp->if_softc;
3285
3286 an_stop(sc);
3287
3288 an_cmd(sc, AN_CMD_DISABLE, 0);
3289
3290 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3291 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3292 return -EBUSY;
3293 }
3294 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3295
3296 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3297
3298
3299 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3300 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3301 return -EBUSY;
3302 }
3303 return 0;
3304}
3305
3306/*
3307 * STEP 2) Put the card in legendary flash mode
3308 */
3309
3310static int
3311setflashmode(ifp)
3312 struct ifnet *ifp;
3313{
3314 int status;
3315 struct an_softc *sc = ifp->if_softc;
3316
3317 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3318 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3319 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3320 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3321
3322 /*
3323 * mdelay(500); // 500ms delay
3324 */
3325
3326 FLASH_DELAY(500);
3327
3328 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3329 printf("Waitbusy hang after setflash mode\n");
3330 return -EIO;
3331 }
3332 return 0;
3333}
3334
3335/*
3336 * Get a character from the card matching matchbyte Step 3)
3337 */
3338
3339static int
3340flashgchar(ifp, matchbyte, dwelltime)
3341 struct ifnet *ifp;
3342 int matchbyte;
3343 int dwelltime;
3344{
3345 int rchar;
3346 unsigned char rbyte = 0;
3347 int success = -1;
3348 struct an_softc *sc = ifp->if_softc;
3349
3350
3351 do {
3352 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3353
3354 if (dwelltime && !(0x8000 & rchar)) {
3355 dwelltime -= 10;
3356 FLASH_DELAY(10);
3357 continue;
3358 }
3359 rbyte = 0xff & rchar;
3360
3361 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3362 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3363 success = 1;
3364 break;
3365 }
3366 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3367 break;
3368 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3369
3370 } while (dwelltime > 0);
3371 return success;
3372}
3373
3374/*
3375 * Put character to SWS0 wait for dwelltime x 50us for echo .
3376 */
3377
3378static int
3379flashpchar(ifp, byte, dwelltime)
3380 struct ifnet *ifp;
3381 int byte;
3382 int dwelltime;
3383{
3384 int echo;
3385 int pollbusy, waittime;
3386 struct an_softc *sc = ifp->if_softc;
3387
3388 byte |= 0x8000;
3389
3390 if (dwelltime == 0)
3391 dwelltime = 200;
3392
3393 waittime = dwelltime;
3394
3395 /*
3396 * Wait for busy bit d15 to go false indicating buffer empty
3397 */
3398 do {
3399 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3400
3401 if (pollbusy & 0x8000) {
3402 FLASH_DELAY(50);
3403 waittime -= 50;
3404 continue;
3405 } else
3406 break;
3407 }
3408 while (waittime >= 0);
3409
3410 /* timeout for busy clear wait */
3411
3412 if (waittime <= 0) {
1c70eebf 3413 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3414 return -1;
3415 }
3416 /*
3417 * Port is clear now write byte and wait for it to echo back
3418 */
3419 do {
3420 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3421 FLASH_DELAY(50);
3422 dwelltime -= 50;
3423 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3424 } while (dwelltime >= 0 && echo != byte);
3425
3426
3427 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3428
3429 return echo == byte;
3430}
3431
3432/*
3433 * Transfer 32k of firmware data from user buffer to our buffer and send to
3434 * the card
3435 */
3436
3437static int
3438flashputbuf(ifp)
3439 struct ifnet *ifp;
3440{
3441 unsigned short *bufp;
3442 int nwords;
3443 struct an_softc *sc = ifp->if_softc;
3444
3445 /* Write stuff */
3446
3447 bufp = sc->an_flash_buffer;
3448
3449 if (!sc->mpi350) {
3450 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3451 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3452
3453 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3454 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3455 }
3456 } else {
3457 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3458 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3459 ((u_int32_t *)bufp)[nwords] & 0xffff);
3460 }
3461 }
3462
3463 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3464
3465 return 0;
3466}
3467
3468/*
3469 * After flashing restart the card.
3470 */
3471
3472static int
3473flashrestart(ifp)
3474 struct ifnet *ifp;
3475{
3476 int status = 0;
3477 struct an_softc *sc = ifp->if_softc;
3478
3479 FLASH_DELAY(1024); /* Added 12/7/00 */
3480
3481 an_init(sc);
3482
3483 FLASH_DELAY(1024); /* Added 12/7/00 */
3484 return status;
3485}
3486
3487/*
3488 * Entry point for flash ioclt.
3489 */
3490
3491static int
3492flashcard(ifp, l_ioctl)
3493 struct ifnet *ifp;
3494 struct aironet_ioctl *l_ioctl;
3495{
3496 int z = 0, status;
3497 struct an_softc *sc;
3498
3499 sc = ifp->if_softc;
3500 if (sc->mpi350) {
1c70eebf 3501 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3502 return(-1);
3503 }
3504 status = l_ioctl->command;
3505
3506 switch (l_ioctl->command) {
3507 case AIROFLSHRST:
3508 return cmdreset(ifp);
3509 break;
3510 case AIROFLSHSTFL:
3511 if (sc->an_flash_buffer) {
3512 free(sc->an_flash_buffer, M_DEVBUF);
3513 sc->an_flash_buffer = NULL;
3514 }
3515 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3516 if (sc->an_flash_buffer)
3517 return setflashmode(ifp);
3518 else
3519 return ENOBUFS;
3520 break;
3521 case AIROFLSHGCHR: /* Get char from aux */
3522 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3523 z = *(int *)&sc->areq;
3524 if ((status = flashgchar(ifp, z, 8000)) == 1)
3525 return 0;
3526 else
3527 return -1;
3528 break;
3529 case AIROFLSHPCHR: /* Send char to card. */
3530 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3531 z = *(int *)&sc->areq;
3532 if ((status = flashpchar(ifp, z, 8000)) == -1)
3533 return -EIO;
3534 else
3535 return 0;
3536 break;
3537 case AIROFLPUTBUF: /* Send 32k to card */
3538 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3539 if_printf(ifp, "Buffer to big, %x %x\n",
3540 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3541 return -EINVAL;
3542 }
3543 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3544
3545 if ((status = flashputbuf(ifp)) != 0)
3546 return -EIO;
3547 else
3548 return 0;
3549 break;
3550 case AIRORESTART:
3551 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3552 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3553 return -EIO;
3554 } else
3555 return 0;
3556
3557 break;
3558 default:
3559 return -EINVAL;
3560 }
3561
3562 return -EINVAL;
3563}