kernel - Adjust tlb invalidation in the x86-64 pmap code
[dragonfly.git] / sys / platform / pc64 / x86_64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
48ffc236
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
701c977e 9 * Copyright (c) 2011 Matthew Dillon
d7f50089 10 * All rights reserved.
c8fe38ae
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11 *
12 * This code is derived from software contributed to Berkeley by
13 * the Systems Programming Group of the University of Utah Computer
14 * Science Department and William Jolitz of UUNET Technologies Inc.
15 *
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16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
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19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
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22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. All advertising materials mentioning features or use of this software
25 * must display the following acknowledgement:
26 * This product includes software developed by the University of
27 * California, Berkeley and its contributors.
28 * 4. Neither the name of the University nor the names of its contributors
29 * may be used to endorse or promote products derived from this software
30 * without specific prior written permission.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 42 * SUCH DAMAGE.
d7f50089
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43 */
44/*
90244566 45 * Manage physical address maps for x86-64 systems.
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46 */
47
48#if JG
49#include "opt_disable_pse.h"
50#include "opt_pmap.h"
51#endif
52#include "opt_msgbuf.h"
d7f50089 53
c8fe38ae 54#include <sys/param.h>
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55#include <sys/systm.h>
56#include <sys/kernel.h>
d7f50089 57#include <sys/proc.h>
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58#include <sys/msgbuf.h>
59#include <sys/vmmeter.h>
60#include <sys/mman.h>
d7f50089 61
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62#include <vm/vm.h>
63#include <vm/vm_param.h>
64#include <sys/sysctl.h>
65#include <sys/lock.h>
d7f50089 66#include <vm/vm_kern.h>
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67#include <vm/vm_page.h>
68#include <vm/vm_map.h>
d7f50089 69#include <vm/vm_object.h>
c8fe38ae 70#include <vm/vm_extern.h>
d7f50089 71#include <vm/vm_pageout.h>
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72#include <vm/vm_pager.h>
73#include <vm/vm_zone.h>
74
75#include <sys/user.h>
76#include <sys/thread2.h>
77#include <sys/sysref2.h>
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78#include <sys/spinlock2.h>
79#include <vm/vm_page2.h>
d7f50089 80
c8fe38ae 81#include <machine/cputypes.h>
d7f50089 82#include <machine/md_var.h>
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83#include <machine/specialreg.h>
84#include <machine/smp.h>
85#include <machine_base/apic/apicreg.h>
d7f50089 86#include <machine/globaldata.h>
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87#include <machine/pmap.h>
88#include <machine/pmap_inval.h>
7e9313e0 89#include <machine/inttypes.h>
c8fe38ae 90
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91#include <ddb/ddb.h>
92
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93#define PMAP_KEEP_PDIRS
94#ifndef PMAP_SHPGPERPROC
f1d3f422 95#define PMAP_SHPGPERPROC 2000
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96#endif
97
98#if defined(DIAGNOSTIC)
99#define PMAP_DIAGNOSTIC
100#endif
101
102#define MINPV 2048
103
c8fe38ae 104/*
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105 * pmap debugging will report who owns a pv lock when blocking.
106 */
107#ifdef PMAP_DEBUG
108
109#define PMAP_DEBUG_DECL ,const char *func, int lineno
110#define PMAP_DEBUG_ARGS , __func__, __LINE__
111#define PMAP_DEBUG_COPY , func, lineno
112
113#define pv_get(pmap, pindex) _pv_get(pmap, pindex \
114 PMAP_DEBUG_ARGS)
115#define pv_lock(pv) _pv_lock(pv \
116 PMAP_DEBUG_ARGS)
117#define pv_hold_try(pv) _pv_hold_try(pv \
118 PMAP_DEBUG_ARGS)
119#define pv_alloc(pmap, pindex, isnewp) _pv_alloc(pmap, pindex, isnewp \
120 PMAP_DEBUG_ARGS)
121
122#else
123
124#define PMAP_DEBUG_DECL
125#define PMAP_DEBUG_ARGS
126#define PMAP_DEBUG_COPY
127
128#define pv_get(pmap, pindex) _pv_get(pmap, pindex)
129#define pv_lock(pv) _pv_lock(pv)
130#define pv_hold_try(pv) _pv_hold_try(pv)
131#define pv_alloc(pmap, pindex, isnewp) _pv_alloc(pmap, pindex, isnewp)
132
133#endif
134
135/*
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136 * Get PDEs and PTEs for user/kernel address space
137 */
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138#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
139
140#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
141#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
142#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
143#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
144#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
145
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146/*
147 * Given a map and a machine independent protection code,
148 * convert to a vax protection code.
149 */
150#define pte_prot(m, p) \
151 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
152static int protection_codes[8];
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153
154struct pmap kernel_pmap;
c8fe38ae 155static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 156
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157vm_paddr_t avail_start; /* PA of first available physical page */
158vm_paddr_t avail_end; /* PA of last available physical page */
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159vm_offset_t virtual2_start; /* cutout free area prior to kernel start */
160vm_offset_t virtual2_end;
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161vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
162vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
163vm_offset_t KvaStart; /* VA start of KVA space */
164vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
165vm_offset_t KvaSize; /* max size of kernel virtual address space */
166static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
167static int pgeflag; /* PG_G or-in */
168static int pseflag; /* PG_PS or-in */
d7f50089 169
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170static int ndmpdp;
171static vm_paddr_t dmaplimit;
c8fe38ae 172static int nkpt;
791c6551 173vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
d7f50089 174
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175static uint64_t KPTbase;
176static uint64_t KPTphys;
48ffc236 177static uint64_t KPDphys; /* phys addr of kernel level 2 */
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178static uint64_t KPDbase; /* phys addr of kernel level 2 @ KERNBASE */
179uint64_t KPDPphys; /* phys addr of kernel level 3 */
180uint64_t KPML4phys; /* phys addr of kernel level 4 */
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181
182static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
183static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
184
d7f50089 185/*
c8fe38ae 186 * Data for the pv entry allocation mechanism
d7f50089 187 */
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188static vm_zone_t pvzone;
189static struct vm_zone pvzone_store;
190static struct vm_object pvzone_obj;
701c977e 191static int pv_entry_max=0, pv_entry_high_water=0;
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192static int pmap_pagedaemon_waken = 0;
193static struct pv_entry *pvinit;
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194
195/*
c8fe38ae 196 * All those kernel PT submaps that BSD is so fond of
d7f50089 197 */
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198pt_entry_t *CMAP1 = 0, *ptmmap;
199caddr_t CADDR1 = 0, ptvmmap = 0;
200static pt_entry_t *msgbufmap;
201struct msgbuf *msgbufp=0;
d7f50089 202
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203/*
204 * Crashdump maps.
d7f50089 205 */
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206static pt_entry_t *pt_crashdumpmap;
207static caddr_t crashdumpmap;
208
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209static int pmap_yield_count = 64;
210SYSCTL_INT(_machdep, OID_AUTO, pmap_yield_count, CTLFLAG_RW,
211 &pmap_yield_count, 0, "Yield during init_pt/release");
212
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213#define DISABLE_PSE
214
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215static void pv_hold(pv_entry_t pv);
216static int _pv_hold_try(pv_entry_t pv
217 PMAP_DEBUG_DECL);
218static void pv_drop(pv_entry_t pv);
219static void _pv_lock(pv_entry_t pv
220 PMAP_DEBUG_DECL);
221static void pv_unlock(pv_entry_t pv);
222static pv_entry_t _pv_alloc(pmap_t pmap, vm_pindex_t pindex, int *isnew
223 PMAP_DEBUG_DECL);
224static pv_entry_t _pv_get(pmap_t pmap, vm_pindex_t pindex
225 PMAP_DEBUG_DECL);
226static pv_entry_t pv_get_try(pmap_t pmap, vm_pindex_t pindex, int *errorp);
227static pv_entry_t pv_find(pmap_t pmap, vm_pindex_t pindex);
228static void pv_put(pv_entry_t pv);
229static void pv_free(pv_entry_t pv);
230static void *pv_pte_lookup(pv_entry_t pv, vm_pindex_t pindex);
231static pv_entry_t pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex,
232 pv_entry_t *pvpp);
233static void pmap_remove_pv_pte(pv_entry_t pv, pv_entry_t pvp,
234 struct pmap_inval_info *info);
52bb73bc 235static vm_page_t pmap_remove_pv_page(pv_entry_t pv);
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236
237static void pmap_remove_callback(pmap_t pmap, struct pmap_inval_info *info,
238 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
239 pt_entry_t *ptep, void *arg __unused);
240static void pmap_protect_callback(pmap_t pmap, struct pmap_inval_info *info,
241 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
242 pt_entry_t *ptep, void *arg __unused);
243
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244static void i386_protection_init (void);
245static void create_pagetables(vm_paddr_t *firstaddr);
246static void pmap_remove_all (vm_page_t m);
c8fe38ae 247static boolean_t pmap_testbit (vm_page_t m, int bit);
c8fe38ae 248
c8fe38ae 249static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
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250static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
251
252static unsigned pdir4mb;
d7f50089 253
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254static int
255pv_entry_compare(pv_entry_t pv1, pv_entry_t pv2)
256{
257 if (pv1->pv_pindex < pv2->pv_pindex)
258 return(-1);
259 if (pv1->pv_pindex > pv2->pv_pindex)
260 return(1);
261 return(0);
262}
263
264RB_GENERATE2(pv_entry_rb_tree, pv_entry, pv_entry,
265 pv_entry_compare, vm_pindex_t, pv_pindex);
266
d7f50089 267/*
c8fe38ae 268 * Move the kernel virtual free pointer to the next
f9cc0f15
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269 * 2MB. This is used to help improve performance
270 * by using a large (2MB) page for much of the kernel
c8fe38ae 271 * (.text, .data, .bss)
d7f50089 272 */
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273static
274vm_offset_t
c8fe38ae 275pmap_kmem_choose(vm_offset_t addr)
d7f50089 276{
c8fe38ae 277 vm_offset_t newaddr = addr;
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278
279 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 280 return newaddr;
d7f50089
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281}
282
d7f50089 283/*
c8fe38ae 284 * pmap_pte_quick:
d7f50089 285 *
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286 * Super fast pmap_pte routine best used when scanning the pv lists.
287 * This eliminates many course-grained invltlb calls. Note that many of
288 * the pv list scans are across different pmaps and it is very wasteful
289 * to do an entire invltlb when checking a single mapping.
c8fe38ae 290 */
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291static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
292
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293static
294pt_entry_t *
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295pmap_pte_quick(pmap_t pmap, vm_offset_t va)
296{
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297 return pmap_pte(pmap, va);
298}
299
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300/*
301 * Returns the pindex of a page table entry (representing a terminal page).
302 * There are NUPTE_TOTAL page table entries possible (a huge number)
303 *
304 * x86-64 has a 48-bit address space, where bit 47 is sign-extended out.
305 * We want to properly translate negative KVAs.
306 */
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307static __inline
308vm_pindex_t
701c977e 309pmap_pte_pindex(vm_offset_t va)
48ffc236 310{
701c977e 311 return ((va >> PAGE_SHIFT) & (NUPTE_TOTAL - 1));
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312}
313
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314/*
315 * Returns the pindex of a page table.
316 */
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317static __inline
318vm_pindex_t
701c977e 319pmap_pt_pindex(vm_offset_t va)
48ffc236 320{
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321 return (NUPTE_TOTAL + ((va >> PDRSHIFT) & (NUPT_TOTAL - 1)));
322}
48ffc236 323
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324/*
325 * Returns the pindex of a page directory.
326 */
327static __inline
328vm_pindex_t
329pmap_pd_pindex(vm_offset_t va)
330{
331 return (NUPTE_TOTAL + NUPT_TOTAL +
332 ((va >> PDPSHIFT) & (NUPD_TOTAL - 1)));
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333}
334
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335static __inline
336vm_pindex_t
701c977e 337pmap_pdp_pindex(vm_offset_t va)
48ffc236 338{
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339 return (NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL +
340 ((va >> PML4SHIFT) & (NUPDP_TOTAL - 1)));
341}
48ffc236 342
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343static __inline
344vm_pindex_t
345pmap_pml4_pindex(void)
346{
347 return (NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL + NUPDP_TOTAL);
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348}
349
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350/*
351 * Return various clipped indexes for a given VA
352 *
353 * Returns the index of a pte in a page table, representing a terminal
354 * page.
355 */
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356static __inline
357vm_pindex_t
701c977e 358pmap_pte_index(vm_offset_t va)
48ffc236 359{
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360 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
361}
48ffc236 362
701c977e
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363/*
364 * Returns the index of a pt in a page directory, representing a page
365 * table.
366 */
367static __inline
368vm_pindex_t
369pmap_pt_index(vm_offset_t va)
370{
371 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
48ffc236
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372}
373
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374/*
375 * Returns the index of a pd in a page directory page, representing a page
376 * directory.
377 */
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378static __inline
379vm_pindex_t
701c977e 380pmap_pd_index(vm_offset_t va)
48ffc236 381{
701c977e
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382 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
383}
48ffc236 384
701c977e
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385/*
386 * Returns the index of a pdp in the pml4 table, representing a page
387 * directory page.
388 */
389static __inline
390vm_pindex_t
391pmap_pdp_index(vm_offset_t va)
392{
48ffc236
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393 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
394}
395
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396/*
397 * Generic procedure to index a pte from a pt, pd, or pdp.
398 */
399static
400void *
401pv_pte_lookup(pv_entry_t pv, vm_pindex_t pindex)
402{
403 pt_entry_t *pte;
404
405 pte = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pv->pv_m));
406 return(&pte[pindex]);
407}
408
409/*
410 * Return pointer to PDP slot in the PML4
411 */
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412static __inline
413pml4_entry_t *
701c977e 414pmap_pdp(pmap_t pmap, vm_offset_t va)
48ffc236 415{
701c977e 416 return (&pmap->pm_pml4[pmap_pdp_index(va)]);
48ffc236
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417}
418
701c977e
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419/*
420 * Return pointer to PD slot in the PDP given a pointer to the PDP
421 */
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422static __inline
423pdp_entry_t *
701c977e 424pmap_pdp_to_pd(pml4_entry_t *pdp, vm_offset_t va)
48ffc236 425{
701c977e 426 pdp_entry_t *pd;
48ffc236 427
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428 pd = (pdp_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
429 return (&pd[pmap_pd_index(va)]);
48ffc236
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430}
431
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432/*
433 * Return pointer to PD slot in the PDP
434 **/
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435static __inline
436pdp_entry_t *
701c977e 437pmap_pd(pmap_t pmap, vm_offset_t va)
48ffc236 438{
701c977e 439 pml4_entry_t *pdp;
48ffc236 440
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441 pdp = pmap_pdp(pmap, va);
442 if ((*pdp & PG_V) == 0)
48ffc236 443 return NULL;
701c977e 444 return (pmap_pdp_to_pd(pdp, va));
48ffc236
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445}
446
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447/*
448 * Return pointer to PT slot in the PD given a pointer to the PD
449 */
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450static __inline
451pd_entry_t *
701c977e 452pmap_pd_to_pt(pdp_entry_t *pd, vm_offset_t va)
48ffc236 453{
701c977e 454 pd_entry_t *pt;
48ffc236 455
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456 pt = (pd_entry_t *)PHYS_TO_DMAP(*pd & PG_FRAME);
457 return (&pt[pmap_pt_index(va)]);
48ffc236
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458}
459
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460/*
461 * Return pointer to PT slot in the PD
462 */
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463static __inline
464pd_entry_t *
701c977e 465pmap_pt(pmap_t pmap, vm_offset_t va)
48ffc236 466{
701c977e 467 pdp_entry_t *pd;
48ffc236 468
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469 pd = pmap_pd(pmap, va);
470 if (pd == NULL || (*pd & PG_V) == 0)
48ffc236 471 return NULL;
701c977e 472 return (pmap_pd_to_pt(pd, va));
48ffc236
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473}
474
701c977e
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475/*
476 * Return pointer to PTE slot in the PT given a pointer to the PT
477 */
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478static __inline
479pt_entry_t *
701c977e 480pmap_pt_to_pte(pd_entry_t *pt, vm_offset_t va)
48ffc236
JG
481{
482 pt_entry_t *pte;
483
701c977e 484 pte = (pt_entry_t *)PHYS_TO_DMAP(*pt & PG_FRAME);
48ffc236
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485 return (&pte[pmap_pte_index(va)]);
486}
487
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488/*
489 * Return pointer to PTE slot in the PT
490 */
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491static __inline
492pt_entry_t *
48ffc236 493pmap_pte(pmap_t pmap, vm_offset_t va)
48ffc236 494{
701c977e 495 pd_entry_t *pt;
48ffc236 496
701c977e
MD
497 pt = pmap_pt(pmap, va);
498 if (pt == NULL || (*pt & PG_V) == 0)
499 return NULL;
500 if ((*pt & PG_PS) != 0)
501 return ((pt_entry_t *)pt);
502 return (pmap_pt_to_pte(pt, va));
48ffc236
JG
503}
504
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505/*
506 * Of all the layers (PTE, PT, PD, PDP, PML4) the best one to cache is
507 * the PT layer. This will speed up core pmap operations considerably.
508 */
bfc09ba0 509static __inline
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510void
511pv_cache(pv_entry_t pv, vm_pindex_t pindex)
48ffc236 512{
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513 if (pindex >= pmap_pt_pindex(0) && pindex <= pmap_pd_pindex(0))
514 pv->pv_pmap->pm_pvhint = pv;
c8fe38ae 515}
d7f50089 516
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517
518/*
519 * KVM - return address of PT slot in PD
520 */
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521static __inline
522pd_entry_t *
701c977e 523vtopt(vm_offset_t va)
48ffc236 524{
b12defdc
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525 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT +
526 NPML4EPGSHIFT)) - 1);
48ffc236
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527
528 return (PDmap + ((va >> PDRSHIFT) & mask));
529}
c8fe38ae 530
701c977e
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531/*
532 * KVM - return address of PTE slot in PT
533 */
534static __inline
535pt_entry_t *
536vtopte(vm_offset_t va)
537{
538 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT +
539 NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
540
541 return (PTmap + ((va >> PAGE_SHIFT) & mask));
542}
543
48ffc236 544static uint64_t
8e5ea5f7 545allocpages(vm_paddr_t *firstaddr, long n)
d7f50089 546{
48ffc236 547 uint64_t ret;
c8fe38ae
MD
548
549 ret = *firstaddr;
550 bzero((void *)ret, n * PAGE_SIZE);
551 *firstaddr += n * PAGE_SIZE;
552 return (ret);
d7f50089
YY
553}
554
bfc09ba0 555static
c8fe38ae
MD
556void
557create_pagetables(vm_paddr_t *firstaddr)
558{
8e5ea5f7 559 long i; /* must be 64 bits */
da23a592
MD
560 long nkpt_base;
561 long nkpt_phys;
33fb3ba1 562 int j;
c8fe38ae 563
ad54aa11
MD
564 /*
565 * We are running (mostly) V=P at this point
566 *
567 * Calculate NKPT - number of kernel page tables. We have to
568 * accomodoate prealloction of the vm_page_array, dump bitmap,
569 * MSGBUF_SIZE, and other stuff. Be generous.
570 *
571 * Maxmem is in pages.
33fb3ba1
MD
572 *
573 * ndmpdp is the number of 1GB pages we wish to map.
ad54aa11 574 */
86dae8f1
MD
575 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
576 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
577 ndmpdp = 4;
33fb3ba1 578 KKASSERT(ndmpdp <= NKPDPE * NPDEPG);
86dae8f1 579
da23a592
MD
580 /*
581 * Starting at the beginning of kvm (not KERNBASE).
582 */
583 nkpt_phys = (Maxmem * sizeof(struct vm_page) + NBPDR - 1) / NBPDR;
584 nkpt_phys += (Maxmem * sizeof(struct pv_entry) + NBPDR - 1) / NBPDR;
33fb3ba1
MD
585 nkpt_phys += ((nkpt + nkpt + 1 + NKPML4E + NKPDPE + NDMPML4E +
586 ndmpdp) + 511) / 512;
da23a592
MD
587 nkpt_phys += 128;
588
589 /*
590 * Starting at KERNBASE - map 2G worth of page table pages.
591 * KERNBASE is offset -2G from the end of kvm.
592 */
593 nkpt_base = (NPDPEPG - KPDPI) * NPTEPG; /* typically 2 x 512 */
c8fe38ae 594
ad54aa11
MD
595 /*
596 * Allocate pages
597 */
da23a592
MD
598 KPTbase = allocpages(firstaddr, nkpt_base);
599 KPTphys = allocpages(firstaddr, nkpt_phys);
48ffc236
JG
600 KPML4phys = allocpages(firstaddr, 1);
601 KPDPphys = allocpages(firstaddr, NKPML4E);
da23a592 602 KPDphys = allocpages(firstaddr, NKPDPE);
791c6551
MD
603
604 /*
605 * Calculate the page directory base for KERNBASE,
606 * that is where we start populating the page table pages.
607 * Basically this is the end - 2.
608 */
791c6551 609 KPDbase = KPDphys + ((NKPDPE - (NPDPEPG - KPDPI)) << PAGE_SHIFT);
48ffc236 610
48ffc236
JG
611 DMPDPphys = allocpages(firstaddr, NDMPML4E);
612 if ((amd_feature & AMDID_PAGE1GB) == 0)
613 DMPDphys = allocpages(firstaddr, ndmpdp);
614 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
615
791c6551
MD
616 /*
617 * Fill in the underlying page table pages for the area around
618 * KERNBASE. This remaps low physical memory to KERNBASE.
619 *
620 * Read-only from zero to physfree
621 * XXX not fully used, underneath 2M pages
622 */
48ffc236 623 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
791c6551
MD
624 ((pt_entry_t *)KPTbase)[i] = i << PAGE_SHIFT;
625 ((pt_entry_t *)KPTbase)[i] |= PG_RW | PG_V | PG_G;
48ffc236
JG
626 }
627
791c6551
MD
628 /*
629 * Now map the initial kernel page tables. One block of page
630 * tables is placed at the beginning of kernel virtual memory,
631 * and another block is placed at KERNBASE to map the kernel binary,
632 * data, bss, and initial pre-allocations.
633 */
da23a592 634 for (i = 0; i < nkpt_base; i++) {
791c6551
MD
635 ((pd_entry_t *)KPDbase)[i] = KPTbase + (i << PAGE_SHIFT);
636 ((pd_entry_t *)KPDbase)[i] |= PG_RW | PG_V;
637 }
da23a592 638 for (i = 0; i < nkpt_phys; i++) {
48ffc236
JG
639 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
640 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
641 }
642
791c6551
MD
643 /*
644 * Map from zero to end of allocations using 2M pages as an
645 * optimization. This will bypass some of the KPTBase pages
646 * above in the KERNBASE area.
647 */
48ffc236 648 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
791c6551
MD
649 ((pd_entry_t *)KPDbase)[i] = i << PDRSHIFT;
650 ((pd_entry_t *)KPDbase)[i] |= PG_RW | PG_V | PG_PS | PG_G;
48ffc236
JG
651 }
652
791c6551
MD
653 /*
654 * And connect up the PD to the PDP. The kernel pmap is expected
655 * to pre-populate all of its PDs. See NKPDPE in vmparam.h.
656 */
48ffc236 657 for (i = 0; i < NKPDPE; i++) {
791c6551
MD
658 ((pdp_entry_t *)KPDPphys)[NPDPEPG - NKPDPE + i] =
659 KPDphys + (i << PAGE_SHIFT);
660 ((pdp_entry_t *)KPDPphys)[NPDPEPG - NKPDPE + i] |=
661 PG_RW | PG_V | PG_U;
48ffc236
JG
662 }
663
33fb3ba1
MD
664 /*
665 * Now set up the direct map space using either 2MB or 1GB pages
666 * Preset PG_M and PG_A because demotion expects it.
667 *
668 * When filling in entries in the PD pages make sure any excess
669 * entries are set to zero as we allocated enough PD pages
670 */
48ffc236
JG
671 if ((amd_feature & AMDID_PAGE1GB) == 0) {
672 for (i = 0; i < NPDEPG * ndmpdp; i++) {
8e5ea5f7 673 ((pd_entry_t *)DMPDphys)[i] = i << PDRSHIFT;
48ffc236 674 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
33fb3ba1 675 PG_G | PG_M | PG_A;
48ffc236 676 }
33fb3ba1
MD
677
678 /*
679 * And the direct map space's PDP
680 */
48ffc236
JG
681 for (i = 0; i < ndmpdp; i++) {
682 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
33fb3ba1 683 (i << PAGE_SHIFT);
48ffc236
JG
684 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
685 }
686 } else {
687 for (i = 0; i < ndmpdp; i++) {
688 ((pdp_entry_t *)DMPDPphys)[i] =
33fb3ba1 689 (vm_paddr_t)i << PDPSHIFT;
48ffc236 690 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
33fb3ba1 691 PG_G | PG_M | PG_A;
48ffc236
JG
692 }
693 }
694
695 /* And recursively map PML4 to itself in order to get PTmap */
696 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
697 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
698
33fb3ba1
MD
699 /*
700 * Connect the Direct Map slots up to the PML4
701 */
702 for (j = 0; j < NDMPML4E; ++j) {
703 ((pdp_entry_t *)KPML4phys)[DMPML4I + j] =
704 (DMPDPphys + ((vm_paddr_t)j << PML4SHIFT)) |
705 PG_RW | PG_V | PG_U;
706 }
48ffc236 707
33fb3ba1
MD
708 /*
709 * Connect the KVA slot up to the PML4
710 */
48ffc236
JG
711 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
712 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
c8fe38ae
MD
713}
714
d7f50089 715/*
c8fe38ae
MD
716 * Bootstrap the system enough to run with virtual memory.
717 *
718 * On the i386 this is called after mapping has already been enabled
719 * and just syncs the pmap module with what has already been done.
720 * [We can't call it easily with mapping off since the kernel is not
721 * mapped with PA == VA, hence we would have to relocate every address
722 * from the linked base (virtual) address "KERNBASE" to the actual
723 * (physical) address starting relative to 0]
d7f50089
YY
724 */
725void
48ffc236 726pmap_bootstrap(vm_paddr_t *firstaddr)
c8fe38ae
MD
727{
728 vm_offset_t va;
729 pt_entry_t *pte;
730 struct mdglobaldata *gd;
c8fe38ae
MD
731 int pg;
732
48ffc236
JG
733 KvaStart = VM_MIN_KERNEL_ADDRESS;
734 KvaEnd = VM_MAX_KERNEL_ADDRESS;
735 KvaSize = KvaEnd - KvaStart;
736
c8fe38ae
MD
737 avail_start = *firstaddr;
738
739 /*
48ffc236 740 * Create an initial set of page tables to run the kernel in.
c8fe38ae 741 */
48ffc236
JG
742 create_pagetables(firstaddr);
743
791c6551
MD
744 virtual2_start = KvaStart;
745 virtual2_end = PTOV_OFFSET;
746
c8fe38ae
MD
747 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
748 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
749
750 virtual_end = VM_MAX_KERNEL_ADDRESS;
751
752 /* XXX do %cr0 as well */
753 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
754 load_cr3(KPML4phys);
c8fe38ae
MD
755
756 /*
757 * Initialize protection array.
758 */
759 i386_protection_init();
760
761 /*
762 * The kernel's pmap is statically allocated so we don't have to use
763 * pmap_create, which is unlikely to work correctly at this part of
764 * the boot sequence (XXX and which no longer exists).
765 */
48ffc236 766 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae 767 kernel_pmap.pm_count = 1;
c2fb025d 768 kernel_pmap.pm_active = (cpumask_t)-1 & ~CPUMASK_LOCK;
701c977e 769 RB_INIT(&kernel_pmap.pm_pvroot);
b12defdc
MD
770 spin_init(&kernel_pmap.pm_spin);
771 lwkt_token_init(&kernel_pmap.pm_token, "kpmap_tok");
c8fe38ae
MD
772
773 /*
774 * Reserve some special page table entries/VA space for temporary
775 * mapping of pages.
776 */
777#define SYSMAP(c, p, v, n) \
778 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
779
780 va = virtual_start;
48ffc236 781 pte = vtopte(va);
c8fe38ae
MD
782
783 /*
784 * CMAP1/CMAP2 are used for zeroing and copying pages.
785 */
786 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
787
788 /*
789 * Crashdump maps.
790 */
791 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
792
793 /*
794 * ptvmmap is used for reading arbitrary physical pages via
795 * /dev/mem.
796 */
797 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
798
799 /*
800 * msgbufp is used to map the system message buffer.
801 * XXX msgbufmap is not used.
802 */
803 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
804 atop(round_page(MSGBUF_SIZE)))
805
806 virtual_start = va;
807
808 *CMAP1 = 0;
c8fe38ae
MD
809
810 /*
811 * PG_G is terribly broken on SMP because we IPI invltlb's in some
812 * cases rather then invl1pg. Actually, I don't even know why it
813 * works under UP because self-referential page table mappings
814 */
815#ifdef SMP
816 pgeflag = 0;
817#else
818 if (cpu_feature & CPUID_PGE)
819 pgeflag = PG_G;
820#endif
821
822/*
823 * Initialize the 4MB page size flag
824 */
825 pseflag = 0;
826/*
827 * The 4MB page version of the initial
828 * kernel page mapping.
829 */
830 pdir4mb = 0;
831
832#if !defined(DISABLE_PSE)
833 if (cpu_feature & CPUID_PSE) {
834 pt_entry_t ptditmp;
835 /*
836 * Note that we have enabled PSE mode
837 */
838 pseflag = PG_PS;
b2b3ffcd 839 ptditmp = *(PTmap + x86_64_btop(KERNBASE));
c8fe38ae
MD
840 ptditmp &= ~(NBPDR - 1);
841 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
842 pdir4mb = ptditmp;
843
844#ifndef SMP
845 /*
846 * Enable the PSE mode. If we are SMP we can't do this
847 * now because the APs will not be able to use it when
848 * they boot up.
849 */
850 load_cr4(rcr4() | CR4_PSE);
851
852 /*
853 * We can do the mapping here for the single processor
854 * case. We simply ignore the old page table page from
855 * now on.
856 */
857 /*
858 * For SMP, we still need 4K pages to bootstrap APs,
859 * PSE will be enabled as soon as all APs are up.
860 */
861 PTD[KPTDI] = (pd_entry_t)ptditmp;
c8fe38ae
MD
862 cpu_invltlb();
863#endif
864 }
865#endif
c8fe38ae
MD
866
867 /*
868 * We need to finish setting up the globaldata page for the BSP.
869 * locore has already populated the page table for the mdglobaldata
870 * portion.
871 */
872 pg = MDGLOBALDATA_BASEALLOC_PAGES;
873 gd = &CPU_prvspace[0].mdglobaldata;
c8fe38ae
MD
874
875 cpu_invltlb();
d7f50089
YY
876}
877
c8fe38ae 878#ifdef SMP
d7f50089 879/*
c8fe38ae 880 * Set 4mb pdir for mp startup
d7f50089
YY
881 */
882void
c8fe38ae
MD
883pmap_set_opt(void)
884{
885 if (pseflag && (cpu_feature & CPUID_PSE)) {
886 load_cr4(rcr4() | CR4_PSE);
887 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
c8fe38ae
MD
888 cpu_invltlb();
889 }
890 }
d7f50089 891}
c8fe38ae 892#endif
d7f50089 893
c8fe38ae
MD
894/*
895 * Initialize the pmap module.
896 * Called by vm_init, to initialize any structures that the pmap
897 * system needs to map virtual memory.
898 * pmap_init has been enhanced to support in a fairly consistant
899 * way, discontiguous physical memory.
d7f50089
YY
900 */
901void
c8fe38ae 902pmap_init(void)
d7f50089 903{
c8fe38ae
MD
904 int i;
905 int initial_pvs;
906
907 /*
c8fe38ae
MD
908 * Allocate memory for random pmap data structures. Includes the
909 * pv_head_table.
910 */
911
701c977e 912 for (i = 0; i < vm_page_array_size; i++) {
c8fe38ae
MD
913 vm_page_t m;
914
915 m = &vm_page_array[i];
916 TAILQ_INIT(&m->md.pv_list);
c8fe38ae
MD
917 }
918
919 /*
920 * init the pv free list
921 */
922 initial_pvs = vm_page_array_size;
923 if (initial_pvs < MINPV)
924 initial_pvs = MINPV;
925 pvzone = &pvzone_store;
948209ce
MD
926 pvinit = (void *)kmem_alloc(&kernel_map,
927 initial_pvs * sizeof (struct pv_entry));
928 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry),
929 pvinit, initial_pvs);
c8fe38ae
MD
930
931 /*
932 * Now it is safe to enable pv_table recording.
933 */
934 pmap_initialized = TRUE;
d7f50089
YY
935}
936
c8fe38ae
MD
937/*
938 * Initialize the address space (zone) for the pv_entries. Set a
939 * high water mark so that the system can recover from excessive
940 * numbers of pv entries.
941 */
d7f50089 942void
c8fe38ae 943pmap_init2(void)
d7f50089 944{
c8fe38ae 945 int shpgperproc = PMAP_SHPGPERPROC;
948209ce 946 int entry_max;
c8fe38ae
MD
947
948 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
949 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
950 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
951 pv_entry_high_water = 9 * (pv_entry_max / 10);
948209ce
MD
952
953 /*
954 * Subtract out pages already installed in the zone (hack)
955 */
956 entry_max = pv_entry_max - vm_page_array_size;
957 if (entry_max <= 0)
958 entry_max = 1;
959
960 zinitna(pvzone, &pvzone_obj, NULL, 0, entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
961}
962
c8fe38ae
MD
963
964/***************************************************
965 * Low level helper routines.....
966 ***************************************************/
967
968#if defined(PMAP_DIAGNOSTIC)
d7f50089
YY
969
970/*
c8fe38ae
MD
971 * This code checks for non-writeable/modified pages.
972 * This should be an invalid condition.
d7f50089 973 */
bfc09ba0
MD
974static
975int
48ffc236 976pmap_nw_modified(pt_entry_t pte)
d7f50089 977{
c8fe38ae
MD
978 if ((pte & (PG_M|PG_RW)) == PG_M)
979 return 1;
980 else
981 return 0;
d7f50089 982}
c8fe38ae
MD
983#endif
984
d7f50089 985
c8fe38ae
MD
986/*
987 * this routine defines the region(s) of memory that should
988 * not be tested for the modified bit.
989 */
bfc09ba0
MD
990static __inline
991int
701c977e 992pmap_track_modified(vm_pindex_t pindex)
d7f50089 993{
701c977e 994 vm_offset_t va = (vm_offset_t)pindex << PAGE_SHIFT;
c8fe38ae
MD
995 if ((va < clean_sva) || (va >= clean_eva))
996 return 1;
997 else
998 return 0;
d7f50089
YY
999}
1000
d7f50089 1001/*
10d6182e 1002 * Extract the physical page address associated with the map/VA pair.
701c977e 1003 * The page must be wired for this to work reliably.
c8fe38ae 1004 *
701c977e
MD
1005 * XXX for the moment we're using pv_find() instead of pv_get(), as
1006 * callers might be expecting non-blocking operation.
d7f50089 1007 */
c8fe38ae
MD
1008vm_paddr_t
1009pmap_extract(pmap_t pmap, vm_offset_t va)
d7f50089 1010{
48ffc236 1011 vm_paddr_t rtval;
701c977e
MD
1012 pv_entry_t pt_pv;
1013 pt_entry_t *ptep;
c8fe38ae 1014
48ffc236 1015 rtval = 0;
701c977e
MD
1016 if (va >= VM_MAX_USER_ADDRESS) {
1017 /*
1018 * Kernel page directories might be direct-mapped and
1019 * there is typically no PV tracking of pte's
1020 */
1021 pd_entry_t *pt;
1022
1023 pt = pmap_pt(pmap, va);
1024 if (pt && (*pt & PG_V)) {
1025 if (*pt & PG_PS) {
1026 rtval = *pt & PG_PS_FRAME;
1027 rtval |= va & PDRMASK;
48ffc236 1028 } else {
701c977e
MD
1029 ptep = pmap_pt_to_pte(pt, va);
1030 if (*pt & PG_V) {
1031 rtval = *ptep & PG_FRAME;
1032 rtval |= va & PAGE_MASK;
1033 }
1034 }
1035 }
1036 } else {
1037 /*
1038 * User pages currently do not direct-map the page directory
1039 * and some pages might not used managed PVs. But all PT's
1040 * will have a PV.
1041 */
1042 pt_pv = pv_find(pmap, pmap_pt_pindex(va));
1043 if (pt_pv) {
1044 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
1045 if (*ptep & PG_V) {
1046 rtval = *ptep & PG_FRAME;
1047 rtval |= va & PAGE_MASK;
48ffc236 1048 }
701c977e 1049 pv_drop(pt_pv);
c8fe38ae 1050 }
c8fe38ae 1051 }
48ffc236
JG
1052 return rtval;
1053}
1054
1055/*
10d6182e 1056 * Extract the physical page address associated kernel virtual address.
48ffc236
JG
1057 */
1058vm_paddr_t
1059pmap_kextract(vm_offset_t va)
48ffc236 1060{
701c977e 1061 pd_entry_t pt; /* pt entry in pd */
48ffc236
JG
1062 vm_paddr_t pa;
1063
1064 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
1065 pa = DMAP_TO_PHYS(va);
1066 } else {
701c977e
MD
1067 pt = *vtopt(va);
1068 if (pt & PG_PS) {
1069 pa = (pt & PG_PS_FRAME) | (va & PDRMASK);
48ffc236
JG
1070 } else {
1071 /*
1072 * Beware of a concurrent promotion that changes the
1073 * PDE at this point! For example, vtopte() must not
1074 * be used to access the PTE because it would use the
1075 * new PDE. It is, however, safe to use the old PDE
1076 * because the page table page is preserved by the
1077 * promotion.
1078 */
701c977e 1079 pa = *pmap_pt_to_pte(&pt, va);
48ffc236
JG
1080 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
1081 }
1082 }
1083 return pa;
d7f50089
YY
1084}
1085
c8fe38ae
MD
1086/***************************************************
1087 * Low level mapping routines.....
1088 ***************************************************/
1089
d7f50089 1090/*
c8fe38ae
MD
1091 * Routine: pmap_kenter
1092 * Function:
1093 * Add a wired page to the KVA
1094 * NOTE! note that in order for the mapping to take effect -- you
1095 * should do an invltlb after doing the pmap_kenter().
d7f50089 1096 */
c8fe38ae 1097void
d7f50089
YY
1098pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1099{
c8fe38ae
MD
1100 pt_entry_t *pte;
1101 pt_entry_t npte;
1102 pmap_inval_info info;
1103
701c977e 1104 pmap_inval_init(&info); /* XXX remove */
c8fe38ae
MD
1105 npte = pa | PG_RW | PG_V | pgeflag;
1106 pte = vtopte(va);
701c977e 1107 pmap_inval_interlock(&info, &kernel_pmap, va); /* XXX remove */
c8fe38ae 1108 *pte = npte;
701c977e
MD
1109 pmap_inval_deinterlock(&info, &kernel_pmap); /* XXX remove */
1110 pmap_inval_done(&info); /* XXX remove */
d7f50089
YY
1111}
1112
1113/*
c8fe38ae
MD
1114 * Routine: pmap_kenter_quick
1115 * Function:
1116 * Similar to pmap_kenter(), except we only invalidate the
1117 * mapping on the current CPU.
d7f50089
YY
1118 */
1119void
c8fe38ae
MD
1120pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
1121{
1122 pt_entry_t *pte;
1123 pt_entry_t npte;
1124
1125 npte = pa | PG_RW | PG_V | pgeflag;
1126 pte = vtopte(va);
1127 *pte = npte;
1128 cpu_invlpg((void *)va);
1129}
1130
1131void
d7f50089
YY
1132pmap_kenter_sync(vm_offset_t va)
1133{
c8fe38ae
MD
1134 pmap_inval_info info;
1135
1136 pmap_inval_init(&info);
c2fb025d
MD
1137 pmap_inval_interlock(&info, &kernel_pmap, va);
1138 pmap_inval_deinterlock(&info, &kernel_pmap);
1139 pmap_inval_done(&info);
d7f50089
YY
1140}
1141
d7f50089
YY
1142void
1143pmap_kenter_sync_quick(vm_offset_t va)
1144{
c8fe38ae 1145 cpu_invlpg((void *)va);
d7f50089
YY
1146}
1147
d7f50089 1148/*
c8fe38ae 1149 * remove a page from the kernel pagetables
d7f50089
YY
1150 */
1151void
c8fe38ae 1152pmap_kremove(vm_offset_t va)
d7f50089 1153{
c8fe38ae
MD
1154 pt_entry_t *pte;
1155 pmap_inval_info info;
1156
1157 pmap_inval_init(&info);
1158 pte = vtopte(va);
c2fb025d 1159 pmap_inval_interlock(&info, &kernel_pmap, va);
52bb73bc 1160 (void)pte_load_clear(pte);
c2fb025d
MD
1161 pmap_inval_deinterlock(&info, &kernel_pmap);
1162 pmap_inval_done(&info);
c8fe38ae
MD
1163}
1164
1165void
1166pmap_kremove_quick(vm_offset_t va)
1167{
1168 pt_entry_t *pte;
1169 pte = vtopte(va);
52bb73bc 1170 (void)pte_load_clear(pte);
c8fe38ae 1171 cpu_invlpg((void *)va);
d7f50089
YY
1172}
1173
1174/*
c8fe38ae 1175 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
1176 */
1177void
c8fe38ae 1178pmap_kmodify_rw(vm_offset_t va)
d7f50089 1179{
701c977e 1180 atomic_set_long(vtopte(va), PG_RW);
c8fe38ae 1181 cpu_invlpg((void *)va);
d7f50089
YY
1182}
1183
c8fe38ae
MD
1184void
1185pmap_kmodify_nc(vm_offset_t va)
1186{
701c977e 1187 atomic_set_long(vtopte(va), PG_N);
c8fe38ae
MD
1188 cpu_invlpg((void *)va);
1189}
d7f50089
YY
1190
1191/*
ad54aa11
MD
1192 * Used to map a range of physical addresses into kernel virtual
1193 * address space during the low level boot, typically to map the
1194 * dump bitmap, message buffer, and vm_page_array.
c8fe38ae 1195 *
ad54aa11
MD
1196 * These mappings are typically made at some pointer after the end of the
1197 * kernel text+data.
1198 *
1199 * We could return PHYS_TO_DMAP(start) here and not allocate any
1200 * via (*virtp), but then kmem from userland and kernel dumps won't
1201 * have access to the related pointers.
d7f50089
YY
1202 */
1203vm_offset_t
8e5e6f1b 1204pmap_map(vm_offset_t *virtp, vm_paddr_t start, vm_paddr_t end, int prot)
d7f50089 1205{
ad54aa11
MD
1206 vm_offset_t va;
1207 vm_offset_t va_start;
1208
1209 /*return PHYS_TO_DMAP(start);*/
1210
1211 va_start = *virtp;
1212 va = va_start;
1213
1214 while (start < end) {
1215 pmap_kenter_quick(va, start);
1216 va += PAGE_SIZE;
1217 start += PAGE_SIZE;
1218 }
1219 *virtp = va;
1220 return va_start;
d7f50089
YY
1221}
1222
c8fe38ae 1223
d7f50089 1224/*
c8fe38ae
MD
1225 * Add a list of wired pages to the kva
1226 * this routine is only used for temporary
1227 * kernel mappings that do not need to have
1228 * page modification or references recorded.
1229 * Note that old mappings are simply written
1230 * over. The page *must* be wired.
d7f50089
YY
1231 */
1232void
c8fe38ae 1233pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
d7f50089 1234{
c8fe38ae
MD
1235 vm_offset_t end_va;
1236
1237 end_va = va + count * PAGE_SIZE;
1238
1239 while (va < end_va) {
1240 pt_entry_t *pte;
1241
1242 pte = vtopte(va);
1243 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1244 cpu_invlpg((void *)va);
1245 va += PAGE_SIZE;
1246 m++;
1247 }
7d4d6fdb 1248 smp_invltlb();
c8fe38ae
MD
1249}
1250
d7f50089 1251/*
7155fc7d 1252 * This routine jerks page mappings from the
c8fe38ae 1253 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1254 *
1255 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1256 */
c8fe38ae
MD
1257void
1258pmap_qremove(vm_offset_t va, int count)
d7f50089 1259{
c8fe38ae
MD
1260 vm_offset_t end_va;
1261
48ffc236 1262 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1263
1264 while (va < end_va) {
1265 pt_entry_t *pte;
1266
1267 pte = vtopte(va);
52bb73bc 1268 (void)pte_load_clear(pte);
c8fe38ae
MD
1269 cpu_invlpg((void *)va);
1270 va += PAGE_SIZE;
1271 }
c8fe38ae 1272 smp_invltlb();
d7f50089
YY
1273}
1274
1275/*
c8fe38ae
MD
1276 * Create a new thread and optionally associate it with a (new) process.
1277 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1278 */
1279void
c8fe38ae 1280pmap_init_thread(thread_t td)
d7f50089 1281{
d1368d1a 1282 /* enforce pcb placement & alignment */
c8fe38ae 1283 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
d1368d1a 1284 td->td_pcb = (struct pcb *)((intptr_t)td->td_pcb & ~(intptr_t)0xF);
c8fe38ae 1285 td->td_savefpu = &td->td_pcb->pcb_save;
d1368d1a 1286 td->td_sp = (char *)td->td_pcb; /* no -16 */
d7f50089
YY
1287}
1288
1289/*
c8fe38ae 1290 * This routine directly affects the fork perf for a process.
d7f50089
YY
1291 */
1292void
c8fe38ae 1293pmap_init_proc(struct proc *p)
d7f50089
YY
1294{
1295}
1296
1297/*
c8fe38ae
MD
1298 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1299 * it, and IdlePTD, represents the template used to update all other pmaps.
1300 *
1301 * On architectures where the kernel pmap is not integrated into the user
1302 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1303 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1304 */
1305void
c8fe38ae 1306pmap_pinit0(struct pmap *pmap)
d7f50089 1307{
48ffc236 1308 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1309 pmap->pm_count = 1;
1310 pmap->pm_active = 0;
701c977e
MD
1311 pmap->pm_pvhint = NULL;
1312 RB_INIT(&pmap->pm_pvroot);
b12defdc
MD
1313 spin_init(&pmap->pm_spin);
1314 lwkt_token_init(&pmap->pm_token, "pmap_tok");
c8fe38ae 1315 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1316}
1317
1318/*
c8fe38ae
MD
1319 * Initialize a preallocated and zeroed pmap structure,
1320 * such as one in a vmspace structure.
d7f50089
YY
1321 */
1322void
c8fe38ae 1323pmap_pinit(struct pmap *pmap)
d7f50089 1324{
701c977e 1325 pv_entry_t pv;
33fb3ba1 1326 int j;
701c977e
MD
1327
1328 /*
1329 * Misc initialization
1330 */
1331 pmap->pm_count = 1;
1332 pmap->pm_active = 0;
1333 pmap->pm_pvhint = NULL;
1334 if (pmap->pm_pmlpv == NULL) {
1335 RB_INIT(&pmap->pm_pvroot);
1336 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1337 spin_init(&pmap->pm_spin);
1338 lwkt_token_init(&pmap->pm_token, "pmap_tok");
1339 }
c8fe38ae
MD
1340
1341 /*
1342 * No need to allocate page table space yet but we do need a valid
1343 * page directory table.
1344 */
48ffc236
JG
1345 if (pmap->pm_pml4 == NULL) {
1346 pmap->pm_pml4 =
1347 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1348 }
1349
1350 /*
701c977e
MD
1351 * Allocate the page directory page, which wires it even though
1352 * it isn't being entered into some higher level page table (it
1353 * being the highest level). If one is already cached we don't
1354 * have to do anything.
c8fe38ae 1355 */
701c977e
MD
1356 if ((pv = pmap->pm_pmlpv) == NULL) {
1357 pv = pmap_allocpte(pmap, pmap_pml4_pindex(), NULL);
1358 pmap->pm_pmlpv = pv;
b12defdc 1359 pmap_kenter((vm_offset_t)pmap->pm_pml4,
701c977e
MD
1360 VM_PAGE_TO_PHYS(pv->pv_m));
1361 pv_put(pv);
33fb3ba1
MD
1362
1363 /*
1364 * Install DMAP and KMAP.
1365 */
1366 for (j = 0; j < NDMPML4E; ++j) {
1367 pmap->pm_pml4[DMPML4I + j] =
1368 (DMPDPphys + ((vm_paddr_t)j << PML4SHIFT)) |
1369 PG_RW | PG_V | PG_U;
1370 }
701c977e 1371 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
701c977e 1372
33fb3ba1
MD
1373 /*
1374 * install self-referential address mapping entry
1375 */
701c977e
MD
1376 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pv->pv_m) |
1377 PG_V | PG_RW | PG_A | PG_M;
1378 } else {
1379 KKASSERT(pv->pv_m->flags & PG_MAPPED);
1380 KKASSERT(pv->pv_m->flags & PG_WRITEABLE);
b12defdc 1381 }
d7f50089
YY
1382}
1383
1384/*
c8fe38ae
MD
1385 * Clean up a pmap structure so it can be physically freed. This routine
1386 * is called by the vmspace dtor function. A great deal of pmap data is
1387 * left passively mapped to improve vmspace management so we have a bit
1388 * of cleanup work to do here.
d7f50089
YY
1389 */
1390void
c8fe38ae 1391pmap_puninit(pmap_t pmap)
d7f50089 1392{
701c977e 1393 pv_entry_t pv;
c8fe38ae
MD
1394 vm_page_t p;
1395
1396 KKASSERT(pmap->pm_active == 0);
701c977e
MD
1397 if ((pv = pmap->pm_pmlpv) != NULL) {
1398 if (pv_hold_try(pv) == 0)
1399 pv_lock(pv);
52bb73bc 1400 p = pmap_remove_pv_page(pv);
701c977e 1401 pv_free(pv);
48ffc236 1402 pmap_kremove((vm_offset_t)pmap->pm_pml4);
b12defdc 1403 vm_page_busy_wait(p, FALSE, "pgpun");
701c977e 1404 KKASSERT(p->flags & (PG_FICTITIOUS|PG_UNMANAGED));
b12defdc 1405 vm_page_unwire(p, 0);
701c977e
MD
1406 vm_page_flag_clear(p, PG_MAPPED | PG_WRITEABLE);
1407
1408 /*
1409 * XXX eventually clean out PML4 static entries and
1410 * use vm_page_free_zero()
1411 */
1412 vm_page_free(p);
1413 pmap->pm_pmlpv = NULL;
c8fe38ae 1414 }
48ffc236 1415 if (pmap->pm_pml4) {
bfc09ba0 1416 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236
JG
1417 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1418 pmap->pm_pml4 = NULL;
c8fe38ae 1419 }
701c977e
MD
1420 KKASSERT(pmap->pm_stats.resident_count == 0);
1421 KKASSERT(pmap->pm_stats.wired_count == 0);
d7f50089
YY
1422}
1423
1424/*
c8fe38ae
MD
1425 * Wire in kernel global address entries. To avoid a race condition
1426 * between pmap initialization and pmap_growkernel, this procedure
1427 * adds the pmap to the master list (which growkernel scans to update),
1428 * then copies the template.
d7f50089
YY
1429 */
1430void
c8fe38ae 1431pmap_pinit2(struct pmap *pmap)
d7f50089 1432{
b12defdc
MD
1433 /*
1434 * XXX copies current process, does not fill in MPPTDI
1435 */
1436 spin_lock(&pmap_spin);
c8fe38ae 1437 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
b12defdc 1438 spin_unlock(&pmap_spin);
d7f50089
YY
1439}
1440
1441/*
701c977e
MD
1442 * This routine is called when various levels in the page table need to
1443 * be populated. This routine cannot fail.
d7f50089 1444 *
701c977e
MD
1445 * This function returns two locked pv_entry's, one representing the
1446 * requested pv and one representing the requested pv's parent pv. If
1447 * the pv did not previously exist it will be mapped into its parent
1448 * and wired, otherwise no additional wire count will be added.
d7f50089 1449 */
bfc09ba0 1450static
701c977e
MD
1451pv_entry_t
1452pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, pv_entry_t *pvpp)
d7f50089 1453{
701c977e
MD
1454 pt_entry_t *ptep;
1455 pv_entry_t pv;
1456 pv_entry_t pvp;
1457 vm_pindex_t pt_pindex;
1458 vm_page_t m;
1459 int isnew;
1460
c8fe38ae 1461 /*
701c977e
MD
1462 * If the pv already exists and we aren't being asked for the
1463 * parent page table page we can just return it. A locked+held pv
1464 * is returned.
c8fe38ae 1465 */
701c977e
MD
1466 pv = pv_alloc(pmap, ptepindex, &isnew);
1467 if (isnew == 0 && pvpp == NULL)
1468 return(pv);
1469
1470 /*
1471 * This is a new PV, we have to resolve its parent page table and
1472 * add an additional wiring to the page if necessary.
1473 */
1474
1475 /*
1476 * Special case terminal PVs. These are not page table pages so
1477 * no vm_page is allocated (the caller supplied the vm_page). If
1478 * pvpp is non-NULL we are being asked to also removed the pt_pv
1479 * for this pv.
1480 *
1481 * Note that pt_pv's are only returned for user VAs. We assert that
1482 * a pt_pv is not being requested for kernel VAs.
1483 */
1484 if (ptepindex < pmap_pt_pindex(0)) {
1485 if (ptepindex >= NUPTE_USER)
1486 KKASSERT(pvpp == NULL);
1487 else
1488 KKASSERT(pvpp != NULL);
1489 if (pvpp) {
1490 pt_pindex = NUPTE_TOTAL + (ptepindex >> NPTEPGSHIFT);
1491 pvp = pmap_allocpte(pmap, pt_pindex, NULL);
1492 if (isnew)
1493 vm_page_wire_quick(pvp->pv_m);
1494 *pvpp = pvp;
1495 } else {
1496 pvp = NULL;
1497 }
1498 return(pv);
b12defdc 1499 }
c8fe38ae
MD
1500
1501 /*
701c977e
MD
1502 * Non-terminal PVs allocate a VM page to represent the page table,
1503 * so we have to resolve pvp and calculate ptepindex for the pvp
1504 * and then for the page table entry index in the pvp for
1505 * fall-through.
c8fe38ae 1506 */
701c977e 1507 if (ptepindex < pmap_pd_pindex(0)) {
4a4ea614 1508 /*
701c977e 1509 * pv is PT, pvp is PD
4a4ea614 1510 */
701c977e
MD
1511 ptepindex = (ptepindex - pmap_pt_pindex(0)) >> NPDEPGSHIFT;
1512 ptepindex += NUPTE_TOTAL + NUPT_TOTAL;
1513 pvp = pmap_allocpte(pmap, ptepindex, NULL);
1514 if (!isnew)
1515 goto notnew;
1516
1b2e0b92 1517 /*
701c977e 1518 * PT index in PD
1b2e0b92 1519 */
701c977e
MD
1520 ptepindex = pv->pv_pindex - pmap_pt_pindex(0);
1521 ptepindex &= ((1ul << NPDEPGSHIFT) - 1);
1522 } else if (ptepindex < pmap_pdp_pindex(0)) {
1b2e0b92 1523 /*
701c977e 1524 * pv is PD, pvp is PDP
1b2e0b92 1525 */
701c977e
MD
1526 ptepindex = (ptepindex - pmap_pd_pindex(0)) >> NPDPEPGSHIFT;
1527 ptepindex += NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL;
1528 pvp = pmap_allocpte(pmap, ptepindex, NULL);
1529 if (!isnew)
1530 goto notnew;
1531
1532 /*
1533 * PD index in PDP
1534 */
1535 ptepindex = pv->pv_pindex - pmap_pd_pindex(0);
1536 ptepindex &= ((1ul << NPDPEPGSHIFT) - 1);
1537 } else if (ptepindex < pmap_pml4_pindex()) {
700e22f7 1538 /*
701c977e 1539 * pv is PDP, pvp is the root pml4 table
1b2e0b92 1540 */
701c977e
MD
1541 pvp = pmap_allocpte(pmap, pmap_pml4_pindex(), NULL);
1542 if (!isnew)
1543 goto notnew;
700e22f7 1544
701c977e
MD
1545 /*
1546 * PDP index in PML4
1547 */
1548 ptepindex = pv->pv_pindex - pmap_pdp_pindex(0);
1549 ptepindex &= ((1ul << NPML4EPGSHIFT) - 1);
1550 } else {
1551 /*
1552 * pv represents the top-level PML4, there is no parent.
1553 */
1554 pvp = NULL;
1555 if (!isnew)
1556 goto notnew;
1b2e0b92 1557 }
700e22f7
MD
1558
1559 /*
701c977e
MD
1560 * This code is only reached if isnew is TRUE and this is not a
1561 * terminal PV. We need to allocate a vm_page for the page table
1562 * at this level and enter it into the parent page table.
1563 *
1564 * page table pages are marked PG_WRITEABLE and PG_MAPPED.
1b2e0b92 1565 */
701c977e
MD
1566 for (;;) {
1567 m = vm_page_alloc(NULL, pv->pv_pindex,
1568 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM |
1569 VM_ALLOC_INTERRUPT);
1570 if (m)
1571 break;
1572 vm_wait(0);
1b2e0b92 1573 }
701c977e
MD
1574 vm_page_spin_lock(m);
1575 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1576 pv->pv_m = m;
1577 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
1578 vm_page_spin_unlock(m);
1579 vm_page_unmanage(m); /* m must be spinunlocked */
1580
1581 if ((m->flags & PG_ZERO) == 0) {
1582 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1583 }
1584#ifdef PMAP_DEBUG
1585 else {
1586 pmap_page_assertzero(VM_PAGE_TO_PHYS(m));
1587 }
1588#endif
1589 m->valid = VM_PAGE_BITS_ALL;
1590 vm_page_flag_clear(m, PG_ZERO);
1591 vm_page_wire(m); /* wire for mapping in parent */
1592
1593 /*
1594 * Wire the page into pvp, bump the wire-count for pvp's page table
1595 * page. Bump the resident_count for the pmap. There is no pvp
1596 * for the top level, address the pm_pml4[] array directly.
1597 *
1598 * If the caller wants the parent we return it, otherwise
1599 * we just put it away.
1600 *
1601 * No interlock is needed for pte 0 -> non-zero.
1602 */
1603 if (pvp) {
1604 vm_page_wire_quick(pvp->pv_m);
1605 ptep = pv_pte_lookup(pvp, ptepindex);
1606 KKASSERT((*ptep & PG_V) == 0);
1607 *ptep = VM_PAGE_TO_PHYS(m) | (PG_U | PG_RW | PG_V |
1608 PG_A | PG_M);
1609 }
1610 vm_page_wakeup(m);
1611notnew:
1612 if (pvpp)
1613 *pvpp = pvp;
1614 else if (pvp)
1615 pv_put(pvp);
1616 return (pv);
1617}
d7f50089
YY
1618
1619/*
701c977e
MD
1620 * Release any resources held by the given physical map.
1621 *
1622 * Called when a pmap initialized by pmap_pinit is being released. Should
1623 * only be called if the map contains no valid mappings.
b12defdc 1624 *
701c977e 1625 * Caller must hold pmap->pm_token
d7f50089 1626 */
701c977e
MD
1627struct pmap_release_info {
1628 pmap_t pmap;
1629 int retry;
1630};
1631
1632static int pmap_release_callback(pv_entry_t pv, void *data);
1633
1634void
1635pmap_release(struct pmap *pmap)
c8fe38ae 1636{
701c977e
MD
1637 struct pmap_release_info info;
1638
1639 KASSERT(pmap->pm_active == 0,
1640 ("pmap still active! %016jx", (uintmax_t)pmap->pm_active));
701c977e
MD
1641
1642 spin_lock(&pmap_spin);
1643 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1644 spin_unlock(&pmap_spin);
c8fe38ae
MD
1645
1646 /*
701c977e
MD
1647 * Pull pv's off the RB tree in order from low to high and release
1648 * each page.
c8fe38ae 1649 */
701c977e
MD
1650 info.pmap = pmap;
1651 do {
1652 info.retry = 0;
1653 spin_lock(&pmap->pm_spin);
1654 RB_SCAN(pv_entry_rb_tree, &pmap->pm_pvroot, NULL,
1655 pmap_release_callback, &info);
1656 spin_unlock(&pmap->pm_spin);
1657 } while (info.retry);
1658
a5fc46c9
MD
1659
1660 /*
701c977e
MD
1661 * One resident page (the pml4 page) should remain.
1662 * No wired pages should remain.
a5fc46c9 1663 */
701c977e
MD
1664 KKASSERT(pmap->pm_stats.resident_count == 1);
1665 KKASSERT(pmap->pm_stats.wired_count == 0);
1666}
1667
1668static int
1669pmap_release_callback(pv_entry_t pv, void *data)
1670{
1671 struct pmap_release_info *info = data;
1672 pmap_t pmap = info->pmap;
1673 vm_page_t p;
1674
1675 if (pv_hold_try(pv)) {
1676 spin_unlock(&pmap->pm_spin);
1677 } else {
1678 spin_unlock(&pmap->pm_spin);
1679 pv_lock(pv);
1680 if (pv->pv_pmap != pmap) {
1681 pv_put(pv);
1682 spin_lock(&pmap->pm_spin);
1683 info->retry = 1;
1684 return(-1);
a5fc46c9 1685 }
48ffc236
JG
1686 }
1687
701c977e
MD
1688 /*
1689 * The pmap is currently not spinlocked, pv is held+locked.
1690 * Remove the pv's page from its parent's page table. The
1691 * parent's page table page's wire_count will be decremented.
1692 */
1693 pmap_remove_pv_pte(pv, NULL, NULL);
c8fe38ae
MD
1694
1695 /*
701c977e
MD
1696 * Terminal pvs are unhooked from their vm_pages. Because
1697 * terminal pages aren't page table pages they aren't wired
1698 * by us, so we have to be sure not to unwire them either.
c8fe38ae 1699 */
701c977e 1700 if (pv->pv_pindex < pmap_pt_pindex(0)) {
52bb73bc 1701 pmap_remove_pv_page(pv);
701c977e
MD
1702 goto skip;
1703 }
c8fe38ae 1704
c8fe38ae 1705 /*
701c977e
MD
1706 * We leave the top-level page table page cached, wired, and
1707 * mapped in the pmap until the dtor function (pmap_puninit())
1708 * gets called.
e8510e54 1709 *
701c977e
MD
1710 * Since we are leaving the top-level pv intact we need
1711 * to break out of what would otherwise be an infinite loop.
c8fe38ae 1712 */
701c977e
MD
1713 if (pv->pv_pindex == pmap_pml4_pindex()) {
1714 pv_put(pv);
1715 spin_lock(&pmap->pm_spin);
1716 return(-1);
1717 }
1718
1719 /*
1720 * For page table pages (other than the top-level page),
1721 * remove and free the vm_page. The representitive mapping
1722 * removed above by pmap_remove_pv_pte() did not undo the
1723 * last wire_count so we have to do that as well.
1724 */
52bb73bc 1725 p = pmap_remove_pv_page(pv);
701c977e 1726 vm_page_busy_wait(p, FALSE, "pmaprl");
701c977e
MD
1727 if (p->wire_count != 1) {
1728 kprintf("p->wire_count was %016lx %d\n",
1729 pv->pv_pindex, p->wire_count);
1730 }
1731 KKASSERT(p->wire_count == 1);
1732 KKASSERT(p->flags & PG_UNMANAGED);
1733
1734 vm_page_unwire(p, 0);
1735 KKASSERT(p->wire_count == 0);
1736 /* JG eventually revert to using vm_page_free_zero() */
1737 vm_page_free(p);
1738skip:
1739 pv_free(pv);
1740 spin_lock(&pmap->pm_spin);
1741 return(0);
1742}
1743
1744/*
1745 * This function will remove the pte associated with a pv from its parent.
1746 * Terminal pv's are supported. The removal will be interlocked if info
1747 * is non-NULL. The caller must dispose of pv instead of just unlocking
1748 * it.
1749 *
1750 * The wire count will be dropped on the parent page table. The wire
1751 * count on the page being removed (pv->pv_m) from the parent page table
1752 * is NOT touched. Note that terminal pages will not have any additional
1753 * wire counts while page table pages will have at least one representing
1754 * the mapping, plus others representing sub-mappings.
1755 *
1756 * NOTE: Cannot be called on kernel page table pages, only KVM terminal
1757 * pages and user page table and terminal pages.
1758 *
1759 * The pv must be locked.
1760 *
1761 * XXX must lock parent pv's if they exist to remove pte XXX
1762 */
1763static
1764void
1765pmap_remove_pv_pte(pv_entry_t pv, pv_entry_t pvp, struct pmap_inval_info *info)
1766{
1767 vm_pindex_t ptepindex = pv->pv_pindex;
1768 pmap_t pmap = pv->pv_pmap;
1769 vm_page_t p;
1770 int gotpvp = 0;
48ffc236 1771
701c977e 1772 KKASSERT(pmap);
48ffc236 1773
701c977e 1774 if (ptepindex == pmap_pml4_pindex()) {
b12defdc 1775 /*
701c977e 1776 * We are the top level pml4 table, there is no parent.
b12defdc 1777 */
701c977e
MD
1778 p = pmap->pm_pmlpv->pv_m;
1779 } else if (ptepindex >= pmap_pdp_pindex(0)) {
e8510e54 1780 /*
701c977e
MD
1781 * Remove a PDP page from the pml4e. This can only occur
1782 * with user page tables. We do not have to lock the
1783 * pml4 PV so just ignore pvp.
e8510e54 1784 */
701c977e
MD
1785 vm_pindex_t pml4_pindex;
1786 vm_pindex_t pdp_index;
1787 pml4_entry_t *pdp;
1788
1789 pdp_index = ptepindex - pmap_pdp_pindex(0);
1790 if (pvp == NULL) {
1791 pml4_pindex = pmap_pml4_pindex();
1792 pvp = pv_get(pv->pv_pmap, pml4_pindex);
1793 gotpvp = 1;
e8510e54 1794 }
701c977e
MD
1795 pdp = &pmap->pm_pml4[pdp_index & ((1ul << NPML4EPGSHIFT) - 1)];
1796 KKASSERT((*pdp & PG_V) != 0);
1797 p = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1798 *pdp = 0;
1799 KKASSERT(info == NULL);
1800 } else if (ptepindex >= pmap_pd_pindex(0)) {
e8510e54 1801 /*
701c977e 1802 * Remove a PD page from the pdp
e8510e54 1803 */
701c977e
MD
1804 vm_pindex_t pdp_pindex;
1805 vm_pindex_t pd_index;
1806 pdp_entry_t *pd;
48ffc236 1807
701c977e 1808 pd_index = ptepindex - pmap_pd_pindex(0);
48ffc236 1809
701c977e
MD
1810 if (pvp == NULL) {
1811 pdp_pindex = NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL +
1812 (pd_index >> NPML4EPGSHIFT);
1813 pvp = pv_get(pv->pv_pmap, pdp_pindex);
1814 gotpvp = 1;
1815 }
1816 pd = pv_pte_lookup(pvp, pd_index & ((1ul << NPDPEPGSHIFT) - 1));
1817 KKASSERT((*pd & PG_V) != 0);
1818 p = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
1819 *pd = 0;
1820 KKASSERT(info == NULL);
1821 } else if (ptepindex >= pmap_pt_pindex(0)) {
e8510e54 1822 /*
701c977e 1823 * Remove a PT page from the pd
e8510e54 1824 */
701c977e
MD
1825 vm_pindex_t pd_pindex;
1826 vm_pindex_t pt_index;
1827 pd_entry_t *pt;
b12defdc 1828
701c977e
MD
1829 pt_index = ptepindex - pmap_pt_pindex(0);
1830
1831 if (pvp == NULL) {
1832 pd_pindex = NUPTE_TOTAL + NUPT_TOTAL +
1833 (pt_index >> NPDPEPGSHIFT);
1834 pvp = pv_get(pv->pv_pmap, pd_pindex);
1835 gotpvp = 1;
1836 }
1837 pt = pv_pte_lookup(pvp, pt_index & ((1ul << NPDPEPGSHIFT) - 1));
1838 KKASSERT((*pt & PG_V) != 0);
1839 p = PHYS_TO_VM_PAGE(*pt & PG_FRAME);
1840 *pt = 0;
1841 KKASSERT(info == NULL);
1842 } else {
b12defdc 1843 /*
701c977e 1844 * Remove a PTE from the PT page
b12defdc 1845 *
701c977e
MD
1846 * NOTE: pv's must be locked bottom-up to avoid deadlocking.
1847 * pv is a pte_pv so we can safely lock pt_pv.
b12defdc 1848 */
701c977e
MD
1849 vm_pindex_t pt_pindex;
1850 pt_entry_t *ptep;
1851 pt_entry_t pte;
1852 vm_offset_t va;
b12defdc 1853
701c977e
MD
1854 pt_pindex = ptepindex >> NPTEPGSHIFT;
1855 va = (vm_offset_t)ptepindex << PAGE_SHIFT;
1856
1857 if (ptepindex >= NUPTE_USER) {
1858 ptep = vtopte(ptepindex << PAGE_SHIFT);
1859 KKASSERT(pvp == NULL);
c8fe38ae 1860 } else {
701c977e
MD
1861 if (pvp == NULL) {
1862 pt_pindex = NUPTE_TOTAL +
1863 (ptepindex >> NPDPEPGSHIFT);
1864 pvp = pv_get(pv->pv_pmap, pt_pindex);
1865 gotpvp = 1;
1866 }
1867 ptep = pv_pte_lookup(pvp, ptepindex &
1868 ((1ul << NPDPEPGSHIFT) - 1));
c8fe38ae 1869 }
701c977e
MD
1870
1871 if (info)
1872 pmap_inval_interlock(info, pmap, va);
1873 pte = pte_load_clear(ptep);
1874 if (info)
1875 pmap_inval_deinterlock(info, pmap);
52bb73bc
MD
1876 else
1877 cpu_invlpg((void *)va);
48ffc236 1878
e8510e54 1879 /*
701c977e 1880 * Now update the vm_page_t
e8510e54 1881 */
701c977e
MD
1882 if ((pte & (PG_MANAGED|PG_V)) != (PG_MANAGED|PG_V)) {
1883 kprintf("remove_pte badpte %016lx %016lx %d\n",
1884 pte, pv->pv_pindex,
1885 pv->pv_pindex < pmap_pt_pindex(0));
1886 }
1887 /*KKASSERT((pte & (PG_MANAGED|PG_V)) == (PG_MANAGED|PG_V));*/
1888 p = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1889
1890 if (pte & PG_M) {
1891 if (pmap_track_modified(ptepindex))
1892 vm_page_dirty(p);
1893 }
1894 if (pte & PG_A) {
1895 vm_page_flag_set(p, PG_REFERENCED);
e8510e54 1896 }
701c977e
MD
1897 if (pte & PG_W)
1898 atomic_add_long(&pmap->pm_stats.wired_count, -1);
1899 if (pte & PG_G)
1900 cpu_invlpg((void *)va);
c8fe38ae
MD
1901 }
1902
48ffc236 1903 /*
701c977e
MD
1904 * Unwire the parent page table page. The wire_count cannot go below
1905 * 1 here because the parent page table page is itself still mapped.
1906 *
1907 * XXX remove the assertions later.
48ffc236 1908 */
701c977e
MD
1909 KKASSERT(pv->pv_m == p);
1910 if (pvp && vm_page_unwire_quick(pvp->pv_m))
1911 panic("pmap_remove_pv_pte: Insufficient wire_count");
c8fe38ae 1912
701c977e
MD
1913 if (gotpvp)
1914 pv_put(pvp);
c8fe38ae
MD
1915}
1916
bfc09ba0
MD
1917static
1918vm_page_t
52bb73bc 1919pmap_remove_pv_page(pv_entry_t pv)
d7f50089 1920{
c8fe38ae
MD
1921 vm_page_t m;
1922
701c977e 1923 m = pv->pv_m;
701c977e
MD
1924 KKASSERT(m);
1925 vm_page_spin_lock(m);
1926 pv->pv_m = NULL;
1927 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
c8fe38ae 1928 /*
701c977e
MD
1929 if (m->object)
1930 atomic_add_int(&m->object->agg_pv_list_count, -1);
1931 */
1932 if (TAILQ_EMPTY(&m->md.pv_list))
1933 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1934 vm_page_spin_unlock(m);
52bb73bc 1935 return(m);
d7f50089
YY
1936}
1937
1938/*
c8fe38ae 1939 * Grow the number of kernel page table entries, if needed.
a8cf2878
MD
1940 *
1941 * This routine is always called to validate any address space
1942 * beyond KERNBASE (for kldloads). kernel_vm_end only governs the address
1943 * space below KERNBASE.
d7f50089 1944 */
c8fe38ae 1945void
a8cf2878 1946pmap_growkernel(vm_offset_t kstart, vm_offset_t kend)
d7f50089 1947{
48ffc236 1948 vm_paddr_t paddr;
c8fe38ae
MD
1949 vm_offset_t ptppaddr;
1950 vm_page_t nkpg;
701c977e
MD
1951 pd_entry_t *pt, newpt;
1952 pdp_entry_t newpd;
a8cf2878 1953 int update_kernel_vm_end;
c8fe38ae 1954
a8cf2878
MD
1955 /*
1956 * bootstrap kernel_vm_end on first real VM use
1957 */
c8fe38ae 1958 if (kernel_vm_end == 0) {
791c6551 1959 kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
c8fe38ae 1960 nkpt = 0;
701c977e 1961 while ((*pmap_pt(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
a8cf2878
MD
1962 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) &
1963 ~(PAGE_SIZE * NPTEPG - 1);
c8fe38ae 1964 nkpt++;
48ffc236
JG
1965 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1966 kernel_vm_end = kernel_map.max_offset;
1967 break;
1968 }
c8fe38ae
MD
1969 }
1970 }
a8cf2878
MD
1971
1972 /*
1973 * Fill in the gaps. kernel_vm_end is only adjusted for ranges
1974 * below KERNBASE. Ranges above KERNBASE are kldloaded and we
1975 * do not want to force-fill 128G worth of page tables.
1976 */
1977 if (kstart < KERNBASE) {
1978 if (kstart > kernel_vm_end)
1979 kstart = kernel_vm_end;
1980 KKASSERT(kend <= KERNBASE);
1981 update_kernel_vm_end = 1;
1982 } else {
1983 update_kernel_vm_end = 0;
1984 }
1985
1986 kstart = rounddown2(kstart, PAGE_SIZE * NPTEPG);
1987 kend = roundup2(kend, PAGE_SIZE * NPTEPG);
1988
1989 if (kend - 1 >= kernel_map.max_offset)
1990 kend = kernel_map.max_offset;
1991
1992 while (kstart < kend) {
701c977e
MD
1993 pt = pmap_pt(&kernel_pmap, kstart);
1994 if (pt == NULL) {
48ffc236 1995 /* We need a new PDP entry */
701c977e 1996 nkpg = vm_page_alloc(NULL, nkpt,
a8cf2878
MD
1997 VM_ALLOC_NORMAL |
1998 VM_ALLOC_SYSTEM |
1999 VM_ALLOC_INTERRUPT);
2000 if (nkpg == NULL) {
2001 panic("pmap_growkernel: no memory to grow "
2002 "kernel");
2003 }
48ffc236 2004 paddr = VM_PAGE_TO_PHYS(nkpg);
7f2a2740
MD
2005 if ((nkpg->flags & PG_ZERO) == 0)
2006 pmap_zero_page(paddr);
2007 vm_page_flag_clear(nkpg, PG_ZERO);
701c977e 2008 newpd = (pdp_entry_t)
48ffc236 2009 (paddr | PG_V | PG_RW | PG_A | PG_M);
701c977e 2010 *pmap_pd(&kernel_pmap, kstart) = newpd;
7f2a2740 2011 nkpt++;
48ffc236
JG
2012 continue; /* try again */
2013 }
701c977e 2014 if ((*pt & PG_V) != 0) {
a8cf2878
MD
2015 kstart = (kstart + PAGE_SIZE * NPTEPG) &
2016 ~(PAGE_SIZE * NPTEPG - 1);
2017 if (kstart - 1 >= kernel_map.max_offset) {
2018 kstart = kernel_map.max_offset;
48ffc236
JG
2019 break;
2020 }
c8fe38ae
MD
2021 continue;
2022 }
2023
2024 /*
2025 * This index is bogus, but out of the way
2026 */
701c977e 2027 nkpg = vm_page_alloc(NULL, nkpt,
a8cf2878
MD
2028 VM_ALLOC_NORMAL |
2029 VM_ALLOC_SYSTEM |
2030 VM_ALLOC_INTERRUPT);
c8fe38ae
MD
2031 if (nkpg == NULL)
2032 panic("pmap_growkernel: no memory to grow kernel");
2033
2034 vm_page_wire(nkpg);
2035 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2036 pmap_zero_page(ptppaddr);
7f2a2740 2037 vm_page_flag_clear(nkpg, PG_ZERO);
701c977e
MD
2038 newpt = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
2039 *pmap_pt(&kernel_pmap, kstart) = newpt;
c8fe38ae
MD
2040 nkpt++;
2041
a8cf2878
MD
2042 kstart = (kstart + PAGE_SIZE * NPTEPG) &
2043 ~(PAGE_SIZE * NPTEPG - 1);
2044
2045 if (kstart - 1 >= kernel_map.max_offset) {
2046 kstart = kernel_map.max_offset;
48ffc236 2047 break;
c8fe38ae 2048 }
c8fe38ae 2049 }
a8cf2878
MD
2050
2051 /*
2052 * Only update kernel_vm_end for areas below KERNBASE.
2053 */
2054 if (update_kernel_vm_end && kernel_vm_end < kstart)
2055 kernel_vm_end = kstart;
d7f50089
YY
2056}
2057
2058/*
c8fe38ae
MD
2059 * Retire the given physical map from service.
2060 * Should only be called if the map contains
2061 * no valid mappings.
d7f50089 2062 */
c8fe38ae
MD
2063void
2064pmap_destroy(pmap_t pmap)
d7f50089 2065{
c8fe38ae
MD
2066 int count;
2067
2068 if (pmap == NULL)
2069 return;
2070
b12defdc 2071 lwkt_gettoken(&pmap->pm_token);
c8fe38ae
MD
2072 count = --pmap->pm_count;
2073 if (count == 0) {
b12defdc 2074 pmap_release(pmap); /* eats pm_token */
c8fe38ae
MD
2075 panic("destroying a pmap is not yet implemented");
2076 }
b12defdc 2077 lwkt_reltoken(&pmap->pm_token);
d7f50089
YY
2078}
2079
2080/*
c8fe38ae 2081 * Add a reference to the specified pmap.
d7f50089 2082 */
c8fe38ae
MD
2083void
2084pmap_reference(pmap_t pmap)
d7f50089 2085{
c8fe38ae 2086 if (pmap != NULL) {
b12defdc 2087 lwkt_gettoken(&pmap->pm_token);
c8fe38ae 2088 pmap->pm_count++;
b12defdc 2089 lwkt_reltoken(&pmap->pm_token);
c8fe38ae 2090 }
d7f50089
YY
2091}
2092
c8fe38ae 2093/***************************************************
701c977e 2094 * page management routines.
c8fe38ae 2095 ***************************************************/
d7f50089
YY
2096
2097/*
701c977e 2098 * Hold a pv without locking it
d7f50089 2099 */
701c977e
MD
2100static void
2101pv_hold(pv_entry_t pv)
d7f50089 2102{
701c977e
MD
2103 u_int count;
2104
2105 if (atomic_cmpset_int(&pv->pv_hold, 0, 1))
2106 return;
2107
2108 for (;;) {
2109 count = pv->pv_hold;
2110 cpu_ccfence();
2111 if (atomic_cmpset_int(&pv->pv_hold, count, count + 1))
2112 return;
2113 /* retry */
2114 }
d7f50089
YY
2115}
2116
2117/*
701c977e
MD
2118 * Hold a pv_entry, preventing its destruction. TRUE is returned if the pv
2119 * was successfully locked, FALSE if it wasn't. The caller must dispose of
2120 * the pv properly.
2121 *
2122 * Either the pmap->pm_spin or the related vm_page_spin (if traversing a
2123 * pv list via its page) must be held by the caller.
d7f50089 2124 */
701c977e
MD
2125static int
2126_pv_hold_try(pv_entry_t pv PMAP_DEBUG_DECL)
d7f50089 2127{
701c977e
MD
2128 u_int count;
2129
2130 if (atomic_cmpset_int(&pv->pv_hold, 0, PV_HOLD_LOCKED | 1)) {
2131#ifdef PMAP_DEBUG
2132 pv->pv_func = func;
2133 pv->pv_line = lineno;
2134#endif
2135 return TRUE;
2136 }
2137
2138 for (;;) {
2139 count = pv->pv_hold;
2140 cpu_ccfence();
2141 if ((count & PV_HOLD_LOCKED) == 0) {
2142 if (atomic_cmpset_int(&pv->pv_hold, count,
2143 (count + 1) | PV_HOLD_LOCKED)) {
2144#ifdef PMAP_DEBUG
2145 pv->pv_func = func;
2146 pv->pv_line = lineno;
2147#endif
2148 return TRUE;
2149 }
2150 } else {
2151 if (atomic_cmpset_int(&pv->pv_hold, count, count + 1))
2152 return FALSE;
2153 }
2154 /* retry */
c8fe38ae 2155 }
d7f50089
YY
2156}
2157
2158/*
701c977e
MD
2159 * Drop a previously held pv_entry which could not be locked, allowing its
2160 * destruction.
2161 *
2162 * Must not be called with a spinlock held as we might zfree() the pv if it
2163 * is no longer associated with a pmap and this was the last hold count.
d7f50089 2164 */
701c977e
MD
2165static void
2166pv_drop(pv_entry_t pv)
d7f50089 2167{
701c977e 2168 u_int count;
c8fe38ae 2169
701c977e
MD
2170 if (atomic_cmpset_int(&pv->pv_hold, 1, 0)) {
2171 if (pv->pv_pmap == NULL)
2172 zfree(pvzone, pv);
c8fe38ae 2173 return;
c8fe38ae
MD
2174 }
2175
701c977e
MD
2176 for (;;) {
2177 count = pv->pv_hold;
2178 cpu_ccfence();
2179 KKASSERT((count & PV_HOLD_MASK) > 0);
2180 KKASSERT((count & (PV_HOLD_LOCKED | PV_HOLD_MASK)) !=
2181 (PV_HOLD_LOCKED | 1));
2182 if (atomic_cmpset_int(&pv->pv_hold, count, count - 1)) {
2183 if (count == 1 && pv->pv_pmap == NULL)
2184 zfree(pvzone, pv);
2185 return;
b12defdc 2186 }
701c977e 2187 /* retry */
c8fe38ae 2188 }
d7f50089 2189}
c8fe38ae 2190
d7f50089 2191/*
701c977e 2192 * Find or allocate the requested PV entry, returning a locked pv
d7f50089 2193 */
bfc09ba0 2194static
701c977e
MD
2195pv_entry_t
2196_pv_alloc(pmap_t pmap, vm_pindex_t pindex, int *isnew PMAP_DEBUG_DECL)
c8fe38ae
MD
2197{
2198 pv_entry_t pv;
701c977e 2199 pv_entry_t pnew = NULL;
c8fe38ae 2200
701c977e
MD
2201 spin_lock(&pmap->pm_spin);
2202 for (;;) {
2203 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex) {
2204 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot,
2205 pindex);
c8fe38ae 2206 }
701c977e
MD
2207 if (pv == NULL) {
2208 if (pnew == NULL) {
2209 spin_unlock(&pmap->pm_spin);
2210 pnew = zalloc(pvzone);
2211 spin_lock(&pmap->pm_spin);
2212 continue;
2213 }
2214 pnew->pv_pmap = pmap;
2215 pnew->pv_pindex = pindex;
2216 pnew->pv_hold = PV_HOLD_LOCKED | 1;
2217#ifdef PMAP_DEBUG
2218 pnew->pv_func = func;
2219 pnew->pv_line = lineno;
2220#endif
2221 pv_entry_rb_tree_RB_INSERT(&pmap->pm_pvroot, pnew);
2222 atomic_add_long(&pmap->pm_stats.resident_count, 1);
2223 spin_unlock(&pmap->pm_spin);
2224 *isnew = 1;
2225 return(pnew);
2226 }
2227 if (pnew) {
2228 spin_unlock(&pmap->pm_spin);
2229 zfree(pvzone, pnew);
2230 pnew = NULL;
2231 spin_lock(&pmap->pm_spin);
2232 continue;
2233 }
2234 if (_pv_hold_try(pv PMAP_DEBUG_COPY)) {
2235 spin_unlock(&pmap->pm_spin);
2236 *isnew = 0;
2237 return(pv);
2238 }
2239 spin_unlock(&pmap->pm_spin);
2240 _pv_lock(pv PMAP_DEBUG_COPY);
2241 if (pv->pv_pmap == pmap && pv->pv_pindex == pindex) {
2242 *isnew = 0;
2243 return(pv);
2244 }
2245 pv_put(pv);
2246 spin_lock(&pmap->pm_spin);
2247 }
c8fe38ae 2248
5926987a 2249
701c977e 2250}
b12defdc 2251
701c977e
MD
2252/*
2253 * Find the requested PV entry, returning a locked+held pv or NULL
2254 */
2255static
2256pv_entry_t
2257_pv_get(pmap_t pmap, vm_pindex_t pindex PMAP_DEBUG_DECL)
2258{
2259 pv_entry_t pv;
5926987a 2260
701c977e
MD
2261 spin_lock(&pmap->pm_spin);
2262 for (;;) {
2263 /*
2264 * Shortcut cache
2265 */
2266 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex) {
2267 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot,
2268 pindex);
2269 }
2270 if (pv == NULL) {
2271 spin_unlock(&pmap->pm_spin);
2272 return NULL;
2273 }
2274 if (_pv_hold_try(pv PMAP_DEBUG_COPY)) {
2275 pv_cache(pv, pindex);
2276 spin_unlock(&pmap->pm_spin);
2277 return(pv);
2278 }
2279 spin_unlock(&pmap->pm_spin);
2280 _pv_lock(pv PMAP_DEBUG_COPY);
2281 if (pv->pv_pmap == pmap && pv->pv_pindex == pindex)
2282 return(pv);
2283 pv_put(pv);
2284 spin_lock(&pmap->pm_spin);
2285 }
d7f50089
YY
2286}
2287
2288/*
701c977e
MD
2289 * Lookup, hold, and attempt to lock (pmap,pindex).
2290 *
2291 * If the entry does not exist NULL is returned and *errorp is set to 0
a5fc46c9 2292 *
701c977e
MD
2293 * If the entry exists and could be successfully locked it is returned and
2294 * errorp is set to 0.
2295 *
2296 * If the entry exists but could NOT be successfully locked it is returned
2297 * held and *errorp is set to 1.
d7f50089 2298 */
bfc09ba0 2299static
701c977e
MD
2300pv_entry_t
2301pv_get_try(pmap_t pmap, vm_pindex_t pindex, int *errorp)
d7f50089 2302{
c8fe38ae
MD
2303 pv_entry_t pv;
2304
701c977e
MD
2305 spin_lock(&pmap->pm_spin);
2306 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex)
2307 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pindex);
2308 if (pv == NULL) {
2309 spin_unlock(&pmap->pm_spin);
2310 *errorp = 0;
2311 return NULL;
2312 }
2313 if (pv_hold_try(pv)) {
2314 pv_cache(pv, pindex);
2315 spin_unlock(&pmap->pm_spin);
2316 *errorp = 0;
2317 return(pv); /* lock succeeded */
2318 }
2319 spin_unlock(&pmap->pm_spin);
2320 *errorp = 1;
2321 return (pv); /* lock failed */
d7f50089
YY
2322}
2323
2324/*
701c977e 2325 * Find the requested PV entry, returning a held pv or NULL
d7f50089 2326 */
bfc09ba0 2327static
701c977e
MD
2328pv_entry_t
2329pv_find(pmap_t pmap, vm_pindex_t pindex)
c8fe38ae 2330{
701c977e 2331 pv_entry_t pv;
c8fe38ae 2332
701c977e 2333 spin_lock(&pmap->pm_spin);
b12defdc 2334
701c977e
MD
2335 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex)
2336 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pindex);
2337 if (pv == NULL) {
2338 spin_unlock(&pmap->pm_spin);
2339 return NULL;
2340 }
2341 pv_hold(pv);
2342 pv_cache(pv, pindex);
2343 spin_unlock(&pmap->pm_spin);
2344 return(pv);
2345}
2346
2347/*
2348 * Lock a held pv, keeping the hold count
2349 */
2350static
2351void
2352_pv_lock(pv_entry_t pv PMAP_DEBUG_DECL)
2353{
2354 u_int count;
2355
2356 for (;;) {
2357 count = pv->pv_hold;
2358 cpu_ccfence();
2359 if ((count & PV_HOLD_LOCKED) == 0) {
2360 if (atomic_cmpset_int(&pv->pv_hold, count,
2361 count | PV_HOLD_LOCKED)) {
2362#ifdef PMAP_DEBUG
2363 pv->pv_func = func;
2364 pv->pv_line = lineno;
2365#endif
2366 return;
c8fe38ae 2367 }
701c977e
MD
2368 continue;
2369 }
2370 tsleep_interlock(pv, 0);
2371 if (atomic_cmpset_int(&pv->pv_hold, count,
2372 count | PV_HOLD_WAITING)) {
2373#ifdef PMAP_DEBUG
2374 kprintf("pv waiting on %s:%d\n",
2375 pv->pv_func, pv->pv_line);
c8fe38ae 2376#endif
701c977e 2377 tsleep(pv, PINTERLOCKED, "pvwait", hz);
c8fe38ae 2378 }
701c977e 2379 /* retry */
b12defdc 2380 }
701c977e 2381}
c8fe38ae 2382
701c977e
MD
2383/*
2384 * Unlock a held and locked pv, keeping the hold count.
2385 */
2386static
2387void
2388pv_unlock(pv_entry_t pv)
2389{
2390 u_int count;
2391
2392 if (atomic_cmpset_int(&pv->pv_hold, PV_HOLD_LOCKED | 1, 1))
2393 return;
2394
2395 for (;;) {
2396 count = pv->pv_hold;
2397 cpu_ccfence();
2398 KKASSERT((count & (PV_HOLD_LOCKED|PV_HOLD_MASK)) >=
2399 (PV_HOLD_LOCKED | 1));
2400 if (atomic_cmpset_int(&pv->pv_hold, count,
2401 count &
2402 ~(PV_HOLD_LOCKED | PV_HOLD_WAITING))) {
2403 if (count & PV_HOLD_WAITING)
2404 wakeup(pv);
2405 break;
2406 }
7ab91d55 2407 }
d7f50089
YY
2408}
2409
2410/*
701c977e
MD
2411 * Unlock and drop a pv. If the pv is no longer associated with a pmap
2412 * and the hold count drops to zero we will free it.
d7f50089 2413 *
701c977e
MD
2414 * Caller should not hold any spin locks. We are protected from hold races
2415 * by virtue of holds only occuring only with a pmap_spin or vm_page_spin
2416 * lock held. A pv cannot be located otherwise.
d7f50089 2417 */
bfc09ba0
MD
2418static
2419void
701c977e 2420pv_put(pv_entry_t pv)
c8fe38ae 2421{
701c977e
MD
2422 if (atomic_cmpset_int(&pv->pv_hold, PV_HOLD_LOCKED | 1, 0)) {
2423 if (pv->pv_pmap == NULL)
2424 zfree(pvzone, pv);
2425 return;
2426 }
2427 pv_unlock(pv);
2428 pv_drop(pv);
2429}
c8fe38ae 2430
701c977e
MD
2431/*
2432 * Unlock, drop, and free a pv, destroying it. The pv is removed from its
2433 * pmap. Any pte operations must have already been completed.
2434 */
2435static
2436void
2437pv_free(pv_entry_t pv)
2438{
2439 pmap_t pmap;
b12defdc 2440
701c977e
MD
2441 KKASSERT(pv->pv_m == NULL);
2442 if ((pmap = pv->pv_pmap) != NULL) {
2443 spin_lock(&pmap->pm_spin);
2444 pv_entry_rb_tree_RB_REMOVE(&pmap->pm_pvroot, pv);
2445 if (pmap->pm_pvhint == pv)
2446 pmap->pm_pvhint = NULL;
2447 atomic_add_long(&pmap->pm_stats.resident_count, -1);
2448 pv->pv_pmap = NULL;
2449 pv->pv_pindex = 0;
2450 spin_unlock(&pmap->pm_spin);
2451 }
2452 pv_put(pv);
2453}
2454
2455/*
2456 * This routine is very drastic, but can save the system
2457 * in a pinch.
2458 */
2459void
2460pmap_collect(void)
2461{
2462 int i;
2463 vm_page_t m;
2464 static int warningdone=0;
2465
2466 if (pmap_pagedaemon_waken == 0)
48ffc236 2467 return;
701c977e
MD
2468 pmap_pagedaemon_waken = 0;
2469 if (warningdone < 5) {
2470 kprintf("pmap_collect: collecting pv entries -- "
2471 "suggest increasing PMAP_SHPGPERPROC\n");
2472 warningdone++;
2473 }
2474
2475 for (i = 0; i < vm_page_array_size; i++) {
2476 m = &vm_page_array[i];
2477 if (m->wire_count || m->hold_count)
2478 continue;
2479 if (vm_page_busy_try(m, TRUE) == 0) {
2480 if (m->wire_count == 0 && m->hold_count == 0) {
2481 pmap_remove_all(m);
2482 }
2483 vm_page_wakeup(m);
2484 }
2485 }
d7f50089
YY
2486}
2487
2488/*
701c977e
MD
2489 * Scan the pmap for active page table entries and issue a callback.
2490 * The callback must dispose of pte_pv.
d7f50089 2491 *
701c977e
MD
2492 * NOTE: Unmanaged page table entries will not have a pte_pv
2493 *
2494 * NOTE: Kernel page table entries will not have a pt_pv. That is, wiring
2495 * counts are not tracked in kernel page table pages.
d7f50089 2496 *
701c977e 2497 * It is assumed that the start and end are properly rounded to the page size.
d7f50089 2498 */
701c977e
MD
2499static void
2500pmap_scan(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva,
2501 void (*func)(pmap_t, struct pmap_inval_info *,
2502 pv_entry_t, pv_entry_t, vm_offset_t,
2503 pt_entry_t *, void *),
2504 void *arg)
2505{
2506 pv_entry_t pdp_pv; /* A page directory page PV */
2507 pv_entry_t pd_pv; /* A page directory PV */
2508 pv_entry_t pt_pv; /* A page table PV */
2509 pv_entry_t pte_pv; /* A page table entry PV */
2510 pt_entry_t *ptep;
48ffc236 2511 vm_offset_t va_next;
c8fe38ae 2512 struct pmap_inval_info info;
701c977e 2513 int error;
c8fe38ae
MD
2514
2515 if (pmap == NULL)
2516 return;
2517
701c977e
MD
2518 /*
2519 * Hold the token for stability; if the pmap is empty we have nothing
2520 * to do.
2521 */
b12defdc 2522 lwkt_gettoken(&pmap->pm_token);
701c977e 2523#if 0
10d6182e 2524 if (pmap->pm_stats.resident_count == 0) {
b12defdc 2525 lwkt_reltoken(&pmap->pm_token);
c8fe38ae 2526 return;
10d6182e 2527 }
701c977e 2528#endif
c8fe38ae
MD
2529
2530 pmap_inval_init(&info);
2531
2532 /*
701c977e
MD
2533 * Special handling for removing one page, which is a very common
2534 * operation (it is?).
2535 * NOTE: Locks must be ordered bottom-up. pte,pt,pd,pdp,pml4
c8fe38ae 2536 */
48ffc236 2537 if (sva + PAGE_SIZE == eva) {
701c977e
MD
2538 if (sva >= VM_MAX_USER_ADDRESS) {
2539 /*
2540 * Kernel mappings do not track wire counts on
2541 * page table pages.
2542 */
2543 pt_pv = NULL;
2544 pte_pv = pv_get(pmap, pmap_pte_pindex(sva));
2545 ptep = vtopte(sva);
2546 } else {
2547 /*
2548 * User mappings may or may not have a pte_pv but
2549 * will always have a pt_pv if the page is present.
2550 */
2551 pte_pv = pv_get(pmap, pmap_pte_pindex(sva));
2552 pt_pv = pv_get(pmap, pmap_pt_pindex(sva));
2553 if (pt_pv == NULL) {
2554 KKASSERT(pte_pv == NULL);
2555 goto fast_skip;
2556 }
2557 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(sva));
2558 }
2559 if (*ptep == 0) {
f2c5d4ab
MD
2560 /*
2561 * Unlike the pv_find() case below we actually
2562 * acquired a locked pv in this case so any
2563 * race should have been resolved. It is expected
2564 * to not exist.
2565 */
701c977e
MD
2566 KKASSERT(pte_pv == NULL);
2567 } else if (pte_pv) {
23b4bd44
MD
2568 KASSERT((*ptep & (PG_MANAGED|PG_V)) == (PG_MANAGED|
2569 PG_V),
2570 ("bad *ptep %016lx sva %016lx pte_pv %p",
2571 *ptep, sva, pte_pv));
701c977e
MD
2572 func(pmap, &info, pte_pv, pt_pv, sva, ptep, arg);
2573 } else {
23b4bd44
MD
2574 KASSERT((*ptep & (PG_MANAGED|PG_V)) == PG_V,
2575 ("bad *ptep %016lx sva %016lx pte_pv NULL",
2576 *ptep, sva));
701c977e 2577 func(pmap, &info, pte_pv, pt_pv, sva, ptep, arg);
48ffc236 2578 }
701c977e
MD
2579 if (pt_pv)
2580 pv_put(pt_pv);
2581fast_skip:
2582 pmap_inval_done(&info);
2583 lwkt_reltoken(&pmap->pm_token);
2584 return;
c8fe38ae
MD
2585 }
2586
701c977e
MD
2587 /*
2588 * NOTE: kernel mappings do not track page table pages, only
2589 * terminal pages.
2590 *
2591 * NOTE: Locks must be ordered bottom-up. pte,pt,pd,pdp,pml4.
2592 * However, for the scan to be efficient we try to
2593 * cache items top-down.
2594 */
2595 pdp_pv = NULL;
2596 pd_pv = NULL;
2597 pt_pv = NULL;
2598
48ffc236 2599 for (; sva < eva; sva = va_next) {
701c977e
MD
2600 lwkt_yield();
2601 if (sva >= VM_MAX_USER_ADDRESS) {
2602 if (pt_pv) {
2603 pv_put(pt_pv);
2604 pt_pv = NULL;
2605 }
2606 goto kernel_skip;
2607 }
2608
2609 /*
2610 * PDP cache
2611 */
2612 if (pdp_pv == NULL) {
2613 pdp_pv = pv_get(pmap, pmap_pdp_pindex(sva));
2614 } else if (pdp_pv->pv_pindex != pmap_pdp_pindex(sva)) {
2615 pv_put(pdp_pv);
2616 pdp_pv = pv_get(pmap, pmap_pdp_pindex(sva));
2617 }
2618 if (pdp_pv == NULL) {
48ffc236
JG
2619 va_next = (sva + NBPML4) & ~PML4MASK;
2620 if (va_next < sva)
2621 va_next = eva;
2622 continue;
2623 }
c8fe38ae 2624
701c977e
MD
2625 /*
2626 * PD cache
2627 */
2628 if (pd_pv == NULL) {
2629 if (pdp_pv) {
2630 pv_put(pdp_pv);
2631 pdp_pv = NULL;
2632 }
2633 pd_pv = pv_get(pmap, pmap_pd_pindex(sva));
2634 } else if (pd_pv->pv_pindex != pmap_pd_pindex(sva)) {
2635 pv_put(pd_pv);
2636 if (pdp_pv) {
2637 pv_put(pdp_pv);
2638 pdp_pv = NULL;
2639 }
2640 pd_pv = pv_get(pmap, pmap_pd_pindex(sva));
2641 }
2642 if (pd_pv == NULL) {
48ffc236
JG
2643 va_next = (sva + NBPDP) & ~PDPMASK;
2644 if (va_next < sva)
2645 va_next = eva;
2646 continue;
2647 }
c8fe38ae
MD
2648
2649 /*
701c977e 2650 * PT cache
c8fe38ae 2651 */
701c977e
MD
2652 if (pt_pv == NULL) {
2653 if (pdp_pv) {
2654 pv_put(pdp_pv);
2655 pdp_pv = NULL;
2656 }
2657 if (pd_pv) {
2658 pv_put(pd_pv);
2659 pd_pv = NULL;
2660 }
2661 pt_pv = pv_get(pmap, pmap_pt_pindex(sva));
2662 } else if (pt_pv->pv_pindex != pmap_pt_pindex(sva)) {
2663 if (pdp_pv) {
2664 pv_put(pdp_pv);
2665 pdp_pv = NULL;
2666 }
2667 if (pd_pv) {
2668 pv_put(pd_pv);
2669 pd_pv = NULL;
2670 }
2671 pv_put(pt_pv);
2672 pt_pv = pv_get(pmap, pmap_pt_pindex(sva));
2673 }
c8fe38ae
MD
2674
2675 /*
701c977e
MD
2676 * We will scan or skip a page table page so adjust va_next
2677 * either way.
c8fe38ae 2678 */
701c977e
MD
2679 if (pt_pv == NULL) {
2680 va_next = (sva + NBPDR) & ~PDRMASK;
2681 if (va_next < sva)
2682 va_next = eva;
c8fe38ae 2683 continue;
701c977e 2684 }
c8fe38ae
MD
2685
2686 /*
701c977e
MD
2687 * From this point in the loop testing pt_pv for non-NULL
2688 * means we are in UVM, else if it is NULL we are in KVM.
48ffc236 2689 */
701c977e
MD
2690kernel_skip:
2691 va_next = (sva + NBPDR) & ~PDRMASK;
2692 if (va_next < sva)
2693 va_next = eva;
48ffc236
JG
2694
2695 /*
c8fe38ae
MD
2696 * Limit our scan to either the end of the va represented
2697 * by the current page table page, or to the end of the
2698 * range being removed.
701c977e
MD
2699 *
2700 * Scan the page table for pages. Some pages may not be
2701 * managed (might not have a pv_entry).
2702 *
2703 * There is no page table management for kernel pages so
2704 * pt_pv will be NULL in that case, but otherwise pt_pv
2705 * is non-NULL, locked, and referenced.
c8fe38ae 2706 */
48ffc236
JG
2707 if (va_next > eva)
2708 va_next = eva;
c8fe38ae 2709
f2c5d4ab
MD
2710 /*
2711 * At this point a non-NULL pt_pv means a UVA, and a NULL
2712 * pt_pv means a KVA.
2713 */
701c977e
MD
2714 if (pt_pv)
2715 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(sva));
2716 else
2717 ptep = vtopte(sva);
2718
2719 while (sva < va_next) {
f2c5d4ab 2720 /*
90244566
MD
2721 * Acquire the related pte_pv, if any. If *ptep == 0
2722 * the related pte_pv should not exist, but if *ptep
2723 * is not zero the pte_pv may or may not exist (e.g.
2724 * will not exist for an unmanaged page).
f2c5d4ab 2725 *
90244566
MD
2726 * However a multitude of races are possible here.
2727 *
2728 * In addition, the (pt_pv, pte_pv) lock order is
2729 * backwards, so we have to be careful in aquiring
2730 * a properly locked pte_pv.
f2c5d4ab 2731 */
fc9ed34d 2732 lwkt_yield();
701c977e
MD
2733 if (pt_pv) {
2734 pte_pv = pv_get_try(pmap, pmap_pte_pindex(sva),
2735 &error);
2736 if (error) {
701c977e
MD
2737 if (pdp_pv) {
2738 pv_put(pdp_pv);
2739 pdp_pv = NULL;
2740 }
2741 if (pd_pv) {
2742 pv_put(pd_pv);
2743 pd_pv = NULL;
2744 }
2745 pv_put(pt_pv); /* must be non-NULL */
2746 pt_pv = NULL;
2747 pv_lock(pte_pv); /* safe to block now */
2748 pv_put(pte_pv);
2749 pte_pv = NULL;
2750 pt_pv = pv_get(pmap,
2751 pmap_pt_pindex(sva));
2752 continue;
2753 }
2754 } else {
2755 pte_pv = pv_get(pmap, pmap_pte_pindex(sva));
2756 }
2757
2758 /*
90244566 2759 * Ok, if *ptep == 0 we had better NOT have a pte_pv.
a505393f
MD
2760 */
2761 if (*ptep == 0) {
2762 if (pte_pv) {
90244566
MD
2763 kprintf("Unexpected non-NULL pte_pv "
2764 "%p pt_pv %p *ptep = %016lx\n",
2765 pte_pv, pt_pv, *ptep);
2766 panic("Unexpected non-NULL pte_pv");
a505393f 2767 }
90244566
MD
2768 sva += PAGE_SIZE;
2769 ++ptep;
a505393f
MD
2770 continue;
2771 }
2772
2773 /*
90244566
MD
2774 * Ready for the callback. The locked pte_pv (if any)
2775 * is consumed by the callback. pte_pv will exist if
2776 * the page is managed, and will not exist if it
2777 * isn't.
701c977e
MD
2778 */
2779 if (pte_pv) {
23b4bd44
MD
2780 KASSERT((*ptep & (PG_MANAGED|PG_V)) ==
2781 (PG_MANAGED|PG_V),
2782 ("bad *ptep %016lx sva %016lx "
2783 "pte_pv %p",
2784 *ptep, sva, pte_pv));
701c977e
MD
2785 func(pmap, &info, pte_pv, pt_pv, sva,
2786 ptep, arg);
2787 } else {
23b4bd44
MD
2788 KASSERT((*ptep & (PG_MANAGED|PG_V)) ==
2789 PG_V,
2790 ("bad *ptep %016lx sva %016lx "
2791 "pte_pv NULL",
2792 *ptep, sva));
701c977e
MD
2793 func(pmap, &info, pte_pv, pt_pv, sva,
2794 ptep, arg);
2795 }
f2c5d4ab 2796 pte_pv = NULL;
701c977e
MD
2797 sva += PAGE_SIZE;
2798 ++ptep;
c8fe38ae
MD
2799 }
2800 }
701c977e
MD
2801 if (pdp_pv) {
2802 pv_put(pdp_pv);
2803 pdp_pv = NULL;
2804 }
2805 if (pd_pv) {
2806 pv_put(pd_pv);
2807 pd_pv = NULL;
2808 }
2809 if (pt_pv) {
2810 pv_put(pt_pv);
2811 pt_pv = NULL;
2812 }
c2fb025d 2813 pmap_inval_done(&info);
b12defdc 2814 lwkt_reltoken(&pmap->pm_token);
701c977e
MD
2815}
2816
2817void
2818pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
2819{
2820 pmap_scan(pmap, sva, eva, pmap_remove_callback, NULL);
2821}
2822
2823static void
2824pmap_remove_callback(pmap_t pmap, struct pmap_inval_info *info,
2825 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
2826 pt_entry_t *ptep, void *arg __unused)
2827{
2828 pt_entry_t pte;
2829
2830 if (pte_pv) {
2831 /*
2832 * This will also drop pt_pv's wire_count. Note that
2833 * terminal pages are not wired based on mmu presence.
2834 */
2835 pmap_remove_pv_pte(pte_pv, pt_pv, info);
52bb73bc 2836 pmap_remove_pv_page(pte_pv);
701c977e
MD
2837 pv_free(pte_pv);
2838 } else {
2839 /*
2840 * pt_pv's wire_count is still bumped by unmanaged pages
2841 * so we must decrement it manually.
2842 */
2843 pmap_inval_interlock(info, pmap, va);
2844 pte = pte_load_clear(ptep);
2845 pmap_inval_deinterlock(info, pmap);
2846 if (pte & PG_W)
2847 atomic_add_long(&pmap->pm_stats.wired_count, -1);
2848 atomic_add_long(&pmap->pm_stats.resident_count, -1);
2849 if (pt_pv && vm_page_unwire_quick(pt_pv->pv_m))
2850 panic("pmap_remove: insufficient wirecount");
2851 }
d7f50089
YY
2852}
2853
2854/*
b12defdc
MD
2855 * Removes this physical page from all physical maps in which it resides.
2856 * Reflects back modify bits to the pager.
d7f50089 2857 *
b12defdc 2858 * This routine may not be called from an interrupt.
d7f50089 2859 */
bfc09ba0
MD
2860static
2861void
d7f50089
YY
2862pmap_remove_all(vm_page_t m)
2863{
c8fe38ae 2864 struct pmap_inval_info info;
c8fe38ae
MD
2865 pv_entry_t pv;
2866
2867 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2868 return;
2869
2870 pmap_inval_init(&info);
701c977e 2871 vm_page_spin_lock(m);
c8fe38ae 2872 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
701c977e
MD
2873 KKASSERT(pv->pv_m == m);
2874 if (pv_hold_try(pv)) {
2875 vm_page_spin_unlock(m);
2876 } else {
2877 vm_page_spin_unlock(m);
2878 pv_lock(pv);
2879 if (pv->pv_m != m) {
2880 pv_put(pv);
2881 vm_page_spin_lock(m);
2882 continue;
2883 }
b12defdc 2884 }
b12defdc 2885 /*
701c977e 2886 * Holding no spinlocks, pv is locked.
b12defdc 2887 */
701c977e 2888 pmap_remove_pv_pte(pv, NULL, &info);
52bb73bc 2889 pmap_remove_pv_page(pv);
701c977e 2890 pv_free(pv);
b12defdc 2891 vm_page_spin_lock(m);
c8fe38ae 2892 }
c8fe38ae 2893 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
52bb73bc 2894 vm_page_spin_unlock(m);
c2fb025d 2895 pmap_inval_done(&info);
d7f50089
YY
2896}
2897
2898/*
2899 * pmap_protect:
2900 *
2901 * Set the physical protection on the specified range of this map
2902 * as requested.
2903 *
2904 * This function may not be called from an interrupt if the map is
2905 * not the kernel_pmap.
2906 */
2907void
2908pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2909{
48ffc236
JG
2910 /* JG review for NX */
2911
c8fe38ae
MD
2912 if (pmap == NULL)
2913 return;
c8fe38ae
MD
2914 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2915 pmap_remove(pmap, sva, eva);
2916 return;
2917 }
c8fe38ae
MD
2918 if (prot & VM_PROT_WRITE)
2919 return;
701c977e
MD
2920 pmap_scan(pmap, sva, eva, pmap_protect_callback, &prot);
2921}
c8fe38ae 2922
701c977e
MD
2923static
2924void
2925pmap_protect_callback(pmap_t pmap, struct pmap_inval_info *info,
2926 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
2927 pt_entry_t *ptep, void *arg __unused)
2928{
2929 pt_entry_t pbits;
2930 pt_entry_t cbits;
2931 vm_page_t m;
c8fe38ae 2932
701c977e
MD
2933 /*
2934 * XXX non-optimal.
2935 */
2936 pmap_inval_interlock(info, pmap, va);
c2fb025d 2937again:
701c977e
MD
2938 pbits = *ptep;
2939 cbits = pbits;
2940 if (pte_pv) {
2941 m = NULL;
2942 if (pbits & PG_A) {
2943 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2944 KKASSERT(m == pte_pv->pv_m);
2945 vm_page_flag_set(m, PG_REFERENCED);
2946 cbits &= ~PG_A;
2947 }
2948 if (pbits & PG_M) {
2949 if (pmap_track_modified(pte_pv->pv_pindex)) {
2950 if (m == NULL)
48ffc236 2951 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
701c977e
MD
2952 vm_page_dirty(m);
2953 cbits &= ~PG_M;
c8fe38ae
MD
2954 }
2955 }
2956 }
701c977e
MD
2957 cbits &= ~PG_RW;
2958 if (pbits != cbits && !atomic_cmpset_long(ptep, pbits, cbits)) {
2959 goto again;
2960 }
2961 pmap_inval_deinterlock(info, pmap);
2962 if (pte_pv)
2963 pv_put(pte_pv);
d7f50089
YY
2964}
2965
2966/*
701c977e
MD
2967 * Insert the vm_page (m) at the virtual address (va), replacing any prior
2968 * mapping at that address. Set protection and wiring as requested.
d7f50089 2969 *
701c977e
MD
2970 * NOTE: This routine MUST insert the page into the pmap now, it cannot
2971 * lazy-evaluate.
d7f50089
YY
2972 */
2973void
2974pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2975 boolean_t wired)
701c977e
MD
2976{
2977 pmap_inval_info info;
2978 pv_entry_t pt_pv; /* page table */
2979 pv_entry_t pte_pv; /* page table entry */
2980 pt_entry_t *ptep;
c8fe38ae 2981 vm_paddr_t opa;
48ffc236 2982 pt_entry_t origpte, newpte;
701c977e 2983 vm_paddr_t pa;
c8fe38ae
MD
2984
2985 if (pmap == NULL)
2986 return;
48ffc236 2987 va = trunc_page(va);
c8fe38ae
MD
2988#ifdef PMAP_DIAGNOSTIC
2989 if (va >= KvaEnd)
2990 panic("pmap_enter: toobig");
2991 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
701c977e
MD
2992 panic("pmap_enter: invalid to pmap_enter page table "
2993 "pages (va: 0x%lx)", va);
c8fe38ae
MD
2994#endif
2995 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
701c977e
MD
2996 kprintf("Warning: pmap_enter called on UVA with "
2997 "kernel_pmap\n");
48ffc236
JG
2998#ifdef DDB
2999 db_print_backtrace();
3000#endif
c8fe38ae
MD
3001 }
3002 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
701c977e
MD
3003 kprintf("Warning: pmap_enter called on KVA without"
3004 "kernel_pmap\n");
48ffc236
JG
3005#ifdef DDB
3006 db_print_backtrace();
3007#endif
c8fe38ae
MD
3008 }
3009
3010 /*
701c977e
MD
3011 * Get locked PV entries for our new page table entry (pte_pv)
3012 * and for its parent page table (pt_pv). We need the parent
3013 * so we can resolve the location of the ptep.
3014 *
3015 * Only hardware MMU actions can modify the ptep out from
3016 * under us.
3017 *
3018 * if (m) is fictitious or unmanaged we do not create a managing
3019 * pte_pv for it. Any pre-existing page's management state must
3020 * match (avoiding code complexity).
3021 *
3022 * If the pmap is still being initialized we assume existing
3023 * page tables.
3024 *
3025 * Kernel mapppings do not track page table pages (i.e. pt_pv).
3026 * pmap_allocpte() checks the
3027 */
3028 if (pmap_initialized == FALSE) {
3029 pte_pv = NULL;
3030 pt_pv = NULL;
3031 ptep = vtopte(va);
3032 } else if (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) {
3033 pte_pv = NULL;
3034 if (va >= VM_MAX_USER_ADDRESS) {
3035 pt_pv = NULL;
3036 ptep = vtopte(va);
3037 } else {
3038 pt_pv = pmap_allocpte(pmap, pmap_pt_pindex(va), NULL);
3039 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
3040 }
3041 KKASSERT(*ptep == 0 || (*ptep & PG_MANAGED) == 0);
3042 } else {
3043 if (va >= VM_MAX_USER_ADDRESS) {
3044 pt_pv = NULL;
3045 pte_pv = pmap_allocpte(pmap, pmap_pte_pindex(va), NULL);
3046 ptep = vtopte(va);
3047 } else {
3048 pte_pv = pmap_allocpte(pmap, pmap_pte_pindex(va),
3049 &pt_pv);
3050 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
3051 }
3052 KKASSERT(*ptep == 0 || (*ptep & PG_MANAGED));
3053 }
c8fe38ae 3054
48ffc236 3055 pa = VM_PAGE_TO_PHYS(m);
701c977e 3056 origpte = *ptep;
c8fe38ae
MD
3057 opa = origpte & PG_FRAME;
3058
52bb73bc
MD
3059 newpte = (pt_entry_t)(pa | pte_prot(pmap, prot) | PG_V | PG_A);
3060 if (wired)
3061 newpte |= PG_W;
3062 if (va < VM_MAX_USER_ADDRESS)
3063 newpte |= PG_U;
3064 if (pte_pv)
3065 newpte |= PG_MANAGED;
3066 if (pmap == &kernel_pmap)
3067 newpte |= pgeflag;
3068
c8fe38ae 3069 /*
52bb73bc
MD
3070 * It is possible for multiple faults to occur in threaded
3071 * environments, the existing pte might be correct.
c8fe38ae 3072 */
52bb73bc
MD
3073 if (((origpte ^ newpte) & ~(pt_entry_t)(PG_M|PG_A)) == 0)
3074 goto done;
c8fe38ae 3075
52bb73bc
MD
3076 if ((prot & VM_PROT_NOSYNC) == 0)
3077 pmap_inval_init(&info);
701c977e 3078
c8fe38ae 3079 /*
52bb73bc
MD
3080 * Ok, either the address changed or the protection or wiring
3081 * changed.
701c977e 3082 *
52bb73bc
MD
3083 * Clear the current entry, interlocking the removal. For managed
3084 * pte's this will also flush the modified state to the vm_page.
3085 * Atomic ops are mandatory in order to ensure that PG_M events are
3086 * not lost during any transition.
701c977e
MD
3087 */
3088 if (opa) {
3089 if (pte_pv) {
52bb73bc
MD
3090 /*
3091 * pmap_remove_pv_pte() unwires pt_pv and assumes
3092 * we will free pte_pv, but since we are reusing
3093 * pte_pv we want to retain the wire count.
3094 */
701c977e
MD
3095 vm_page_wire_quick(pt_pv->pv_m);
3096 if (prot & VM_PROT_NOSYNC)
3097 pmap_remove_pv_pte(pte_pv, pt_pv, NULL);
3098 else
3099 pmap_remove_pv_pte(pte_pv, pt_pv, &info);
3100 if (pte_pv->pv_m)
52bb73bc 3101 pmap_remove_pv_page(pte_pv);
701c977e 3102 } else if (prot & VM_PROT_NOSYNC) {
52bb73bc
MD
3103 /* leave wire count on PT page intact */
3104 (void)pte_load_clear(ptep);
701c977e
MD
3105 cpu_invlpg((void *)va);
3106 atomic_add_long(&pmap->pm_stats.resident_count, -1);
3107 } else {
52bb73bc 3108 /* leave wire count on PT page intact */
701c977e 3109 pmap_inval_interlock(&info, pmap, va);
52bb73bc 3110 (void)pte_load_clear(ptep);
701c977e
MD
3111 pmap_inval_deinterlock(&info, pmap);
3112 atomic_add_long(&pmap->pm_stats.resident_count, -1);
5926987a 3113 }
701c977e 3114 KKASSERT(*ptep == 0);
c8fe38ae
MD
3115 }
3116
701c977e 3117 if (pte_pv) {
52bb73bc
MD
3118 /*
3119 * Enter on the PV list if part of our managed memory.
3120 * Wiring of the PT page is already handled.
3121 */
701c977e
MD
3122 KKASSERT(pte_pv->pv_m == NULL);
3123 vm_page_spin_lock(m);
3124 pte_pv->pv_m = m;
3125 TAILQ_INSERT_TAIL(&m->md.pv_list, pte_pv, pv_list);
3126 /*
3127 if (m->object)
3128 atomic_add_int(&m->object->agg_pv_list_count, 1);
3129 */
c8fe38ae 3130 vm_page_flag_set(m, PG_MAPPED);
701c977e 3131 vm_page_spin_unlock(m);
79ccbaae 3132 } else if (pt_pv && opa == 0) {
52bb73bc
MD
3133 /*
3134 * We have to adjust the wire count on the PT page ourselves
3135 * for unmanaged entries. If opa was non-zero we retained
3136 * the existing wire count from the removal.
3137 */
79ccbaae 3138 vm_page_wire_quick(pt_pv->pv_m);
c8fe38ae
MD
3139 }
3140
3141 /*
52bb73bc
MD
3142 * Ok, for UVM (pt_pv != NULL) we don't need to interlock or
3143 * invalidate anything, the TLB won't have any stale entries to
3144 * remove.
3145 *
3146 * For KVM there appear to still be issues. Theoretically we
3147 * should be able to scrap the interlocks entirely but we
3148 * get crashes.
c8fe38ae 3149 */
52bb73bc
MD
3150 if ((prot & VM_PROT_NOSYNC) == 0 && pt_pv == NULL)
3151 pmap_inval_interlock(&info, pmap, va);
3152 *(volatile pt_entry_t *)ptep = newpte;
c8fe38ae 3153
52bb73bc
MD
3154 if ((prot & VM_PROT_NOSYNC) == 0 && pt_pv == NULL)
3155 pmap_inval_deinterlock(&info, pmap);
3156 else if (pt_pv == NULL)
3157 cpu_invlpg((void *)va);
c8fe38ae
MD
3158
3159 if (wired)
52bb73bc
MD
3160 atomic_add_long(&pmap->pm_stats.wired_count, 1);
3161 if (newpte & PG_RW)
3162 vm_page_flag_set(m, PG_WRITEABLE);
3163 if (pte_pv == NULL)
3164 atomic_add_long(&pmap->pm_stats.resident_count, 1);
c8fe38ae
MD
3165
3166 /*
52bb73bc 3167 * Cleanup
c8fe38ae 3168 */
52bb73bc 3169 if ((prot & VM_PROT_NOSYNC) == 0 || pte_pv == NULL)
b12defdc 3170 pmap_inval_done(&info);
52bb73bc
MD
3171done:
3172 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
701c977e
MD
3173
3174 /*
3175 * Cleanup the pv entry, allowing other accessors.
3176 */
3177 if (pte_pv)
3178 pv_put(pte_pv);
3179 if (pt_pv)
3180 pv_put(pt_pv);
d7f50089
YY
3181}
3182
3183/*
c8fe38ae
MD
3184 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
3185 * This code also assumes that the pmap has no pre-existing entry for this
3186 * VA.
d7f50089 3187 *
c8fe38ae 3188 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 3189 */
bfc09ba0 3190void
c8fe38ae 3191pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
d7f50089 3192{
701c977e 3193 pmap_enter(pmap, va, m, VM_PROT_READ, FALSE);
d7f50089
YY
3194}
3195
3196/*
c8fe38ae
MD
3197 * Make a temporary mapping for a physical address. This is only intended
3198 * to be used for panic dumps.
fb8345e6
MD
3199 *
3200 * The caller is responsible for calling smp_invltlb().
d7f50089 3201 */
c8fe38ae 3202void *
8e5ea5f7 3203pmap_kenter_temporary(vm_paddr_t pa, long i)
d7f50089 3204{
fb8345e6 3205 pmap_kenter_quick((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
c8fe38ae 3206 return ((void *)crashdumpmap);
d7f50089
YY
3207}
3208
c8fe38ae
MD
3209#define MAX_INIT_PT (96)
3210
d7f50089
YY
3211/*
3212 * This routine preloads the ptes for a given object into the specified pmap.
3213 * This eliminates the blast of soft faults on process startup and
3214 * immediately after an mmap.
3215 */
3216static int pmap_object_init_pt_callback(vm_page_t p, void *data);
3217
3218void
3219pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
3220 vm_object_t object, vm_pindex_t pindex,
3221 vm_size_t size, int limit)
3222{
c8fe38ae
MD
3223 struct rb_vm_page_scan_info info;
3224 struct lwp *lp;
48ffc236 3225 vm_size_t psize;
c8fe38ae
MD
3226
3227 /*
3228 * We can't preinit if read access isn't set or there is no pmap
3229 * or object.
3230 */
3231 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
3232 return;
3233
3234 /*
3235 * We can't preinit if the pmap is not the current pmap
3236 */
3237 lp = curthread->td_lwp;
3238 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
3239 return;
3240
b2b3ffcd 3241 psize = x86_64_btop(size);
c8fe38ae
MD
3242
3243 if ((object->type != OBJT_VNODE) ||
3244 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
3245 (object->resident_page_count > MAX_INIT_PT))) {
3246 return;
3247 }
3248
701c977e 3249 if (pindex + psize > object->size) {
c8fe38ae
MD
3250 if (object->size < pindex)
3251 return;
3252 psize = object->size - pindex;
3253 }
3254
3255 if (psize == 0)
3256 return;
3257
3258 /*
3259 * Use a red-black scan to traverse the requested range and load
3260 * any valid pages found into the pmap.
3261 *
a5fc46c9
MD
3262 * We cannot safely scan the object's memq without holding the
3263 * object token.
c8fe38ae
MD
3264 */
3265 info.start_pindex = pindex;
3266 info.end_pindex = pindex + psize - 1;
3267 info.limit = limit;
3268 info.mpte = NULL;
3269 info.addr = addr;
3270 info.pmap = pmap;
3271
54341a3b 3272 vm_object_hold_shared(object);
c8fe38ae
MD
3273 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
3274 pmap_object_init_pt_callback, &info);
a5fc46c9 3275 vm_object_drop(object);
d7f50089
YY
3276}
3277
3278static
3279int
3280pmap_object_init_pt_callback(vm_page_t p, void *data)
3281{
c8fe38ae
MD
3282 struct rb_vm_page_scan_info *info = data;
3283 vm_pindex_t rel_index;
b12defdc 3284
c8fe38ae
MD
3285 /*
3286 * don't allow an madvise to blow away our really
3287 * free pages allocating pv entries.
3288 */
3289 if ((info->limit & MAP_PREFAULT_MADVISE) &&
3290 vmstats.v_free_count < vmstats.v_free_reserved) {
3291 return(-1);
3292 }
b12defdc
MD
3293 if (vm_page_busy_try(p, TRUE))
3294 return 0;
c8fe38ae 3295 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
b12defdc 3296 (p->flags & PG_FICTITIOUS) == 0) {
c8fe38ae
MD
3297 if ((p->queue - p->pc) == PQ_CACHE)
3298 vm_page_deactivate(p);
c8fe38ae
MD
3299 rel_index = p->pindex - info->start_pindex;
3300 pmap_enter_quick(info->pmap,
b2b3ffcd 3301 info->addr + x86_64_ptob(rel_index), p);
c8fe38ae 3302 }
b12defdc 3303 vm_page_wakeup(p);
fc9ed34d 3304 lwkt_yield();
d7f50089
YY
3305 return(0);
3306}
3307
3308/*
701c977e
MD
3309 * Return TRUE if the pmap is in shape to trivially pre-fault the specified
3310 * address.
1b9d3514 3311 *
701c977e
MD
3312 * Returns FALSE if it would be non-trivial or if a pte is already loaded
3313 * into the slot.
54341a3b
MD
3314 *
3315 * XXX This is safe only because page table pages are not freed.
d7f50089 3316 */
1b9d3514
MD
3317int
3318pmap_prefault_ok(pmap_t pmap, vm_offset_t addr)
d7f50089 3319{
1b9d3514 3320 pt_entry_t *pte;
c8fe38ae 3321
54341a3b 3322 /*spin_lock(&pmap->pm_spin);*/
701c977e
MD
3323 if ((pte = pmap_pte(pmap, addr)) != NULL) {
3324 if (*pte & PG_V) {
54341a3b 3325 /*spin_unlock(&pmap->pm_spin);*/
701c977e
MD
3326 return FALSE;
3327 }
10d6182e 3328 }
54341a3b 3329 /*spin_unlock(&pmap->pm_spin);*/
701c977e 3330 return TRUE;
d7f50089
YY
3331}
3332
3333/*
701c977e
MD
3334 * Change the wiring attribute for a pmap/va pair. The mapping must already
3335 * exist in the pmap. The mapping may or may not be managed.
d7f50089
YY
3336 */
3337void
3338pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3339{
701c977e
MD
3340 pt_entry_t *ptep;
3341 pv_entry_t pv;
c8fe38ae
MD
3342
3343 if (pmap == NULL)
3344 return;
b12defdc 3345 lwkt_gettoken(&pmap->pm_token);
701c977e
MD
3346 pv = pmap_allocpte(pmap, pmap_pt_pindex(va), NULL);
3347 ptep = pv_pte_lookup(pv, pmap_pte_index(va));
c8fe38ae 3348
701c977e
MD
3349 if (wired && !pmap_pte_w(ptep))
3350 atomic_add_long(&pmap->pm_stats.wired_count, 1);
3351 else if (!wired && pmap_pte_w(ptep))
3352 atomic_add_long(&pmap->pm_stats.wired_count, -1);
c8fe38ae
MD
3353
3354 /*
3355 * Wiring is not a hardware characteristic so there is no need to
3356 * invalidate TLB. However, in an SMP environment we must use
3357 * a locked bus cycle to update the pte (if we are not using
3358 * the pmap_inval_*() API that is)... it's ok to do this for simple
3359 * wiring changes.
3360 */
3361#ifdef SMP
3362 if (wired)
701c977e 3363 atomic_set_long(ptep, PG_W);
c8fe38ae 3364 else
701c977e 3365 atomic_clear_long(ptep, PG_W);
c8fe38ae
MD
3366#else
3367 if (wired)
701c977e 3368 atomic_set_long_nonlocked(ptep, PG_W);
c8fe38ae 3369 else
701c977e 3370 atomic_clear_long_nonlocked(ptep, PG_W);
c8fe38ae 3371#endif
701c977e 3372 pv_put(pv);
b12defdc 3373 lwkt_reltoken(&pmap->pm_token);
d7f50089
YY
3374}
3375
c8fe38ae
MD
3376
3377
d7f50089 3378/*
a5fc46c9
MD
3379 * Copy the range specified by src_addr/len from the source map to
3380 * the range dst_addr/len in the destination map.
d7f50089 3381 *
a5fc46c9 3382 * This routine is only advisory and need not do anything.
d7f50089
YY
3383 */
3384void
3385pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
bfc09ba0 3386 vm_size_t len, vm_offset_t src_addr)
d7f50089
YY
3387{
3388