Sync with FreeBSD(if_anreg.h 1.1.2.9, if_an.c 1.2.2.14 and
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
537b8fd3 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.29 2005/07/28 16:52:44 joerg Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
41d6c56f 103#include <sys/thread2.h>
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104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
537b8fd3 317 struct an_ltv_ssidlist_new ssid;
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318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
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323 if (error)
324 return (error);
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325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
902f6373 328 return(ENXIO);
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329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
537b8fd3 342 sc->mpi350 = 0;
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343 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
344 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
345
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346 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
347 device_get_unit(dev));
984263bc 348 an_reset(sc);
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349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
902f6373 351 return(ENXIO);
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352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
902f6373 354 return(ENXIO);
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355
356 /* See if the ssid matches what we expect ... but doesn't have to */
537b8fd3 357 if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID))
902f6373 358 return(ENXIO);
984263bc 359
902f6373 360 return(0);
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361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
c45c9d6a 472 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
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473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 477 BUS_DMA_WAITOK, &dma->an_dma_map);
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478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
c45c9d6a 485 mapflags);
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486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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591 if_printf(&sc->arpcom.ac_if,
592 "failed to allocate RX descriptor\n");
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593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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620 if_printf(&sc->arpcom.ac_if,
621 "failed to allocate TX descriptor\n");
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622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
650 if_printf(&sc->arpcom.ac_if,
651 "failed to allocate host descriptor\n");
984263bc
MD
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
1c70eebf 669an_attach(sc, dev, flags)
984263bc 670 struct an_softc *sc;
1c70eebf 671 device_t dev;
984263bc
MD
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
984263bc
MD
678 sc->an_associated = 0;
679 sc->an_monitor = 0;
680 sc->an_was_monitor = 0;
681 sc->an_flash_buffer = NULL;
682
1c70eebf
JS
683 ifp->if_softc = sc;
684 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
685
984263bc
MD
686 /* Reset the NIC. */
687 an_reset(sc);
688 if (sc->mpi350) {
689 error = an_init_mpi350_desc(sc);
690 if (error)
691 return(error);
692 }
693
694 /* Load factory config */
695 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 696 device_printf(dev, "failed to load config data\n");
984263bc
MD
697 return(EIO);
698 }
699
700 /* Read the current configuration */
701 sc->an_config.an_type = AN_RID_GENCONFIG;
702 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
703 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 704 device_printf(dev, "read record failed\n");
984263bc
MD
705 return(EIO);
706 }
707
708 /* Read the card capabilities */
709 sc->an_caps.an_type = AN_RID_CAPABILITIES;
710 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
711 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 712 device_printf(dev, "read record failed\n");
984263bc
MD
713 return(EIO);
714 }
715
716 /* Read ssid list */
717 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 718 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 719 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 720 device_printf(dev, "read record failed\n");
984263bc
MD
721 return(EIO);
722 }
723
724 /* Read AP list */
725 sc->an_aplist.an_type = AN_RID_APLIST;
726 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
727 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 728 device_printf(dev, "read record failed\n");
984263bc
MD
729 return(EIO);
730 }
731
732#ifdef ANCACHE
733 /* Read the RSSI <-> dBm map */
734 sc->an_have_rssimap = 0;
735 if (sc->an_caps.an_softcaps & 8) {
736 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
737 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
738 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 739 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 740 } else {
1c70eebf 741 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
742 sc->an_have_rssimap = 1;
743 }
744 } else {
1c70eebf 745 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
746 }
747#endif
748
984263bc
MD
749 ifp->if_mtu = ETHERMTU;
750 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
751 ifp->if_ioctl = an_ioctl;
984263bc
MD
752 ifp->if_start = an_start;
753 ifp->if_watchdog = an_watchdog;
754 ifp->if_init = an_init;
755 ifp->if_baudrate = 10000000;
38de8487
JS
756 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
757 ifq_set_ready(&ifp->if_snd);
984263bc
MD
758
759 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
760 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
761 sizeof(AN_DEFAULT_NODENAME) - 1);
762
537b8fd3
JS
763 bzero(sc->an_ssidlist.an_entry[0].an_ssid,
764 sizeof(sc->an_ssidlist.an_entry[0].an_ssid));
765 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid,
766 sizeof(AN_DEFAULT_NETNAME) - 1);
767 sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME);
984263bc
MD
768
769 sc->an_config.an_opmode =
770 AN_OPMODE_INFRASTRUCTURE_STATION;
771
772 sc->an_tx_rate = 0;
773 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
774
775 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
776#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
777 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
778 IFM_IEEE80211_ADHOC, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
780 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
781 IFM_IEEE80211_ADHOC, 0), 0);
782 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
783 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
784 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
785 IFM_IEEE80211_ADHOC, 0), 0);
786 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
787 }
788 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
789 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
790 IFM_IEEE80211_ADHOC, 0), 0);
791 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
792 }
793 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
794 IFM_IEEE80211_ADHOC, 0), 0);
795 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
796#undef ADD
797 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
798 0, 0));
799
800 /*
801 * Call MI attach routine.
802 */
0a8b5977 803 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
MD
804
805 return(0);
806}
807
fcb0f42c
JS
808int
809an_detach(device_t dev)
810{
811 struct an_softc *sc = device_get_softc(dev);
812 struct ifnet *ifp = &sc->arpcom.ac_if;
813
814 crit_enter();
815 an_stop(sc);
816 ifmedia_removeall(&sc->an_ifmedia);
817 ether_ifdetach(ifp);
818 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
819 crit_exit();
820
821 an_release_resources(dev);
822 return 0;
823}
824
984263bc
MD
825static void
826an_rxeof(sc)
827 struct an_softc *sc;
828{
829 struct ifnet *ifp;
830 struct ether_header *eh;
831 struct ieee80211_frame *ih;
832 struct an_rxframe rx_frame;
833 struct an_rxframe_802_3 rx_frame_802_3;
834 struct mbuf *m;
835 int len, id, error = 0, i, count = 0;
836 int ieee80211_header_len;
837 u_char *bpf_buf;
838 u_short fc1;
839 struct an_card_rx_desc an_rx_desc;
840 u_int8_t *buf;
841
842 ifp = &sc->arpcom.ac_if;
843
844 if (!sc->mpi350) {
845 id = CSR_READ_2(sc, AN_RX_FID);
846
847 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
848 /* read raw 802.11 packet */
849 bpf_buf = sc->buf_802_11;
850
851 /* read header */
852 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
853 sizeof(rx_frame))) {
854 ifp->if_ierrors++;
855 return;
856 }
857
858 /*
859 * skip beacon by default since this increases the
860 * system load a lot
861 */
862
863 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
864 (rx_frame.an_frame_ctl &
865 IEEE80211_FC0_SUBTYPE_BEACON)) {
866 return;
867 }
868
869 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
870 len = rx_frame.an_rx_payload_len
871 + sizeof(rx_frame);
872 /* Check for insane frame length */
873 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
874 if_printf(ifp,
875 "oversized packet received "
876 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
877 ifp->if_ierrors++;
878 return;
879 }
880
881 bcopy((char *)&rx_frame,
882 bpf_buf, sizeof(rx_frame));
883
884 error = an_read_data(sc, id, sizeof(rx_frame),
885 (caddr_t)bpf_buf+sizeof(rx_frame),
886 rx_frame.an_rx_payload_len);
887 } else {
888 fc1=rx_frame.an_frame_ctl >> 8;
889 ieee80211_header_len =
890 sizeof(struct ieee80211_frame);
891 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
892 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
893 ieee80211_header_len += ETHER_ADDR_LEN;
894 }
895
896 len = rx_frame.an_rx_payload_len
897 + ieee80211_header_len;
898 /* Check for insane frame length */
899 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
900 if_printf(ifp,
901 "oversized packet received "
902 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
903 ifp->if_ierrors++;
904 return;
905 }
906
907 ih = (struct ieee80211_frame *)bpf_buf;
908
909 bcopy((char *)&rx_frame.an_frame_ctl,
910 (char *)ih, ieee80211_header_len);
911
912 error = an_read_data(sc, id, sizeof(rx_frame) +
913 rx_frame.an_gaplen,
914 (caddr_t)ih +ieee80211_header_len,
915 rx_frame.an_rx_payload_len);
916 }
7600679e 917 BPF_TAP(ifp, bpf_buf, len);
984263bc 918 } else {
17b71a59 919 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
920 if (m == NULL) {
921 ifp->if_ierrors++;
922 return;
923 }
984263bc
MD
924 m->m_pkthdr.rcvif = ifp;
925 /* Read Ethernet encapsulated packet */
926
927#ifdef ANCACHE
928 /* Read NIC frame header */
929 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
930 sizeof(rx_frame))) {
931 ifp->if_ierrors++;
932 return;
933 }
934#endif
935 /* Read in the 802_3 frame header */
936 if (an_read_data(sc, id, 0x34,
937 (caddr_t)&rx_frame_802_3,
938 sizeof(rx_frame_802_3))) {
939 ifp->if_ierrors++;
940 return;
941 }
942 if (rx_frame_802_3.an_rx_802_3_status != 0) {
943 ifp->if_ierrors++;
944 return;
945 }
946 /* Check for insane frame length */
947 len = rx_frame_802_3.an_rx_802_3_payload_len;
948 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
949 if_printf(ifp,
950 "oversized packet received (%d, %d)\n",
951 len, MCLBYTES);
984263bc
MD
952 ifp->if_ierrors++;
953 return;
954 }
955 m->m_pkthdr.len = m->m_len =
956 rx_frame_802_3.an_rx_802_3_payload_len + 12;
957
958 eh = mtod(m, struct ether_header *);
959
960 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
961 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
962 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
963 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
964
965 /* in mbuf header type is just before payload */
966 error = an_read_data(sc, id, 0x44,
967 (caddr_t)&(eh->ether_type),
968 rx_frame_802_3.an_rx_802_3_payload_len);
969
970 if (error) {
971 m_freem(m);
972 ifp->if_ierrors++;
973 return;
974 }
975 ifp->if_ipackets++;
976
984263bc 977#ifdef ANCACHE
3013ac0e 978 an_cache_store(sc, m,
984263bc
MD
979 rx_frame.an_rx_signal_strength,
980 rx_frame.an_rsvd0);
981#endif
3013ac0e 982 (*ifp->if_input)(ifp, m);
984263bc
MD
983 }
984
985 } else { /* MPI-350 */
986 for (count = 0; count < AN_MAX_RX_DESC; count++){
987 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
988 ((u_int32_t*)&an_rx_desc)[i]
989 = CSR_MEM_AUX_READ_4(sc,
990 AN_RX_DESC_OFFSET
991 + (count * sizeof(an_rx_desc))
992 + (i * 4));
993
994 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
995 buf = sc->an_rx_buffer[count].an_dma_vaddr;
996
17b71a59 997 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
998 if (m == NULL) {
999 ifp->if_ierrors++;
1000 return;
1001 }
984263bc
MD
1002 m->m_pkthdr.rcvif = ifp;
1003 /* Read Ethernet encapsulated packet */
1004
1005 /*
1006 * No ANCACHE support since we just get back
1007 * an Ethernet packet no 802.11 info
1008 */
1009#if 0
1010#ifdef ANCACHE
1011 /* Read NIC frame header */
1012 bcopy(buf, (caddr_t)&rx_frame,
1013 sizeof(rx_frame));
1014#endif
1015#endif
1016 /* Check for insane frame length */
1017 len = an_rx_desc.an_len + 12;
1018 if (len > MCLBYTES) {
1c70eebf
JS
1019 if_printf(ifp,
1020 "oversized packet received "
1021 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1022 ifp->if_ierrors++;
1023 return;
1024 }
1025
1026 m->m_pkthdr.len = m->m_len =
1027 an_rx_desc.an_len + 12;
1028
1029 eh = mtod(m, struct ether_header *);
1030
1031 bcopy(buf, (char *)eh,
1032 m->m_pkthdr.len);
1033
1034 ifp->if_ipackets++;
1035
984263bc
MD
1036#if 0
1037#ifdef ANCACHE
3013ac0e 1038 an_cache_store(sc, m,
984263bc
MD
1039 rx_frame.an_rx_signal_strength,
1040 rx_frame.an_rsvd0);
1041#endif
1042#endif
3013ac0e 1043 (*ifp->if_input)(ifp, m);
984263bc
MD
1044
1045 an_rx_desc.an_valid = 1;
1046 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1047 an_rx_desc.an_done = 0;
1048 an_rx_desc.an_phys =
1049 sc->an_rx_buffer[count].an_dma_paddr;
1050
1051 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1052 CSR_MEM_AUX_WRITE_4(sc,
1053 AN_RX_DESC_OFFSET
1054 + (count * sizeof(an_rx_desc))
1055 + (i * 4),
1056 ((u_int32_t*)&an_rx_desc)[i]);
1057
1058 } else {
1c70eebf
JS
1059 if_printf(ifp, "Didn't get valid RX packet "
1060 "%x %x %d\n",
1061 an_rx_desc.an_done,
1062 an_rx_desc.an_valid,
1063 an_rx_desc.an_len);
984263bc
MD
1064 }
1065 }
1066 }
1067}
1068
1069static void
1070an_txeof(sc, status)
1071 struct an_softc *sc;
1072 int status;
1073{
1074 struct ifnet *ifp;
1075 int id, i;
1076
1077 ifp = &sc->arpcom.ac_if;
1078
1079 ifp->if_timer = 0;
1080 ifp->if_flags &= ~IFF_OACTIVE;
1081
1082 if (!sc->mpi350) {
537b8fd3 1083 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
984263bc
MD
1084
1085 if (status & AN_EV_TX_EXC) {
1086 ifp->if_oerrors++;
1087 } else
1088 ifp->if_opackets++;
1089
1090 for (i = 0; i < AN_TX_RING_CNT; i++) {
1091 if (id == sc->an_rdata.an_tx_ring[i]) {
1092 sc->an_rdata.an_tx_ring[i] = 0;
1093 break;
1094 }
1095 }
1096
1097 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1098 } else { /* MPI 350 */
537b8fd3
JS
1099 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
1100 if (!sc->an_rdata.an_tx_empty){
1101 if (status & AN_EV_TX_EXC) {
1102 ifp->if_oerrors++;
1103 } else
1104 ifp->if_opackets++;
1105 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1106 if (sc->an_rdata.an_tx_prod ==
1107 sc->an_rdata.an_tx_cons)
1108 sc->an_rdata.an_tx_empty = 1;
1109 }
984263bc 1110 }
984263bc
MD
1111}
1112
1113/*
1114 * We abuse the stats updater to check the current NIC status. This
1115 * is important because we don't want to allow transmissions until
1116 * the NIC has synchronized to the current cell (either as the master
1117 * in an ad-hoc group, or as a station connected to an access point).
1118 */
1119static void
1120an_stats_update(xsc)
1121 void *xsc;
1122{
1123 struct an_softc *sc;
1124 struct ifnet *ifp;
984263bc
MD
1125
1126 sc = xsc;
1127 ifp = &sc->arpcom.ac_if;
1128
41d6c56f
JS
1129 crit_enter();
1130
984263bc
MD
1131 sc->an_status.an_type = AN_RID_STATUS;
1132 sc->an_status.an_len = sizeof(struct an_ltv_status);
1133 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1134
1135 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1136 sc->an_associated = 1;
1137 else
1138 sc->an_associated = 0;
1139
41d6c56f
JS
1140 /* Don't do this while we're not transmitting */
1141 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
1142 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1143 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1144 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
984263bc
MD
1145 }
1146
89c0f216 1147 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 1148
41d6c56f 1149 crit_exit();
984263bc
MD
1150}
1151
1152void
1153an_intr(xsc)
1154 void *xsc;
1155{
1156 struct an_softc *sc;
1157 struct ifnet *ifp;
1158 u_int16_t status;
1159
1160 sc = (struct an_softc*)xsc;
1161
984263bc
MD
1162 ifp = &sc->arpcom.ac_if;
1163
1164 /* Disable interrupts. */
1165 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1166
1167 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
537b8fd3 1168 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350));
984263bc 1169
537b8fd3
JS
1170 if (status & AN_EV_MIC)
1171 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC);
984263bc
MD
1172
1173 if (status & AN_EV_LINKSTAT) {
1174 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1175 == AN_LINKSTAT_ASSOCIATED)
1176 sc->an_associated = 1;
1177 else
1178 sc->an_associated = 0;
1179 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1180 }
1181
1182 if (status & AN_EV_RX) {
1183 an_rxeof(sc);
1184 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1185 }
1186
537b8fd3
JS
1187 if (sc->mpi350 && status & AN_EV_TX_CPY) {
1188 an_txeof(sc, status);
1189 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_CPY);
1190 }
1191
984263bc
MD
1192 if (status & AN_EV_TX) {
1193 an_txeof(sc, status);
1194 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1195 }
1196
1197 if (status & AN_EV_TX_EXC) {
1198 an_txeof(sc, status);
1199 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1200 }
1201
1202 if (status & AN_EV_ALLOC)
1203 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1204
1205 /* Re-enable interrupts. */
537b8fd3 1206 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc 1207
38de8487 1208 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1209 an_start(ifp);
1210
1211 return;
1212}
1213
1214static int
1215an_cmd_struct(sc, cmd, reply)
1216 struct an_softc *sc;
1217 struct an_command *cmd;
1218 struct an_reply *reply;
1219{
1220 int i;
1221
1222 for (i = 0; i != AN_TIMEOUT; i++) {
1223 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1224 DELAY(1000);
1225 } else
1226 break;
1227 }
1228 if( i == AN_TIMEOUT) {
1229 printf("BUSY\n");
1230 return(ETIMEDOUT);
1231 }
1232
1233 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1234 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1235 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1236 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1237
1238 for (i = 0; i < AN_TIMEOUT; i++) {
1239 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1240 break;
1241 DELAY(1000);
1242 }
1243
1244 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1245 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1246 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1247 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1248
1249 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1250 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1251
1252 /* Ack the command */
1253 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1254
1255 if (i == AN_TIMEOUT)
1256 return(ETIMEDOUT);
1257
1258 return(0);
1259}
1260
1261static int
1262an_cmd(sc, cmd, val)
1263 struct an_softc *sc;
1264 int cmd;
1265 int val;
1266{
1267 int i, s = 0;
1268
1269 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1270 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1271 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1272 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1273
1274 for (i = 0; i < AN_TIMEOUT; i++) {
1275 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1276 break;
1277 else {
1278 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1279 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1280 }
1281 }
1282
1283 for (i = 0; i < AN_TIMEOUT; i++) {
1284 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1285 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1286 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1287 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1288 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1289 break;
1290 }
1291
1292 /* Ack the command */
1293 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1294
1295 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1296 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1297
1298 if (i == AN_TIMEOUT)
1299 return(ETIMEDOUT);
1300
1301 return(0);
1302}
1303
1304/*
1305 * This reset sequence may look a little strange, but this is the
1306 * most reliable method I've found to really kick the NIC in the
1307 * head and force it to reboot correctly.
1308 */
1309static void
1310an_reset(sc)
1311 struct an_softc *sc;
1312{
984263bc
MD
1313 an_cmd(sc, AN_CMD_ENABLE, 0);
1314 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1315 an_cmd(sc, AN_CMD_NOOP2, 0);
1316
1317 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1318 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1319
1320 an_cmd(sc, AN_CMD_DISABLE, 0);
1321
1322 return;
1323}
1324
1325/*
1326 * Read an LTV record from the NIC.
1327 */
1328static int
1329an_read_record(sc, ltv)
1330 struct an_softc *sc;
1331 struct an_ltv_gen *ltv;
1332{
1333 struct an_ltv_gen *an_ltv;
1334 struct an_card_rid_desc an_rid_desc;
1335 struct an_command cmd;
1336 struct an_reply reply;
1337 u_int16_t *ptr;
1338 u_int8_t *ptr2;
1339 int i, len;
1340
1341 if (ltv->an_len < 4 || ltv->an_type == 0)
1342 return(EINVAL);
1343
1344 if (!sc->mpi350){
1345 /* Tell the NIC to enter record read mode. */
1346 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1347 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1348 return(EIO);
1349 }
1350
1351 /* Seek to the record. */
1352 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1353 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1354 return(EIO);
1355 }
1356
1357 /*
1358 * Read the length and record type and make sure they
1359 * match what we expect (this verifies that we have enough
1360 * room to hold all of the returned data).
1361 * Length includes type but not length.
1362 */
1363 len = CSR_READ_2(sc, AN_DATA1);
1364 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1365 if_printf(&sc->arpcom.ac_if,
1366 "record length mismatch -- expected %d, "
1367 "got %d for Rid %x\n",
1368 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1369 len = ltv->an_len - 2;
1370 } else {
1371 ltv->an_len = len + 2;
1372 }
1373
1374 /* Now read the data. */
1375 len -= 2; /* skip the type */
1376 ptr = &ltv->an_val;
1377 for (i = len; i > 1; i -= 2)
1378 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1379 if (i) {
1380 ptr2 = (u_int8_t *)ptr;
1381 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1382 }
1383 } else { /* MPI-350 */
1384 an_rid_desc.an_valid = 1;
1385 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1386 an_rid_desc.an_rid = 0;
1387 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1388 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1389
1390 bzero(&cmd, sizeof(cmd));
1391 bzero(&reply, sizeof(reply));
1392 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1393 cmd.an_parm0 = ltv->an_type;
1394
1395 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1396 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1397 ((u_int32_t*)&an_rid_desc)[i]);
1398
1399 if (an_cmd_struct(sc, &cmd, &reply)
1400 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1401 if_printf(&sc->arpcom.ac_if,
1402 "failed to read RID %x %x %x %x %x, %d\n",
1403 ltv->an_type,
1404 reply.an_status,
1405 reply.an_resp0,
1406 reply.an_resp1,
1407 reply.an_resp2,
1408 i);
984263bc
MD
1409 return(EIO);
1410 }
1411
1412 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1413 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1414 an_rid_desc.an_len = an_ltv->an_len;
1415 }
1416
1417 if (an_rid_desc.an_len > 2)
1418 bcopy(&an_ltv->an_type,
1419 &ltv->an_val,
1420 an_rid_desc.an_len - 2);
1421 ltv->an_len = an_rid_desc.an_len + 2;
1422 }
1423
1424 if (an_dump)
1425 an_dump_record(sc, ltv, "Read");
1426
1427 return(0);
1428}
1429
1430/*
1431 * Same as read, except we inject data instead of reading it.
1432 */
1433static int
1434an_write_record(sc, ltv)
1435 struct an_softc *sc;
1436 struct an_ltv_gen *ltv;
1437{
1438 struct an_card_rid_desc an_rid_desc;
1439 struct an_command cmd;
1440 struct an_reply reply;
1441 char *buf;
1442 u_int16_t *ptr;
1443 u_int8_t *ptr2;
1444 int i, len;
1445
1446 if (an_dump)
1447 an_dump_record(sc, ltv, "Write");
1448
1449 if (!sc->mpi350){
1450 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1451 return(EIO);
1452
1453 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1454 return(EIO);
1455
1456 /*
1457 * Length includes type but not length.
1458 */
1459 len = ltv->an_len - 2;
1460 CSR_WRITE_2(sc, AN_DATA1, len);
1461
1462 len -= 2; /* skip the type */
1463 ptr = &ltv->an_val;
1464 for (i = len; i > 1; i -= 2)
1465 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1466 if (i) {
1467 ptr2 = (u_int8_t *)ptr;
1468 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1469 }
1470
1471 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1472 return(EIO);
1473 } else {
1474 /* MPI-350 */
1475
1476 for (i = 0; i != AN_TIMEOUT; i++) {
1477 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1478 & AN_CMD_BUSY) {
1479 DELAY(10);
1480 } else
1481 break;
1482 }
1483 if (i == AN_TIMEOUT) {
1484 printf("BUSY\n");
1485 }
1486
1487 an_rid_desc.an_valid = 1;
1488 an_rid_desc.an_len = ltv->an_len - 2;
1489 an_rid_desc.an_rid = ltv->an_type;
1490 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1491
1492 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1493 an_rid_desc.an_len);
1494
1495 bzero(&cmd,sizeof(cmd));
1496 bzero(&reply,sizeof(reply));
1497 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1498 cmd.an_parm0 = ltv->an_type;
1499
1500 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1501 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1502 ((u_int32_t*)&an_rid_desc)[i]);
1503
1504 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1505 if_printf(&sc->arpcom.ac_if,
1506 "failed to write RID 1 %x %x %x %x %x, %d\n",
1507 ltv->an_type,
984263bc
MD
1508 reply.an_status,
1509 reply.an_resp0,
1510 reply.an_resp1,
1511 reply.an_resp2,
1512 i);
1513 return(EIO);
1514 }
1515
1516 ptr = (u_int16_t *)buf;
1517
1518 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1519 if_printf(&sc->arpcom.ac_if,
1520 "failed to write RID 2 %x %x %x %x %x, %d\n",
1521 ltv->an_type,
984263bc
MD
1522 reply.an_status,
1523 reply.an_resp0,
1524 reply.an_resp1,
1525 reply.an_resp2,
1526 i);
1527 return(EIO);
1528 }
1529 }
1530
1531 return(0);
1532}
1533
1534static void
1535an_dump_record(sc, ltv, string)
1536 struct an_softc *sc;
1537 struct an_ltv_gen *ltv;
1538 char *string;
1539{
1540 u_int8_t *ptr2;
1541 int len;
1542 int i;
1543 int count = 0;
1544 char buf[17], temp;
1545
1546 len = ltv->an_len - 4;
1c70eebf
JS
1547 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1548 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1549
1550 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1551 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1552 bzero(buf,sizeof(buf));
1553
1554 ptr2 = (u_int8_t *)&ltv->an_val;
1555 for (i = len; i > 0; i--) {
1556 printf("%02x ", *ptr2);
1557
1558 temp = *ptr2++;
1559 if (temp >= ' ' && temp <= '~')
1560 buf[count] = temp;
1561 else if (temp >= 'A' && temp <= 'Z')
1562 buf[count] = temp;
1563 else
1564 buf[count] = '.';
1565 if (++count == 16) {
1566 count = 0;
1567 printf("%s\n",buf);
1c70eebf 1568 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1569 bzero(buf,sizeof(buf));
1570 }
1571 }
1572 for (; count != 16; count++) {
1573 printf(" ");
1574 }
1575 printf(" %s\n",buf);
1576 }
1577}
1578
1579static int
1580an_seek(sc, id, off, chan)
1581 struct an_softc *sc;
1582 int id, off, chan;
1583{
1584 int i;
1585 int selreg, offreg;
1586
1587 switch (chan) {
1588 case AN_BAP0:
1589 selreg = AN_SEL0;
1590 offreg = AN_OFF0;
1591 break;
1592 case AN_BAP1:
1593 selreg = AN_SEL1;
1594 offreg = AN_OFF1;
1595 break;
1596 default:
1c70eebf 1597 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1598 return(EIO);
1599 }
1600
1601 CSR_WRITE_2(sc, selreg, id);
1602 CSR_WRITE_2(sc, offreg, off);
1603
1604 for (i = 0; i < AN_TIMEOUT; i++) {
1605 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1606 break;
1607 }
1608
1609 if (i == AN_TIMEOUT)
1610 return(ETIMEDOUT);
1611
1612 return(0);
1613}
1614
1615static int
1616an_read_data(sc, id, off, buf, len)
1617 struct an_softc *sc;
1618 int id, off;
1619 caddr_t buf;
1620 int len;
1621{
1622 int i;
1623 u_int16_t *ptr;
1624 u_int8_t *ptr2;
1625
1626 if (off != -1) {
1627 if (an_seek(sc, id, off, AN_BAP1))
1628 return(EIO);
1629 }
1630
1631 ptr = (u_int16_t *)buf;
1632 for (i = len; i > 1; i -= 2)
1633 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1634 if (i) {
1635 ptr2 = (u_int8_t *)ptr;
1636 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1637 }
1638
1639 return(0);
1640}
1641
1642static int
1643an_write_data(sc, id, off, buf, len)
1644 struct an_softc *sc;
1645 int id, off;
1646 caddr_t buf;
1647 int len;
1648{
1649 int i;
1650 u_int16_t *ptr;
1651 u_int8_t *ptr2;
1652
1653 if (off != -1) {
1654 if (an_seek(sc, id, off, AN_BAP0))
1655 return(EIO);
1656 }
1657
1658 ptr = (u_int16_t *)buf;
1659 for (i = len; i > 1; i -= 2)
1660 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1661 if (i) {
1662 ptr2 = (u_int8_t *)ptr;
1663 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1664 }
1665
1666 return(0);
1667}
1668
1669/*
1670 * Allocate a region of memory inside the NIC and zero
1671 * it out.
1672 */
1673static int
1674an_alloc_nicmem(sc, len, id)
1675 struct an_softc *sc;
1676 int len;
1677 int *id;
1678{
1679 int i;
1680
1681 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1682 if_printf(&sc->arpcom.ac_if,
1683 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1684 return(ENOMEM);
1685 }
1686
1687 for (i = 0; i < AN_TIMEOUT; i++) {
1688 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1689 break;
1690 }
1691
1692 if (i == AN_TIMEOUT)
1693 return(ETIMEDOUT);
1694
1695 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1696 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1697
1698 if (an_seek(sc, *id, 0, AN_BAP0))
1699 return(EIO);
1700
1701 for (i = 0; i < len / 2; i++)
1702 CSR_WRITE_2(sc, AN_DATA0, 0);
1703
1704 return(0);
1705}
1706
1707static void
1708an_setdef(sc, areq)
1709 struct an_softc *sc;
1710 struct an_req *areq;
1711{
984263bc
MD
1712 struct ifnet *ifp;
1713 struct an_ltv_genconfig *cfg;
537b8fd3 1714 struct an_ltv_ssidlist_new *ssid;
984263bc
MD
1715 struct an_ltv_aplist *ap;
1716 struct an_ltv_gen *sp;
1717
1718 ifp = &sc->arpcom.ac_if;
1719
1720 switch (areq->an_type) {
1721 case AN_RID_GENCONFIG:
1722 cfg = (struct an_ltv_genconfig *)areq;
1723
984263bc
MD
1724 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1725 ETHER_ADDR_LEN);
f2682cb9 1726 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1727
1728 bcopy((char *)cfg, (char *)&sc->an_config,
1729 sizeof(struct an_ltv_genconfig));
1730 break;
1731 case AN_RID_SSIDLIST:
537b8fd3 1732 ssid = (struct an_ltv_ssidlist_new *)areq;
984263bc 1733 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
537b8fd3 1734 sizeof(struct an_ltv_ssidlist_new));
984263bc
MD
1735 break;
1736 case AN_RID_APLIST:
1737 ap = (struct an_ltv_aplist *)areq;
1738 bcopy((char *)ap, (char *)&sc->an_aplist,
1739 sizeof(struct an_ltv_aplist));
1740 break;
1741 case AN_RID_TX_SPEED:
1742 sp = (struct an_ltv_gen *)areq;
1743 sc->an_tx_rate = sp->an_val;
1744
1745 /* Read the current configuration */
1746 sc->an_config.an_type = AN_RID_GENCONFIG;
1747 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1748 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1749 cfg = &sc->an_config;
1750
1751 /* clear other rates and set the only one we want */
1752 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1753 cfg->an_rates[0] = sc->an_tx_rate;
1754
1755 /* Save the new rate */
1756 sc->an_config.an_type = AN_RID_GENCONFIG;
1757 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1758 break;
1759 case AN_RID_WEP_TEMP:
1760 /* Cache the temp keys */
1761 bcopy(areq,
1762 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1763 sizeof(struct an_ltv_key));
1764 case AN_RID_WEP_PERM:
1765 case AN_RID_LEAPUSERNAME:
1766 case AN_RID_LEAPPASSWORD:
537b8fd3
JS
1767 an_init(sc);
1768
984263bc
MD
1769 /* Disable the MAC. */
1770 an_cmd(sc, AN_CMD_DISABLE, 0);
1771
1772 /* Write the key */
1773 an_write_record(sc, (struct an_ltv_gen *)areq);
1774
1775 /* Turn the MAC back on. */
1776 an_cmd(sc, AN_CMD_ENABLE, 0);
1777
1778 break;
1779 case AN_RID_MONITOR_MODE:
1780 cfg = (struct an_ltv_genconfig *)areq;
1781 bpfdetach(ifp);
1782 if (ng_ether_detach_p != NULL)
1783 (*ng_ether_detach_p) (ifp);
1784 sc->an_monitor = cfg->an_len;
1785
1786 if (sc->an_monitor & AN_MONITOR) {
1787 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1788 bpfattach(ifp, DLT_AIRONET_HEADER,
1789 sizeof(struct ether_header));
1790 } else {
1791 bpfattach(ifp, DLT_IEEE802_11,
1792 sizeof(struct ether_header));
1793 }
1794 } else {
1795 bpfattach(ifp, DLT_EN10MB,
1796 sizeof(struct ether_header));
1797 if (ng_ether_attach_p != NULL)
1798 (*ng_ether_attach_p) (ifp);
1799 }
1800 break;
1801 default:
1c70eebf 1802 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc
MD
1803 return;
1804 break;
1805 }
1806
1807
1808 /* Reinitialize the card. */
1809 if (ifp->if_flags)
1810 an_init(sc);
1811
1812 return;
1813}
1814
1815/*
1816 * Derived from Linux driver to enable promiscious mode.
1817 */
1818
1819static void
1820an_promisc(sc, promisc)
1821 struct an_softc *sc;
1822 int promisc;
1823{
1824 if (sc->an_was_monitor)
1825 an_reset(sc);
1c70eebf
JS
1826 if (sc->mpi350)
1827 an_init_mpi350_desc(sc);
984263bc
MD
1828 if (sc->an_monitor || sc->an_was_monitor)
1829 an_init(sc);
1830
1831 sc->an_was_monitor = sc->an_monitor;
1832 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1833
1834 return;
1835}
1836
1837static int
bd4539cc 1838an_ioctl(ifp, command, data, cr)
984263bc
MD
1839 struct ifnet *ifp;
1840 u_long command;
1841 caddr_t data;
bd4539cc 1842 struct ucred *cr;
984263bc 1843{
41d6c56f 1844 int error = 0;
984263bc 1845 int len;
537b8fd3 1846 int i, max;
984263bc
MD
1847 struct an_softc *sc;
1848 struct ifreq *ifr;
984263bc
MD
1849 struct ieee80211req *ireq;
1850 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1851 u_int8_t *tmpptr;
1852 struct an_ltv_genconfig *config;
1853 struct an_ltv_key *key;
1854 struct an_ltv_status *status;
537b8fd3 1855 struct an_ltv_ssidlist_new *ssids;
984263bc
MD
1856 int mode;
1857 struct aironet_ioctl l_ioctl;
1858
1859 sc = ifp->if_softc;
984263bc
MD
1860 ifr = (struct ifreq *)data;
1861 ireq = (struct ieee80211req *)data;
1862
41d6c56f
JS
1863 crit_enter();
1864
984263bc
MD
1865 config = (struct an_ltv_genconfig *)&sc->areq;
1866 key = (struct an_ltv_key *)&sc->areq;
1867 status = (struct an_ltv_status *)&sc->areq;
537b8fd3 1868 ssids = (struct an_ltv_ssidlist_new *)&sc->areq;
984263bc 1869
984263bc 1870 switch (command) {
984263bc
MD
1871 case SIOCSIFFLAGS:
1872 if (ifp->if_flags & IFF_UP) {
1873 if (ifp->if_flags & IFF_RUNNING &&
1874 ifp->if_flags & IFF_PROMISC &&
1875 !(sc->an_if_flags & IFF_PROMISC)) {
1876 an_promisc(sc, 1);
1877 } else if (ifp->if_flags & IFF_RUNNING &&
1878 !(ifp->if_flags & IFF_PROMISC) &&
1879 sc->an_if_flags & IFF_PROMISC) {
1880 an_promisc(sc, 0);
1881 } else
1882 an_init(sc);
1883 } else {
1884 if (ifp->if_flags & IFF_RUNNING)
1885 an_stop(sc);
1886 }
1887 sc->an_if_flags = ifp->if_flags;
1888 error = 0;
1889 break;
1890 case SIOCSIFMEDIA:
1891 case SIOCGIFMEDIA:
1892 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1893 break;
1894 case SIOCADDMULTI:
1895 case SIOCDELMULTI:
1896 /* The Aironet has no multicast filter. */
1897 error = 0;
1898 break;
1899 case SIOCGAIRONET:
1900 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1901 if (error != 0)
1902 break;
1903#ifdef ANCACHE
1904 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1905 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1906 if (error)
1907 break;
1908 sc->an_sigitems = sc->an_nextitem = 0;
1909 break;
1910 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1911 char *pt = (char *)&sc->areq.an_val;
1912 bcopy((char *)&sc->an_sigitems, (char *)pt,
1913 sizeof(int));
1914 pt += sizeof(int);
1915 sc->areq.an_len = sizeof(int) / 2;
1916 bcopy((char *)&sc->an_sigcache, (char *)pt,
1917 sizeof(struct an_sigcache) * sc->an_sigitems);
1918 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1919 sc->an_sigitems) / 2) + 1;
1920 } else
1921#endif
1922 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1923 error = EINVAL;
1924 break;
1925 }
1926 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1927 break;
1928 case SIOCSAIRONET:
bd4539cc 1929 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1930 break;
984263bc
MD
1931 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1932 if (error != 0)
1933 break;
1934 an_setdef(sc, &sc->areq);
1935 break;
1936 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1937 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1938 break;
984263bc
MD
1939 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1940 mode = l_ioctl.command;
1941
1942 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1943 error = readrids(ifp, &l_ioctl);
1944 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1945 error = writerids(ifp, &l_ioctl);
1946 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1947 error = flashcard(ifp, &l_ioctl);
1948 } else {
1949 error =-1;
1950 }
1951
1952 /* copy out the updated command info */
1953 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1954
1955 break;
1956 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1957 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1958 break;
984263bc
MD
1959 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1960 l_ioctl.command = 0;
1961 error = AIROMAGIC;
1962 copyout(&error, l_ioctl.data, sizeof(error));
1963 error = 0;
1964 break;
1965 case SIOCG80211:
1966 sc->areq.an_len = sizeof(sc->areq);
1967 /* was that a good idea DJA we are doing a short-cut */
1968 switch (ireq->i_type) {
1969 case IEEE80211_IOC_SSID:
1970 if (ireq->i_val == -1) {
1971 sc->areq.an_type = AN_RID_STATUS;
1972 if (an_read_record(sc,
1973 (struct an_ltv_gen *)&sc->areq)) {
1974 error = EINVAL;
1975 break;
1976 }
1977 len = status->an_ssidlen;
1978 tmpptr = status->an_ssid;
1979 } else if (ireq->i_val >= 0) {
1980 sc->areq.an_type = AN_RID_SSIDLIST;
1981 if (an_read_record(sc,
1982 (struct an_ltv_gen *)&sc->areq)) {
1983 error = EINVAL;
1984 break;
1985 }
537b8fd3
JS
1986 max = (sc->areq.an_len - 4)
1987 / sizeof(struct an_ltv_ssid_entry);
1988 if ( max > MAX_SSIDS ) {
1989 printf("To many SSIDs only using "
1990 "%d of %d\n",
1991 MAX_SSIDS, max);
1992 max = MAX_SSIDS;
1993 }
1994 if (ireq->i_val > max) {
984263bc
MD
1995 error = EINVAL;
1996 break;
537b8fd3
JS
1997 } else {
1998 len = ssids->an_entry[ireq->i_val].an_len;
1999 tmpptr = ssids->an_entry[ireq->i_val].an_ssid;
984263bc
MD
2000 }
2001 } else {
2002 error = EINVAL;
2003 break;
2004 }
2005 if (len > IEEE80211_NWID_LEN) {
2006 error = EINVAL;
2007 break;
2008 }
2009 ireq->i_len = len;
2010 bzero(tmpstr, IEEE80211_NWID_LEN);
2011 bcopy(tmpptr, tmpstr, len);
2012 error = copyout(tmpstr, ireq->i_data,
2013 IEEE80211_NWID_LEN);
2014 break;
2015 case IEEE80211_IOC_NUMSSIDS:
537b8fd3
JS
2016 sc->areq.an_len = sizeof(sc->areq);
2017 sc->areq.an_type = AN_RID_SSIDLIST;
2018 if (an_read_record(sc,
2019 (struct an_ltv_gen *)&sc->areq)) {
2020 error = EINVAL;
2021 break;
2022 }
2023 max = (sc->areq.an_len - 4)
2024 / sizeof(struct an_ltv_ssid_entry);
2025 if (max > MAX_SSIDS) {
2026 printf("To many SSIDs only using "
2027 "%d of %d\n",
2028 MAX_SSIDS, max);
2029 max = MAX_SSIDS;
2030 }
2031 ireq->i_val = max;
984263bc
MD
2032 break;
2033 case IEEE80211_IOC_WEP:
2034 sc->areq.an_type = AN_RID_ACTUALCFG;
2035 if (an_read_record(sc,
2036 (struct an_ltv_gen *)&sc->areq)) {
2037 error = EINVAL;
2038 break;
2039 }
2040 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2041 if (config->an_authtype &
2042 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2043 ireq->i_val = IEEE80211_WEP_MIXED;
2044 else
2045 ireq->i_val = IEEE80211_WEP_ON;
2046 } else {
2047 ireq->i_val = IEEE80211_WEP_OFF;
2048 }
2049 break;
2050 case IEEE80211_IOC_WEPKEY:
2051 /*
2052 * XXX: I'm not entierly convinced this is
2053 * correct, but it's what is implemented in
2054 * ancontrol so it will have to do until we get
2055 * access to actual Cisco code.
2056 */
2057 if (ireq->i_val < 0 || ireq->i_val > 8) {
2058 error = EINVAL;
2059 break;
2060 }
2061 len = 0;
2062 if (ireq->i_val < 5) {
2063 sc->areq.an_type = AN_RID_WEP_TEMP;
2064 for (i = 0; i < 5; i++) {
2065 if (an_read_record(sc,
2066 (struct an_ltv_gen *)&sc->areq)) {
2067 error = EINVAL;
2068 break;
2069 }
2070 if (key->kindex == 0xffff)
2071 break;
2072 if (key->kindex == ireq->i_val)
2073 len = key->klen;
2074 /* Required to get next entry */
2075 sc->areq.an_type = AN_RID_WEP_PERM;
2076 }
2077 if (error != 0)
2078 break;
2079 }
2080 /* We aren't allowed to read the value of the
2081 * key from the card so we just output zeros
2082 * like we would if we could read the card, but
2083 * denied the user access.
2084 */
2085 bzero(tmpstr, len);
2086 ireq->i_len = len;
2087 error = copyout(tmpstr, ireq->i_data, len);
2088 break;
2089 case IEEE80211_IOC_NUMWEPKEYS:
2090 ireq->i_val = 9; /* include home key */
2091 break;
2092 case IEEE80211_IOC_WEPTXKEY:
2093 /*
2094 * For some strange reason, you have to read all
2095 * keys before you can read the txkey.
2096 */
2097 sc->areq.an_type = AN_RID_WEP_TEMP;
2098 for (i = 0; i < 5; i++) {
2099 if (an_read_record(sc,
2100 (struct an_ltv_gen *) &sc->areq)) {
2101 error = EINVAL;
2102 break;
2103 }
2104 if (key->kindex == 0xffff)
2105 break;
2106 /* Required to get next entry */
2107 sc->areq.an_type = AN_RID_WEP_PERM;
2108 }
2109 if (error != 0)
2110 break;
2111
2112 sc->areq.an_type = AN_RID_WEP_PERM;
2113 key->kindex = 0xffff;
2114 if (an_read_record(sc,
2115 (struct an_ltv_gen *)&sc->areq)) {
2116 error = EINVAL;
2117 break;
2118 }
2119 ireq->i_val = key->mac[0];
2120 /*
2121 * Check for home mode. Map home mode into
2122 * 5th key since that is how it is stored on
2123 * the card
2124 */
2125 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2126 sc->areq.an_type = AN_RID_GENCONFIG;
2127 if (an_read_record(sc,
2128 (struct an_ltv_gen *)&sc->areq)) {
2129 error = EINVAL;
2130 break;
2131 }
2132 if (config->an_home_product & AN_HOME_NETWORK)
2133 ireq->i_val = 4;
2134 break;
2135 case IEEE80211_IOC_AUTHMODE:
2136 sc->areq.an_type = AN_RID_ACTUALCFG;
2137 if (an_read_record(sc,
2138 (struct an_ltv_gen *)&sc->areq)) {
2139 error = EINVAL;
2140 break;
2141 }
2142 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2143 AN_AUTHTYPE_NONE) {
2144 ireq->i_val = IEEE80211_AUTH_NONE;
2145 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2146 AN_AUTHTYPE_OPEN) {
2147 ireq->i_val = IEEE80211_AUTH_OPEN;
2148 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2149 AN_AUTHTYPE_SHAREDKEY) {
2150 ireq->i_val = IEEE80211_AUTH_SHARED;
2151 } else
2152 error = EINVAL;
2153 break;
2154 case IEEE80211_IOC_STATIONNAME:
2155 sc->areq.an_type = AN_RID_ACTUALCFG;
2156 if (an_read_record(sc,
2157 (struct an_ltv_gen *)&sc->areq)) {
2158 error = EINVAL;
2159 break;
2160 }
2161 ireq->i_len = sizeof(config->an_nodename);
2162 tmpptr = config->an_nodename;
2163 bzero(tmpstr, IEEE80211_NWID_LEN);
2164 bcopy(tmpptr, tmpstr, ireq->i_len);
2165 error = copyout(tmpstr, ireq->i_data,
2166 IEEE80211_NWID_LEN);
2167 break;
2168 case IEEE80211_IOC_CHANNEL:
2169 sc->areq.an_type = AN_RID_STATUS;
2170 if (an_read_record(sc,
2171 (struct an_ltv_gen *)&sc->areq)) {
2172 error = EINVAL;
2173 break;
2174 }
2175 ireq->i_val = status->an_cur_channel;
2176 break;
2177 case IEEE80211_IOC_POWERSAVE:
2178 sc->areq.an_type = AN_RID_ACTUALCFG;
2179 if (an_read_record(sc,
2180 (struct an_ltv_gen *)&sc->areq)) {
2181 error = EINVAL;
2182 break;
2183 }
2184 if (config->an_psave_mode == AN_PSAVE_NONE) {
2185 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2186 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2187 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2188 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2189 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2190 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2191 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2192 } else
2193 error = EINVAL;
2194 break;
2195 case IEEE80211_IOC_POWERSAVESLEEP:
2196 sc->areq.an_type = AN_RID_ACTUALCFG;
2197 if (an_read_record(sc,
2198 (struct an_ltv_gen *)&sc->areq)) {
2199 error = EINVAL;
2200 break;
2201 }
2202 ireq->i_val = config->an_listen_interval;
2203 break;
2204 }
2205 break;
2206 case SIOCS80211:
bd4539cc 2207 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 2208 break;
984263bc
MD
2209 sc->areq.an_len = sizeof(sc->areq);
2210 /*
2211 * We need a config structure for everything but the WEP
2212 * key management and SSIDs so we get it now so avoid
2213 * duplicating this code every time.
2214 */
2215 if (ireq->i_type != IEEE80211_IOC_SSID &&
2216 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2217 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2218 sc->areq.an_type = AN_RID_GENCONFIG;
2219 if (an_read_record(sc,
2220 (struct an_ltv_gen *)&sc->areq)) {
2221 error = EINVAL;
2222 break;
2223 }
2224 }
2225 switch (ireq->i_type) {
2226 case IEEE80211_IOC_SSID:
537b8fd3 2227 sc->areq.an_len = sizeof(sc->areq);
984263bc
MD
2228 sc->areq.an_type = AN_RID_SSIDLIST;
2229 if (an_read_record(sc,
2230 (struct an_ltv_gen *)&sc->areq)) {
2231 error = EINVAL;
2232 break;
2233 }
2234 if (ireq->i_len > IEEE80211_NWID_LEN) {
2235 error = EINVAL;
2236 break;
2237 }
537b8fd3
JS
2238 max = (sc->areq.an_len - 4)
2239 / sizeof(struct an_ltv_ssid_entry);
2240 if (max > MAX_SSIDS) {
2241 printf("To many SSIDs only using "
2242 "%d of %d\n",
2243 MAX_SSIDS, max);
2244 max = MAX_SSIDS;
984263bc 2245 }
537b8fd3
JS
2246 if (ireq->i_val > max) {
2247 error = EINVAL;
2248 break;
2249 } else {
2250 error = copyin(ireq->i_data,
2251 ssids->an_entry[ireq->i_val].an_ssid,
2252 ireq->i_len);
2253 ssids->an_entry[ireq->i_val].an_len
2254 = ireq->i_len;
2255 break;
2256 }
984263bc
MD
2257 break;
2258 case IEEE80211_IOC_WEP:
2259 switch (ireq->i_val) {
2260 case IEEE80211_WEP_OFF:
2261 config->an_authtype &=
2262 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2263 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2264 break;
2265 case IEEE80211_WEP_ON:
2266 config->an_authtype |=
2267 AN_AUTHTYPE_PRIVACY_IN_USE;
2268 config->an_authtype &=
2269 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2270 break;
2271 case IEEE80211_WEP_MIXED:
2272 config->an_authtype |=
2273 AN_AUTHTYPE_PRIVACY_IN_USE |
2274 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2275 break;
2276 default:
2277 error = EINVAL;
2278 break;
2279 }
2280 break;
2281 case IEEE80211_IOC_WEPKEY:
2282 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2283 ireq->i_len > 13) {
2284 error = EINVAL;
2285 break;
2286 }
2287 error = copyin(ireq->i_data, tmpstr, 13);
2288 if (error != 0)
2289 break;
2290 /*
2291 * Map the 9th key into the home mode
2292 * since that is how it is stored on
2293 * the card
2294 */
2295 bzero(&sc->areq, sizeof(struct an_ltv_key));
2296 sc->areq.an_len = sizeof(struct an_ltv_key);
2297 key->mac[0] = 1; /* The others are 0. */
2298 if (ireq->i_val < 4) {
2299 sc->areq.an_type = AN_RID_WEP_TEMP;
2300 key->kindex = ireq->i_val;
2301 } else {
2302 sc->areq.an_type = AN_RID_WEP_PERM;
2303 key->kindex = ireq->i_val - 4;
2304 }
2305 key->klen = ireq->i_len;
2306 bcopy(tmpstr, key->key, key->klen);
2307 break;
2308 case IEEE80211_IOC_WEPTXKEY:
2309 if (ireq->i_val < 0 || ireq->i_val > 4) {
2310 error = EINVAL;
2311 break;
2312 }
2313
2314 /*
2315 * Map the 5th key into the home mode
2316 * since that is how it is stored on
2317 * the card
2318 */
2319 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2320 sc->areq.an_type = AN_RID_ACTUALCFG;
2321 if (an_read_record(sc,
2322 (struct an_ltv_gen *)&sc->areq)) {
2323 error = EINVAL;
2324 break;
2325 }
2326 if (ireq->i_val == 4) {
2327 config->an_home_product |= AN_HOME_NETWORK;
2328 ireq->i_val = 0;
2329 } else {
2330 config->an_home_product &= ~AN_HOME_NETWORK;
2331 }
2332
2333 sc->an_config.an_home_product
2334 = config->an_home_product;
2335
2336 /* update configuration */
2337 an_init(sc);
2338
2339 bzero(&sc->areq, sizeof(struct an_ltv_key));
2340 sc->areq.an_len = sizeof(struct an_ltv_key);
2341 sc->areq.an_type = AN_RID_WEP_PERM;
2342 key->kindex = 0xffff;
2343 key->mac[0] = ireq->i_val;
2344 break;
2345 case IEEE80211_IOC_AUTHMODE:
2346 switch (ireq->i_val) {
2347 case IEEE80211_AUTH_NONE:
2348 config->an_authtype = AN_AUTHTYPE_NONE |
2349 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2350 break;
2351 case IEEE80211_AUTH_OPEN:
2352 config->an_authtype = AN_AUTHTYPE_OPEN |
2353 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2354 break;
2355 case IEEE80211_AUTH_SHARED:
2356 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2357 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2358 break;
2359 default:
2360 error = EINVAL;
2361 }
2362 break;
2363 case IEEE80211_IOC_STATIONNAME:
2364 if (ireq->i_len > 16) {
2365 error = EINVAL;
2366 break;
2367 }
2368 bzero(config->an_nodename, 16);
2369 error = copyin(ireq->i_data,
2370 config->an_nodename, ireq->i_len);
2371 break;
2372 case IEEE80211_IOC_CHANNEL:
2373 /*
2374 * The actual range is 1-14, but if you set it
2375 * to 0 you get the default so we let that work
2376 * too.
2377 */
2378 if (ireq->i_val < 0 || ireq->i_val >14) {
2379 error = EINVAL;
2380 break;
2381 }
2382 config->an_ds_channel = ireq->i_val;
2383 break;
2384 case IEEE80211_IOC_POWERSAVE:
2385 switch (ireq->i_val) {
2386 case IEEE80211_POWERSAVE_OFF:
2387 config->an_psave_mode = AN_PSAVE_NONE;
2388 break;
2389 case IEEE80211_POWERSAVE_CAM:
2390 config->an_psave_mode = AN_PSAVE_CAM;
2391 break;
2392 case IEEE80211_POWERSAVE_PSP:
2393 config->an_psave_mode = AN_PSAVE_PSP;
2394 break;
2395 case IEEE80211_POWERSAVE_PSP_CAM:
2396 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2397 break;
2398 default:
2399 error = EINVAL;
2400 break;
2401 }
2402 break;
2403 case IEEE80211_IOC_POWERSAVESLEEP:
2404 config->an_listen_interval = ireq->i_val;
2405 break;
2406 }
2407
2408 if (!error)
2409 an_setdef(sc, &sc->areq);
2410 break;
2411 default:
4cde4dd5 2412 error = ether_ioctl(ifp, command, data);
984263bc
MD
2413 break;
2414 }
41d6c56f
JS
2415
2416 crit_exit();
984263bc
MD
2417
2418 return(error != 0);
2419}
2420
2421static int
2422an_init_tx_ring(sc)
2423 struct an_softc *sc;
2424{
2425 int i;
2426 int id;
2427
984263bc
MD
2428 if (!sc->mpi350) {
2429 for (i = 0; i < AN_TX_RING_CNT; i++) {
2430 if (an_alloc_nicmem(sc, 1518 +
2431 0x44, &id))
2432 return(ENOMEM);
2433 sc->an_rdata.an_tx_fids[i] = id;
2434 sc->an_rdata.an_tx_ring[i] = 0;
2435 }
2436 }
2437
2438 sc->an_rdata.an_tx_prod = 0;
2439 sc->an_rdata.an_tx_cons = 0;
2440 sc->an_rdata.an_tx_empty = 1;
2441
2442 return(0);
2443}
2444
2445static void
2446an_init(xsc)
2447 void *xsc;
2448{
2449 struct an_softc *sc = xsc;
2450 struct ifnet *ifp = &sc->arpcom.ac_if;
984263bc 2451
41d6c56f 2452 crit_enter();
984263bc
MD
2453 if (ifp->if_flags & IFF_RUNNING)
2454 an_stop(sc);
2455
2456 sc->an_associated = 0;
2457
2458 /* Allocate the TX buffers */
2459 if (an_init_tx_ring(sc)) {
2460 an_reset(sc);
2461 if (sc->mpi350)
2462 an_init_mpi350_desc(sc);
2463 if (an_init_tx_ring(sc)) {
41d6c56f 2464 crit_exit();
1c70eebf 2465 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2466 return;
2467 }
2468 }
2469
2470 /* Set our MAC address. */
2471 bcopy((char *)&sc->arpcom.ac_enaddr,
2472 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2473
2474 if (ifp->if_flags & IFF_BROADCAST)
2475 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2476 else
2477 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2478
2479 if (ifp->if_flags & IFF_MULTICAST)
2480 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2481
2482 if (ifp->if_flags & IFF_PROMISC) {
2483 if (sc->an_monitor & AN_MONITOR) {
2484 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2485 sc->an_config.an_rxmode |=
2486 AN_RXMODE_80211_MONITOR_ANYBSS |
2487 AN_RXMODE_NO_8023_HEADER;
2488 } else {
2489 sc->an_config.an_rxmode |=
2490 AN_RXMODE_80211_MONITOR_CURBSS |
2491 AN_RXMODE_NO_8023_HEADER;
2492 }
2493 }
2494 }
2495
2496 if (sc->an_have_rssimap)
2497 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2498
2499 /* Set the ssid list */
2500 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 2501 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 2502 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
41d6c56f 2503 crit_exit();
1c70eebf 2504 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2505 return;
2506 }
2507
2508 /* Set the AP list */
2509 sc->an_aplist.an_type = AN_RID_APLIST;
2510 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2511 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
41d6c56f 2512 crit_exit();
1c70eebf 2513 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2514 return;
2515 }
2516
2517 /* Set the configuration in the NIC */
2518 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2519 sc->an_config.an_type = AN_RID_GENCONFIG;
2520 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
41d6c56f 2521 crit_exit();
1c70eebf 2522 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2523 return;
2524 }
2525
2526 /* Enable the MAC */
2527 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
41d6c56f 2528 crit_exit();
1c70eebf 2529 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2530 return;
2531 }
2532
2533 if (ifp->if_flags & IFF_PROMISC)
2534 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2535
2536 /* enable interrupts */
537b8fd3 2537 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD
2538
2539 ifp->if_flags |= IFF_RUNNING;
2540 ifp->if_flags &= ~IFF_OACTIVE;
2541
89c0f216 2542 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 2543
41d6c56f 2544 crit_exit();
984263bc
MD
2545}
2546
2547static void
2548an_start(ifp)
2549 struct ifnet *ifp;
2550{
2551 struct an_softc *sc;
2552 struct mbuf *m0 = NULL;
2553 struct an_txframe_802_3 tx_frame_802_3;
2554 struct ether_header *eh;
2555 int id, idx, i;
2556 unsigned char txcontrol;
2557 struct an_card_tx_desc an_tx_desc;
984263bc
MD
2558 u_int8_t *buf;
2559
2560 sc = ifp->if_softc;
2561
984263bc
MD
2562 if (ifp->if_flags & IFF_OACTIVE)
2563 return;
2564
2565 if (!sc->an_associated)
2566 return;
2567
2568 /* We can't send in monitor mode so toss any attempts. */
2569 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2570 ifq_purge(&ifp->if_snd);
984263bc
MD
2571 return;
2572 }
2573
2574 idx = sc->an_rdata.an_tx_prod;
2575
2576 if (!sc->mpi350) {
2577 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2578
2579 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2580 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2581 if (m0 == NULL)
2582 break;
2583
2584 id = sc->an_rdata.an_tx_fids[idx];
2585 eh = mtod(m0, struct ether_header *);
2586
2587 bcopy((char *)&eh->ether_dhost,
2588 (char *)&tx_frame_802_3.an_tx_dst_addr,
2589 ETHER_ADDR_LEN);
2590 bcopy((char *)&eh->ether_shost,
2591 (char *)&tx_frame_802_3.an_tx_src_addr,
2592 ETHER_ADDR_LEN);
2593
2594 /* minus src/dest mac & type */
2595 tx_frame_802_3.an_tx_802_3_payload_len =
2596 m0->m_pkthdr.len - 12;
2597
2598 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2599 tx_frame_802_3.an_tx_802_3_payload_len,
2600 (caddr_t)&sc->an_txbuf);
2601
2602 txcontrol = AN_TXCTL_8023;
2603 /* write the txcontrol only */
2604 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2605 sizeof(txcontrol));
2606
2607 /* 802_3 header */
2608 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2609 sizeof(struct an_txframe_802_3));
2610
2611 /* in mbuf header type is just before payload */
2612 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2613 tx_frame_802_3.an_tx_802_3_payload_len);
2614
7600679e 2615 BPF_MTAP(ifp, m0);
984263bc
MD
2616
2617 m_freem(m0);
2618 m0 = NULL;
2619
2620 sc->an_rdata.an_tx_ring[idx] = id;
2621 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2622 if_printf(ifp, "xmit failed\n");
984263bc
MD
2623
2624 AN_INC(idx, AN_TX_RING_CNT);
537b8fd3
JS
2625
2626 /*
2627 * Set a timeout in case the chip goes out to lunch.
2628 */
2629 ifp->if_timer = 5;
984263bc
MD
2630 }
2631 } else { /* MPI-350 */
2632 while (sc->an_rdata.an_tx_empty ||
2633 idx != sc->an_rdata.an_tx_cons) {
38de8487 2634 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2635 if (m0 == NULL) {
2636 break;
2637 }
2638 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2639
2640 eh = mtod(m0, struct ether_header *);
2641
2642 /* DJA optimize this to limit bcopy */
2643 bcopy((char *)&eh->ether_dhost,
2644 (char *)&tx_frame_802_3.an_tx_dst_addr,
2645 ETHER_ADDR_LEN);
2646 bcopy((char *)&eh->ether_shost,
2647 (char *)&tx_frame_802_3.an_tx_src_addr,
2648 ETHER_ADDR_LEN);
2649
2650 /* minus src/dest mac & type */
2651 tx_frame_802_3.an_tx_802_3_payload_len =
2652 m0->m_pkthdr.len - 12;
2653
2654 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2655 tx_frame_802_3.an_tx_802_3_payload_len,
2656 (caddr_t)&sc->an_txbuf);
2657
2658 txcontrol = AN_TXCTL_8023;
2659 /* write the txcontrol only */
2660 bcopy((caddr_t)&txcontrol, &buf[0x08],
2661 sizeof(txcontrol));
2662
2663 /* 802_3 header */
2664 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2665 sizeof(struct an_txframe_802_3));
2666
2667 /* in mbuf header type is just before payload */
2668 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2669 tx_frame_802_3.an_tx_802_3_payload_len);
2670
2671
2672 bzero(&an_tx_desc, sizeof(an_tx_desc));
2673 an_tx_desc.an_offset = 0;
2674 an_tx_desc.an_eoc = 1;
2675 an_tx_desc.an_valid = 1;
2676 an_tx_desc.an_len = 0x44 +
2677 tx_frame_802_3.an_tx_802_3_payload_len;
2678 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
537b8fd3
JS
2679 for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) {
2680 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
2681 /* zero for now */
2682 + (0 * sizeof(an_tx_desc))
2683 + (i * 4),
2684 ((u_int32_t*)&an_tx_desc)[i]);
2685 }
984263bc 2686
7600679e 2687 BPF_MTAP(ifp, m0);
984263bc
MD
2688
2689 m_freem(m0);
2690 m0 = NULL;
2691
984263bc
MD
2692 AN_INC(idx, AN_MAX_TX_DESC);
2693 sc->an_rdata.an_tx_empty = 0;
537b8fd3
JS
2694
2695 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2696
2697 /*
2698 * Set a timeout in case the chip goes out to lunch.
2699 */
2700 ifp->if_timer = 5;
984263bc
MD
2701 }
2702 }
2703
2704 if (m0 != NULL)
2705 ifp->if_flags |= IFF_OACTIVE;
2706
2707 sc->an_rdata.an_tx_prod = idx;
984263bc
MD
2708}
2709
2710void
2711an_stop(sc)
2712 struct an_softc *sc;
2713{
2714 struct ifnet *ifp;
2715 int i;
984263bc 2716
984263bc
MD
2717 ifp = &sc->arpcom.ac_if;
2718
41d6c56f
JS
2719 crit_enter();
2720
984263bc
MD
2721 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2722 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2723 an_cmd(sc, AN_CMD_DISABLE, 0);
2724
2725 for (i = 0; i < AN_TX_RING_CNT; i++)
2726 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2727
89c0f216 2728 callout_stop(&sc->an_stat_timer);
984263bc
MD
2729
2730 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2731
2732 if (sc->an_flash_buffer) {
2733 free(sc->an_flash_buffer, M_DEVBUF);
2734 sc->an_flash_buffer = NULL;
2735 }
2736
41d6c56f 2737 crit_exit();
984263bc
MD
2738}
2739
2740static void
2741an_watchdog(ifp)
2742 struct ifnet *ifp;
2743{
2744 struct an_softc *sc;
984263bc
MD
2745
2746 sc = ifp->if_softc;
984263bc 2747
41d6c56f 2748 crit_enter();
984263bc
MD
2749 an_reset(sc);
2750 if (sc->mpi350)
2751 an_init_mpi350_desc(sc);
2752 an_init(sc);
2753
2754 ifp->if_oerrors++;
41d6c56f 2755 crit_exit();
984263bc 2756
41d6c56f 2757 if_printf(ifp, "device timeout\n");
984263bc
MD
2758}
2759
2760void
2761an_shutdown(dev)
2762 device_t dev;
2763{
2764 struct an_softc *sc;
2765
2766 sc = device_get_softc(dev);
2767 an_stop(sc);
2768
2769 return;
2770}
2771
2772void
2773an_resume(dev)
2774 device_t dev;
2775{
2776 struct an_softc *sc;
2777 struct ifnet *ifp;
2778 int i;
2779
2780 sc = device_get_softc(dev);
2781 ifp = &sc->arpcom.ac_if;
2782
2783 an_reset(sc);
2784 if (sc->mpi350)
2785 an_init_mpi350_desc(sc);
2786 an_init(sc);
2787
2788 /* Recovery temporary keys */
2789 for (i = 0; i < 4; i++) {
2790 sc->areq.an_type = AN_RID_WEP_TEMP;
2791 sc->areq.an_len = sizeof(struct an_ltv_key);
2792 bcopy(&sc->an_temp_keys[i],
2793 &sc->areq, sizeof(struct an_ltv_key));
2794 an_setdef(sc, &sc->areq);
2795 }
2796
2797 if (ifp->if_flags & IFF_UP)
2798 an_start(ifp);
2799
2800 return;
2801}
2802
2803#ifdef ANCACHE
2804/* Aironet signal strength cache code.
2805 * store signal/noise/quality on per MAC src basis in
2806 * a small fixed cache. The cache wraps if > MAX slots
2807 * used. The cache may be zeroed out to start over.
2808 * Two simple filters exist to reduce computation:
2809 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2810 * to ignore some packets. It defaults to ip only.
2811 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2812 * 2. multicast/broadcast only. This may be used to
2813 * ignore unicast packets and only cache signal strength
2814 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2815 * beacons and not unicast traffic.
2816 *
2817 * The cache stores (MAC src(index), IP src (major clue), signal,
2818 * quality, noise)
2819 *
2820 * No apologies for storing IP src here. It's easy and saves much
2821 * trouble elsewhere. The cache is assumed to be INET dependent,
2822 * although it need not be.
2823 *
2824 * Note: the Aironet only has a single byte of signal strength value
2825 * in the rx frame header, and it's not scaled to anything sensible.
2826 * This is kind of lame, but it's all we've got.
2827 */
2828
2829#ifdef documentation
2830
2831int an_sigitems; /* number of cached entries */
2832struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2833int an_nextitem; /* index/# of entries */
2834
2835
2836#endif
2837
2838/* control variables for cache filtering. Basic idea is
2839 * to reduce cost (e.g., to only Mobile-IP agent beacons
2840 * which are broadcast or multicast). Still you might
2841 * want to measure signal strength anth unicast ping packets
2842 * on a pt. to pt. ant. setup.
2843 */
2844/* set true if you want to limit cache items to broadcast/mcast
2845 * only packets (not unicast). Useful for mobile-ip beacons which
2846 * are broadcast/multicast at network layer. Default is all packets
2847 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2848 */
2849static int an_cache_mcastonly = 0;
2850SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2851 &an_cache_mcastonly, 0, "");
2852
2853/* set true if you want to limit cache items to IP packets only
2854*/
2855static int an_cache_iponly = 1;
2856SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2857 &an_cache_iponly, 0, "");
2858
2859/*
2860 * an_cache_store, per rx packet store signal
2861 * strength in MAC (src) indexed cache.
2862 */
2863static void
3013ac0e 2864an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2865 struct an_softc *sc;
984263bc
MD
2866 struct mbuf *m;
2867 u_int8_t rx_rssi;
2868 u_int8_t rx_quality;
2869{
3013ac0e
JS
2870 struct ether_header *eh = mtod(m, struct ether_header *);
2871 struct ip *ip = NULL;
984263bc
MD
2872 int i;
2873 static int cache_slot = 0; /* use this cache entry */
2874 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2875
2876 /* filters:
2877 * 1. ip only
2878 * 2. configurable filter to throw out unicast packets,
2879 * keep multicast only.
2880 */
2881
3013ac0e
JS
2882 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2883 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2884 else if (an_cache_iponly)
984263bc 2885 return;
984263bc
MD
2886
2887 /* filter for broadcast/multicast only
2888 */
2889 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2890 return;
2891 }
2892
2893#ifdef SIGDEBUG
1c70eebf
JS
2894 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2895 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2896#endif
2897
984263bc
MD
2898 /* do a linear search for a matching MAC address
2899 * in the cache table
2900 * . MAC address is 6 bytes,
2901 * . var w_nextitem holds total number of entries already cached
2902 */
2903 for (i = 0; i < sc->an_nextitem; i++) {
2904 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2905 /* Match!,
2906 * so we already have this entry,
2907 * update the data
2908 */
2909 break;
2910 }
2911 }
2912
2913 /* did we find a matching mac address?
2914 * if yes, then overwrite a previously existing cache entry
2915 */
2916 if (i < sc->an_nextitem ) {
2917 cache_slot = i;
2918 }
2919 /* else, have a new address entry,so
2920 * add this new entry,
2921 * if table full, then we need to replace LRU entry
2922 */
2923 else {
2924
2925 /* check for space in cache table
2926 * note: an_nextitem also holds number of entries
2927 * added in the cache table
2928 */
2929 if ( sc->an_nextitem < MAXANCACHE ) {
2930 cache_slot = sc->an_nextitem;
2931 sc->an_nextitem++;
2932 sc->an_sigitems = sc->an_nextitem;
2933 }
2934 /* no space found, so simply wrap anth wrap index
2935 * and "zap" the next entry
2936 */
2937 else {
2938 if (wrapindex == MAXANCACHE) {
2939 wrapindex = 0;
2940 }
2941 cache_slot = wrapindex++;
2942 }
2943 }
2944
2945 /* invariant: cache_slot now points at some slot
2946 * in cache.
2947 */
2948 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2949 log(LOG_ERR, "an_cache_store, bad index: %d of "
2950 "[0..%d], gross cache error\n",
2951 cache_slot, MAXANCACHE);
2952 return;
2953 }
2954
2955 /* store items in cache
2956 * .ip source address
2957 * .mac src
2958 * .signal, etc.
2959 */
3013ac0e 2960 if (ip != NULL) {
984263bc
MD
2961 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2962 }
2963 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2964
2965
2966 switch (an_cache_mode) {
2967 case DBM:
2968 if (sc->an_have_rssimap) {
2969 sc->an_sigcache[cache_slot].signal =
2970 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2971 sc->an_sigcache[cache_slot].quality =
2972 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2973 } else {
2974 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2975 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2976 }
2977 break;
2978 case PERCENT:
2979 if (sc->an_have_rssimap) {
2980 sc->an_sigcache[cache_slot].signal =
2981 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2982 sc->an_sigcache[cache_slot].quality =
2983 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2984 } else {
2985 if (rx_rssi > 100)
2986 rx_rssi = 100;
2987 if (rx_quality > 100)
2988 rx_quality = 100;
2989 sc->an_sigcache[cache_slot].signal = rx_rssi;
2990 sc->an_sigcache[cache_slot].quality = rx_quality;
2991 }
2992 break;
2993 case RAW:
2994 sc->an_sigcache[cache_slot].signal = rx_rssi;
2995 sc->an_sigcache[cache_slot].quality = rx_quality;
2996 break;
2997 }
2998
2999 sc->an_sigcache[cache_slot].noise = 0;
3000
3001 return;
3002}
3003#endif
3004
3005static int
3006an_media_change(ifp)
3007 struct ifnet *ifp;
3008{
3009 struct an_softc *sc = ifp->if_softc;
3010 struct an_ltv_genconfig *cfg;
3011 int otype = sc->an_config.an_opmode;
3012 int orate = sc->an_tx_rate;
3013
984263bc
MD
3014 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3015 case IFM_IEEE80211_DS1:
3016 sc->an_tx_rate = AN_RATE_1MBPS;
3017 break;
3018 case IFM_IEEE80211_DS2:
3019 sc->an_tx_rate = AN_RATE_2MBPS;
3020 break;
3021 case IFM_IEEE80211_DS5:
3022 sc->an_tx_rate = AN_RATE_5_5MBPS;
3023 break;
3024 case IFM_IEEE80211_DS11:
3025 sc->an_tx_rate = AN_RATE_11MBPS;
3026 break;
3027 case IFM_AUTO:
3028 sc->an_tx_rate = 0;
3029 break;
3030 }
3031
3032 if (orate != sc->an_tx_rate) {
3033 /* Read the current configuration */
3034 sc->an_config.an_type = AN_RID_GENCONFIG;
3035 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3036 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3037 cfg = &sc->an_config;
3038
3039 /* clear other rates and set the only one we want */
3040 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3041 cfg->an_rates[0] = sc->an_tx_rate;
3042
3043 /* Save the new rate */
3044 sc->an_config.an_type = AN_RID_GENCONFIG;
3045 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3046 }
3047
537b8fd3
JS
3048 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3049 sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION;
3050 else
3051 sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION;
3052
984263bc
MD
3053 if (otype != sc->an_config.an_opmode ||
3054 orate != sc->an_tx_rate)
3055 an_init(sc);
3056
3057 return(0);
3058}
3059
3060static void
3061an_media_status(ifp, imr)
3062 struct ifnet *ifp;
3063 struct ifmediareq *imr;
3064{
3065 struct an_ltv_status status;
3066 struct an_softc *sc = ifp->if_softc;
3067
3068 status.an_len = sizeof(status);
3069 status.an_type = AN_RID_STATUS;
3070 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3071 /* If the status read fails, just lie. */
3072 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3073 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3074 }
3075
3076 if (sc->an_tx_rate == 0) {
3077 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3078 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3079 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3080 switch (status.an_current_tx_rate) {
3081 case AN_RATE_1MBPS:
3082 imr->ifm_active |= IFM_IEEE80211_DS1;
3083 break;
3084 case AN_RATE_2MBPS:
3085 imr->ifm_active |= IFM_IEEE80211_DS2;
3086 break;
3087 case AN_RATE_5_5MBPS:
3088 imr->ifm_active |= IFM_IEEE80211_DS5;
3089 break;
3090 case AN_RATE_11MBPS:
3091 imr->ifm_active |= IFM_IEEE80211_DS11;
3092 break;
3093 }
3094 } else {
3095 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3096 }
3097
3098 imr->ifm_status = IFM_AVALID;
3099 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3100 imr->ifm_status |= IFM_ACTIVE;
3101}
3102
3103/********************** Cisco utility support routines *************/
3104
3105/*
3106 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3107 * Linux driver
3108 */
3109
3110static int
3111readrids(ifp, l_ioctl)
3112 struct ifnet *ifp;
3113 struct aironet_ioctl *l_ioctl;
3114{
3115 unsigned short rid;
3116 struct an_softc *sc;
3117
3118 switch (l_ioctl->command) {
3119 case AIROGCAP:
3120 rid = AN_RID_CAPABILITIES;
3121 break;
3122 case AIROGCFG:
3123 rid = AN_RID_GENCONFIG;
3124 break;
3125 case AIROGSLIST:
3126 rid = AN_RID_SSIDLIST;
3127 break;
3128 case AIROGVLIST:
3129 rid = AN_RID_APLIST;
3130 break;
3131 case AIROGDRVNAM:
3132 rid = AN_RID_DRVNAME;
3133 break;
3134 case AIROGEHTENC:
3135 rid = AN_RID_ENCAPPROTO;
3136 break;
3137 case AIROGWEPKTMP:
3138 rid = AN_RID_WEP_TEMP;
3139 break;
3140 case AIROGWEPKNV:
3141 rid = AN_RID_WEP_PERM;
3142 break;
3143 case AIROGSTAT:
3144 rid = AN_RID_STATUS;
3145 break;
3146 case AIROGSTATSD32:
3147 rid = AN_RID_32BITS_DELTA;
3148 break;
3149 case AIROGSTATSC32:
3150 rid = AN_RID_32BITS_CUM;
3151 break;
3152 default:
3153 rid = 999;
3154 break;
3155 }
3156
3157 if (rid == 999) /* Is bad command */
3158 return -EINVAL;
3159
3160 sc = ifp->if_softc;
3161 sc->areq.an_len = AN_MAX_DATALEN;
3162 sc->areq.an_type = rid;
3163
3164 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3165
3166 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3167
3168 /* the data contains the length at first */
3169 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3170 sizeof(sc->areq.an_len))) {
3171 return -EFAULT;
3172 }
3173 /* Just copy the data back */
3174 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3175 l_ioctl->len)) {
3176 return -EFAULT;
3177 }
3178 return 0;
3179}
3180
3181static int
3182writerids(ifp, l_ioctl)
3183 struct ifnet *ifp;
3184 struct aironet_ioctl *l_ioctl;
3185{
3186 struct an_softc *sc;
3187 int rid, command;
3188
3189 sc = ifp->if_softc;
3190 rid = 0;
3191 command = l_ioctl->command;
3192
3193 switch (command) {
3194 case AIROPSIDS:
3195 rid = AN_RID_SSIDLIST;
3196 break;
3197 case AIROPCAP:
3198 rid = AN_RID_CAPABILITIES;
3199 break;
3200 case AIROPAPLIST:
3201 rid = AN_RID_APLIST;
3202 break;
3203 case AIROPCFG:
3204 rid = AN_RID_GENCONFIG;
3205 break;
3206 case AIROPMACON:
3207 an_cmd(sc, AN_CMD_ENABLE, 0);
3208 return 0;
3209 break;
3210 case AIROPMACOFF:
3211 an_cmd(sc, AN_CMD_DISABLE, 0);
3212 return 0;
3213 break;
3214 case AIROPSTCLR:
3215 /*
3216 * This command merely clears the counts does not actually
3217 * store any data only reads rid. But as it changes the cards
3218 * state, I put it in the writerid routines.
3219 */
3220
3221 rid = AN_RID_32BITS_DELTACLR;
3222 sc = ifp->if_softc;
3223 sc->areq.an_len = AN_MAX_DATALEN;
3224 sc->areq.an_type = rid;
3225
3226 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3227 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3228
3229 /* the data contains the length at first */
3230 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3231 sizeof(sc->areq.an_len))) {
3232 return -EFAULT;
3233 }
3234 /* Just copy the data */
3235 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3236 l_ioctl->len)) {
3237 return -EFAULT;
3238 }
3239 return 0;
3240 break;
3241 case AIROPWEPKEY:
3242 rid = AN_RID_WEP_TEMP;
3243 break;
3244 case AIROPWEPKEYNV:
3245 rid = AN_RID_WEP_PERM;
3246 break;
3247 case AIROPLEAPUSR:
3248 rid = AN_RID_LEAPUSERNAME;
3249 break;
3250 case AIROPLEAPPWD:
3251 rid = AN_RID_LEAPPASSWORD;
3252 break;
3253 default:
3254 return -EOPNOTSUPP;
3255 }
3256
3257 if (rid) {
3258 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3259 return -EINVAL;
3260 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3261 sc->areq.an_type = rid;
3262
3263 /* Just copy the data back */
3264 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3265 l_ioctl->len);
3266
3267 an_cmd(sc, AN_CMD_DISABLE, 0);
3268 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3269 an_cmd(sc, AN_CMD_ENABLE, 0);
3270 return 0;
3271 }
3272 return -EOPNOTSUPP;
3273}
3274
3275/*
3276 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3277 * Linux driver
3278 */
3279
377d4740 3280#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3281#define FLASH_COMMAND 0x7e7e
3282#define FLASH_SIZE 32 * 1024
3283
3284static int
3285unstickbusy(ifp)
3286 struct ifnet *ifp;
3287{
3288 struct an_softc *sc = ifp->if_softc;
3289
3290 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3291 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3292 AN_EV_CLR_STUCK_BUSY);
3293 return 1;
3294 }
3295 return 0;
3296}
3297
3298/*
3299 * Wait for busy completion from card wait for delay uSec's Return true for
3300 * success meaning command reg is clear
3301 */
3302
3303static int
3304WaitBusy(ifp, uSec)
3305 struct ifnet *ifp;
3306 int uSec;
3307{
3308 int statword = 0xffff;
3309 int delay = 0;
3310 struct an_softc *sc = ifp->if_softc;
3311
3312 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3313 FLASH_DELAY(10);
3314 delay += 10;
3315 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3316
3317 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3318 unstickbusy(ifp);
3319 }
3320 }
3321
3322 return 0 == (AN_CMD_BUSY & statword);
3323}
3324
3325/*
3326 * STEP 1) Disable MAC and do soft reset on card.
3327 */
3328
3329static int
3330cmdreset(ifp)
3331 struct ifnet *ifp;
3332{
3333 int status;
3334 struct an_softc *sc = ifp->if_softc;
3335
3336 an_stop(sc);
3337
3338 an_cmd(sc, AN_CMD_DISABLE, 0);
3339
3340 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3341 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3342 return -EBUSY;
3343 }
3344 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3345
3346 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3347
3348
3349 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3350 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3351 return -EBUSY;
3352 }
3353 return 0;
3354}
3355
3356/*
3357 * STEP 2) Put the card in legendary flash mode
3358 */
3359
3360static int
3361setflashmode(ifp)
3362 struct ifnet *ifp;
3363{
3364 int status;
3365 struct an_softc *sc = ifp->if_softc;
3366
3367 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3368 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3369 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3370 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3371
3372 /*
3373 * mdelay(500); // 500ms delay
3374 */
3375
3376 FLASH_DELAY(500);
3377
3378 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3379 printf("Waitbusy hang after setflash mode\n");
3380 return -EIO;
3381 }
3382 return 0;
3383}
3384
3385/*
3386 * Get a character from the card matching matchbyte Step 3)
3387 */
3388
3389static int
3390flashgchar(ifp, matchbyte, dwelltime)
3391 struct ifnet *ifp;
3392 int matchbyte;
3393 int dwelltime;
3394{
3395 int rchar;
3396 unsigned char rbyte = 0;
3397 int success = -1;
3398 struct an_softc *sc = ifp->if_softc;
3399
3400
3401 do {
3402 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3403
3404 if (dwelltime && !(0x8000 & rchar)) {
3405 dwelltime -= 10;
3406 FLASH_DELAY(10);
3407 continue;
3408 }
3409 rbyte = 0xff & rchar;
3410
3411 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3412 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3413 success = 1;
3414 break;
3415 }
3416 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3417 break;
3418 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3419
3420 } while (dwelltime > 0);
3421 return success;
3422}
3423
3424/*
3425 * Put character to SWS0 wait for dwelltime x 50us for echo .
3426 */
3427
3428static int
3429flashpchar(ifp, byte, dwelltime)
3430 struct ifnet *ifp;
3431 int byte;
3432 int dwelltime;
3433{
3434 int echo;
3435 int pollbusy, waittime;
3436 struct an_softc *sc = ifp->if_softc;
3437
3438 byte |= 0x8000;
3439
3440 if (dwelltime == 0)
3441 dwelltime = 200;
3442
3443 waittime = dwelltime;
3444
3445 /*
3446 * Wait for busy bit d15 to go false indicating buffer empty
3447 */
3448 do {
3449 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3450
3451 if (pollbusy & 0x8000) {
3452 FLASH_DELAY(50);
3453 waittime -= 50;
3454 continue;
3455 } else
3456 break;
3457 }
3458 while (waittime >= 0);
3459
3460 /* timeout for busy clear wait */
3461
3462 if (waittime <= 0) {
1c70eebf 3463 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3464 return -1;
3465 }
3466 /*
3467 * Port is clear now write byte and wait for it to echo back
3468 */
3469 do {
3470 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3471 FLASH_DELAY(50);
3472 dwelltime -= 50;
3473 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3474 } while (dwelltime >= 0 && echo != byte);
3475
3476
3477 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3478
3479 return echo == byte;
3480}
3481
3482/*
3483 * Transfer 32k of firmware data from user buffer to our buffer and send to
3484 * the card
3485 */
3486
3487static int
3488flashputbuf(ifp)
3489 struct ifnet *ifp;
3490{
3491 unsigned short *bufp;
3492 int nwords;
3493 struct an_softc *sc = ifp->if_softc;
3494
3495 /* Write stuff */
3496
3497 bufp = sc->an_flash_buffer;
3498
3499 if (!sc->mpi350) {
3500 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3501 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3502
3503 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3504 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3505 }
3506 } else {
3507 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3508 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3509 ((u_int32_t *)bufp)[nwords] & 0xffff);
3510 }
3511 }
3512
3513 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3514
3515 return 0;
3516}
3517
3518/*
3519 * After flashing restart the card.
3520 */
3521
3522static int
3523flashrestart(ifp)
3524 struct ifnet *ifp;
3525{
3526 int status = 0;
3527 struct an_softc *sc = ifp->if_softc;
3528
3529 FLASH_DELAY(1024); /* Added 12/7/00 */
3530
3531 an_init(sc);
3532
3533 FLASH_DELAY(1024); /* Added 12/7/00 */
3534 return status;
3535}
3536
3537/*
3538 * Entry point for flash ioclt.
3539 */
3540
3541static int
3542flashcard(ifp, l_ioctl)
3543 struct ifnet *ifp;
3544 struct aironet_ioctl *l_ioctl;
3545{
3546 int z = 0, status;
3547 struct an_softc *sc;
3548
3549 sc = ifp->if_softc;
3550 if (sc->mpi350) {
1c70eebf 3551 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3552 return(-1);
3553 }
3554 status = l_ioctl->command;
3555
3556 switch (l_ioctl->command) {
3557 case AIROFLSHRST:
3558 return cmdreset(ifp);
3559 break;
3560 case AIROFLSHSTFL:
3561 if (sc->an_flash_buffer) {
3562 free(sc->an_flash_buffer, M_DEVBUF);
3563 sc->an_flash_buffer = NULL;
3564 }
3565 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3566 if (sc->an_flash_buffer)
3567 return setflashmode(ifp);
3568 else
3569 return ENOBUFS;
3570 break;
3571 case AIROFLSHGCHR: /* Get char from aux */
3572 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3573 z = *(int *)&sc->areq;
3574 if ((status = flashgchar(ifp, z, 8000)) == 1)
3575 return 0;
3576 else
3577 return -1;
3578 break;
3579 case AIROFLSHPCHR: /* Send char to card. */
3580 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3581 z = *(int *)&sc->areq;
3582 if ((status = flashpchar(ifp, z, 8000)) == -1)
3583 return -EIO;
3584 else
3585 return 0;
3586 break;
3587 case AIROFLPUTBUF: /* Send 32k to card */
3588 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3589 if_printf(ifp, "Buffer to big, %x %x\n",
3590 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3591 return -EINVAL;
3592 }
3593 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3594
3595 if ((status = flashputbuf(ifp)) != 0)
3596 return -EIO;
3597 else
3598 return 0;
3599 break;
3600 case AIRORESTART:
3601 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3602 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3603 return -EIO;
3604 } else
3605 return 0;
3606
3607 break;
3608 default:
3609 return -EINVAL;
3610 }
3611
3612 return -EINVAL;
3613}