Merge from vendor branch GPERF:
[dragonfly.git] / sys / dev / sound / pci / ich.h
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1/*
2 * Copyright (c) 2000 Katsurajima Naoto <raven@katsurajima.seya.yokohama.jp>
3 * Copyright (c) 2001 Cameron Grant <cg@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: src/sys/dev/sound/pci/ich.h,v 1.1.2.3 2002/08/22 16:38:21 orion Exp $
858c6592 28 * $DragonFly: src/sys/dev/sound/pci/ich.h,v 1.3 2003/08/24 17:55:21 drhodus Exp $
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29 */
30
31#define PCIR_NAMBAR 0x10
32#define PCIR_NABMBAR 0x14
33
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34#define PCIR_MMBAR 0x18
35#define PCIR_MBBAR 0x1C
36
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37#define PCIR_ICH_LEGACY 0x41
38#define ICH_LEGACY_ENABLE 0x01
39
40/* Native Audio Bus Master Control Registers */
41#define ICH_REG_X_BDBAR 0x00
42#define ICH_REG_X_CIV 0x04
43#define ICH_REG_X_LVI 0x05
44#define ICH_REG_X_SR 0x06
45#define ICH_REG_X_PICB 0x08
46#define ICH_REG_X_PIV 0x0a
47#define ICH_REG_X_CR 0x0b
48
49#define ICH_REG_PI_BASE 0x00
50#define ICH_REG_PO_BASE 0x10
51#define ICH_REG_MC_BASE 0x20
52
53#define ICH_REG_GLOB_CNT 0x2c
54#define ICH_REG_GLOB_STA 0x30
55#define ICH_REG_ACC_SEMA 0x34
56
57/* Status Register Values */
58#define ICH_X_SR_DCH 0x0001
59#define ICH_X_SR_CELV 0x0002
60#define ICH_X_SR_LVBCI 0x0004
61#define ICH_X_SR_BCIS 0x0008
62#define ICH_X_SR_FIFOE 0x0010
63
64/* Control Register Values */
65#define ICH_X_CR_RPBM 0x01
66#define ICH_X_CR_RR 0x02
67#define ICH_X_CR_LVBIE 0x04
68#define ICH_X_CR_FEIE 0x08
69#define ICH_X_CR_IOCE 0x10
70
71/* Global Control Register Values */
72#define ICH_GLOB_CTL_GIE 0x00000001
73#define ICH_GLOB_CTL_COLD 0x00000002 /* negate */
74#define ICH_GLOB_CTL_WARM 0x00000004
75#define ICH_GLOB_CTL_SHUT 0x00000008
76#define ICH_GLOB_CTL_PRES 0x00000010
77#define ICH_GLOB_CTL_SRES 0x00000020
78
79/* Global Status Register Values */
80#define ICH_GLOB_STA_GSCI 0x00000001
81#define ICH_GLOB_STA_MIINT 0x00000002
82#define ICH_GLOB_STA_MOINT 0x00000004
83#define ICH_GLOB_STA_PIINT 0x00000020
84#define ICH_GLOB_STA_POINT 0x00000040
85#define ICH_GLOB_STA_MINT 0x00000080
86#define ICH_GLOB_STA_PCR 0x00000100
87#define ICH_GLOB_STA_SCR 0x00000200
88#define ICH_GLOB_STA_PRES 0x00000400
89#define ICH_GLOB_STA_SRES 0x00000800
90#define ICH_GLOB_STA_SLOT12 0x00007000
91#define ICH_GLOB_STA_RCODEC 0x00008000
92#define ICH_GLOB_STA_AD3 0x00010000
93#define ICH_GLOB_STA_MD3 0x00020000
94#define ICH_GLOB_STA_IMASK (ICH_GLOB_STA_MIINT | ICH_GLOB_STA_MOINT | ICH_GLOB_STA_PIINT | ICH_GLOB_STA_POINT | ICH_GLOB_STA_MINT | ICH_GLOB_STA_PRES | ICH_GLOB_STA_SRES)
95
96/* play/record buffer */
97#define ICH_BDC_IOC 0x80000000
98#define ICH_BDC_BUP 0x40000000
99