Say hello to a sound system update from FreeBSD. This includes the long
[dragonfly.git] / sys / dev / sound / pci / cmireg.h
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558a398b 1/*-
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2 * Copyright (c) 2000 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Takuya SHIOZAKI <AoiMoe@imou.to> .
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
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29 * $FreeBSD: src/sys/dev/sound/pci/cmireg.h,v 1.3 2005/01/06 01:43:19 imp Exp $
30 * $DragonFly: src/sys/dev/sound/pci/cmireg.h,v 1.4 2007/01/04 21:47:02 corecode Exp $
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31 */
32
33/* C-Media CMI8x38 Audio Chip Support */
34
35#ifndef _DEV_PCI_CMPCIREG_H_
f8334305 36#define _DEV_PCI_CMPCIREG_H_
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37
38/*
39 * PCI Configuration Registers
40 */
41
42#define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START)
43
44/*
45 * I/O Space
46 */
47
48#define CMPCI_REG_FUNC_0 0x00
49# define CMPCI_REG_CH0_DIR 0x00000001
50# define CMPCI_REG_CH1_DIR 0x00000002
51# define CMPCI_REG_CH0_PAUSE 0x00000004
52# define CMPCI_REG_CH1_PAUSE 0x00000008
53# define CMPCI_REG_CH0_ENABLE 0x00010000
54# define CMPCI_REG_CH1_ENABLE 0x00020000
55# define CMPCI_REG_CH0_RESET 0x00040000
56# define CMPCI_REG_CH1_RESET 0x00080000
57
58#define CMPCI_REG_FUNC_1 0x04
59# define CMPCI_REG_JOY_ENABLE 0x00000002
60# define CMPCI_REG_UART_ENABLE 0x00000004
61# define CMPCI_REG_LEGACY_ENABLE 0x00000008
62# define CMPCI_REG_BREQ 0x00000010
63# define CMPCI_REG_MCBINTR_ENABLE 0x00000020
64# define CMPCI_REG_SPDIFOUT_DAC 0x00000040
65# define CMPCI_REG_SPDIF_LOOP 0x00000080
66# define CMPCI_REG_SPDIF0_ENABLE 0x00000100
67# define CMPCI_REG_SPDIF1_ENABLE 0x00000200
68# define CMPCI_REG_DAC_FS_SHIFT 10
69# define CMPCI_REG_DAC_FS_MASK 0x00000007
70# define CMPCI_REG_ADC_FS_SHIFT 13
71# define CMPCI_REG_ADC_FS_MASK 0x00000007
72
73#define CMPCI_REG_CHANNEL_FORMAT 0x08
74# define CMPCI_REG_CH0_FORMAT_SHIFT 0
75# define CMPCI_REG_CH0_FORMAT_MASK 0x00000003
76# define CMPCI_REG_CH1_FORMAT_SHIFT 2
77# define CMPCI_REG_CH1_FORMAT_MASK 0x00000003
78# define CMPCI_REG_FORMAT_MONO 0x00000000
79# define CMPCI_REG_FORMAT_STEREO 0x00000001
80# define CMPCI_REG_FORMAT_8BIT 0x00000000
81# define CMPCI_REG_FORMAT_16BIT 0x00000002
82
83#define CMPCI_REG_INTR_CTRL 0x0c
84# define CMPCI_REG_CH0_INTR_ENABLE 0x00010000
85# define CMPCI_REG_CH1_INTR_ENABLE 0x00020000
86# define CMPCI_REG_TDMA_INTR_ENABLE 0x00040000
87
88#define CMPCI_REG_INTR_STATUS 0x10
89# define CMPCI_REG_CH0_INTR 0x00000001
90# define CMPCI_REG_CH1_INTR 0x00000002
91# define CMPCI_REG_CH0_BUSY 0x00000004
92# define CMPCI_REG_CH1_BUSY 0x00000008
93# define CMPCI_REG_LEGACY_STEREO 0x00000010
94# define CMPCI_REG_LEGACY_HDMA 0x00000020
95# define CMPCI_REG_DMASTAT 0x00000040
96# define CMPCI_REG_XDO46 0x00000080
97# define CMPCI_REG_HTDMA_INTR 0x00004000
98# define CMPCI_REG_LTDMA_INTR 0x00008000
99# define CMPCI_REG_UART_INTR 0x00010000
100# define CMPCI_REG_MCB_INTR 0x04000000
101# define CMPCI_REG_VCO 0x08000000
102# define CMPCI_REG_ANY_INTR 0x80000000
103
104#define CMPCI_REG_LEGACY_CTRL 0x14
105# define CMPCI_REG_LEGACY_SPDIF_ENABLE 0x00200000
106# define CMPCI_REG_SPDIF_COPYRIGHT 0x00400000
107# define CMPCI_REG_XSPDIF_ENABLE 0x00800000
108# define CMPCI_REG_FMSEL_SHIFT 24
109# define CMPCI_REG_FMSEL_MASK 0x00000003
110# define CMPCI_REG_VSBSEL_SHIFT 26
111# define CMPCI_REG_VSBSEL_MASK 0x00000003
112# define CMPCI_REG_VMPUSEL_SHIFT 29
113# define CMPCI_REG_VMPUSEL_MASK 0x00000003
114
115#define CMPCI_REG_MISC 0x18
116# define CMPCI_REG_POWER_DOWN 0x80000000
117# define CMPCI_REG_BUS_AND_DSP_RESET 0x40000000
118# define CMPCI_REG_N4SPK3D 0x04000000
119# define CMPCI_REG_W_SPDIF_48L 0x01000000
120# define CMPCI_REG_XCHGDAC 0x00400000
121# define CMPCI_REG_FM_ENABLE 0x00080000
122# define CMPCI_REG_SPDIF_48K 0x00008000
123
124#define CMPCI_REG_SBDATA 0x22
125#define CMPCI_REG_SBADDR 0x23
126# define CMPCI_SB16_MIXER_RESET 0x00
127# define CMPCI_SB16_MIXER_MASTER_L 0x30
128# define CMPCI_SB16_MIXER_MASTER_R 0x31
129# define CMPCI_SB16_MIXER_VOICE_L 0x32
130# define CMPCI_SB16_MIXER_VOICE_R 0x33
131# define CMPCI_SB16_MIXER_FM_L 0x34
132# define CMPCI_SB16_MIXER_FM_R 0x35
133# define CMPCI_SB16_MIXER_CDDA_L 0x36
134# define CMPCI_SB16_MIXER_CDDA_R 0x37
135# define CMPCI_SB16_MIXER_LINE_L 0x38
136# define CMPCI_SB16_MIXER_LINE_R 0x39
137# define CMPCI_SB16_MIXER_MIC 0x3A
138# define CMPCI_SB16_MIXER_SPEAKER 0x3B
139# define CMPCI_SB16_MIXER_OUTMIX 0x3C
140# define CMPCI_SB16_SW_MIC 0x01
141# define CMPCI_SB16_SW_CD_R 0x02
142# define CMPCI_SB16_SW_CD_L 0x04
143# define CMPCI_SB16_SW_CD (CMPCI_SB16_SW_CD_L|CMPCI_SB16_SW_CD_R)
144# define CMPCI_SB16_SW_LINE_R 0x08
145# define CMPCI_SB16_SW_LINE_L 0x10
146# define CMPCI_SB16_SW_LINE (CMPCI_SB16_SW_LINE_L|CMPCI_SB16_SW_LINE_R)
147# define CMPCI_SB16_SW_FM_R 0x20
148# define CMPCI_SB16_SW_FM_L 0x40
149# define CMPCI_SB16_SW_FM (CMPCI_SB16_SW_FM_L|CMPCI_SB16_SW_FM_R)
150# define CMPCI_SB16_MIXER_ADCMIX_L 0x3D
151# define CMPCI_SB16_MIXER_ADCMIX_R 0x3E
152# define CMPCI_SB16_MIXER_FM_SRC_R 0x20
153# define CMPCI_SB16_MIXER_LINE_SRC_R 0x08
154# define CMPCI_SB16_MIXER_CD_SRC_R 0x02
155# define CMPCI_SB16_MIXER_MIC_SRC 0x01
156# define CMPCI_SB16_MIXER_SRC_R_TO_L(v) ((v) << 1)
157
158# define CMPCI_SB16_MIXER_INGAIN_L 0x3F
159# define CMPCI_SB16_MIXER_INGAIN_R 0x40
160# define CMPCI_SB16_MIXER_OUTGAIN_L 0x41
161# define CMPCI_SB16_MIXER_OUTGAIN_R 0x42
162# define CMPCI_SB16_MIXER_AGC 0x43
163# define CMPCI_SB16_MIXER_TREBLE_L 0x44
164# define CMPCI_SB16_MIXER_TREBLE_R 0x45
165# define CMPCI_SB16_MIXER_BASS_L 0x46
166# define CMPCI_SB16_MIXER_BASS_R 0x47
167# define CMPCI_SB16_MIXER_L_TO_R(addr) ((addr)+1)
168
169# define CMPCI_ADJUST_MIC_GAIN(sc, x) cmpci_adjust((x), 0xf8)
170# define CMPCI_ADJUST_GAIN(sc, x) cmpci_adjust((x), 0xf8)
171# define CMPCI_ADJUST_2_GAIN(sc, x) cmpci_adjust((x), 0xc0)
172
173#define CMPCI_REG_MIXER1 0x24
174# define CMPCI_SPK4 0x20
175# define CMPCI_REAR2FRONT 0x10
176# define CMPCI_X3DEN 0x02
177
178#define CMPCI_REG_MPU_BASE 0x40
179#define CMPCI_REG_MPU_SIZE 0x10
180#define CMPCI_REG_FM_BASE 0x50
181#define CMPCI_REG_FM_SIZE 0x10
182
183#define CMPCI_REG_AUX_MIC 0x25
184# define CMPCI_AUX_SELECT_R 0x80
185# define CMPCI_AUX_SELECT_L 0x40
186# define CMPCI_AUX_MUTE_R 0x20
187# define CMPCI_AUX_MUTE_L 0x10
188# define CMPCI_VAD_MIC 0x0e
189# define CMPCI_MIC_QUIET 0x01
190
191#define CMPCI_REG_DMA0_BASE 0x80
192#define CMPCI_REG_DMA0_BYTES 0x84
193#define CMPCI_REG_DMA0_SAMPLES 0x86
194#define CMPCI_REG_DMA1_BASE 0x88
195#define CMPCI_REG_DMA1_BYTES 0x8C
196#define CMPCI_REG_DMA1_SAMPLES 0x8E
197
198/* sample rate */
199#define CMPCI_REG_RATE_5512 0
200#define CMPCI_REG_RATE_11025 1
201#define CMPCI_REG_RATE_22050 2
202#define CMPCI_REG_RATE_44100 3
203#define CMPCI_REG_RATE_8000 4
204#define CMPCI_REG_RATE_16000 5
205#define CMPCI_REG_RATE_32000 6
206#define CMPCI_REG_RATE_48000 7
207#define CMPCI_REG_NUMRATE 8
208
209#endif /* _DEV_PCI_CMPCIREG_H_ */
210
211/* end of file */