kernel - Refactor the kernel message buffer code
[dragonfly.git] / sys / platform / vkernel64 / x86_64 / cpu_regs.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (C) 1994, David Greenman
4 * Copyright (c) 1982, 1987, 1990, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
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40 */
41
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42#include "opt_compat.h"
43#include "opt_ddb.h"
44#include "opt_directio.h"
45#include "opt_inet.h"
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46#include "opt_msgbuf.h"
47#include "opt_swap.h"
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/sysproto.h>
52#include <sys/signalvar.h>
53#include <sys/kernel.h>
54#include <sys/linker.h>
55#include <sys/malloc.h>
56#include <sys/proc.h>
57#include <sys/buf.h>
58#include <sys/reboot.h>
59#include <sys/mbuf.h>
60#include <sys/msgbuf.h>
61#include <sys/sysent.h>
62#include <sys/sysctl.h>
63#include <sys/vmmeter.h>
64#include <sys/bus.h>
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65#include <sys/usched.h>
66#include <sys/reg.h>
67
68#include <vm/vm.h>
69#include <vm/vm_param.h>
70#include <sys/lock.h>
71#include <vm/vm_kern.h>
72#include <vm/vm_object.h>
73#include <vm/vm_page.h>
74#include <vm/vm_map.h>
75#include <vm/vm_pager.h>
76#include <vm/vm_extern.h>
77
78#include <sys/thread2.h>
0e6594a8 79#include <sys/mplock2.h>
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80
81#include <sys/user.h>
82#include <sys/exec.h>
83#include <sys/cons.h>
84
85#include <ddb/ddb.h>
86
87#include <machine/cpu.h>
88#include <machine/clock.h>
89#include <machine/specialreg.h>
90#include <machine/md_var.h>
91#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
92#include <machine/globaldata.h> /* CPU_prvspace */
93#include <machine/smp.h>
94#ifdef PERFMON
95#include <machine/perfmon.h>
96#endif
97#include <machine/cputypes.h>
98
99#include <bus/isa/rtc.h>
100#include <sys/random.h>
101#include <sys/ptrace.h>
102#include <machine/sigframe.h>
103#include <unistd.h> /* umtx_* functions */
b68e846f 104#include <pthread.h> /* pthread_yield() */
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105
106extern void dblfault_handler (void);
107
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108static void set_fpregs_xmm (struct save87 *, struct savexmm *);
109static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
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110#ifdef DIRECTIO
111extern void ffs_rawread_setup(void);
112#endif /* DIRECTIO */
113
da673940 114int64_t tsc_offsets[MAXCPU];
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115
116#if defined(SWTCH_OPTIM_STATS)
117extern int swtch_optim_stats;
118SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
119 CTLFLAG_RD, &swtch_optim_stats, 0, "");
120SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
121 CTLFLAG_RD, &tlb_flush_count, 0, "");
122#endif
123
124static int
125sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
126{
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127 u_long pmem = ctob(physmem);
128
129 int error = sysctl_handle_long(oidp, &pmem, 0, req);
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130 return (error);
131}
132
39d69dae 133SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
9b9532a0 134 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
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135
136static int
137sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
138{
139 /* JG */
140 int error = sysctl_handle_int(oidp, 0,
141 ctob((int)Maxmem - vmstats.v_wire_count), req);
142 return (error);
143}
144
145SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
146 0, 0, sysctl_hw_usermem, "IU", "");
147
148SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, "");
149
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150/*
151 * Send an interrupt to process.
152 *
153 * Stack is set up to allow sigcode stored
154 * at top to call routine, followed by kcall
155 * to sigreturn routine below. After sigreturn
156 * resets the signal mask, the stack, and the
157 * frame pointer, it returns to the user
158 * specified pc, psl.
159 */
160void
161sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
162{
163 struct lwp *lp = curthread->td_lwp;
164 struct proc *p = lp->lwp_proc;
165 struct trapframe *regs;
166 struct sigacts *psp = p->p_sigacts;
167 struct sigframe sf, *sfp;
168 int oonstack;
169 char *sp;
170
171 regs = lp->lwp_md.md_regs;
172 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
173
174 /* Save user context */
175 bzero(&sf, sizeof(struct sigframe));
176 sf.sf_uc.uc_sigmask = *mask;
177 sf.sf_uc.uc_stack = lp->lwp_sigstk;
178 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
179 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
180 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
181
182 /* Make the size of the saved context visible to userland */
183 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
184
da673940 185 /* Allocate and validate space for the signal handler context. */
4643740a 186 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
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187 SIGISMEMBER(psp->ps_sigonstack, sig)) {
188 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
189 sizeof(struct sigframe));
190 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
191 } else {
192 /* We take red zone into account */
193 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
194 }
195
196 /* Align to 16 bytes */
197 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL);
198
199 /* Translate the signal is appropriate */
200 if (p->p_sysent->sv_sigtbl) {
201 if (sig <= p->p_sysent->sv_sigsize)
202 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
203 }
204
205 /*
206 * Build the argument list for the signal handler.
207 *
208 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
209 */
210 regs->tf_rdi = sig; /* argument 1 */
211 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
212
213 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
214 /*
215 * Signal handler installed with SA_SIGINFO.
216 *
217 * action(signo, siginfo, ucontext)
218 */
219 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
220 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
221 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
222
223 /* fill siginfo structure */
224 sf.sf_si.si_signo = sig;
225 sf.sf_si.si_code = code;
c55fa5ee 226 sf.sf_si.si_addr = (void *)regs->tf_addr;
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227 } else {
228 /*
229 * Old FreeBSD-style arguments.
230 *
231 * handler (signo, code, [uc], addr)
232 */
233 regs->tf_rsi = (register_t)code; /* argument 2 */
1a482e3f 234 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
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235 sf.sf_ahu.sf_handler = catcher;
236 }
237
238#if 0
239 /*
240 * If we're a vm86 process, we want to save the segment registers.
241 * We also change eflags to be our emulated eflags, not the actual
242 * eflags.
243 */
244 if (regs->tf_eflags & PSL_VM) {
245 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
246 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
247
248 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
249 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
250 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
251 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
252
253 if (vm86->vm86_has_vme == 0)
254 sf.sf_uc.uc_mcontext.mc_eflags =
255 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
256 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
257
258 /*
259 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
260 * syscalls made by the signal handler. This just avoids
261 * wasting time for our lazy fixup of such faults. PSL_NT
262 * does nothing in vm86 mode, but vm86 programs can set it
263 * almost legitimately in probes for old cpu types.
264 */
265 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
266 }
267#endif
268
269 /*
270 * Save the FPU state and reinit the FP unit
271 */
272 npxpush(&sf.sf_uc.uc_mcontext);
273
274 /*
275 * Copy the sigframe out to the user's stack.
276 */
277 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
278 /*
279 * Something is wrong with the stack pointer.
280 * ...Kill the process.
281 */
282 sigexit(lp, SIGILL);
283 }
284
285 regs->tf_rsp = (register_t)sfp;
286 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
287
288 /*
289 * i386 abi specifies that the direction flag must be cleared
290 * on function entry
291 */
292 regs->tf_rflags &= ~(PSL_T|PSL_D);
293
294 /*
295 * 64 bit mode has a code and stack selector but
296 * no data or extra selector. %fs and %gs are not
297 * stored in-context.
298 */
299 regs->tf_cs = _ucodesel;
300 regs->tf_ss = _udatasel;
301}
302
303/*
304 * Sanitize the trapframe for a virtual kernel passing control to a custom
305 * VM context. Remove any items that would otherwise create a privilage
306 * issue.
307 *
308 * XXX at the moment we allow userland to set the resume flag. Is this a
309 * bad idea?
310 */
311int
312cpu_sanitize_frame(struct trapframe *frame)
313{
314 frame->tf_cs = _ucodesel;
315 frame->tf_ss = _udatasel;
316 /* XXX VM (8086) mode not supported? */
317 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
318 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
319
320 return(0);
321}
322
323/*
324 * Sanitize the tls so loading the descriptor does not blow up
a76ca9b9 325 * on us. For x86_64 we don't have to do anything.
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326 */
327int
328cpu_sanitize_tls(struct savetls *tls)
329{
330 return(0);
331}
332
333/*
334 * sigreturn(ucontext_t *sigcntxp)
335 *
336 * System call to cleanup state after a signal
337 * has been taken. Reset signal mask and
338 * stack state from context left by sendsig (above).
339 * Return to previous pc and psl as specified by
340 * context left by sendsig. Check carefully to
341 * make sure that the user has not modified the
342 * state to gain improper privileges.
343 */
344#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
345#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
346
347int
348sys_sigreturn(struct sigreturn_args *uap)
349{
350 struct lwp *lp = curthread->td_lwp;
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351 struct trapframe *regs;
352 ucontext_t uc;
353 ucontext_t *ucp;
354 register_t rflags;
355 int cs;
356 int error;
357
358 /*
359 * We have to copy the information into kernel space so userland
360 * can't modify it while we are sniffing it.
361 */
362 regs = lp->lwp_md.md_regs;
363 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
364 if (error)
365 return (error);
366 ucp = &uc;
367 rflags = ucp->uc_mcontext.mc_rflags;
368
369 /* VM (8086) mode not supported */
370 rflags &= ~PSL_VM_UNSUPP;
371
372#if 0
373 if (eflags & PSL_VM) {
374 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
375 struct vm86_kernel *vm86;
376
377 /*
378 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
379 * set up the vm86 area, and we can't enter vm86 mode.
380 */
381 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
382 return (EINVAL);
383 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
384 if (vm86->vm86_inited == 0)
385 return (EINVAL);
386
387 /* go back to user mode if both flags are set */
388 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
389 trapsignal(lp->lwp_proc, SIGBUS, 0);
390
391 if (vm86->vm86_has_vme) {
392 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
393 (eflags & VME_USERCHANGE) | PSL_VM;
394 } else {
395 vm86->vm86_eflags = eflags; /* save VIF, VIP */
396 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
397 }
398 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
399 tf->tf_eflags = eflags;
400 tf->tf_vm86_ds = tf->tf_ds;
401 tf->tf_vm86_es = tf->tf_es;
402 tf->tf_vm86_fs = tf->tf_fs;
403 tf->tf_vm86_gs = tf->tf_gs;
404 tf->tf_ds = _udatasel;
405 tf->tf_es = _udatasel;
406#if 0
407 tf->tf_fs = _udatasel;
408 tf->tf_gs = _udatasel;
409#endif
410 } else
411#endif
412 {
413 /*
414 * Don't allow users to change privileged or reserved flags.
415 */
416 /*
417 * XXX do allow users to change the privileged flag PSL_RF.
418 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
419 * should sometimes set it there too. tf_eflags is kept in
420 * the signal context during signal handling and there is no
421 * other place to remember it, so the PSL_RF bit may be
422 * corrupted by the signal handler without us knowing.
423 * Corruption of the PSL_RF bit at worst causes one more or
424 * one less debugger trap, so allowing it is fairly harmless.
425 */
426 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
427 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
428 return(EINVAL);
429 }
430
431 /*
432 * Don't allow users to load a valid privileged %cs. Let the
433 * hardware check for invalid selectors, excess privilege in
434 * other selectors, invalid %eip's and invalid %esp's.
435 */
436 cs = ucp->uc_mcontext.mc_cs;
437 if (!CS_SECURE(cs)) {
438 kprintf("sigreturn: cs = 0x%x\n", cs);
439 trapsignal(lp, SIGBUS, T_PROTFLT);
440 return(EINVAL);
441 }
442 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
443 }
444
445 /*
446 * Restore the FPU state from the frame
447 */
448 npxpop(&ucp->uc_mcontext);
449
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450 if (ucp->uc_mcontext.mc_onstack & 1)
451 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
452 else
453 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
454
455 lp->lwp_sigmask = ucp->uc_sigmask;
456 SIG_CANTMASK(lp->lwp_sigmask);
457 return(EJUSTRETURN);
458}
459
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460/*
461 * cpu_idle() represents the idle LWKT. You cannot return from this function
462 * (unless you want to blow things up!). Instead we look for runnable threads
463 * and loop or halt as appropriate. Giant is not held on entry to the thread.
464 *
465 * The main loop is entered with a critical section held, we must release
466 * the critical section before doing anything else. lwkt_switch() will
467 * check for pending interrupts due to entering and exiting its own
468 * critical section.
469 *
470 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
b12defdc 471 * to wake a HLTed cpu up.
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472 */
473static int cpu_idle_hlt = 1;
474static int cpu_idle_hltcnt;
475static int cpu_idle_spincnt;
476SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
477 &cpu_idle_hlt, 0, "Idle loop HLT enable");
478SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
479 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
480SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
481 &cpu_idle_spincnt, 0, "Idle loop entry spins");
482
483void
484cpu_idle(void)
485{
486 struct thread *td = curthread;
487 struct mdglobaldata *gd = mdcpu;
c5724852 488 int reqflags;
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489
490 crit_exit();
f9235b6d 491 KKASSERT(td->td_critcount == 0);
da673940 492 cpu_enable_intr();
da0b0e8b 493
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494 for (;;) {
495 /*
496 * See if there are any LWKTs ready to go.
497 */
498 lwkt_switch();
499
500 /*
501 * The idle loop halts only if no threads are scheduleable
b12defdc 502 * and no signals have occured.
da673940 503 */
cbdd23b1
MD
504 if (cpu_idle_hlt &&
505 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
da673940 506 splz();
cbdd23b1 507 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
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508#ifdef DEBUGIDLE
509 struct timeval tv1, tv2;
510 gettimeofday(&tv1, NULL);
511#endif
c5724852 512 reqflags = gd->mi.gd_reqflags &
cbdd23b1 513 ~RQF_IDLECHECK_WK_MASK;
da0b0e8b 514 KKASSERT(gd->mi.gd_processing_ipiq == 0);
c5724852
MD
515 umtx_sleep(&gd->mi.gd_reqflags, reqflags,
516 1000000);
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517#ifdef DEBUGIDLE
518 gettimeofday(&tv2, NULL);
519 if (tv2.tv_usec - tv1.tv_usec +
520 (tv2.tv_sec - tv1.tv_sec) * 1000000
521 > 500000) {
522 kprintf("cpu %d idlelock %08x %08x\n",
523 gd->mi.gd_cpuid,
f9235b6d 524 gd->mi.gd_reqflags,
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525 gd->gd_fpending);
526 }
527#endif
528 }
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529 ++cpu_idle_hltcnt;
530 } else {
da673940 531 splz();
da673940 532 __asm __volatile("pause");
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533 ++cpu_idle_spincnt;
534 }
535 }
536}
537
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538/*
539 * Called by the spinlock code with or without a critical section held
540 * when a spinlock is found to be seriously constested.
541 *
542 * We need to enter a critical section to prevent signals from recursing
543 * into pthreads.
544 */
545void
546cpu_spinlock_contested(void)
547{
b68e846f 548 cpu_pause();
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549}
550
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551/*
552 * Clear registers on exec
553 */
554void
555exec_setregs(u_long entry, u_long stack, u_long ps_strings)
556{
557 struct thread *td = curthread;
558 struct lwp *lp = td->td_lwp;
559 struct pcb *pcb = td->td_pcb;
560 struct trapframe *regs = lp->lwp_md.md_regs;
561
562 /* was i386_user_cleanup() in NetBSD */
563 user_ldt_free(pcb);
564
565 bzero((char *)regs, sizeof(struct trapframe));
566 regs->tf_rip = entry;
567 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
568 regs->tf_rdi = stack; /* argv */
569 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
570 regs->tf_ss = _udatasel;
571 regs->tf_cs = _ucodesel;
572 regs->tf_rbx = ps_strings;
573
574 /*
575 * Reset the hardware debug registers if they were in use.
576 * They won't have any meaning for the newly exec'd process.
577 */
578 if (pcb->pcb_flags & PCB_DBREGS) {
579 pcb->pcb_dr0 = 0;
580 pcb->pcb_dr1 = 0;
581 pcb->pcb_dr2 = 0;
582 pcb->pcb_dr3 = 0;
583 pcb->pcb_dr6 = 0;
584 pcb->pcb_dr7 = 0; /* JG set bit 10? */
585 if (pcb == td->td_pcb) {
586 /*
587 * Clear the debug registers on the running
588 * CPU, otherwise they will end up affecting
589 * the next process we switch to.
590 */
591 reset_dbregs();
592 }
593 pcb->pcb_flags &= ~PCB_DBREGS;
594 }
595
596 /*
597 * Initialize the math emulator (if any) for the current process.
598 * Actually, just clear the bit that says that the emulator has
599 * been initialized. Initialization is delayed until the process
600 * traps to the emulator (if it is done at all) mainly because
601 * emulators don't provide an entry point for initialization.
602 */
603 pcb->pcb_flags &= ~FP_SOFTFP;
604
605 /*
606 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
607 * gd_npxthread. Otherwise a preemptive interrupt thread
608 * may panic in npxdna().
609 */
610 crit_enter();
611#if 0
612 load_cr0(rcr0() | CR0_MP);
613#endif
614
615 /*
616 * NOTE: The MSR values must be correct so we can return to
617 * userland. gd_user_fs/gs must be correct so the switch
618 * code knows what the current MSR values are.
619 */
620 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
621 pcb->pcb_gsbase = 0;
622 /* Initialize the npx (if any) for the current process. */
98d2b258 623 npxinit();
da673940
JG
624 crit_exit();
625
626 /*
627 * note: linux emulator needs edx to be 0x0 on entry, which is
628 * handled in execve simply by setting the 64 bit syscall
629 * return value to 0.
630 */
631}
632
633void
634cpu_setregs(void)
635{
636#if 0
637 unsigned int cr0;
638
639 cr0 = rcr0();
640 cr0 |= CR0_NE; /* Done by npxinit() */
641 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
642 cr0 |= CR0_WP | CR0_AM;
643 load_cr0(cr0);
644 load_gs(_udatasel);
645#endif
646}
647
648static int
649sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
650{
651 int error;
652 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
653 req);
654 if (!error && req->newptr)
655 resettodr();
656 return (error);
657}
658
659SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
660 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
661
662extern u_long bootdev; /* not a cdev_t - encoding is different */
663SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
664 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
665
666/*
667 * Initialize 386 and configure to run kernel
668 */
669
670/*
671 * Initialize segments & interrupt table
672 */
673
674extern struct user *proc0paddr;
675
676#if 0
677
678extern inthand_t
679 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
680 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
681 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
682 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
683 IDTVEC(xmm), IDTVEC(dblfault),
684 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
685#endif
686
687#ifdef DEBUG_INTERRUPTS
688extern inthand_t *Xrsvdary[256];
689#endif
690
691int
692ptrace_set_pc(struct lwp *lp, unsigned long addr)
693{
694 lp->lwp_md.md_regs->tf_rip = addr;
695 return (0);
696}
697
698int
699ptrace_single_step(struct lwp *lp)
700{
701 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
702 return (0);
703}
704
705int
706fill_regs(struct lwp *lp, struct reg *regs)
707{
da673940
JG
708 struct trapframe *tp;
709
d64d3805
MD
710 if ((tp = lp->lwp_md.md_regs) == NULL)
711 return EINVAL;
da673940 712 bcopy(&tp->tf_rdi, &regs->r_rdi, sizeof(*regs));
da673940
JG
713 return (0);
714}
715
716int
717set_regs(struct lwp *lp, struct reg *regs)
718{
da673940
JG
719 struct trapframe *tp;
720
721 tp = lp->lwp_md.md_regs;
722 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
723 !CS_SECURE(regs->r_cs))
724 return (EINVAL);
725 bcopy(&regs->r_rdi, &tp->tf_rdi, sizeof(*regs));
da673940
JG
726 return (0);
727}
728
da673940
JG
729static void
730fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
731{
732 struct env87 *penv_87 = &sv_87->sv_env;
733 struct envxmm *penv_xmm = &sv_xmm->sv_env;
734 int i;
735
736 /* FPU control/status */
737 penv_87->en_cw = penv_xmm->en_cw;
738 penv_87->en_sw = penv_xmm->en_sw;
739 penv_87->en_tw = penv_xmm->en_tw;
740 penv_87->en_fip = penv_xmm->en_fip;
741 penv_87->en_fcs = penv_xmm->en_fcs;
742 penv_87->en_opcode = penv_xmm->en_opcode;
743 penv_87->en_foo = penv_xmm->en_foo;
744 penv_87->en_fos = penv_xmm->en_fos;
745
746 /* FPU registers */
747 for (i = 0; i < 8; ++i)
748 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
da673940
JG
749}
750
751static void
752set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
753{
754 struct env87 *penv_87 = &sv_87->sv_env;
755 struct envxmm *penv_xmm = &sv_xmm->sv_env;
756 int i;
757
758 /* FPU control/status */
759 penv_xmm->en_cw = penv_87->en_cw;
760 penv_xmm->en_sw = penv_87->en_sw;
761 penv_xmm->en_tw = penv_87->en_tw;
762 penv_xmm->en_fip = penv_87->en_fip;
763 penv_xmm->en_fcs = penv_87->en_fcs;
764 penv_xmm->en_opcode = penv_87->en_opcode;
765 penv_xmm->en_foo = penv_87->en_foo;
766 penv_xmm->en_fos = penv_87->en_fos;
767
768 /* FPU registers */
769 for (i = 0; i < 8; ++i)
770 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
da673940 771}
da673940
JG
772
773int
774fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
775{
d64d3805
MD
776 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
777 return EINVAL;
da673940
JG
778 if (cpu_fxsr) {
779 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
780 (struct save87 *)fpregs);
781 return (0);
782 }
da673940
JG
783 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
784 return (0);
785}
786
787int
788set_fpregs(struct lwp *lp, struct fpreg *fpregs)
789{
da673940
JG
790 if (cpu_fxsr) {
791 set_fpregs_xmm((struct save87 *)fpregs,
792 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
793 return (0);
794 }
da673940
JG
795 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
796 return (0);
797}
798
799int
800fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
801{
802 return (ENOSYS);
803}
804
805int
806set_dbregs(struct lwp *lp, struct dbreg *dbregs)
807{
808 return (ENOSYS);
809}
810
811#if 0
812/*
813 * Return > 0 if a hardware breakpoint has been hit, and the
814 * breakpoint was in user space. Return 0, otherwise.
815 */
816int
817user_dbreg_trap(void)
818{
819 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
820 u_int32_t bp; /* breakpoint bits extracted from dr6 */
821 int nbp; /* number of breakpoints that triggered */
822 caddr_t addr[4]; /* breakpoint addresses */
823 int i;
824
825 dr7 = rdr7();
826 if ((dr7 & 0x000000ff) == 0) {
827 /*
828 * all GE and LE bits in the dr7 register are zero,
829 * thus the trap couldn't have been caused by the
830 * hardware debug registers
831 */
832 return 0;
833 }
834
835 nbp = 0;
836 dr6 = rdr6();
837 bp = dr6 & 0x0000000f;
838
839 if (!bp) {
840 /*
841 * None of the breakpoint bits are set meaning this
842 * trap was not caused by any of the debug registers
843 */
844 return 0;
845 }
846
847 /*
848 * at least one of the breakpoints were hit, check to see
849 * which ones and if any of them are user space addresses
850 */
851
852 if (bp & 0x01) {
853 addr[nbp++] = (caddr_t)rdr0();
854 }
855 if (bp & 0x02) {
856 addr[nbp++] = (caddr_t)rdr1();
857 }
858 if (bp & 0x04) {
859 addr[nbp++] = (caddr_t)rdr2();
860 }
861 if (bp & 0x08) {
862 addr[nbp++] = (caddr_t)rdr3();
863 }
864
865 for (i=0; i<nbp; i++) {
866 if (addr[i] <
867 (caddr_t)VM_MAX_USER_ADDRESS) {
868 /*
869 * addr[i] is in user space
870 */
871 return nbp;
872 }
873 }
874
875 /*
876 * None of the breakpoints are in user space.
877 */
878 return 0;
879}
880
881#endif
882
883void
884identcpu(void)
885{
886 int regs[4];
887
888 do_cpuid(1, regs);
889 cpu_feature = regs[3];
890}
891
892
893#ifndef DDB
894void
895Debugger(const char *msg)
896{
897 kprintf("Debugger(\"%s\") called.\n", msg);
898}
899#endif /* no DDB */