These files have been moved to bus/usb.
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
cb840899 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.50 2003/12/28 06:11:30 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
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57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
a722be49 76#include <sys/upcall.h>
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77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
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105#ifdef SMP
106#include <machine/smp.h>
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107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
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115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
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118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
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181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
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240int bootverbose = 0;
241vm_paddr_t Maxmem = 0;
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242long dumplo;
243
6ef943a3 244vm_paddr_t phys_avail[10];
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245
246/* must be 2 less so 0 0 can signal end of chunks */
247#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
248
249static vm_offset_t buffer_sva, buffer_eva;
250vm_offset_t clean_sva, clean_eva;
251static vm_offset_t pager_sva, pager_eva;
252static struct trapframe proc0_tf;
253
254static void
255cpu_startup(dummy)
256 void *dummy;
257{
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258 unsigned i;
259 caddr_t v;
cb840899 260 vm_offset_t minaddr;
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261 vm_offset_t maxaddr;
262 vm_size_t size = 0;
263 int firstaddr;
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264
265 if (boothowto & RB_VERBOSE)
266 bootverbose++;
267
268 /*
269 * Good {morning,afternoon,evening,night}.
270 */
271 printf("%s", version);
272 startrtclock();
273 printcpuinfo();
274 panicifcpuunsupported();
275#ifdef PERFMON
276 perfmon_init();
277#endif
6ef943a3 278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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279 /*
280 * Display any holes after the first chunk of extended memory.
281 */
282 if (bootverbose) {
283 int indx;
284
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 288
6ef943a3 289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
291 size1 / PAGE_SIZE);
292 }
293 }
294
295 /*
296 * Calculate callout wheel size
297 */
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
301 ;
302 callwheelmask = callwheelsize - 1;
303
304 /*
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
312 */
313
314 /*
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
318 */
319 firstaddr = 0;
320again:
321 v = (caddr_t)firstaddr;
322
323#define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325#define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
327
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
330
331 /*
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
337 * maxbcache bytes.
338 *
339 * factor represents the 1/4 x ram conversion.
340 */
341 if (nbuf == 0) {
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
344
345 nbuf = 50;
346 if (kbytes > 4096)
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
348 if (kbytes > 65536)
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
352 }
353
354 /*
355 * Do not allow the buffer_map to be more then 1/2 the size of the
356 * kernel_map.
357 */
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
359 (BKVASIZE * 2)) {
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
361 (BKVASIZE * 2);
362 printf("Warning: nbufs capped at %d\n", nbuf);
363 }
364
365 nswbuf = max(min(nbuf/4, 256), 16);
366#ifdef NSWBUF_MIN
367 if (nswbuf < NSWBUF_MIN)
368 nswbuf = NSWBUF_MIN;
369#endif
370#ifdef DIRECTIO
371 ffs_rawread_setup();
372#endif
373
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
376 v = bufhashinit(v);
377
378 /*
379 * End of first pass, size has been calculated so allocate memory
380 */
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
384 if (firstaddr == 0)
385 panic("startup: no room for tables");
386 goto again;
387 }
388
389 /*
390 * End of second pass, addresses have been assigned
391 */
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
394
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
398 (nbuf*BKVASIZE));
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
405
406 /*
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
409 */
410 {
411 vm_offset_t mb_map_size;
412
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
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417 mb_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
418 mb_map_size);
984263bc 419 mb_map->system_map = 1;
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420 mbutl = (void *)mb_map->header.start;
421 mbute = (void *)mb_map->header.end;
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422 }
423
424 /*
425 * Initialize callouts
426 */
427 SLIST_INIT(&callfree);
428 for (i = 0; i < ncallout; i++) {
429 callout_init(&callout[i]);
430 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
431 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
432 }
433
434 for (i = 0; i < callwheelsize; i++) {
435 TAILQ_INIT(&callwheel[i]);
436 }
437
438#if defined(USERCONFIG)
439 userconfig();
440 cninit(); /* the preferred console may have changed */
441#endif
442
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443 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
444 ptoa(vmstats.v_free_count) / 1024);
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445
446 /*
447 * Set up buffers, so they can be used to read disk labels.
448 */
449 bufinit();
450 vm_pager_bufferinit();
451
452#ifdef SMP
453 /*
454 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
455 */
456 mp_start(); /* fire up the APs and APICs */
457 mp_announce();
458#endif /* SMP */
459 cpu_setregs();
460}
461
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462/*
463 * Send an interrupt to process.
464 *
465 * Stack is set up to allow sigcode stored
466 * at top to call routine, followed by kcall
467 * to sigreturn routine below. After sigreturn
468 * resets the signal mask, the stack, and the
469 * frame pointer, it returns to the user
470 * specified pc, psl.
471 */
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472void
473sendsig(catcher, sig, mask, code)
474 sig_t catcher;
475 int sig;
476 sigset_t *mask;
477 u_long code;
478{
479 struct proc *p = curproc;
480 struct trapframe *regs;
481 struct sigacts *psp = p->p_sigacts;
482 struct sigframe sf, *sfp;
483 int oonstack;
484
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485 regs = p->p_md.md_regs;
486 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
487
488 /* save user context */
489 bzero(&sf, sizeof(struct sigframe));
490 sf.sf_uc.uc_sigmask = *mask;
491 sf.sf_uc.uc_stack = p->p_sigstk;
492 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
493 sf.sf_uc.uc_mcontext.mc_gs = rgs();
494 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
495
496 /* Allocate and validate space for the signal handler context. */
497 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
498 SIGISMEMBER(psp->ps_sigonstack, sig)) {
499 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
500 p->p_sigstk.ss_size - sizeof(struct sigframe));
501 p->p_sigstk.ss_flags |= SS_ONSTACK;
502 }
503 else
504 sfp = (struct sigframe *)regs->tf_esp - 1;
505
506 /* Translate the signal is appropriate */
507 if (p->p_sysent->sv_sigtbl) {
508 if (sig <= p->p_sysent->sv_sigsize)
509 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
510 }
511
512 /* Build the argument list for the signal handler. */
513 sf.sf_signum = sig;
514 sf.sf_ucontext = (register_t)&sfp->sf_uc;
515 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
516 /* Signal handler installed with SA_SIGINFO. */
517 sf.sf_siginfo = (register_t)&sfp->sf_si;
518 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
519
520 /* fill siginfo structure */
521 sf.sf_si.si_signo = sig;
522 sf.sf_si.si_code = code;
523 sf.sf_si.si_addr = (void*)regs->tf_err;
524 }
525 else {
526 /* Old FreeBSD-style arguments. */
527 sf.sf_siginfo = code;
528 sf.sf_addr = regs->tf_err;
529 sf.sf_ahu.sf_handler = catcher;
530 }
531
532 /*
533 * If we're a vm86 process, we want to save the segment registers.
534 * We also change eflags to be our emulated eflags, not the actual
535 * eflags.
536 */
537 if (regs->tf_eflags & PSL_VM) {
538 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 539 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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540
541 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
542 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
543 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
544 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
545
546 if (vm86->vm86_has_vme == 0)
547 sf.sf_uc.uc_mcontext.mc_eflags =
548 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
549 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
550
551 /*
552 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
553 * syscalls made by the signal handler. This just avoids
554 * wasting time for our lazy fixup of such faults. PSL_NT
555 * does nothing in vm86 mode, but vm86 programs can set it
556 * almost legitimately in probes for old cpu types.
557 */
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
559 }
560
561 /*
562 * Copy the sigframe out to the user's stack.
563 */
564 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
565 /*
566 * Something is wrong with the stack pointer.
567 * ...Kill the process.
568 */
569 sigexit(p, SIGILL);
570 }
571
572 regs->tf_esp = (int)sfp;
573 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
574 regs->tf_eflags &= ~PSL_T;
575 regs->tf_cs = _ucodesel;
576 regs->tf_ds = _udatasel;
577 regs->tf_es = _udatasel;
578 regs->tf_fs = _udatasel;
579 load_gs(_udatasel);
580 regs->tf_ss = _udatasel;
581}
582
583/*
65957d54 584 * sigreturn(ucontext_t *sigcntxp)
41c20dac 585 *
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586 * System call to cleanup state after a signal
587 * has been taken. Reset signal mask and
588 * stack state from context left by sendsig (above).
589 * Return to previous pc and psl as specified by
590 * context left by sendsig. Check carefully to
591 * make sure that the user has not modified the
592 * state to gain improper privileges.
593 */
594#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
595#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
596
984263bc 597int
41c20dac 598sigreturn(struct sigreturn_args *uap)
984263bc 599{
41c20dac 600 struct proc *p = curproc;
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601 struct trapframe *regs;
602 ucontext_t *ucp;
603 int cs, eflags;
604
605 ucp = uap->sigcntxp;
606
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607 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
608 return (EFAULT);
609
610 regs = p->p_md.md_regs;
611 eflags = ucp->uc_mcontext.mc_eflags;
612
613 if (eflags & PSL_VM) {
614 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
615 struct vm86_kernel *vm86;
616
617 /*
618 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
619 * set up the vm86 area, and we can't enter vm86 mode.
620 */
b7c628e4 621 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 622 return (EINVAL);
b7c628e4 623 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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624 if (vm86->vm86_inited == 0)
625 return (EINVAL);
626
627 /* go back to user mode if both flags are set */
628 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
629 trapsignal(p, SIGBUS, 0);
630
631 if (vm86->vm86_has_vme) {
632 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
633 (eflags & VME_USERCHANGE) | PSL_VM;
634 } else {
635 vm86->vm86_eflags = eflags; /* save VIF, VIP */
636 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
637 }
638 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
639 tf->tf_eflags = eflags;
640 tf->tf_vm86_ds = tf->tf_ds;
641 tf->tf_vm86_es = tf->tf_es;
642 tf->tf_vm86_fs = tf->tf_fs;
643 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
644 tf->tf_ds = _udatasel;
645 tf->tf_es = _udatasel;
646 tf->tf_fs = _udatasel;
647 } else {
648 /*
649 * Don't allow users to change privileged or reserved flags.
650 */
651 /*
652 * XXX do allow users to change the privileged flag PSL_RF.
653 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
654 * should sometimes set it there too. tf_eflags is kept in
655 * the signal context during signal handling and there is no
656 * other place to remember it, so the PSL_RF bit may be
657 * corrupted by the signal handler without us knowing.
658 * Corruption of the PSL_RF bit at worst causes one more or
659 * one less debugger trap, so allowing it is fairly harmless.
660 */
661 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
662 printf("sigreturn: eflags = 0x%x\n", eflags);
663 return(EINVAL);
664 }
665
666 /*
667 * Don't allow users to load a valid privileged %cs. Let the
668 * hardware check for invalid selectors, excess privilege in
669 * other selectors, invalid %eip's and invalid %esp's.
670 */
671 cs = ucp->uc_mcontext.mc_cs;
672 if (!CS_SECURE(cs)) {
673 printf("sigreturn: cs = 0x%x\n", cs);
674 trapsignal(p, SIGBUS, T_PROTFLT);
675 return(EINVAL);
676 }
677 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
678 }
679
680 if (ucp->uc_mcontext.mc_onstack & 1)
681 p->p_sigstk.ss_flags |= SS_ONSTACK;
682 else
683 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
684
685 p->p_sigmask = ucp->uc_sigmask;
686 SIG_CANTMASK(p->p_sigmask);
687 return(EJUSTRETURN);
688}
689
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690/*
691 * Stack frame on entry to function. %eax will contain the function vector,
692 * %ecx will contain the function data. flags, ecx, and eax will have
693 * already been pushed on the stack.
694 */
695struct upc_frame {
696 register_t eax;
697 register_t ecx;
0a455ac5 698 register_t edx;
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699 register_t flags;
700 register_t oldip;
701};
702
703void
704sendupcall(struct vmupcall *vu, int morepending)
705{
706 struct proc *p = curproc;
707 struct trapframe *regs;
708 struct upcall upcall;
709 struct upc_frame upc_frame;
6e58b5df 710 int crit_count = 0;
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711
712 /*
713 * Get the upcall data structure
714 */
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715 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
716 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
717 ) {
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718 vu->vu_pending = 0;
719 printf("bad upcall address\n");
720 return;
721 }
722
723 /*
724 * If the data structure is already marked pending or has a critical
725 * section count, mark the data structure as pending and return
726 * without doing an upcall. vu_pending is left set.
727 */
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728 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
729 if (upcall.upc_pending < vu->vu_pending) {
730 upcall.upc_pending = vu->vu_pending;
731 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
732 sizeof(upcall.upc_pending));
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733 }
734 return;
735 }
736
737 /*
738 * We can run this upcall now, clear vu_pending.
739 *
740 * Bump our critical section count and set or clear the
741 * user pending flag depending on whether more upcalls are
742 * pending. The user will be responsible for calling
743 * upc_dispatch(-1) to process remaining upcalls.
744 */
745 vu->vu_pending = 0;
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746 upcall.upc_pending = morepending;
747 crit_count += TDPRI_CRIT;
748 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
749 sizeof(upcall.upc_pending));
750 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
751 sizeof(int));
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752
753 /*
754 * Construct a stack frame and issue the upcall
755 */
756 regs = p->p_md.md_regs;
757 upc_frame.eax = regs->tf_eax;
758 upc_frame.ecx = regs->tf_ecx;
0a455ac5 759 upc_frame.edx = regs->tf_edx;
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760 upc_frame.flags = regs->tf_eflags;
761 upc_frame.oldip = regs->tf_eip;
762 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
763 sizeof(upc_frame)) != 0) {
764 printf("bad stack on upcall\n");
765 } else {
766 regs->tf_eax = (register_t)vu->vu_func;
767 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 768 regs->tf_edx = (register_t)p->p_upcall;
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769 regs->tf_eip = (register_t)vu->vu_ctx;
770 regs->tf_esp -= sizeof(upc_frame);
771 }
772}
773
774/*
775 * fetchupcall occurs in the context of a system call, which means that
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776 * we have to return EJUSTRETURN in order to prevent eax and edx from
777 * being overwritten by the syscall return value.
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778 *
779 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
780 * and the function pointer in %eax.
781 */
782int
0a455ac5 783fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
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784{
785 struct upc_frame upc_frame;
786 struct proc *p;
787 struct trapframe *regs;
788 int error;
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789 struct upcall upcall;
790 int crit_count;
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791
792 p = curproc;
793 regs = p->p_md.md_regs;
794
6e58b5df 795 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
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796 if (error == 0) {
797 if (vu) {
798 /*
799 * This jumps us to the next ready context.
800 */
801 vu->vu_pending = 0;
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802 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
803 crit_count = 0;
804 if (error == 0)
805 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
806 crit_count += TDPRI_CRIT;
a722be49 807 if (error == 0)
6e58b5df 808 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
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809 regs->tf_eax = (register_t)vu->vu_func;
810 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 811 regs->tf_edx = (register_t)p->p_upcall;
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812 regs->tf_eip = (register_t)vu->vu_ctx;
813 regs->tf_esp = (register_t)rsp;
814 } else {
815 /*
816 * This returns us to the originally interrupted code.
817 */
818 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
819 regs->tf_eax = upc_frame.eax;
820 regs->tf_ecx = upc_frame.ecx;
0a455ac5 821 regs->tf_edx = upc_frame.edx;
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822 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
823 (upc_frame.flags & PSL_USERCHANGE);
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824 regs->tf_eip = upc_frame.oldip;
825 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
826 }
827 }
828 if (error == 0)
829 error = EJUSTRETURN;
830 return(error);
831}
832
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833/*
834 * Machine dependent boot() routine
835 *
836 * I haven't seen anything to put here yet
837 * Possibly some stuff might be grafted back here from boot()
838 */
839void
840cpu_boot(int howto)
841{
842}
843
844/*
845 * Shutdown the CPU as much as possible
846 */
847void
848cpu_halt(void)
849{
850 for (;;)
851 __asm__ ("hlt");
852}
853
854/*
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855 * cpu_idle() represents the idle LWKT. You cannot return from this function
856 * (unless you want to blow things up!). Instead we look for runnable threads
857 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 858 *
26a0694b 859 * The main loop is entered with a critical section held, we must release
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860 * the critical section before doing anything else. lwkt_switch() will
861 * check for pending interrupts due to entering and exiting its own
862 * critical section.
26a0694b 863 *
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864 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
865 * to wake a HLTed cpu up. However, there are cases where the idlethread
866 * will be entered with the possibility that no IPI will occur and in such
867 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 868 */
96728c05 869static int cpu_idle_hlt = 1;
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870SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
871 &cpu_idle_hlt, 0, "Idle loop HLT enable");
872
873void
874cpu_idle(void)
875{
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876 struct thread *td = curthread;
877
26a0694b 878 crit_exit();
a2a5ad0d 879 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 880 for (;;) {
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881 /*
882 * See if there are any LWKTs ready to go.
883 */
8ad65e08 884 lwkt_switch();
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885
886 /*
887 * If we are going to halt call splz unconditionally after
888 * CLIing to catch any interrupt races. Note that we are
889 * at SPL0 and interrupts are enabled.
890 */
891 if (cpu_idle_hlt && !lwkt_runnable() &&
892 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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893 /*
894 * We must guarentee that hlt is exactly the instruction
895 * following the sti.
896 */
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897 __asm __volatile("cli");
898 splz();
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899 __asm __volatile("sti; hlt");
900 } else {
a2a5ad0d 901 td->td_flags &= ~TDF_IDLE_NOHLT;
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902 __asm __volatile("sti");
903 }
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904 }
905}
906
907/*
908 * Clear registers on exec
909 */
910void
911setregs(p, entry, stack, ps_strings)
912 struct proc *p;
913 u_long entry;
914 u_long stack;
915 u_long ps_strings;
916{
917 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 918 struct pcb *pcb = p->p_thread->td_pcb;
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919
920 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
921 pcb->pcb_gs = _udatasel;
922 load_gs(_udatasel);
923
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924 /* was i386_user_cleanup() in NetBSD */
925 user_ldt_free(pcb);
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926
927 bzero((char *)regs, sizeof(struct trapframe));
928 regs->tf_eip = entry;
929 regs->tf_esp = stack;
930 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
931 regs->tf_ss = _udatasel;
932 regs->tf_ds = _udatasel;
933 regs->tf_es = _udatasel;
934 regs->tf_fs = _udatasel;
935 regs->tf_cs = _ucodesel;
936
937 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
938 regs->tf_ebx = ps_strings;
939
940 /*
941 * Reset the hardware debug registers if they were in use.
942 * They won't have any meaning for the newly exec'd process.
943 */
944 if (pcb->pcb_flags & PCB_DBREGS) {
945 pcb->pcb_dr0 = 0;
946 pcb->pcb_dr1 = 0;
947 pcb->pcb_dr2 = 0;
948 pcb->pcb_dr3 = 0;
949 pcb->pcb_dr6 = 0;
950 pcb->pcb_dr7 = 0;
b7c628e4 951 if (pcb == curthread->td_pcb) {
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952 /*
953 * Clear the debug registers on the running
954 * CPU, otherwise they will end up affecting
955 * the next process we switch to.
956 */
957 reset_dbregs();
958 }
959 pcb->pcb_flags &= ~PCB_DBREGS;
960 }
961
962 /*
963 * Initialize the math emulator (if any) for the current process.
964 * Actually, just clear the bit that says that the emulator has
965 * been initialized. Initialization is delayed until the process
966 * traps to the emulator (if it is done at all) mainly because
967 * emulators don't provide an entry point for initialization.
968 */
b7c628e4 969 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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970
971 /*
972 * Arrange to trap the next npx or `fwait' instruction (see npx.c
973 * for why fwait must be trapped at least if there is an npx or an
974 * emulator). This is mainly to handle the case where npx0 is not
975 * configured, since the npx routines normally set up the trap
976 * otherwise. It should be done only at boot time, but doing it
977 * here allows modifying `npx_exists' for testing the emulator on
978 * systems with an npx.
979 */
980 load_cr0(rcr0() | CR0_MP | CR0_TS);
981
982#if NNPX > 0
983 /* Initialize the npx (if any) for the current process. */
984 npxinit(__INITIAL_NPXCW__);
985#endif
986
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987 /*
988 * note: linux emulator needs edx to be 0x0 on entry, which is
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989 * handled in execve simply by setting the 64 bit syscall
990 * return value to 0.
90b9818c 991 */
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992}
993
994void
995cpu_setregs(void)
996{
997 unsigned int cr0;
998
999 cr0 = rcr0();
1000 cr0 |= CR0_NE; /* Done by npxinit() */
1001 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1002#ifdef I386_CPU
1003 if (cpu_class != CPUCLASS_386)
1004#endif
1005 cr0 |= CR0_WP | CR0_AM;
1006 load_cr0(cr0);
1007 load_gs(_udatasel);
1008}
1009
1010static int
1011sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1012{
1013 int error;
1014 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1015 req);
1016 if (!error && req->newptr)
1017 resettodr();
1018 return (error);
1019}
1020
1021SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1022 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1023
1024SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1025 CTLFLAG_RW, &disable_rtc_set, 0, "");
1026
1027SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1028 CTLFLAG_RD, &bootinfo, bootinfo, "");
1029
1030SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1031 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1032
1033extern u_long bootdev; /* not a dev_t - encoding is different */
1034SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1035 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1036
1037/*
1038 * Initialize 386 and configure to run kernel
1039 */
1040
1041/*
1042 * Initialize segments & interrupt table
1043 */
1044
1045int _default_ldt;
1046union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1047static struct gate_descriptor idt0[NIDT];
1048struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1049union descriptor ldt[NLDT]; /* local descriptor table */
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1050
1051/* table descriptors - used to load tables by cpu */
984263bc 1052struct region_descriptor r_gdt, r_idt;
984263bc 1053
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1054#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1055extern int has_f00f_bug;
1056#endif
1057
1058static struct i386tss dblfault_tss;
1059static char dblfault_stack[PAGE_SIZE];
1060
1061extern struct user *proc0paddr;
1062
1063
1064/* software prototypes -- in more palatable form */
1065struct soft_segment_descriptor gdt_segs[] = {
1066/* GNULL_SEL 0 Null Descriptor */
1067{ 0x0, /* segment base address */
1068 0x0, /* length */
1069 0, /* segment type */
1070 0, /* segment descriptor priority level */
1071 0, /* segment descriptor present */
1072 0, 0,
1073 0, /* default 32 vs 16 bit size */
1074 0 /* limit granularity (byte/page units)*/ },
1075/* GCODE_SEL 1 Code Descriptor for kernel */
1076{ 0x0, /* segment base address */
1077 0xfffff, /* length - all address space */
1078 SDT_MEMERA, /* segment type */
1079 0, /* segment descriptor priority level */
1080 1, /* segment descriptor present */
1081 0, 0,
1082 1, /* default 32 vs 16 bit size */
1083 1 /* limit granularity (byte/page units)*/ },
1084/* GDATA_SEL 2 Data Descriptor for kernel */
1085{ 0x0, /* segment base address */
1086 0xfffff, /* length - all address space */
1087 SDT_MEMRWA, /* segment type */
1088 0, /* segment descriptor priority level */
1089 1, /* segment descriptor present */
1090 0, 0,
1091 1, /* default 32 vs 16 bit size */
1092 1 /* limit granularity (byte/page units)*/ },
1093/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1094{ 0x0, /* segment base address */
1095 0xfffff, /* length - all address space */
1096 SDT_MEMRWA, /* segment type */
1097 0, /* segment descriptor priority level */
1098 1, /* segment descriptor present */
1099 0, 0,
1100 1, /* default 32 vs 16 bit size */
1101 1 /* limit granularity (byte/page units)*/ },
1102/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1103{
1104 0x0, /* segment base address */
1105 sizeof(struct i386tss)-1,/* length - all address space */
1106 SDT_SYS386TSS, /* segment type */
1107 0, /* segment descriptor priority level */
1108 1, /* segment descriptor present */
1109 0, 0,
1110 0, /* unused - default 32 vs 16 bit size */
1111 0 /* limit granularity (byte/page units)*/ },
1112/* GLDT_SEL 5 LDT Descriptor */
1113{ (int) ldt, /* segment base address */
1114 sizeof(ldt)-1, /* length - all address space */
1115 SDT_SYSLDT, /* segment type */
1116 SEL_UPL, /* segment descriptor priority level */
1117 1, /* segment descriptor present */
1118 0, 0,
1119 0, /* unused - default 32 vs 16 bit size */
1120 0 /* limit granularity (byte/page units)*/ },
1121/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1122{ (int) ldt, /* segment base address */
1123 (512 * sizeof(union descriptor)-1), /* length */
1124 SDT_SYSLDT, /* segment type */
1125 0, /* segment descriptor priority level */
1126 1, /* segment descriptor present */
1127 0, 0,
1128 0, /* unused - default 32 vs 16 bit size */
1129 0 /* limit granularity (byte/page units)*/ },
1130/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1131{ 0x0, /* segment base address */
1132 0x0, /* length - all address space */
1133 0, /* segment type */
1134 0, /* segment descriptor priority level */
1135 0, /* segment descriptor present */
1136 0, 0,
1137 0, /* default 32 vs 16 bit size */
1138 0 /* limit granularity (byte/page units)*/ },
1139/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1140{ 0x400, /* segment base address */
1141 0xfffff, /* length */
1142 SDT_MEMRWA, /* segment type */
1143 0, /* segment descriptor priority level */
1144 1, /* segment descriptor present */
1145 0, 0,
1146 1, /* default 32 vs 16 bit size */
1147 1 /* limit granularity (byte/page units)*/ },
1148/* GPANIC_SEL 9 Panic Tss Descriptor */
1149{ (int) &dblfault_tss, /* segment base address */
1150 sizeof(struct i386tss)-1,/* length - all address space */
1151 SDT_SYS386TSS, /* segment type */
1152 0, /* segment descriptor priority level */
1153 1, /* segment descriptor present */
1154 0, 0,
1155 0, /* unused - default 32 vs 16 bit size */
1156 0 /* limit granularity (byte/page units)*/ },
1157/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1158{ 0, /* segment base address (overwritten) */
1159 0xfffff, /* length */
1160 SDT_MEMERA, /* segment type */
1161 0, /* segment descriptor priority level */
1162 1, /* segment descriptor present */
1163 0, 0,
1164 0, /* default 32 vs 16 bit size */
1165 1 /* limit granularity (byte/page units)*/ },
1166/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1167{ 0, /* segment base address (overwritten) */
1168 0xfffff, /* length */
1169 SDT_MEMERA, /* segment type */
1170 0, /* segment descriptor priority level */
1171 1, /* segment descriptor present */
1172 0, 0,
1173 0, /* default 32 vs 16 bit size */
1174 1 /* limit granularity (byte/page units)*/ },
1175/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1176{ 0, /* segment base address (overwritten) */
1177 0xfffff, /* length */
1178 SDT_MEMRWA, /* segment type */
1179 0, /* segment descriptor priority level */
1180 1, /* segment descriptor present */
1181 0, 0,
1182 1, /* default 32 vs 16 bit size */
1183 1 /* limit granularity (byte/page units)*/ },
1184/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1185{ 0, /* segment base address (overwritten) */
1186 0xfffff, /* length */
1187 SDT_MEMRWA, /* segment type */
1188 0, /* segment descriptor priority level */
1189 1, /* segment descriptor present */
1190 0, 0,
1191 0, /* default 32 vs 16 bit size */
1192 1 /* limit granularity (byte/page units)*/ },
1193/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1194{ 0, /* segment base address (overwritten) */
1195 0xfffff, /* length */
1196 SDT_MEMRWA, /* segment type */
1197 0, /* segment descriptor priority level */
1198 1, /* segment descriptor present */
1199 0, 0,
1200 0, /* default 32 vs 16 bit size */
1201 1 /* limit granularity (byte/page units)*/ },
1202};
1203
1204static struct soft_segment_descriptor ldt_segs[] = {
1205 /* Null Descriptor - overwritten by call gate */
1206{ 0x0, /* segment base address */
1207 0x0, /* length - all address space */
1208 0, /* segment type */
1209 0, /* segment descriptor priority level */
1210 0, /* segment descriptor present */
1211 0, 0,
1212 0, /* default 32 vs 16 bit size */
1213 0 /* limit granularity (byte/page units)*/ },
1214 /* Null Descriptor - overwritten by call gate */
1215{ 0x0, /* segment base address */
1216 0x0, /* length - all address space */
1217 0, /* segment type */
1218 0, /* segment descriptor priority level */
1219 0, /* segment descriptor present */
1220 0, 0,
1221 0, /* default 32 vs 16 bit size */
1222 0 /* limit granularity (byte/page units)*/ },
1223 /* Null Descriptor - overwritten by call gate */
1224{ 0x0, /* segment base address */
1225 0x0, /* length - all address space */
1226 0, /* segment type */
1227 0, /* segment descriptor priority level */
1228 0, /* segment descriptor present */
1229 0, 0,
1230 0, /* default 32 vs 16 bit size */
1231 0 /* limit granularity (byte/page units)*/ },
1232 /* Code Descriptor for user */
1233{ 0x0, /* segment base address */
1234 0xfffff, /* length - all address space */
1235 SDT_MEMERA, /* segment type */
1236 SEL_UPL, /* segment descriptor priority level */
1237 1, /* segment descriptor present */
1238 0, 0,
1239 1, /* default 32 vs 16 bit size */
1240 1 /* limit granularity (byte/page units)*/ },
1241 /* Null Descriptor - overwritten by call gate */
1242{ 0x0, /* segment base address */
1243 0x0, /* length - all address space */
1244 0, /* segment type */
1245 0, /* segment descriptor priority level */
1246 0, /* segment descriptor present */
1247 0, 0,
1248 0, /* default 32 vs 16 bit size */
1249 0 /* limit granularity (byte/page units)*/ },
1250 /* Data Descriptor for user */
1251{ 0x0, /* segment base address */
1252 0xfffff, /* length - all address space */
1253 SDT_MEMRWA, /* segment type */
1254 SEL_UPL, /* segment descriptor priority level */
1255 1, /* segment descriptor present */
1256 0, 0,
1257 1, /* default 32 vs 16 bit size */
1258 1 /* limit granularity (byte/page units)*/ },
1259};
1260
1261void
1262setidt(idx, func, typ, dpl, selec)
1263 int idx;
1264 inthand_t *func;
1265 int typ;
1266 int dpl;
1267 int selec;
1268{
1269 struct gate_descriptor *ip;
1270
1271 ip = idt + idx;
1272 ip->gd_looffset = (int)func;
1273 ip->gd_selector = selec;
1274 ip->gd_stkcpy = 0;
1275 ip->gd_xx = 0;
1276 ip->gd_type = typ;
1277 ip->gd_dpl = dpl;
1278 ip->gd_p = 1;
1279 ip->gd_hioffset = ((int)func)>>16 ;
1280}
1281
1282#define IDTVEC(name) __CONCAT(X,name)
1283
1284extern inthand_t
1285 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1286 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1287 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1288 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1289 IDTVEC(xmm), IDTVEC(syscall),
1290 IDTVEC(rsvd0);
a64ba182
MD
1291extern inthand_t
1292 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1293
f7bc9806
MD
1294#ifdef DEBUG_INTERRUPTS
1295extern inthand_t *Xrsvdary[256];
1296#endif
1297
984263bc
MD
1298void
1299sdtossd(sd, ssd)
1300 struct segment_descriptor *sd;
1301 struct soft_segment_descriptor *ssd;
1302{
1303 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1304 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1305 ssd->ssd_type = sd->sd_type;
1306 ssd->ssd_dpl = sd->sd_dpl;
1307 ssd->ssd_p = sd->sd_p;
1308 ssd->ssd_def32 = sd->sd_def32;
1309 ssd->ssd_gran = sd->sd_gran;
1310}
1311
1312#define PHYSMAP_SIZE (2 * 8)
1313
1314/*
1315 * Populate the (physmap) array with base/bound pairs describing the
1316 * available physical memory in the system, then test this memory and
1317 * build the phys_avail array describing the actually-available memory.
1318 *
1319 * If we cannot accurately determine the physical memory map, then use
1320 * value from the 0xE801 call, and failing that, the RTC.
1321 *
1322 * Total memory size may be set by the kernel environment variable
1323 * hw.physmem or the compile-time define MAXMEM.
1324 */
1325static void
1326getmemsize(int first)
1327{
1328 int i, physmap_idx, pa_indx;
1329 int hasbrokenint12;
1330 u_int basemem, extmem;
1331 struct vm86frame vmf;
1332 struct vm86context vmc;
1333 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1334 pt_entry_t *pte;
984263bc
MD
1335 const char *cp;
1336 struct {
1337 u_int64_t base;
1338 u_int64_t length;
1339 u_int32_t type;
1340 } *smap;
1341
1342 hasbrokenint12 = 0;
1343 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1344 bzero(&vmf, sizeof(struct vm86frame));
1345 bzero(physmap, sizeof(physmap));
1346 basemem = 0;
1347
1348 /*
1349 * Some newer BIOSes has broken INT 12H implementation which cause
1350 * kernel panic immediately. In this case, we need to scan SMAP
1351 * with INT 15:E820 first, then determine base memory size.
1352 */
1353 if (hasbrokenint12) {
1354 goto int15e820;
1355 }
1356
1357 /*
1358 * Perform "base memory" related probes & setup
1359 */
1360 vm86_intcall(0x12, &vmf);
1361 basemem = vmf.vmf_ax;
1362 if (basemem > 640) {
1363 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1364 basemem);
1365 basemem = 640;
1366 }
1367
1368 /*
1369 * XXX if biosbasemem is now < 640, there is a `hole'
1370 * between the end of base memory and the start of
1371 * ISA memory. The hole may be empty or it may
1372 * contain BIOS code or data. Map it read/write so
1373 * that the BIOS can write to it. (Memory from 0 to
1374 * the physical end of the kernel is mapped read-only
1375 * to begin with and then parts of it are remapped.
1376 * The parts that aren't remapped form holes that
1377 * remain read-only and are unused by the kernel.
1378 * The base memory area is below the physical end of
1379 * the kernel and right now forms a read-only hole.
1380 * The part of it from PAGE_SIZE to
1381 * (trunc_page(biosbasemem * 1024) - 1) will be
1382 * remapped and used by the kernel later.)
1383 *
1384 * This code is similar to the code used in
1385 * pmap_mapdev, but since no memory needs to be
1386 * allocated we simply change the mapping.
1387 */
1388 for (pa = trunc_page(basemem * 1024);
1389 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1390 pte = vtopte(pa + KERNBASE);
984263bc
MD
1391 *pte = pa | PG_RW | PG_V;
1392 }
1393
1394 /*
1395 * if basemem != 640, map pages r/w into vm86 page table so
1396 * that the bios can scribble on it.
1397 */
b5b32410 1398 pte = vm86paddr;
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MD
1399 for (i = basemem / 4; i < 160; i++)
1400 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1401
1402int15e820:
1403 /*
1404 * map page 1 R/W into the kernel page table so we can use it
1405 * as a buffer. The kernel will unmap this page later.
1406 */
b5b32410 1407 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
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MD
1408 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1409
1410 /*
1411 * get memory map with INT 15:E820
1412 */
1413#define SMAPSIZ sizeof(*smap)
1414#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1415
1416 vmc.npages = 0;
1417 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1418 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1419
1420 physmap_idx = 0;
1421 vmf.vmf_ebx = 0;
1422 do {
1423 vmf.vmf_eax = 0xE820;
1424 vmf.vmf_edx = SMAP_SIG;
1425 vmf.vmf_ecx = SMAPSIZ;
1426 i = vm86_datacall(0x15, &vmf, &vmc);
1427 if (i || vmf.vmf_eax != SMAP_SIG)
1428 break;
1429 if (boothowto & RB_VERBOSE)
1430 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1431 smap->type,
1432 *(u_int32_t *)((char *)&smap->base + 4),
1433 (u_int32_t)smap->base,
1434 *(u_int32_t *)((char *)&smap->length + 4),
1435 (u_int32_t)smap->length);
1436
1437 if (smap->type != 0x01)
1438 goto next_run;
1439
1440 if (smap->length == 0)
1441 goto next_run;
1442
1443 if (smap->base >= 0xffffffff) {
1444 printf("%uK of memory above 4GB ignored\n",
1445 (u_int)(smap->length / 1024));
1446 goto next_run;
1447 }
1448
1449 for (i = 0; i <= physmap_idx; i += 2) {
1450 if (smap->base < physmap[i + 1]) {
1451 if (boothowto & RB_VERBOSE)
1452 printf(
1453 "Overlapping or non-montonic memory region, ignoring second region\n");
1454 goto next_run;
1455 }
1456 }
1457
1458 if (smap->base == physmap[physmap_idx + 1]) {
1459 physmap[physmap_idx + 1] += smap->length;
1460 goto next_run;
1461 }
1462
1463 physmap_idx += 2;
1464 if (physmap_idx == PHYSMAP_SIZE) {
1465 printf(
1466 "Too many segments in the physical address map, giving up\n");
1467 break;
1468 }
1469 physmap[physmap_idx] = smap->base;
1470 physmap[physmap_idx + 1] = smap->base + smap->length;
1471next_run:
6b08710e 1472 ; /* fix GCC3.x warning */
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MD
1473 } while (vmf.vmf_ebx != 0);
1474
1475 /*
1476 * Perform "base memory" related probes & setup based on SMAP
1477 */
1478 if (basemem == 0) {
1479 for (i = 0; i <= physmap_idx; i += 2) {
1480 if (physmap[i] == 0x00000000) {
1481 basemem = physmap[i + 1] / 1024;
1482 break;
1483 }
1484 }
1485
1486 if (basemem == 0) {
1487 basemem = 640;
1488 }
1489
1490 if (basemem > 640) {
1491 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1492 basemem);
1493 basemem = 640;
1494 }
1495
1496 for (pa = trunc_page(basemem * 1024);
1497 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1498 pte = vtopte(pa + KERNBASE);
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MD
1499 *pte = pa | PG_RW | PG_V;
1500 }
1501
b5b32410 1502 pte = vm86paddr;
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MD
1503 for (i = basemem / 4; i < 160; i++)
1504 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1505 }
1506
1507 if (physmap[1] != 0)
1508 goto physmap_done;
1509
1510 /*
1511 * If we failed above, try memory map with INT 15:E801
1512 */
1513 vmf.vmf_ax = 0xE801;
1514 if (vm86_intcall(0x15, &vmf) == 0) {
1515 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1516 } else {
1517#if 0
1518 vmf.vmf_ah = 0x88;
1519 vm86_intcall(0x15, &vmf);
1520 extmem = vmf.vmf_ax;
1521#else
1522 /*
1523 * Prefer the RTC value for extended memory.
1524 */
1525 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1526#endif
1527 }
1528
1529 /*
1530 * Special hack for chipsets that still remap the 384k hole when
1531 * there's 16MB of memory - this really confuses people that
1532 * are trying to use bus mastering ISA controllers with the
1533 * "16MB limit"; they only have 16MB, but the remapping puts
1534 * them beyond the limit.
1535 *
1536 * If extended memory is between 15-16MB (16-17MB phys address range),
1537 * chop it to 15MB.
1538 */
1539 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1540 extmem = 15 * 1024;
1541
1542 physmap[0] = 0;
1543 physmap[1] = basemem * 1024;
1544 physmap_idx = 2;
1545 physmap[physmap_idx] = 0x100000;
1546 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1547
1548physmap_done:
1549 /*
1550 * Now, physmap contains a map of physical memory.
1551 */
1552
1553#ifdef SMP
17a9f566 1554 /* make hole for AP bootstrap code YYY */
984263bc
MD
1555 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1556
1557 /* look for the MP hardware - needed for apic addresses */
1558 mp_probe();
1559#endif
1560
1561 /*
1562 * Maxmem isn't the "maximum memory", it's one larger than the
1563 * highest page of the physical address space. It should be
1564 * called something like "Maxphyspage". We may adjust this
1565 * based on ``hw.physmem'' and the results of the memory test.
1566 */
1567 Maxmem = atop(physmap[physmap_idx + 1]);
1568
1569#ifdef MAXMEM
1570 Maxmem = MAXMEM / 4;
1571#endif
1572
1573 /*
eb7d35b8 1574 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1575 * for the appropriate modifiers. This overrides MAXMEM.
1576 */
1577 if ((cp = getenv("hw.physmem")) != NULL) {
1578 u_int64_t AllowMem, sanity;
1579 char *ep;
1580
1581 sanity = AllowMem = strtouq(cp, &ep, 0);
1582 if ((ep != cp) && (*ep != 0)) {
1583 switch(*ep) {
1584 case 'g':
1585 case 'G':
1586 AllowMem <<= 10;
1587 case 'm':
1588 case 'M':
1589 AllowMem <<= 10;
1590 case 'k':
1591 case 'K':
1592 AllowMem <<= 10;
1593 break;
1594 default:
1595 AllowMem = sanity = 0;
1596 }
1597 if (AllowMem < sanity)
1598 AllowMem = 0;
1599 }
1600 if (AllowMem == 0)
1601 printf("Ignoring invalid memory size of '%s'\n", cp);
1602 else
1603 Maxmem = atop(AllowMem);
1604 }
1605
1606 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1607 (boothowto & RB_VERBOSE))
6ef943a3 1608 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1609
1610 /*
1611 * If Maxmem has been increased beyond what the system has detected,
1612 * extend the last memory segment to the new limit.
1613 */
1614 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1615 physmap[physmap_idx + 1] = ptoa(Maxmem);
1616
1617 /* call pmap initialization to make new kernel address space */
1618 pmap_bootstrap(first, 0);
1619
1620 /*
1621 * Size up each available chunk of physical memory.
1622 */
1623 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1624 pa_indx = 0;
1625 phys_avail[pa_indx++] = physmap[0];
1626 phys_avail[pa_indx] = physmap[0];
b5b32410 1627 pte = CMAP1;
984263bc
MD
1628
1629 /*
1630 * physmap is in bytes, so when converting to page boundaries,
1631 * round up the start address and round down the end address.
1632 */
1633 for (i = 0; i <= physmap_idx; i += 2) {
1634 vm_offset_t end;
1635
1636 end = ptoa(Maxmem);
1637 if (physmap[i + 1] < end)
1638 end = trunc_page(physmap[i + 1]);
1639 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1640 int tmp, page_bad;
1641#if 0
1642 int *ptr = 0;
1643#else
1644 int *ptr = (int *)CADDR1;
1645#endif
1646
1647 /*
1648 * block out kernel memory as not available.
1649 */
1650 if (pa >= 0x100000 && pa < first)
1651 continue;
1652
1653 page_bad = FALSE;
1654
1655 /*
1656 * map page into kernel: valid, read/write,non-cacheable
1657 */
1658 *pte = pa | PG_V | PG_RW | PG_N;
1659 invltlb();
1660
1661 tmp = *(int *)ptr;
1662 /*
1663 * Test for alternating 1's and 0's
1664 */
1665 *(volatile int *)ptr = 0xaaaaaaaa;
1666 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1667 page_bad = TRUE;
1668 }
1669 /*
1670 * Test for alternating 0's and 1's
1671 */
1672 *(volatile int *)ptr = 0x55555555;
1673 if (*(volatile int *)ptr != 0x55555555) {
1674 page_bad = TRUE;
1675 }
1676 /*
1677 * Test for all 1's
1678 */
1679 *(volatile int *)ptr = 0xffffffff;
1680 if (*(volatile int *)ptr != 0xffffffff) {
1681 page_bad = TRUE;
1682 }
1683 /*
1684 * Test for all 0's
1685 */
1686 *(volatile int *)ptr = 0x0;
1687 if (*(volatile int *)ptr != 0x0) {
1688 page_bad = TRUE;
1689 }
1690 /*
1691 * Restore original value.
1692 */
1693 *(int *)ptr = tmp;
1694
1695 /*
1696 * Adjust array of valid/good pages.
1697 */
1698 if (page_bad == TRUE) {
1699 continue;
1700 }
1701 /*
1702 * If this good page is a continuation of the
1703 * previous set of good pages, then just increase
1704 * the end pointer. Otherwise start a new chunk.
1705 * Note that "end" points one higher than end,
1706 * making the range >= start and < end.
1707 * If we're also doing a speculative memory
1708 * test and we at or past the end, bump up Maxmem
1709 * so that we keep going. The first bad page
1710 * will terminate the loop.
1711 */
1712 if (phys_avail[pa_indx] == pa) {
1713 phys_avail[pa_indx] += PAGE_SIZE;
1714 } else {
1715 pa_indx++;
1716 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1717 printf("Too many holes in the physical address space, giving up\n");
1718 pa_indx--;
1719 break;
1720 }
1721 phys_avail[pa_indx++] = pa; /* start */
1722 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1723 }
1724 physmem++;
1725 }
1726 }
1727 *pte = 0;
1728 invltlb();
1729
1730 /*
1731 * XXX
1732 * The last chunk must contain at least one page plus the message
1733 * buffer to avoid complicating other code (message buffer address
1734 * calculation, etc.).
1735 */
1736 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1737 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1738 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1739 phys_avail[pa_indx--] = 0;
1740 phys_avail[pa_indx--] = 0;
1741 }
1742
1743 Maxmem = atop(phys_avail[pa_indx]);
1744
1745 /* Trim off space for the message buffer. */
1746 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1747
1748 avail_end = phys_avail[pa_indx];
1749}
1750
f7bc9806
MD
1751/*
1752 * IDT VECTORS:
1753 * 0 Divide by zero
1754 * 1 Debug
1755 * 2 NMI
1756 * 3 BreakPoint
1757 * 4 OverFlow
1758 * 5 Bound-Range
1759 * 6 Invalid OpCode
1760 * 7 Device Not Available (x87)
1761 * 8 Double-Fault
1762 * 9 Coprocessor Segment overrun (unsupported, reserved)
1763 * 10 Invalid-TSS
1764 * 11 Segment not present
1765 * 12 Stack
1766 * 13 General Protection
1767 * 14 Page Fault
1768 * 15 Reserved
1769 * 16 x87 FP Exception pending
1770 * 17 Alignment Check
1771 * 18 Machine Check
1772 * 19 SIMD floating point
1773 * 20-31 reserved
1774 * 32-255 INTn/external sources
1775 */
984263bc 1776void
17a9f566 1777init386(int first)
984263bc
MD
1778{
1779 struct gate_descriptor *gdp;
1780 int gsel_tss, metadata_missing, off, x;
85100692 1781 struct mdglobaldata *gd;
984263bc
MD
1782
1783 /*
1784 * Prevent lowering of the ipl if we call tsleep() early.
1785 */
85100692 1786 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1787 bzero(gd, sizeof(*gd));
984263bc 1788
85100692 1789 gd->mi.gd_curthread = &thread0;
984263bc
MD
1790
1791 atdevbase = ISA_HOLE_START + KERNBASE;
1792
1793 metadata_missing = 0;
1794 if (bootinfo.bi_modulep) {
1795 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1796 preload_bootstrap_relocate(KERNBASE);
1797 } else {
1798 metadata_missing = 1;
1799 }
1800 if (bootinfo.bi_envp)
1801 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1802
4e8e646b
MD
1803 /* start with one cpu */
1804 ncpus = 1;
984263bc
MD
1805 /* Init basic tunables, hz etc */
1806 init_param1();
1807
1808 /*
1809 * make gdt memory segments, the code segment goes up to end of the
1810 * page with etext in it, the data segment goes to the end of
1811 * the address space
1812 */
1813 /*
1814 * XXX text protection is temporarily (?) disabled. The limit was
1815 * i386_btop(round_page(etext)) - 1.
1816 */
1817 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1818 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1819
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MD
1820 gdt_segs[GPRIV_SEL].ssd_limit =
1821 atop(sizeof(struct privatespace) - 1);
8ad65e08 1822 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1823 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1824 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1825
85100692 1826 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1827
84b592ba
MD
1828 /*
1829 * Note: on both UP and SMP curthread must be set non-NULL
1830 * early in the boot sequence because the system assumes
1831 * that 'curthread' is never NULL.
1832 */
984263bc
MD
1833
1834 for (x = 0; x < NGDT; x++) {
1835#ifdef BDE_DEBUGGER
1836 /* avoid overwriting db entries with APM ones */
1837 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1838 continue;
1839#endif
1840 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1841 }
1842
1843 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1844 r_gdt.rd_base = (int) gdt;
1845 lgdt(&r_gdt);
1846
73e4f7b9
MD
1847 mi_gdinit(&gd->mi, 0);
1848 cpu_gdinit(gd, 0);
1849 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1850 lwkt_set_comm(&thread0, "thread0");
1851 proc0.p_addr = (void *)thread0.td_kstack;
1852 proc0.p_thread = &thread0;
a2a5ad0d 1853 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
98a7f915 1854 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1855 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1856 thread0.td_proc = &proc0;
1857 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1858 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1859
984263bc
MD
1860 /* make ldt memory segments */
1861 /*
1862 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1863 * should be spelled ...MAX_USER...
1864 */
1865 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1866 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1867 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1868 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1869
1870 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1871 lldt(_default_ldt);
17a9f566 1872 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1873 /* spinlocks and the BGL */
1874 init_locks();
984263bc
MD
1875
1876 /* exceptions */
f7bc9806
MD
1877 for (x = 0; x < NIDT; x++) {
1878#ifdef DEBUG_INTERRUPTS
1879 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1880#else
1881 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1882#endif
1883 }
984263bc
MD
1884 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1885 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1886 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1887 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1888 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1889 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1890 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1891 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1892 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1893 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1894 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1895 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1896 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1897 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1898 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1899 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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MD
1900 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1901 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1902 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1903 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904 setidt(0x80, &IDTVEC(int0x80_syscall),
1905 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1906 setidt(0x81, &IDTVEC(int0x81_syscall),
1907 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1908
1909 r_idt.rd_limit = sizeof(idt0) - 1;
1910 r_idt.rd_base = (int) idt;
1911 lidt(&r_idt);
1912
1913 /*
1914 * Initialize the console before we print anything out.
1915 */
1916 cninit();
1917
1918 if (metadata_missing)
1919 printf("WARNING: loader(8) metadata is missing!\n");
1920
984263bc
MD
1921#if NISA >0
1922 isa_defaultirq();
1923#endif
1924 rand_initialize();
1925
1926#ifdef DDB
1927 kdb_init();
1928 if (boothowto & RB_KDB)
1929 Debugger("Boot flags requested debugger");
1930#endif
1931
1932 finishidentcpu(); /* Final stage of CPU initialization */
1933 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1934 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1935 initializecpu(); /* Initialize CPU registers */
1936
b7c628e4
MD
1937 /*
1938 * make an initial tss so cpu can get interrupt stack on syscall!
1939 * The 16 bytes is to save room for a VM86 context.
1940 */
17a9f566
MD
1941 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1942 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1943 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1944 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1945 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1946 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1947 ltr(gsel_tss);
1948
1949 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1950 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1951 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1952 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1953 dblfault_tss.tss_cr3 = (int)IdlePTD;
1954 dblfault_tss.tss_eip = (int) dblfault_handler;
1955 dblfault_tss.tss_eflags = PSL_KERNEL;
1956 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1957 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1958 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1959 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1960 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1961
1962 vm86_initialize();
1963 getmemsize(first);
1964 init_param2(physmem);
1965
1966 /* now running on new page tables, configured,and u/iom is accessible */
1967
1968 /* Map the message buffer. */
1969 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1970 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1971
1972 msgbufinit(msgbufp, MSGBUF_SIZE);
1973
1974 /* make a call gate to reenter kernel with */
1975 gdp = &ldt[LSYS5CALLS_SEL].gd;
1976
1977 x = (int) &IDTVEC(syscall);
1978 gdp->gd_looffset = x++;
1979 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1980 gdp->gd_stkcpy = 1;
1981 gdp->gd_type = SDT_SYS386CGT;
1982 gdp->gd_dpl = SEL_UPL;
1983 gdp->gd_p = 1;
1984 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1985
1986 /* XXX does this work? */
1987 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1988 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1989
1990 /* transfer to user mode */
1991
1992 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1993 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1994
1995 /* setup proc 0's pcb */
b7c628e4
MD
1996 thread0.td_pcb->pcb_flags = 0;
1997 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 1998 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
1999 proc0.p_md.md_regs = &proc0_tf;
2000}
2001
8ad65e08 2002/*
17a9f566
MD
2003 * Initialize machine-dependant portions of the global data structure.
2004 * Note that the global data area and cpu0's idlestack in the private
2005 * data space were allocated in locore.
ef0fdad1
MD
2006 *
2007 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2008 *
2009 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2010 */
2011void
85100692 2012cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2013{
2014 char *sp;
8ad65e08 2015
7d0bac62 2016 if (cpu)
a2a5ad0d 2017 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2018
85100692 2019 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2020 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2021 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2022 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2023 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2024 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2025}
2026
12e4aaff
MD
2027struct globaldata *
2028globaldata_find(int cpu)
2029{
2030 KKASSERT(cpu >= 0 && cpu < ncpus);
2031 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2032}
2033
984263bc
MD
2034#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2035static void f00f_hack(void *unused);
2036SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2037
2038static void
17a9f566
MD
2039f00f_hack(void *unused)
2040{
984263bc 2041 struct gate_descriptor *new_idt;
984263bc
MD
2042 vm_offset_t tmp;
2043
2044 if (!has_f00f_bug)
2045 return;
2046
2047 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2048
2049 r_idt.rd_limit = sizeof(idt0) - 1;
2050
2051 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2052 if (tmp == 0)
2053 panic("kmem_alloc returned 0");
2054 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2055 panic("kmem_alloc returned non-page-aligned memory");
2056 /* Put the first seven entries in the lower page */
2057 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2058 bcopy(idt, new_idt, sizeof(idt0));
2059 r_idt.rd_base = (int)new_idt;
2060 lidt(&r_idt);
2061 idt = new_idt;
2062 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2063 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2064 panic("vm_map_protect failed");
2065 return;
2066}
2067#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2068
2069int
2070ptrace_set_pc(p, addr)
2071 struct proc *p;
2072 unsigned long addr;
2073{
2074 p->p_md.md_regs->tf_eip = addr;
2075 return (0);
2076}
2077
2078int
2079ptrace_single_step(p)
2080 struct proc *p;
2081{
2082 p->p_md.md_regs->tf_eflags |= PSL_T;
2083 return (0);
2084}
2085
2086int ptrace_read_u_check(p, addr, len)
2087 struct proc *p;
2088 vm_offset_t addr;
2089 size_t len;
2090{
2091 vm_offset_t gap;
2092
2093 if ((vm_offset_t) (addr + len) < addr)
2094 return EPERM;
2095 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2096 return 0;
2097
2098 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2099
2100 if ((vm_offset_t) addr < gap)
2101 return EPERM;
2102 if ((vm_offset_t) (addr + len) <=
2103 (vm_offset_t) (gap + sizeof(struct trapframe)))
2104 return 0;
2105 return EPERM;
2106}
2107
2108int ptrace_write_u(p, off, data)
2109 struct proc *p;
2110 vm_offset_t off;
2111 long data;
2112{
2113 struct trapframe frame_copy;
2114 vm_offset_t min;
2115 struct trapframe *tp;
2116
2117 /*
2118 * Privileged kernel state is scattered all over the user area.
2119 * Only allow write access to parts of regs and to fpregs.
2120 */
2121 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2122 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2123 tp = p->p_md.md_regs;
2124 frame_copy = *tp;
2125 *(int *)((char *)&frame_copy + (off - min)) = data;
2126 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2127 !CS_SECURE(frame_copy.tf_cs))
2128 return (EINVAL);
2129 *(int*)((char *)p->p_addr + off) = data;
2130 return (0);
2131 }
b7c628e4
MD
2132
2133 /*
2134 * The PCB is at the end of the user area YYY
2135 */
2136 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2137 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2138 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2139 *(int*)((char *)p->p_addr + off) = data;
2140 return (0);
2141 }
2142 return (EFAULT);
2143}
2144
2145int
2146fill_regs(p, regs)
2147 struct proc *p;
2148 struct reg *regs;
2149{
2150 struct pcb *pcb;
2151 struct trapframe *tp;
2152
2153 tp = p->p_md.md_regs;
2154 regs->r_fs = tp->tf_fs;
2155 regs->r_es = tp->tf_es;
2156 regs->r_ds = tp->tf_ds;
2157 regs->r_edi = tp->tf_edi;
2158 regs->r_esi = tp->tf_esi;
2159 regs->r_ebp = tp->tf_ebp;
2160 regs->r_ebx = tp->tf_ebx;
2161 regs->r_edx = tp->tf_edx;
2162 regs->r_ecx = tp->tf_ecx;
2163 regs->r_eax = tp->tf_eax;
2164 regs->r_eip = tp->tf_eip;
2165 regs->r_cs = tp->tf_cs;
2166 regs->r_eflags = tp->tf_eflags;
2167 regs->r_esp = tp->tf_esp;
2168 regs->r_ss = tp->tf_ss;
b7c628e4 2169 pcb = p->p_thread->td_pcb;
984263bc
MD
2170 regs->r_gs = pcb->pcb_gs;
2171 return (0);
2172}
2173
2174int
2175set_regs(p, regs)
2176 struct proc *p;
2177 struct reg *regs;
2178{
2179 struct pcb *pcb;
2180 struct trapframe *tp;
2181
2182 tp = p->p_md.md_regs;
2183 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2184 !CS_SECURE(regs->r_cs))
2185 return (EINVAL);
2186 tp->tf_fs = regs->r_fs;
2187 tp->tf_es = regs->r_es;
2188 tp->tf_ds = regs->r_ds;
2189 tp->tf_edi = regs->r_edi;
2190 tp->tf_esi = regs->r_esi;
2191 tp->tf_ebp = regs->r_ebp;
2192 tp->tf_ebx = regs->r_ebx;
2193 tp->tf_edx = regs->r_edx;
2194 tp->tf_ecx = regs->r_ecx;
2195 tp->tf_eax = regs->r_eax;
2196 tp->tf_eip = regs->r_eip;
2197 tp->tf_cs = regs->r_cs;
2198 tp->tf_eflags = regs->r_eflags;
2199 tp->tf_esp = regs->r_esp;
2200 tp->tf_ss = regs->r_ss;
b7c628e4 2201 pcb = p->p_thread->td_pcb;
984263bc
MD
2202 pcb->pcb_gs = regs->r_gs;
2203 return (0);
2204}
2205
642a6e88 2206#ifndef CPU_DISABLE_SSE
984263bc
MD
2207static void
2208fill_fpregs_xmm(sv_xmm, sv_87)
2209 struct savexmm *sv_xmm;
2210 struct save87 *sv_87;
2211{
c9faf524
RG
2212 struct env87 *penv_87 = &sv_87->sv_env;
2213 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2214 int i;
2215
2216 /* FPU control/status */
2217 penv_87->en_cw = penv_xmm->en_cw;
2218 penv_87->en_sw = penv_xmm->en_sw;
2219 penv_87->en_tw = penv_xmm->en_tw;
2220 penv_87->en_fip = penv_xmm->en_fip;
2221 penv_87->en_fcs = penv_xmm->en_fcs;
2222 penv_87->en_opcode = penv_xmm->en_opcode;
2223 penv_87->en_foo = penv_xmm->en_foo;
2224 penv_87->en_fos = penv_xmm->en_fos;
2225
2226 /* FPU registers */
2227 for (i = 0; i < 8; ++i)
2228 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2229
2230 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2231}
2232
2233static void
2234set_fpregs_xmm(sv_87, sv_xmm)
2235 struct save87 *sv_87;
2236 struct savexmm *sv_xmm;
2237{
c9faf524
RG
2238 struct env87 *penv_87 = &sv_87->sv_env;
2239 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2240 int i;
2241
2242 /* FPU control/status */
2243 penv_xmm->en_cw = penv_87->en_cw;
2244 penv_xmm->en_sw = penv_87->en_sw;
2245 penv_xmm->en_tw = penv_87->en_tw;
2246 penv_xmm->en_fip = penv_87->en_fip;
2247 penv_xmm->en_fcs = penv_87->en_fcs;
2248 penv_xmm->en_opcode = penv_87->en_opcode;
2249 penv_xmm->en_foo = penv_87->en_foo;
2250 penv_xmm->en_fos = penv_87->en_fos;
2251
2252 /* FPU registers */
2253 for (i = 0; i < 8; ++i)
2254 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2255
2256 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2257}
642a6e88 2258#endif /* CPU_DISABLE_SSE */
984263bc
MD
2259
2260int
2261fill_fpregs(p, fpregs)
2262 struct proc *p;
2263 struct fpreg *fpregs;
2264{
642a6e88 2265#ifndef CPU_DISABLE_SSE
984263bc 2266 if (cpu_fxsr) {
b7c628e4 2267 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2268 (struct save87 *)fpregs);
2269 return (0);
2270 }
642a6e88 2271#endif /* CPU_DISABLE_SSE */
b7c628e4 2272 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2273 return (0);
2274}
2275
2276int
2277set_fpregs(p, fpregs)
2278 struct proc *p;
2279 struct fpreg *fpregs;
2280{
642a6e88 2281#ifndef CPU_DISABLE_SSE
984263bc
MD
2282 if (cpu_fxsr) {
2283 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2284 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2285 return (0);
2286 }
642a6e88 2287#endif /* CPU_DISABLE_SSE */
b7c628e4 2288 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2289 return (0);
2290}
2291
2292int
2293fill_dbregs(p, dbregs)
2294 struct proc *p;
2295 struct dbreg *dbregs;
2296{
2297 struct pcb *pcb;
2298
2299 if (p == NULL) {
2300 dbregs->dr0 = rdr0();
2301 dbregs->dr1 = rdr1();
2302 dbregs->dr2 = rdr2();
2303 dbregs->dr3 = rdr3();
2304 dbregs->dr4 = rdr4();
2305 dbregs->dr5 = rdr5();
2306 dbregs->dr6 = rdr6();
2307 dbregs->dr7 = rdr7();
2308 }
2309 else {
b7c628e4 2310 pcb = p->p_thread->td_pcb;
984263bc
MD
2311 dbregs->dr0 = pcb->pcb_dr0;
2312 dbregs->dr1 = pcb->pcb_dr1;
2313 dbregs->dr2 = pcb->pcb_dr2;
2314 dbregs->dr3 = pcb->pcb_dr3;
2315 dbregs->dr4 = 0;
2316 dbregs->dr5 = 0;
2317 dbregs->dr6 = pcb->pcb_dr6;
2318 dbregs->dr7 = pcb->pcb_dr7;
2319 }
2320 return (0);
2321}
2322
2323int
2324set_dbregs(p, dbregs)
2325 struct proc *p;
2326 struct dbreg *dbregs;
2327{
2328 struct pcb *pcb;
2329 int i;
2330 u_int32_t mask1, mask2;
2331
2332 if (p == NULL) {
2333 load_dr0(dbregs->dr0);
2334 load_dr1(dbregs->dr1);
2335 load_dr2(dbregs->dr2);
2336 load_dr3(dbregs->dr3);
2337 load_dr4(dbregs->dr4);
2338 load_dr5(dbregs->dr5);
2339 load_dr6(dbregs->dr6);
2340 load_dr7(dbregs->dr7);
2341 }
2342 else {
2343 /*
2344 * Don't let an illegal value for dr7 get set. Specifically,
2345 * check for undefined settings. Setting these bit patterns
2346 * result in undefined behaviour and can lead to an unexpected
2347 * TRCTRAP.
2348 */
2349 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2350 i++, mask1 <<= 2, mask2 <<= 2)
2351 if ((dbregs->dr7 & mask1) == mask2)
2352 return (EINVAL);
2353
b7c628e4 2354 pcb = p->p_thread->td_pcb;
984263bc
MD
2355
2356 /*
2357 * Don't let a process set a breakpoint that is not within the
2358 * process's address space. If a process could do this, it
2359 * could halt the system by setting a breakpoint in the kernel
2360 * (if ddb was enabled). Thus, we need to check to make sure
2361 * that no breakpoints are being enabled for addresses outside
2362 * process's address space, unless, perhaps, we were called by
2363 * uid 0.
2364 *
2365 * XXX - what about when the watched area of the user's
2366 * address space is written into from within the kernel
2367 * ... wouldn't that still cause a breakpoint to be generated
2368 * from within kernel mode?
2369 */
2370
dadab5e9 2371 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2372 if (dbregs->dr7 & 0x3) {
2373 /* dr0 is enabled */
2374 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2375 return (EINVAL);
2376 }
2377
2378 if (dbregs->dr7 & (0x3<<2)) {
2379 /* dr1 is enabled */
2380 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2381 return (EINVAL);
2382 }
2383
2384 if (dbregs->dr7 & (0x3<<4)) {
2385 /* dr2 is enabled */
2386 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2387 return (EINVAL);
2388 }
2389
2390 if (dbregs->dr7 & (0x3<<6)) {
2391 /* dr3 is enabled */
2392 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2393 return (EINVAL);
2394 }
2395 }
2396
2397 pcb->pcb_dr0 = dbregs->dr0;
2398 pcb->pcb_dr1 = dbregs->dr1;
2399 pcb->pcb_dr2 = dbregs->dr2;
2400 pcb->pcb_dr3 = dbregs->dr3;
2401 pcb->pcb_dr6 = dbregs->dr6;
2402 pcb->pcb_dr7 = dbregs->dr7;
2403
2404 pcb->pcb_flags |= PCB_DBREGS;
2405 }
2406
2407 return (0);
2408}
2409
2410/*
2411 * Return > 0 if a hardware breakpoint has been hit, and the
2412 * breakpoint was in user space. Return 0, otherwise.
2413 */
2414int
2415user_dbreg_trap(void)
2416{
2417 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2418 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2419 int nbp; /* number of breakpoints that triggered */
2420 caddr_t addr[4]; /* breakpoint addresses */
2421 int i;
2422
2423 dr7 = rdr7();
2424 if ((dr7 & 0x000000ff) == 0) {
2425 /*
2426 * all GE and LE bits in the dr7 register are zero,
2427 * thus the trap couldn't have been caused by the
2428 * hardware debug registers
2429 */
2430 return 0;
2431 }
2432
2433 nbp = 0;
2434 dr6 = rdr6();
2435 bp = dr6 & 0x0000000f;
2436
2437 if (!bp) {
2438 /*
2439 * None of the breakpoint bits are set meaning this
2440 * trap was not caused by any of the debug registers
2441 */
2442 return 0;
2443 }
2444
2445 /*
2446 * at least one of the breakpoints were hit, check to see
2447 * which ones and if any of them are user space addresses
2448 */
2449
2450 if (bp & 0x01) {
2451 addr[nbp++] = (caddr_t)rdr0();
2452 }
2453 if (bp & 0x02) {
2454 addr[nbp++] = (caddr_t)rdr1();
2455 }
2456 if (bp & 0x04) {
2457 addr[nbp++] = (caddr_t)rdr2();
2458 }
2459 if (bp & 0x08) {
2460 addr[nbp++] = (caddr_t)rdr3();
2461 }
2462
2463 for (i=0; i<nbp; i++) {
2464 if (addr[i] <
2465 (caddr_t)VM_MAXUSER_ADDRESS) {
2466 /*
2467 * addr[i] is in user space
2468 */
2469 return nbp;
2470 }
2471 }
2472
2473 /*
2474 * None of the breakpoints are in user space.
2475 */
2476 return 0;
2477}
2478
2479
2480#ifndef DDB
2481void
2482Debugger(const char *msg)
2483{
2484 printf("Debugger(\"%s\") called.\n", msg);
2485}
2486#endif /* no DDB */
2487
2488#include <sys/disklabel.h>
2489
2490/*
2491 * Determine the size of the transfer, and make sure it is
2492 * within the boundaries of the partition. Adjust transfer
2493 * if needed, and signal errors or early completion.
2494 */
2495int
2496bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2497{
2498 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2499 int labelsect = lp->d_partitions[0].p_offset;
2500 int maxsz = p->p_size,
2501 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2502
2503 /* overwriting disk label ? */
2504 /* XXX should also protect bootstrap in first 8K */
2505 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2506#if LABELSECTOR != 0
2507 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2508#endif
2509 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2510 bp->b_error = EROFS;
2511 goto bad;
2512 }
2513
2514#if defined(DOSBBSECTOR) && defined(notyet)
2515 /* overwriting master boot record? */
2516 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2517 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2518 bp->b_error = EROFS;
2519 goto bad;
2520 }
2521#endif
2522
2523 /* beyond partition? */
2524 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2525 /* if exactly at end of disk, return an EOF */
2526 if (bp->b_blkno == maxsz) {
2527 bp->b_resid = bp->b_bcount;
2528 return(0);
2529 }
2530 /* or truncate if part of it fits */
2531 sz = maxsz - bp->b_blkno;
2532 if (sz <= 0) {
2533 bp->b_error = EINVAL;
2534 goto bad;
2535 }
2536 bp->b_bcount = sz << DEV_BSHIFT;
2537 }
2538
2539 bp->b_pblkno = bp->b_blkno + p->p_offset;
2540 return(1);
2541
2542bad:
2543 bp->b_flags |= B_ERROR;
2544 return(-1);
2545}
2546
2547#ifdef DDB
2548
2549/*
2550 * Provide inb() and outb() as functions. They are normally only
2551 * available as macros calling inlined functions, thus cannot be
2552 * called inside DDB.
2553 *
2554 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2555 */
2556
2557#undef inb
2558#undef outb
2559
2560/* silence compiler warnings */
2561u_char inb(u_int);
2562void outb(u_int, u_char);
2563
2564u_char
2565inb(u_int port)
2566{
2567 u_char data;
2568 /*
2569 * We use %%dx and not %1 here because i/o is done at %dx and not at
2570 * %edx, while gcc generates inferior code (movw instead of movl)
2571 * if we tell it to load (u_short) port.
2572 */
2573 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2574 return (data);
2575}
2576
2577void
2578outb(u_int port, u_char data)
2579{
2580 u_char al;
2581 /*
2582 * Use an unnecessary assignment to help gcc's register allocator.
2583 * This make a large difference for gcc-1.40 and a tiny difference
2584 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2585 * best results. gcc-2.6.0 can't handle this.
2586 */
2587 al = data;
2588 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2589}
2590
2591#endif /* DDB */
8a8d5d85
MD
2592
2593
2594
2595#include "opt_cpu.h"
2596#include "opt_htt.h"
8a8d5d85
MD
2597
2598
2599/*
2600 * initialize all the SMP locks
2601 */
2602
2603/* critical region around IO APIC, apic_imen */
2604struct spinlock imen_spinlock;
2605
2606/* Make FAST_INTR() routines sequential */
2607struct spinlock fast_intr_spinlock;
2608
2609/* critical region for old style disable_intr/enable_intr */
2610struct spinlock mpintr_spinlock;
2611
2612/* critical region around INTR() routines */
2613struct spinlock intr_spinlock;
2614
2615/* lock region used by kernel profiling */
2616struct spinlock mcount_spinlock;
2617
2618/* locks com (tty) data/hardware accesses: a FASTINTR() */
2619struct spinlock com_spinlock;
2620
2621/* locks kernel printfs */
2622struct spinlock cons_spinlock;
2623
2624/* lock regions around the clock hardware */
2625struct spinlock clock_spinlock;
2626
2627/* lock around the MP rendezvous */
2628struct spinlock smp_rv_spinlock;
2629
2630static void
2631init_locks(void)
2632{
2633 /*
2634 * mp_lock = 0; BSP already owns the MP lock
2635 */
2636 /*
2637 * Get the initial mp_lock with a count of 1 for the BSP.
2638 * This uses a LOGICAL cpu ID, ie BSP == 0.
2639 */
2640#ifdef SMP
2641 cpu_get_initial_mplock();
2642#endif
2643 spin_lock_init(&mcount_spinlock);
2644 spin_lock_init(&fast_intr_spinlock);
2645 spin_lock_init(&intr_spinlock);
2646 spin_lock_init(&mpintr_spinlock);
2647 spin_lock_init(&imen_spinlock);
2648 spin_lock_init(&smp_rv_spinlock);
2649 spin_lock_init(&com_spinlock);
2650 spin_lock_init(&clock_spinlock);
2651 spin_lock_init(&cons_spinlock);
2652}
2653