jme: Cache align RX/TX data structure
[dragonfly.git] / sys / dev / netif / jme / if_jmevar.h
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1/*-
2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
b249905b 28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
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29 */
30
31#ifndef _IF_JMEVAR_H
32#define _IF_JMEVAR_H
33
34#include <sys/queue.h>
35#include <sys/callout.h>
36#include <sys/taskqueue.h>
37
38/*
7405bec3 39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
83b03786 40 * descriptors should be multiple of JME_NDESC_ALIGN.
76fbb0b9 41 */
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42#define JME_TX_DESC_CNT_DEF 512
43#define JME_RX_DESC_CNT_DEF 512
69325526 44
83b03786 45#define JME_NDESC_ALIGN 16
69325526 46#define JME_NDESC_MAX 1024
83b03786 47
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48#define JME_NRXRING_1 1
49#define JME_NRXRING_2 2
50#define JME_NRXRING_4 4
51
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52#define JME_NRXRING_MIN JME_NRXRING_1
53#define JME_NRXRING_MAX JME_NRXRING_4
4447c752 54
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55#define JME_NSERIALIZE (JME_NRXRING_MAX + 2)
56
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57#define JME_NMSIX (JME_NRXRING_MAX + 1)
58
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59/*
60 * Tx/Rx descriptor queue base should be 16bytes aligned and
61 * should not cross 4G bytes boundary on the 64bits address
62 * mode.
63 */
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64#define JME_TX_RING_ALIGN __VM_CACHELINE_SIZE
65#define JME_RX_RING_ALIGN __VM_CACHELINE_SIZE
9d424cee 66#define JME_MAXSEGSIZE 4096
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67#define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
68#define JME_MAXTXSEGS 32
69#define JME_RX_BUF_ALIGN sizeof(uint64_t)
ff7f3632 70#define JME_SSB_ALIGN __VM_CACHELINE_SIZE
76fbb0b9 71
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72#if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
73#define JME_RING_BOUNDARY 0x100000000ULL
74#else
75#define JME_RING_BOUNDARY 0
76#endif
77
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78#define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
79#define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
80
81#define JME_MSI_MESSAGES 8
82#define JME_MSIX_MESSAGES 8
83
84/* Water mark to kick reclaiming Tx buffers. */
83b03786 85#define JME_TX_DESC_HIWAT(sc) \
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86 ((sc)->jme_cdata.jme_tx_desc_cnt - \
87 (((sc)->jme_cdata.jme_tx_desc_cnt * 3) / 10))
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88
89/*
90 * JMC250 can send 9K jumbo frame on Tx path and can receive
91 * 65535 bytes.
92 */
93#define JME_JUMBO_FRAMELEN 9216
94#define JME_JUMBO_MTU \
95 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
96 ETHER_HDR_LEN - ETHER_CRC_LEN)
97#define JME_MAX_MTU \
98 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
99 ETHER_HDR_LEN - ETHER_CRC_LEN)
100/*
101 * JMC250 can't handle Tx checksum offload/TSO if frame length
102 * is larger than its FIFO size(2K). It's also good idea to not
103 * use jumbo frame if hardware is running at half-duplex media.
104 * Because the jumbo frame may not fit into the Tx FIFO,
105 * collisions make hardware fetch frame from host memory with
106 * DMA again which in turn slows down Tx performance
107 * significantly.
108 */
109#define JME_TX_FIFO_SIZE 2000
110/*
111 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
112 * larger than 4K bytes in length, Rx FIFO threshold should be
113 * adjusted to minimize Rx FIFO overrun.
114 */
115#define JME_RX_FIFO_SIZE 4000
116
117#define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
6960d7d2 118#define JME_DESC_ADD(x, d, y) ((x) = ((x) + (d)) % (y))
76fbb0b9 119
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120struct jme_txdesc {
121 struct mbuf *tx_m;
122 bus_dmamap_t tx_dmamap;
123 int tx_ndesc;
124 struct jme_desc *tx_desc;
125};
126
127struct jme_rxdesc {
128 struct mbuf *rx_m;
fd2a6d2c 129 bus_addr_t rx_paddr;
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130 bus_dmamap_t rx_dmamap;
131 struct jme_desc *rx_desc;
132};
133
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134struct jme_softc;
135
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136/*
137 * RX ring/descs
138 */
139struct jme_rxdata {
31f0d5a2 140 struct lwkt_serialize jme_rx_serialize;
58880b0d 141 struct jme_softc *jme_sc;
7b040092 142
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143 uint32_t jme_rx_coal;
144 uint32_t jme_rx_comp;
145 uint32_t jme_rx_empty;
146 int jme_rx_idx;
7b040092 147
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148 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */
149 bus_dmamap_t jme_rx_sparemap;
150 struct jme_rxdesc *jme_rxdesc;
151
152 struct jme_desc *jme_rx_ring;
153 bus_addr_t jme_rx_ring_paddr;
154 bus_dma_tag_t jme_rx_ring_tag;
155 bus_dmamap_t jme_rx_ring_map;
156
157 int jme_rx_cons;
7b040092 158 int jme_rx_desc_cnt;
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159
160 int jme_rxlen;
161 struct mbuf *jme_rxhead;
162 struct mbuf *jme_rxtail;
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163
164 u_long jme_rx_pkt;
594bec47 165} __cachealign;
4447c752 166
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167struct jme_chain_data {
168 /*
169 * Top level tags
170 */
171 bus_dma_tag_t jme_ring_tag; /* parent ring tag */
172 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */
173
174 /*
175 * Shadow status block
176 */
177 struct jme_ssb *jme_ssb_block;
178 bus_addr_t jme_ssb_block_paddr;
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179 bus_dma_tag_t jme_ssb_tag;
180 bus_dmamap_t jme_ssb_map;
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181
182 /*
183 * TX ring/descs
184 */
31f0d5a2 185 struct lwkt_serialize jme_tx_serialize;
58880b0d 186 struct jme_softc *jme_sc;
560616bf 187 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */
83b03786 188 struct jme_txdesc *jme_txdesc;
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189
190 struct jme_desc *jme_tx_ring;
191 bus_addr_t jme_tx_ring_paddr;
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192 bus_dma_tag_t jme_tx_ring_tag;
193 bus_dmamap_t jme_tx_ring_map;
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194
195 int jme_tx_prod;
196 int jme_tx_cons;
197 int jme_tx_cnt;
b020bb10 198 int jme_tx_desc_cnt;
76fbb0b9 199
7b040092 200 int jme_rx_ring_cnt;
4447c752 201 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX];
594bec47 202} __cachealign;
76fbb0b9 203
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204struct jme_msix_data {
205 int jme_msix_rid;
206 int jme_msix_cpuid;
207 u_int jme_msix_vector;
208 uint32_t jme_msix_intrs;
209 struct resource *jme_msix_res;
210 void *jme_msix_handle;
211 struct lwkt_serialize *jme_msix_serialize;
212 char jme_msix_desc[64];
213
214 driver_intr_t *jme_msix_func;
215 void *jme_msix_arg;
216};
217
83b03786 218#define JME_TX_RING_SIZE(sc) \
b020bb10 219 (sizeof(struct jme_desc) * (sc)->jme_cdata.jme_tx_desc_cnt)
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220#define JME_RX_RING_SIZE(rdata) \
221 (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
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222#define JME_SSB_SIZE sizeof(struct jme_ssb)
223
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224/*
225 * Software state per device.
226 */
227struct jme_softc {
228 struct arpcom arpcom;
229 device_t jme_dev;
230
231 int jme_mem_rid;
232 struct resource *jme_mem_res;
233 bus_space_tag_t jme_mem_bt;
234 bus_space_handle_t jme_mem_bh;
235
3eba890a 236 int jme_irq_type;
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237 int jme_irq_rid;
238 struct resource *jme_irq_res;
239 void *jme_irq_handle;
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240 struct jme_msix_data jme_msix[JME_NMSIX];
241 int jme_msix_cnt;
242 uint32_t jme_msinum[JME_MSINUM_CNT];
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243
244 device_t jme_miibus;
245 int jme_phyaddr;
b249905b 246 bus_addr_t jme_lowaddr;
76fbb0b9 247
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248 uint32_t jme_clksrc;
249 uint32_t jme_clksrc_1000;
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250 uint32_t jme_tx_dma_size;
251 uint32_t jme_rx_dma_size;
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252
253 uint32_t jme_caps;
254#define JME_CAP_FPGA 0x0001
255#define JME_CAP_PCIE 0x0002
256#define JME_CAP_PMCAP 0x0004
257#define JME_CAP_FASTETH 0x0008
3a5f3f36 258#define JME_CAP_JUMBO 0x0010
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259
260 uint32_t jme_workaround;
261#define JME_WA_EXTFIFO 0x0001
3b3da110 262#define JME_WA_HDX 0x0002
ec7e787b 263
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264 boolean_t jme_has_link;
265 boolean_t jme_in_tick;
76fbb0b9 266
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267 struct lwkt_serialize jme_serialize;
268 struct lwkt_serialize *jme_serialize_arr[JME_NSERIALIZE];
269 int jme_serialize_cnt;
270
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271 struct callout jme_tick_ch;
272 struct jme_chain_data jme_cdata;
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273 int jme_if_flags;
274 uint32_t jme_txcsr;
275 uint32_t jme_rxcsr;
276
277 int jme_txd_spare;
278
279 struct sysctl_ctx_list jme_sysctl_ctx;
280 struct sysctl_oid *jme_sysctl_tree;
281
282 /*
283 * Sysctl variables
284 */
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285 int jme_tx_coal_to;
286 int jme_tx_coal_pkt;
287 int jme_rx_coal_to;
288 int jme_rx_coal_pkt;
760c056c 289 int jme_rss_debug;
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290};
291
292/* Register access macros. */
293#define CSR_WRITE_4(_sc, reg, val) \
294 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
295#define CSR_READ_4(_sc, reg) \
296 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
297
298#define JME_MAXERR 5
299
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300#define JME_RXCHAIN_RESET(rdata) \
301do { \
302 (rdata)->jme_rxhead = NULL; \
303 (rdata)->jme_rxtail = NULL; \
304 (rdata)->jme_rxlen = 0; \
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305} while (0)
306
307#define JME_TX_TIMEOUT 5
308#define JME_TIMEOUT 1000
309#define JME_PHY_TIMEOUT 1000
310#define JME_EEPROM_TIMEOUT 1000
311
312#define JME_TXD_RSVD 1
313
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314#define JME_ENABLE_HWRSS(sc) \
315 ((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)
316
76fbb0b9 317#endif