ixgbe: compilation fix for debug routines
[dragonfly.git] / sys / dev / netif / ixgbe / ixgbe_osdep.h
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1/******************************************************************************
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3 Copyright (c) 2001-2012, Intel Corporation
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32******************************************************************************/
33/*$FreeBSD: src/sys/dev/ixgbe/ixgbe_osdep.h,v 1.12 2012/01/30 23:03:21 jfv Exp $*/
34
35#ifndef _IXGBE_OS_H_
36#define _IXGBE_OS_H_
37
38#include <sys/types.h>
39#include <sys/param.h>
40#include <sys/endian.h>
41#include <sys/systm.h>
42#include <sys/mbuf.h>
43#include <sys/protosw.h>
44#include <sys/socket.h>
45#include <sys/malloc.h>
46#include <sys/kernel.h>
47#include <sys/bus.h>
48#include <sys/rman.h>
49#include <vm/vm.h>
50#include <vm/pmap.h>
51#include <machine/clock.h>
52#include <bus/pci/pcivar.h>
53#include <bus/pci/pcireg.h>
54
55#define ASSERT(x) if(!(x)) panic("IXGBE: x")
56
57/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
58#define usec_delay(x) DELAY(x)
59#define msec_delay(x) DELAY(1000*(x))
60
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61#define DBG 0
62#define MSGOUT(S, A, B) kprintf(S "\n", A, B)
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63#define DEBUGFUNC(F) DEBUGOUT(F);
64#if DBG
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65 #define DEBUGOUT(S) kprintf(S "\n")
66 #define DEBUGOUT1(S,A) kprintf(S "\n",A)
67 #define DEBUGOUT2(S,A,B) kprintf(S "\n",A,B)
68 #define DEBUGOUT3(S,A,B,C) kprintf(S "\n",A,B,C)
69 #define DEBUGOUT6(S,A,B,C,D,E,F) kprintf(S "\n",A,B,C,D,E,F)
70 #define DEBUGOUT7(S,A,B,C,D,E,F,G) kprintf(S "\n",A,B,C,D,E,F,G)
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71#else
72 #define DEBUGOUT(S)
73 #define DEBUGOUT1(S,A)
74 #define DEBUGOUT2(S,A,B)
75 #define DEBUGOUT3(S,A,B,C)
76 #define DEBUGOUT6(S,A,B,C,D,E,F)
77 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
78#endif
79
80#define FALSE 0
81#define false 0 /* shared code requires this */
82#define TRUE 1
83#define true 1
84#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
85#define PCI_COMMAND_REGISTER PCIR_COMMAND
86
87/* Bunch of defines for shared code bogosity */
88#define UNREFERENCED_PARAMETER(_p)
89#define UNREFERENCED_1PARAMETER(_p)
90#define UNREFERENCED_2PARAMETER(_p, _q)
91#define UNREFERENCED_3PARAMETER(_p, _q, _r)
92#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
93
94
95#define IXGBE_NTOHL(_i) ntohl(_i)
96#define IXGBE_NTOHS(_i) ntohs(_i)
97
98/* XXX these need to be revisited */
99#define IXGBE_CPU_TO_LE32 le32toh
100#define IXGBE_LE32_TO_CPUS le32dec
101
102typedef uint8_t u8;
103typedef int8_t s8;
104typedef uint16_t u16;
105typedef uint32_t u32;
106typedef int32_t s32;
107typedef uint64_t u64;
108#ifndef __bool_true_false_are_defined
109typedef boolean_t bool;
110#endif
111
112#define le16_to_cpu
113
9407f759 114#if defined(__i386__) || defined(__amd64__)
9407f759 115#define wmb() __asm volatile("sfence" ::: "memory")
9407f759 116#else
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117#define wmb()
118#endif
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119
120#if defined(__i386__) || defined(__amd64__)
121static __inline
122void prefetch(void *x)
123{
124 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
125}
126#else
127#define prefetch(x)
128#endif
129
130struct ixgbe_osdep
131{
132 bus_space_tag_t mem_bus_space_tag;
133 bus_space_handle_t mem_bus_space_handle;
134 struct device *dev;
135};
136
137/* These routines are needed by the shared code */
138struct ixgbe_hw;
139extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
140#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
141
142extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
143#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
144
145#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
146
147#define IXGBE_READ_REG(a, reg) (\
148 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
149 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
150 reg))
151
152#define IXGBE_WRITE_REG(a, reg, value) (\
153 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
154 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
155 reg, value))
156
157
158#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
159 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
160 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
161 (reg + ((offset) << 2))))
162
163#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
164 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
165 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
166 (reg + ((offset) << 2)), value))
167
168
169#endif /* _IXGBE_OS_H_ */