Fully synchronize sys/boot from FreeBSD-5.x, but add / to the module path
[dragonfly.git] / sys / boot / alpha / libalpha / prom_swpal.S
CommitLineData
984263bc 1/*
984263bc 2 * From: $NetBSD: prom_swpal.S,v 1.2 1997/04/06 08:41:01 cgd Exp $
5ee58eed
MD
3 * $FreeBSD: src/sys/boot/alpha/libalpha/prom_swpal.S,v 1.2 1999/08/28 00:39:29 peter Exp $
4 * $DragonFly: src/sys/boot/alpha/libalpha/Attic/prom_swpal.S,v 1.3 2003/11/10 06:08:30 dillon Exp $
984263bc
MD
5 */
6
7/*
8 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
9 * All rights reserved.
10 *
11 * Author: Keith Bostic
12 *
13 * Permission to use, copy, modify and distribute this software and
14 * its documentation is hereby granted, provided that both the copyright
15 * notice and this permission notice appear in all copies of the
16 * software, derivative works or modified versions, and any portions
17 * thereof, and that both notices appear in supporting documentation.
18 *
19 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
20 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
21 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
22 *
23 * Carnegie Mellon requests users of this software to return to
24 *
25 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
26 * School of Computer Science
27 * Carnegie Mellon University
28 * Pittsburgh PA 15213-3890
29 *
30 * any improvements or extensions that they make and grant Carnegie the
31 * rights to redistribute these changes.
32 */
33
34#define ASSEMBLER
35#include <machine/asm.h>
36#include <machine/prom.h>
37#include <machine/rpb.h>
38
39/* Offsets from base of HWRPB. */
40#define RPB_SELFREF 0x00
41#define RPB_SLOTSIZE 0x98
42#define RPB_PERCPU_OFF 0xA0
43
44/* Offsets in a boot PCB. */
45#define PCB_KSP 0x00
46#define PCB_PTBR 0x10
47#define PCB_ASN 0x1c
48#define PCB_FEN 0x28
49
50/* Pal values. */
51#define PAL_RESERVED 0 /* Reserved to Digital. */
52#define PAL_VMS 1 /* VMS */
53#define PAL_OSF 2 /* OSF */
54
55/*
56 * PAL code switch routine.
57 */
58#define D_RA (7*8)
59#define D_S0 (8*8)
60#define D_S1 (9*8)
61#define D_S2 (10*8)
62#define D_S3 (11*8)
63#define D_S4 (12*8)
64#define D_S5 (13*8)
65#define PALSW_FRAME_SIZE (14*8)
66#define PALSW_REGS IM_RA|IM_S0|IM_S1|IM_S2|IM_S3|IM_S4|IM_S5
67
68 .comm ptbr_save,8
69
70 .text
71 .align 4
72
73NESTED(switch_palcode, 0, PALSW_FRAME_SIZE, ra, PALSW_REGS, 0)
74 LDGP(pv)
75/* ldgp gp, 0(pv)*/
76
77 lda sp, -PALSW_FRAME_SIZE(sp)
78 stq ra, D_RA(sp)
79 stq s0, D_S0(sp)
80 stq s1, D_S1(sp)
81 stq s2, D_S2(sp)
82 stq s3, D_S3(sp)
83 stq s4, D_S4(sp)
84 stq s5, D_S5(sp)
85
86 stq pv, 0(sp)
87 stq gp, 8(sp)
88
89 ldiq s0, HWRPB_ADDR /* s0 HWRPB_ADDR */
90 ldq s1, RPB_SLOTSIZE(s0)
91 call_pal PAL_VMS_mfpr_whami
92 mulq s1, v0, s1 /* s1 per_cpu offset from base */
93 ldq s2, RPB_PERCPU_OFF(s0)
94 addq s0, s2, s2
95 addq s2, s1, s2 /* s2 PCB (virtual) */
96
97 call_pal PAL_VMS_mfpr_ptbr
98 stq v0, PCB_PTBR(s2)
99 stq v0, ptbr_save /* save PTBR for the kernel */
100 stl zero, PCB_ASN(s2)
101 stq zero, PCB_FEN(s2)
102 stq sp, PCB_KSP(s2)
103
104 ldq t0, RPB_SELFREF(s0) /* HWRBP base (physical) */
105 ldq t1, RPB_PERCPU_OFF(s0)
106 addq t0, t1, t0
107 addq t0, s1, t0 /* PCB base (phys) */
108 stq t0, 16(sp)
109
110 call_pal PAL_VMS_mfpr_vptb
111 mov v0, a3
112 ldiq a0, PAL_OSF
113 lda a1, contin
114 ldq a2, 16(sp)
115
116 call_pal PAL_swppal /* a0, a1, a2, a3 */
117
118contin: ldq pv, 0(sp)
119 ldq gp, 8(sp)
120
121 ldq ra, D_RA(sp)
122 ldq s0, D_S0(sp)
123 ldq s1, D_S1(sp)
124 ldq s2, D_S2(sp)
125 ldq s3, D_S3(sp)
126 ldq s4, D_S4(sp)
127 ldq s5, D_S5(sp)
128 lda sp, PALSW_FRAME_SIZE(sp)
129 RET
130END(switch_palcode)
131
132#undef D_RA
133#undef D_S0
134#undef D_S1
135#undef D_S2
136#undef D_S3
137#undef D_S4
138#undef D_S5
139#undef PALSW_FRAME_SIZE
140#undef PALSW_REGS