Add missing commit for the VM load heuristic and page allocation rate
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
1f1ea522 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.87 2006/03/05 18:38:32 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
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57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
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69#include <sys/mbuf.h>
70#include <sys/msgbuf.h>
71#include <sys/sysent.h>
72#include <sys/sysctl.h>
73#include <sys/vmmeter.h>
74#include <sys/bus.h>
a722be49 75#include <sys/upcall.h>
cb7f4ab1 76#include <sys/usched.h>
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77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
984263bc 105#include <machine/smp.h>
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106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
1f2de5d4 112#include <bus/isa/i386/isa_device.h>
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113#endif
114#include <i386/isa/intr_machdep.h>
1f2de5d4 115#include <bus/isa/rtc.h>
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116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
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121#define PHYSMAP_ENTRIES 10
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
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143int _udatasel, _ucodesel;
144u_int atdevbase;
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145#ifdef SMP
146int64_t tsc_offsets[MAXCPU];
147#else
148int64_t tsc_offsets[1];
149#endif
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150
151#if defined(SWTCH_OPTIM_STATS)
152extern int swtch_optim_stats;
153SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
157#endif
158
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159int physmem = 0;
160int cold = 1;
161
162static int
163sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
164{
165 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
166 return (error);
167}
168
169SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
170 0, 0, sysctl_hw_physmem, "IU", "");
171
172static int
173sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
174{
175 int error = sysctl_handle_int(oidp, 0,
12e4aaff 176 ctob(physmem - vmstats.v_wire_count), req);
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177 return (error);
178}
179
180SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
181 0, 0, sysctl_hw_usermem, "IU", "");
182
183static int
184sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
185{
186 int error = sysctl_handle_int(oidp, 0,
187 i386_btop(avail_end - avail_start), req);
188 return (error);
189}
190
191SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
192 0, 0, sysctl_hw_availpages, "I", "");
193
194static int
195sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
196{
197 int error;
198
199 /* Unwind the buffer, so that it's linear (possibly starting with
200 * some initial nulls).
201 */
202 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
203 msgbufp->msg_size-msgbufp->msg_bufr,req);
204 if(error) return(error);
205 if(msgbufp->msg_bufr>0) {
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
207 msgbufp->msg_bufr,req);
208 }
209 return(error);
210}
211
212SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
213 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
214
215static int msgbuf_clear;
216
217static int
218sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
219{
220 int error;
221 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
222 req);
223 if (!error && req->newptr) {
224 /* Clear the buffer and reset write pointer */
225 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
226 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
227 msgbuf_clear=0;
228 }
229 return (error);
230}
231
232SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
233 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
234 "Clear kernel message buffer");
235
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236int bootverbose = 0;
237vm_paddr_t Maxmem = 0;
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238long dumplo;
239
ff1a75a1 240vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
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241
242static vm_offset_t buffer_sva, buffer_eva;
243vm_offset_t clean_sva, clean_eva;
244static vm_offset_t pager_sva, pager_eva;
245static struct trapframe proc0_tf;
246
247static void
248cpu_startup(dummy)
249 void *dummy;
250{
c9faf524 251 caddr_t v;
cb840899 252 vm_offset_t minaddr;
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253 vm_offset_t maxaddr;
254 vm_size_t size = 0;
255 int firstaddr;
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256
257 if (boothowto & RB_VERBOSE)
258 bootverbose++;
259
260 /*
261 * Good {morning,afternoon,evening,night}.
262 */
263 printf("%s", version);
264 startrtclock();
265 printcpuinfo();
266 panicifcpuunsupported();
267#ifdef PERFMON
268 perfmon_init();
269#endif
6ef943a3 270 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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271 /*
272 * Display any holes after the first chunk of extended memory.
273 */
274 if (bootverbose) {
275 int indx;
276
277 printf("Physical memory chunk(s):\n");
278 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 279 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 280
6ef943a3 281 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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282 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
283 size1 / PAGE_SIZE);
284 }
285 }
286
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287 /*
288 * Allocate space for system data structures.
289 * The first available kernel virtual address is in "v".
290 * As pages of kernel virtual memory are allocated, "v" is incremented.
291 * As pages of memory are allocated and cleared,
292 * "firstaddr" is incremented.
293 * An index into the kernel page table corresponding to the
294 * virtual memory address maintained in "v" is kept in "mapaddr".
295 */
296
297 /*
298 * Make two passes. The first pass calculates how much memory is
299 * needed and allocates it. The second pass assigns virtual
300 * addresses to the various data structures.
301 */
302 firstaddr = 0;
303again:
304 v = (caddr_t)firstaddr;
305
306#define valloc(name, type, num) \
307 (name) = (type *)v; v = (caddr_t)((name)+(num))
308#define valloclim(name, type, num, lim) \
309 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
310
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311 /*
312 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
313 * For the first 64MB of ram nominally allocate sufficient buffers to
314 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
315 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
316 * the buffer cache we limit the eventual kva reservation to
317 * maxbcache bytes.
318 *
319 * factor represents the 1/4 x ram conversion.
320 */
321 if (nbuf == 0) {
322 int factor = 4 * BKVASIZE / 1024;
323 int kbytes = physmem * (PAGE_SIZE / 1024);
324
325 nbuf = 50;
326 if (kbytes > 4096)
327 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
328 if (kbytes > 65536)
329 nbuf += (kbytes - 65536) * 2 / (factor * 5);
330 if (maxbcache && nbuf > maxbcache / BKVASIZE)
331 nbuf = maxbcache / BKVASIZE;
332 }
333
334 /*
335 * Do not allow the buffer_map to be more then 1/2 the size of the
336 * kernel_map.
337 */
338 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
339 (BKVASIZE * 2)) {
340 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
341 (BKVASIZE * 2);
342 printf("Warning: nbufs capped at %d\n", nbuf);
343 }
344
345 nswbuf = max(min(nbuf/4, 256), 16);
346#ifdef NSWBUF_MIN
347 if (nswbuf < NSWBUF_MIN)
348 nswbuf = NSWBUF_MIN;
349#endif
350#ifdef DIRECTIO
351 ffs_rawread_setup();
352#endif
353
354 valloc(swbuf, struct buf, nswbuf);
355 valloc(buf, struct buf, nbuf);
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356
357 /*
358 * End of first pass, size has been calculated so allocate memory
359 */
360 if (firstaddr == 0) {
361 size = (vm_size_t)(v - firstaddr);
362 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
363 if (firstaddr == 0)
364 panic("startup: no room for tables");
365 goto again;
366 }
367
368 /*
369 * End of second pass, addresses have been assigned
370 */
371 if ((vm_size_t)(v - firstaddr) != size)
372 panic("startup: table size inconsistency");
373
374 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
375 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
376 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
377 (nbuf*BKVASIZE));
378 buffer_map->system_map = 1;
379 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
380 (nswbuf*MAXPHYS) + pager_map_size);
381 pager_map->system_map = 1;
382 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
383 (16*(ARG_MAX+(PAGE_SIZE*3))));
384
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385#if defined(USERCONFIG)
386 userconfig();
387 cninit(); /* the preferred console may have changed */
388#endif
389
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390 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
391 ptoa(vmstats.v_free_count) / 1024);
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392
393 /*
394 * Set up buffers, so they can be used to read disk labels.
395 */
396 bufinit();
397 vm_pager_bufferinit();
398
399#ifdef SMP
400 /*
401 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
402 */
403 mp_start(); /* fire up the APs and APICs */
404 mp_announce();
405#endif /* SMP */
406 cpu_setregs();
407}
408
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409/*
410 * Send an interrupt to process.
411 *
412 * Stack is set up to allow sigcode stored
413 * at top to call routine, followed by kcall
414 * to sigreturn routine below. After sigreturn
415 * resets the signal mask, the stack, and the
416 * frame pointer, it returns to the user
417 * specified pc, psl.
418 */
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419void
420sendsig(catcher, sig, mask, code)
421 sig_t catcher;
422 int sig;
423 sigset_t *mask;
424 u_long code;
425{
065b709a
SS
426 struct lwp *lp = curthread->td_lwp;
427 struct proc *p = lp->lwp_proc;
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428 struct trapframe *regs;
429 struct sigacts *psp = p->p_sigacts;
430 struct sigframe sf, *sfp;
431 int oonstack;
432
065b709a
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433 regs = lp->lwp_md.md_regs;
434 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
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435
436 /* save user context */
437 bzero(&sf, sizeof(struct sigframe));
438 sf.sf_uc.uc_sigmask = *mask;
065b709a 439 sf.sf_uc.uc_stack = lp->lwp_sigstk;
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440 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
441 sf.sf_uc.uc_mcontext.mc_gs = rgs();
442 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
443
444 /* Allocate and validate space for the signal handler context. */
065b709a 445 /* XXX lwp flags */
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446 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
447 SIGISMEMBER(psp->ps_sigonstack, sig)) {
065b709a
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448 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
449 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
450 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
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451 }
452 else
453 sfp = (struct sigframe *)regs->tf_esp - 1;
454
455 /* Translate the signal is appropriate */
456 if (p->p_sysent->sv_sigtbl) {
457 if (sig <= p->p_sysent->sv_sigsize)
458 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
459 }
460
461 /* Build the argument list for the signal handler. */
462 sf.sf_signum = sig;
463 sf.sf_ucontext = (register_t)&sfp->sf_uc;
065b709a 464 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
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465 /* Signal handler installed with SA_SIGINFO. */
466 sf.sf_siginfo = (register_t)&sfp->sf_si;
467 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
468
469 /* fill siginfo structure */
470 sf.sf_si.si_signo = sig;
471 sf.sf_si.si_code = code;
472 sf.sf_si.si_addr = (void*)regs->tf_err;
473 }
474 else {
475 /* Old FreeBSD-style arguments. */
476 sf.sf_siginfo = code;
477 sf.sf_addr = regs->tf_err;
478 sf.sf_ahu.sf_handler = catcher;
479 }
480
481 /*
482 * If we're a vm86 process, we want to save the segment registers.
483 * We also change eflags to be our emulated eflags, not the actual
484 * eflags.
485 */
486 if (regs->tf_eflags & PSL_VM) {
487 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
065b709a 488 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
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489
490 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
491 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
492 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
493 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
494
495 if (vm86->vm86_has_vme == 0)
496 sf.sf_uc.uc_mcontext.mc_eflags =
497 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
498 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
499
500 /*
501 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
502 * syscalls made by the signal handler. This just avoids
503 * wasting time for our lazy fixup of such faults. PSL_NT
504 * does nothing in vm86 mode, but vm86 programs can set it
505 * almost legitimately in probes for old cpu types.
506 */
507 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
508 }
509
510 /*
511 * Copy the sigframe out to the user's stack.
512 */
513 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
514 /*
515 * Something is wrong with the stack pointer.
516 * ...Kill the process.
517 */
518 sigexit(p, SIGILL);
519 }
520
521 regs->tf_esp = (int)sfp;
522 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
523 regs->tf_eflags &= ~PSL_T;
524 regs->tf_cs = _ucodesel;
525 regs->tf_ds = _udatasel;
526 regs->tf_es = _udatasel;
527 regs->tf_fs = _udatasel;
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528 regs->tf_ss = _udatasel;
529}
530
531/*
65957d54 532 * sigreturn(ucontext_t *sigcntxp)
41c20dac 533 *
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534 * System call to cleanup state after a signal
535 * has been taken. Reset signal mask and
536 * stack state from context left by sendsig (above).
537 * Return to previous pc and psl as specified by
538 * context left by sendsig. Check carefully to
539 * make sure that the user has not modified the
540 * state to gain improper privileges.
541 */
542#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
543#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
544
984263bc 545int
41c20dac 546sigreturn(struct sigreturn_args *uap)
984263bc 547{
065b709a 548 struct lwp *lp = curthread->td_lwp;
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549 struct trapframe *regs;
550 ucontext_t *ucp;
551 int cs, eflags;
552
553 ucp = uap->sigcntxp;
554
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555 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
556 return (EFAULT);
557
065b709a 558 regs = lp->lwp_md.md_regs;
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559 eflags = ucp->uc_mcontext.mc_eflags;
560
561 if (eflags & PSL_VM) {
562 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
563 struct vm86_kernel *vm86;
564
565 /*
566 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
567 * set up the vm86 area, and we can't enter vm86 mode.
568 */
065b709a 569 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
984263bc 570 return (EINVAL);
065b709a 571 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
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572 if (vm86->vm86_inited == 0)
573 return (EINVAL);
574
575 /* go back to user mode if both flags are set */
576 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
065b709a 577 trapsignal(lp->lwp_proc, SIGBUS, 0);
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578
579 if (vm86->vm86_has_vme) {
580 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
581 (eflags & VME_USERCHANGE) | PSL_VM;
582 } else {
583 vm86->vm86_eflags = eflags; /* save VIF, VIP */
584 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
585 }
586 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
587 tf->tf_eflags = eflags;
588 tf->tf_vm86_ds = tf->tf_ds;
589 tf->tf_vm86_es = tf->tf_es;
590 tf->tf_vm86_fs = tf->tf_fs;
591 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
592 tf->tf_ds = _udatasel;
593 tf->tf_es = _udatasel;
594 tf->tf_fs = _udatasel;
595 } else {
596 /*
597 * Don't allow users to change privileged or reserved flags.
598 */
599 /*
600 * XXX do allow users to change the privileged flag PSL_RF.
601 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
602 * should sometimes set it there too. tf_eflags is kept in
603 * the signal context during signal handling and there is no
604 * other place to remember it, so the PSL_RF bit may be
605 * corrupted by the signal handler without us knowing.
606 * Corruption of the PSL_RF bit at worst causes one more or
607 * one less debugger trap, so allowing it is fairly harmless.
608 */
609 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
610 printf("sigreturn: eflags = 0x%x\n", eflags);
611 return(EINVAL);
612 }
613
614 /*
615 * Don't allow users to load a valid privileged %cs. Let the
616 * hardware check for invalid selectors, excess privilege in
617 * other selectors, invalid %eip's and invalid %esp's.
618 */
619 cs = ucp->uc_mcontext.mc_cs;
620 if (!CS_SECURE(cs)) {
621 printf("sigreturn: cs = 0x%x\n", cs);
065b709a 622 trapsignal(lp->lwp_proc, SIGBUS, T_PROTFLT);
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623 return(EINVAL);
624 }
625 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
626 }
627
628 if (ucp->uc_mcontext.mc_onstack & 1)
065b709a 629 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
984263bc 630 else
065b709a 631 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
984263bc 632
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633 lp->lwp_sigmask = ucp->uc_sigmask;
634 SIG_CANTMASK(lp->lwp_sigmask);
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635 return(EJUSTRETURN);
636}
637
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638/*
639 * Stack frame on entry to function. %eax will contain the function vector,
640 * %ecx will contain the function data. flags, ecx, and eax will have
641 * already been pushed on the stack.
642 */
643struct upc_frame {
644 register_t eax;
645 register_t ecx;
0a455ac5 646 register_t edx;
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647 register_t flags;
648 register_t oldip;
649};
650
651void
652sendupcall(struct vmupcall *vu, int morepending)
653{
065b709a 654 struct lwp *lp = curthread->td_lwp;
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655 struct trapframe *regs;
656 struct upcall upcall;
657 struct upc_frame upc_frame;
6e58b5df 658 int crit_count = 0;
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659
660 /*
661 * Get the upcall data structure
662 */
065b709a 663 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
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664 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
665 ) {
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666 vu->vu_pending = 0;
667 printf("bad upcall address\n");
668 return;
669 }
670
671 /*
672 * If the data structure is already marked pending or has a critical
673 * section count, mark the data structure as pending and return
674 * without doing an upcall. vu_pending is left set.
675 */
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676 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
677 if (upcall.upc_pending < vu->vu_pending) {
678 upcall.upc_pending = vu->vu_pending;
065b709a 679 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
6e58b5df 680 sizeof(upcall.upc_pending));
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681 }
682 return;
683 }
684
685 /*
686 * We can run this upcall now, clear vu_pending.
687 *
688 * Bump our critical section count and set or clear the
689 * user pending flag depending on whether more upcalls are
690 * pending. The user will be responsible for calling
691 * upc_dispatch(-1) to process remaining upcalls.
692 */
693 vu->vu_pending = 0;
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694 upcall.upc_pending = morepending;
695 crit_count += TDPRI_CRIT;
065b709a 696 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
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697 sizeof(upcall.upc_pending));
698 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
699 sizeof(int));
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700
701 /*
702 * Construct a stack frame and issue the upcall
703 */
065b709a 704 regs = lp->lwp_md.md_regs;
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705 upc_frame.eax = regs->tf_eax;
706 upc_frame.ecx = regs->tf_ecx;
0a455ac5 707 upc_frame.edx = regs->tf_edx;
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708 upc_frame.flags = regs->tf_eflags;
709 upc_frame.oldip = regs->tf_eip;
710 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
711 sizeof(upc_frame)) != 0) {
712 printf("bad stack on upcall\n");
713 } else {
714 regs->tf_eax = (register_t)vu->vu_func;
715 regs->tf_ecx = (register_t)vu->vu_data;
065b709a 716 regs->tf_edx = (register_t)lp->lwp_upcall;
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717 regs->tf_eip = (register_t)vu->vu_ctx;
718 regs->tf_esp -= sizeof(upc_frame);
719 }
720}
721
722/*
723 * fetchupcall occurs in the context of a system call, which means that
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724 * we have to return EJUSTRETURN in order to prevent eax and edx from
725 * being overwritten by the syscall return value.
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726 *
727 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
728 * and the function pointer in %eax.
729 */
730int
0a455ac5 731fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
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732{
733 struct upc_frame upc_frame;
065b709a 734 struct lwp *lp = curthread->td_lwp;
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735 struct trapframe *regs;
736 int error;
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737 struct upcall upcall;
738 int crit_count;
a722be49 739
065b709a 740 regs = lp->lwp_md.md_regs;
a722be49 741
065b709a 742 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
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743 if (error == 0) {
744 if (vu) {
745 /*
746 * This jumps us to the next ready context.
747 */
748 vu->vu_pending = 0;
065b709a 749 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
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750 crit_count = 0;
751 if (error == 0)
752 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
753 crit_count += TDPRI_CRIT;
a722be49 754 if (error == 0)
6e58b5df 755 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
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756 regs->tf_eax = (register_t)vu->vu_func;
757 regs->tf_ecx = (register_t)vu->vu_data;
065b709a 758 regs->tf_edx = (register_t)lp->lwp_upcall;
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759 regs->tf_eip = (register_t)vu->vu_ctx;
760 regs->tf_esp = (register_t)rsp;
761 } else {
762 /*
763 * This returns us to the originally interrupted code.
764 */
765 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
766 regs->tf_eax = upc_frame.eax;
767 regs->tf_ecx = upc_frame.ecx;
0a455ac5 768 regs->tf_edx = upc_frame.edx;
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769 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
770 (upc_frame.flags & PSL_USERCHANGE);
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771 regs->tf_eip = upc_frame.oldip;
772 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
773 }
774 }
775 if (error == 0)
776 error = EJUSTRETURN;
777 return(error);
778}
779
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780/*
781 * Machine dependent boot() routine
782 *
783 * I haven't seen anything to put here yet
784 * Possibly some stuff might be grafted back here from boot()
785 */
786void
787cpu_boot(int howto)
788{
789}
790
791/*
792 * Shutdown the CPU as much as possible
793 */
794void
795cpu_halt(void)
796{
797 for (;;)
798 __asm__ ("hlt");
799}
800
801/*
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802 * cpu_idle() represents the idle LWKT. You cannot return from this function
803 * (unless you want to blow things up!). Instead we look for runnable threads
804 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 805 *
26a0694b 806 * The main loop is entered with a critical section held, we must release
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807 * the critical section before doing anything else. lwkt_switch() will
808 * check for pending interrupts due to entering and exiting its own
809 * critical section.
26a0694b 810 *
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811 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
812 * to wake a HLTed cpu up. However, there are cases where the idlethread
813 * will be entered with the possibility that no IPI will occur and in such
814 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 815 */
96728c05 816static int cpu_idle_hlt = 1;
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817static int cpu_idle_hltcnt;
818static int cpu_idle_spincnt;
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819SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
820 &cpu_idle_hlt, 0, "Idle loop HLT enable");
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821SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
822 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
823SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
824 &cpu_idle_spincnt, 0, "Idle loop entry spins");
984263bc 825
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826static void
827cpu_idle_default_hook(void)
828{
829 /*
830 * We must guarentee that hlt is exactly the instruction
831 * following the sti.
832 */
833 __asm __volatile("sti; hlt");
834}
835
836/* Other subsystems (e.g., ACPI) can hook this later. */
837void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
838
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839void
840cpu_idle(void)
841{
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842 struct thread *td = curthread;
843
26a0694b 844 crit_exit();
a2a5ad0d 845 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 846 for (;;) {
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847 /*
848 * See if there are any LWKTs ready to go.
849 */
8ad65e08 850 lwkt_switch();
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851
852 /*
853 * If we are going to halt call splz unconditionally after
854 * CLIing to catch any interrupt races. Note that we are
855 * at SPL0 and interrupts are enabled.
856 */
857 if (cpu_idle_hlt && !lwkt_runnable() &&
858 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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859 __asm __volatile("cli");
860 splz();
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861 if (!lwkt_runnable())
862 cpu_idle_hook();
863#ifdef SMP
864 else
865 __asm __volatile("pause");
866#endif
60f945af 867 ++cpu_idle_hltcnt;
8ad65e08 868 } else {
a2a5ad0d 869 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 870 splz();
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871#ifdef SMP
872 __asm __volatile("sti; pause");
873#else
8ad65e08 874 __asm __volatile("sti");
8b6d0f3f 875#endif
60f945af 876 ++cpu_idle_spincnt;
8ad65e08 877 }
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878 }
879}
880
881/*
882 * Clear registers on exec
883 */
884void
885setregs(p, entry, stack, ps_strings)
886 struct proc *p;
887 u_long entry;
888 u_long stack;
889 u_long ps_strings;
890{
891 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 892 struct pcb *pcb = p->p_thread->td_pcb;
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893
894 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
895 pcb->pcb_gs = _udatasel;
896 load_gs(_udatasel);
897
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898 /* was i386_user_cleanup() in NetBSD */
899 user_ldt_free(pcb);
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900
901 bzero((char *)regs, sizeof(struct trapframe));
902 regs->tf_eip = entry;
903 regs->tf_esp = stack;
904 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
905 regs->tf_ss = _udatasel;
906 regs->tf_ds = _udatasel;
907 regs->tf_es = _udatasel;
908 regs->tf_fs = _udatasel;
909 regs->tf_cs = _ucodesel;
910
911 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
912 regs->tf_ebx = ps_strings;
913
914 /*
915 * Reset the hardware debug registers if they were in use.
916 * They won't have any meaning for the newly exec'd process.
917 */
918 if (pcb->pcb_flags & PCB_DBREGS) {
919 pcb->pcb_dr0 = 0;
920 pcb->pcb_dr1 = 0;
921 pcb->pcb_dr2 = 0;
922 pcb->pcb_dr3 = 0;
923 pcb->pcb_dr6 = 0;
924 pcb->pcb_dr7 = 0;
b7c628e4 925 if (pcb == curthread->td_pcb) {
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926 /*
927 * Clear the debug registers on the running
928 * CPU, otherwise they will end up affecting
929 * the next process we switch to.
930 */
931 reset_dbregs();
932 }
933 pcb->pcb_flags &= ~PCB_DBREGS;
934 }
935
936 /*
937 * Initialize the math emulator (if any) for the current process.
938 * Actually, just clear the bit that says that the emulator has
939 * been initialized. Initialization is delayed until the process
940 * traps to the emulator (if it is done at all) mainly because
941 * emulators don't provide an entry point for initialization.
942 */
b7c628e4 943 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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944
945 /*
a02705a9
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946 * note: do not set CR0_TS here. npxinit() must do it after clearing
947 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
948 * in npxdna().
984263bc 949 */
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950 crit_enter();
951 load_cr0(rcr0() | CR0_MP);
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952
953#if NNPX > 0
954 /* Initialize the npx (if any) for the current process. */
955 npxinit(__INITIAL_NPXCW__);
956#endif
a02705a9 957 crit_exit();
984263bc 958
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959 /*
960 * note: linux emulator needs edx to be 0x0 on entry, which is
c0510e9a
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961 * handled in execve simply by setting the 64 bit syscall
962 * return value to 0.
90b9818c 963 */
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964}
965
966void
967cpu_setregs(void)
968{
969 unsigned int cr0;
970
971 cr0 = rcr0();
972 cr0 |= CR0_NE; /* Done by npxinit() */
973 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
974#ifdef I386_CPU
975 if (cpu_class != CPUCLASS_386)
976#endif
977 cr0 |= CR0_WP | CR0_AM;
978 load_cr0(cr0);
979 load_gs(_udatasel);
980}
981
982static int
983sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
984{
985 int error;
986 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
987 req);
988 if (!error && req->newptr)
989 resettodr();
990 return (error);
991}
992
993SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
994 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
995
996SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
997 CTLFLAG_RW, &disable_rtc_set, 0, "");
998
999SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1000 CTLFLAG_RD, &bootinfo, bootinfo, "");
1001
1002SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1003 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1004
1005extern u_long bootdev; /* not a dev_t - encoding is different */
1006SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1007 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1008
1009/*
1010 * Initialize 386 and configure to run kernel
1011 */
1012
1013/*
1014 * Initialize segments & interrupt table
1015 */
1016
1017int _default_ldt;
1018union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1019static struct gate_descriptor idt0[NIDT];
1020struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1021union descriptor ldt[NLDT]; /* local descriptor table */
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MD
1022
1023/* table descriptors - used to load tables by cpu */
984263bc 1024struct region_descriptor r_gdt, r_idt;
984263bc 1025
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MD
1026#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1027extern int has_f00f_bug;
1028#endif
1029
1030static struct i386tss dblfault_tss;
1031static char dblfault_stack[PAGE_SIZE];
1032
1033extern struct user *proc0paddr;
1034
1035
1036/* software prototypes -- in more palatable form */
1037struct soft_segment_descriptor gdt_segs[] = {
1038/* GNULL_SEL 0 Null Descriptor */
1039{ 0x0, /* segment base address */
1040 0x0, /* length */
1041 0, /* segment type */
1042 0, /* segment descriptor priority level */
1043 0, /* segment descriptor present */
1044 0, 0,
1045 0, /* default 32 vs 16 bit size */
1046 0 /* limit granularity (byte/page units)*/ },
1047/* GCODE_SEL 1 Code Descriptor for kernel */
1048{ 0x0, /* segment base address */
1049 0xfffff, /* length - all address space */
1050 SDT_MEMERA, /* segment type */
1051 0, /* segment descriptor priority level */
1052 1, /* segment descriptor present */
1053 0, 0,
1054 1, /* default 32 vs 16 bit size */
1055 1 /* limit granularity (byte/page units)*/ },
1056/* GDATA_SEL 2 Data Descriptor for kernel */
1057{ 0x0, /* segment base address */
1058 0xfffff, /* length - all address space */
1059 SDT_MEMRWA, /* segment type */
1060 0, /* segment descriptor priority level */
1061 1, /* segment descriptor present */
1062 0, 0,
1063 1, /* default 32 vs 16 bit size */
1064 1 /* limit granularity (byte/page units)*/ },
1065/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1066{ 0x0, /* segment base address */
1067 0xfffff, /* length - all address space */
1068 SDT_MEMRWA, /* segment type */
1069 0, /* segment descriptor priority level */
1070 1, /* segment descriptor present */
1071 0, 0,
1072 1, /* default 32 vs 16 bit size */
1073 1 /* limit granularity (byte/page units)*/ },
1074/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1075{
1076 0x0, /* segment base address */
1077 sizeof(struct i386tss)-1,/* length - all address space */
1078 SDT_SYS386TSS, /* segment type */
1079 0, /* segment descriptor priority level */
1080 1, /* segment descriptor present */
1081 0, 0,
1082 0, /* unused - default 32 vs 16 bit size */
1083 0 /* limit granularity (byte/page units)*/ },
1084/* GLDT_SEL 5 LDT Descriptor */
1085{ (int) ldt, /* segment base address */
1086 sizeof(ldt)-1, /* length - all address space */
1087 SDT_SYSLDT, /* segment type */
1088 SEL_UPL, /* segment descriptor priority level */
1089 1, /* segment descriptor present */
1090 0, 0,
1091 0, /* unused - default 32 vs 16 bit size */
1092 0 /* limit granularity (byte/page units)*/ },
1093/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1094{ (int) ldt, /* segment base address */
1095 (512 * sizeof(union descriptor)-1), /* length */
1096 SDT_SYSLDT, /* segment type */
1097 0, /* segment descriptor priority level */
1098 1, /* segment descriptor present */
1099 0, 0,
1100 0, /* unused - default 32 vs 16 bit size */
1101 0 /* limit granularity (byte/page units)*/ },
1102/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1103{ 0x0, /* segment base address */
1104 0x0, /* length - all address space */
1105 0, /* segment type */
1106 0, /* segment descriptor priority level */
1107 0, /* segment descriptor present */
1108 0, 0,
1109 0, /* default 32 vs 16 bit size */
1110 0 /* limit granularity (byte/page units)*/ },
1111/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1112{ 0x400, /* segment base address */
1113 0xfffff, /* length */
1114 SDT_MEMRWA, /* segment type */
1115 0, /* segment descriptor priority level */
1116 1, /* segment descriptor present */
1117 0, 0,
1118 1, /* default 32 vs 16 bit size */
1119 1 /* limit granularity (byte/page units)*/ },
1120/* GPANIC_SEL 9 Panic Tss Descriptor */
1121{ (int) &dblfault_tss, /* segment base address */
1122 sizeof(struct i386tss)-1,/* length - all address space */
1123 SDT_SYS386TSS, /* segment type */
1124 0, /* segment descriptor priority level */
1125 1, /* segment descriptor present */
1126 0, 0,
1127 0, /* unused - default 32 vs 16 bit size */
1128 0 /* limit granularity (byte/page units)*/ },
1129/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1130{ 0, /* segment base address (overwritten) */
1131 0xfffff, /* length */
1132 SDT_MEMERA, /* segment type */
1133 0, /* segment descriptor priority level */
1134 1, /* segment descriptor present */
1135 0, 0,
1136 0, /* default 32 vs 16 bit size */
1137 1 /* limit granularity (byte/page units)*/ },
1138/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1139{ 0, /* segment base address (overwritten) */
1140 0xfffff, /* length */
1141 SDT_MEMERA, /* segment type */
1142 0, /* segment descriptor priority level */
1143 1, /* segment descriptor present */
1144 0, 0,
1145 0, /* default 32 vs 16 bit size */
1146 1 /* limit granularity (byte/page units)*/ },
1147/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1148{ 0, /* segment base address (overwritten) */
1149 0xfffff, /* length */
1150 SDT_MEMRWA, /* segment type */
1151 0, /* segment descriptor priority level */
1152 1, /* segment descriptor present */
1153 0, 0,
1154 1, /* default 32 vs 16 bit size */
1155 1 /* limit granularity (byte/page units)*/ },
1156/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1157{ 0, /* segment base address (overwritten) */
1158 0xfffff, /* length */
1159 SDT_MEMRWA, /* segment type */
1160 0, /* segment descriptor priority level */
1161 1, /* segment descriptor present */
1162 0, 0,
1163 0, /* default 32 vs 16 bit size */
1164 1 /* limit granularity (byte/page units)*/ },
1165/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1166{ 0, /* segment base address (overwritten) */
1167 0xfffff, /* length */
1168 SDT_MEMRWA, /* segment type */
1169 0, /* segment descriptor priority level */
1170 1, /* segment descriptor present */
1171 0, 0,
1172 0, /* default 32 vs 16 bit size */
1173 1 /* limit granularity (byte/page units)*/ },
806bf111
MD
1174/* GTLS_START 15 TLS */
1175{ 0x0, /* segment base address */
1176 0x0, /* length */
1177 0, /* segment type */
1178 0, /* segment descriptor priority level */
1179 0, /* segment descriptor present */
1180 0, 0,
1181 0, /* default 32 vs 16 bit size */
1182 0 /* limit granularity (byte/page units)*/ },
1183/* GTLS_START+1 16 TLS */
1184{ 0x0, /* segment base address */
1185 0x0, /* length */
1186 0, /* segment type */
1187 0, /* segment descriptor priority level */
1188 0, /* segment descriptor present */
1189 0, 0,
1190 0, /* default 32 vs 16 bit size */
1191 0 /* limit granularity (byte/page units)*/ },
1192/* GTLS_END 17 TLS */
1193{ 0x0, /* segment base address */
1194 0x0, /* length */
1195 0, /* segment type */
1196 0, /* segment descriptor priority level */
1197 0, /* segment descriptor present */
1198 0, 0,
1199 0, /* default 32 vs 16 bit size */
1200 0 /* limit granularity (byte/page units)*/ },
984263bc
MD
1201};
1202
1203static struct soft_segment_descriptor ldt_segs[] = {
1204 /* Null Descriptor - overwritten by call gate */
1205{ 0x0, /* segment base address */
1206 0x0, /* length - all address space */
1207 0, /* segment type */
1208 0, /* segment descriptor priority level */
1209 0, /* segment descriptor present */
1210 0, 0,
1211 0, /* default 32 vs 16 bit size */
1212 0 /* limit granularity (byte/page units)*/ },
1213 /* Null Descriptor - overwritten by call gate */
1214{ 0x0, /* segment base address */
1215 0x0, /* length - all address space */
1216 0, /* segment type */
1217 0, /* segment descriptor priority level */
1218 0, /* segment descriptor present */
1219 0, 0,
1220 0, /* default 32 vs 16 bit size */
1221 0 /* limit granularity (byte/page units)*/ },
1222 /* Null Descriptor - overwritten by call gate */
1223{ 0x0, /* segment base address */
1224 0x0, /* length - all address space */
1225 0, /* segment type */
1226 0, /* segment descriptor priority level */
1227 0, /* segment descriptor present */
1228 0, 0,
1229 0, /* default 32 vs 16 bit size */
1230 0 /* limit granularity (byte/page units)*/ },
1231 /* Code Descriptor for user */
1232{ 0x0, /* segment base address */
1233 0xfffff, /* length - all address space */
1234 SDT_MEMERA, /* segment type */
1235 SEL_UPL, /* segment descriptor priority level */
1236 1, /* segment descriptor present */
1237 0, 0,
1238 1, /* default 32 vs 16 bit size */
1239 1 /* limit granularity (byte/page units)*/ },
1240 /* Null Descriptor - overwritten by call gate */
1241{ 0x0, /* segment base address */
1242 0x0, /* length - all address space */
1243 0, /* segment type */
1244 0, /* segment descriptor priority level */
1245 0, /* segment descriptor present */
1246 0, 0,
1247 0, /* default 32 vs 16 bit size */
1248 0 /* limit granularity (byte/page units)*/ },
1249 /* Data Descriptor for user */
1250{ 0x0, /* segment base address */
1251 0xfffff, /* length - all address space */
1252 SDT_MEMRWA, /* segment type */
1253 SEL_UPL, /* segment descriptor priority level */
1254 1, /* segment descriptor present */
1255 0, 0,
1256 1, /* default 32 vs 16 bit size */
1257 1 /* limit granularity (byte/page units)*/ },
1258};
1259
1260void
1261setidt(idx, func, typ, dpl, selec)
1262 int idx;
1263 inthand_t *func;
1264 int typ;
1265 int dpl;
1266 int selec;
1267{
1268 struct gate_descriptor *ip;
1269
1270 ip = idt + idx;
1271 ip->gd_looffset = (int)func;
1272 ip->gd_selector = selec;
1273 ip->gd_stkcpy = 0;
1274 ip->gd_xx = 0;
1275 ip->gd_type = typ;
1276 ip->gd_dpl = dpl;
1277 ip->gd_p = 1;
1278 ip->gd_hioffset = ((int)func)>>16 ;
1279}
1280
1281#define IDTVEC(name) __CONCAT(X,name)
1282
1283extern inthand_t
1284 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1285 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1286 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1287 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1288 IDTVEC(xmm), IDTVEC(syscall),
1289 IDTVEC(rsvd0);
a64ba182 1290extern inthand_t
7062f5b4
EN
1291 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall),
1292 IDTVEC(int0x82_syscall);
984263bc 1293
f7bc9806
MD
1294#ifdef DEBUG_INTERRUPTS
1295extern inthand_t *Xrsvdary[256];
1296#endif
1297
984263bc
MD
1298void
1299sdtossd(sd, ssd)
1300 struct segment_descriptor *sd;
1301 struct soft_segment_descriptor *ssd;
1302{
1303 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1304 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1305 ssd->ssd_type = sd->sd_type;
1306 ssd->ssd_dpl = sd->sd_dpl;
1307 ssd->ssd_p = sd->sd_p;
1308 ssd->ssd_def32 = sd->sd_def32;
1309 ssd->ssd_gran = sd->sd_gran;
1310}
1311
984263bc
MD
1312/*
1313 * Populate the (physmap) array with base/bound pairs describing the
1314 * available physical memory in the system, then test this memory and
1315 * build the phys_avail array describing the actually-available memory.
1316 *
1317 * If we cannot accurately determine the physical memory map, then use
1318 * value from the 0xE801 call, and failing that, the RTC.
1319 *
1320 * Total memory size may be set by the kernel environment variable
1321 * hw.physmem or the compile-time define MAXMEM.
1322 */
1323static void
1324getmemsize(int first)
1325{
1326 int i, physmap_idx, pa_indx;
1327 int hasbrokenint12;
1328 u_int basemem, extmem;
1329 struct vm86frame vmf;
1330 struct vm86context vmc;
ff1a75a1
MD
1331 vm_offset_t pa;
1332 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
b5b32410 1333 pt_entry_t *pte;
984263bc
MD
1334 const char *cp;
1335 struct {
1336 u_int64_t base;
1337 u_int64_t length;
1338 u_int32_t type;
1339 } *smap;
28abdbbb 1340 quad_t dcons_addr, dcons_size;
984263bc
MD
1341
1342 hasbrokenint12 = 0;
1343 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1344 bzero(&vmf, sizeof(struct vm86frame));
1345 bzero(physmap, sizeof(physmap));
1346 basemem = 0;
1347
1348 /*
1349 * Some newer BIOSes has broken INT 12H implementation which cause
1350 * kernel panic immediately. In this case, we need to scan SMAP
1351 * with INT 15:E820 first, then determine base memory size.
1352 */
1353 if (hasbrokenint12) {
1354 goto int15e820;
1355 }
1356
1357 /*
7febcc6e
MD
1358 * Perform "base memory" related probes & setup. If we get a crazy
1359 * value give the bios some scribble space just in case.
984263bc
MD
1360 */
1361 vm86_intcall(0x12, &vmf);
1362 basemem = vmf.vmf_ax;
1363 if (basemem > 640) {
7febcc6e
MD
1364 printf("Preposterous BIOS basemem of %uK, "
1365 "truncating to < 640K\n", basemem);
1366 basemem = 636;
984263bc
MD
1367 }
1368
1369 /*
1370 * XXX if biosbasemem is now < 640, there is a `hole'
1371 * between the end of base memory and the start of
1372 * ISA memory. The hole may be empty or it may
1373 * contain BIOS code or data. Map it read/write so
1374 * that the BIOS can write to it. (Memory from 0 to
1375 * the physical end of the kernel is mapped read-only
1376 * to begin with and then parts of it are remapped.
1377 * The parts that aren't remapped form holes that
1378 * remain read-only and are unused by the kernel.
1379 * The base memory area is below the physical end of
1380 * the kernel and right now forms a read-only hole.
1381 * The part of it from PAGE_SIZE to
1382 * (trunc_page(biosbasemem * 1024) - 1) will be
1383 * remapped and used by the kernel later.)
1384 *
1385 * This code is similar to the code used in
1386 * pmap_mapdev, but since no memory needs to be
1387 * allocated we simply change the mapping.
1388 */
1389 for (pa = trunc_page(basemem * 1024);
1390 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1391 pte = vtopte(pa + KERNBASE);
984263bc
MD
1392 *pte = pa | PG_RW | PG_V;
1393 }
1394
1395 /*
1396 * if basemem != 640, map pages r/w into vm86 page table so
1397 * that the bios can scribble on it.
1398 */
b5b32410 1399 pte = vm86paddr;
984263bc
MD
1400 for (i = basemem / 4; i < 160; i++)
1401 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1402
1403int15e820:
1404 /*
1405 * map page 1 R/W into the kernel page table so we can use it
1406 * as a buffer. The kernel will unmap this page later.
1407 */
b5b32410 1408 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1409 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1410
1411 /*
1412 * get memory map with INT 15:E820
1413 */
1414#define SMAPSIZ sizeof(*smap)
1415#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1416
1417 vmc.npages = 0;
1418 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1419 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1420
1421 physmap_idx = 0;
1422 vmf.vmf_ebx = 0;
1423 do {
1424 vmf.vmf_eax = 0xE820;
1425 vmf.vmf_edx = SMAP_SIG;
1426 vmf.vmf_ecx = SMAPSIZ;
1427 i = vm86_datacall(0x15, &vmf, &vmc);
1428 if (i || vmf.vmf_eax != SMAP_SIG)
1429 break;
1430 if (boothowto & RB_VERBOSE)
1431 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1432 smap->type,
1433 *(u_int32_t *)((char *)&smap->base + 4),
1434 (u_int32_t)smap->base,
1435 *(u_int32_t *)((char *)&smap->length + 4),
1436 (u_int32_t)smap->length);
1437
1438 if (smap->type != 0x01)
1439 goto next_run;
1440
1441 if (smap->length == 0)
1442 goto next_run;
1443
1444 if (smap->base >= 0xffffffff) {
1445 printf("%uK of memory above 4GB ignored\n",
1446 (u_int)(smap->length / 1024));
1447 goto next_run;
1448 }
1449
1450 for (i = 0; i <= physmap_idx; i += 2) {
1451 if (smap->base < physmap[i + 1]) {
1452 if (boothowto & RB_VERBOSE)
1453 printf(
1454 "Overlapping or non-montonic memory region, ignoring second region\n");
1455 goto next_run;
1456 }
1457 }
1458
1459 if (smap->base == physmap[physmap_idx + 1]) {
1460 physmap[physmap_idx + 1] += smap->length;
1461 goto next_run;
1462 }
1463
1464 physmap_idx += 2;
ff1a75a1 1465 if (physmap_idx == PHYSMAP_ENTRIES*2) {
984263bc
MD
1466 printf(
1467 "Too many segments in the physical address map, giving up\n");
1468 break;
1469 }
1470 physmap[physmap_idx] = smap->base;
1471 physmap[physmap_idx + 1] = smap->base + smap->length;
1472next_run:
6b08710e 1473 ; /* fix GCC3.x warning */
984263bc
MD
1474 } while (vmf.vmf_ebx != 0);
1475
1476 /*
1477 * Perform "base memory" related probes & setup based on SMAP
1478 */
1479 if (basemem == 0) {
1480 for (i = 0; i <= physmap_idx; i += 2) {
1481 if (physmap[i] == 0x00000000) {
1482 basemem = physmap[i + 1] / 1024;
1483 break;
1484 }
1485 }
1486
1487 if (basemem == 0) {
1488 basemem = 640;
1489 }
1490
1491 if (basemem > 640) {
1492 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1493 basemem);
1494 basemem = 640;
1495 }
1496
1497 for (pa = trunc_page(basemem * 1024);
1498 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1499 pte = vtopte(pa + KERNBASE);
984263bc
MD
1500 *pte = pa | PG_RW | PG_V;
1501 }
1502
b5b32410 1503 pte = vm86paddr;
984263bc
MD
1504 for (i = basemem / 4; i < 160; i++)
1505 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1506 }
1507
1508 if (physmap[1] != 0)
1509 goto physmap_done;
1510
1511 /*
1512 * If we failed above, try memory map with INT 15:E801
1513 */
1514 vmf.vmf_ax = 0xE801;
1515 if (vm86_intcall(0x15, &vmf) == 0) {
1516 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1517 } else {
1518#if 0
1519 vmf.vmf_ah = 0x88;
1520 vm86_intcall(0x15, &vmf);
1521 extmem = vmf.vmf_ax;
1522#else
1523 /*
1524 * Prefer the RTC value for extended memory.
1525 */
1526 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1527#endif
1528 }
1529
1530 /*
1531 * Special hack for chipsets that still remap the 384k hole when
1532 * there's 16MB of memory - this really confuses people that
1533 * are trying to use bus mastering ISA controllers with the
1534 * "16MB limit"; they only have 16MB, but the remapping puts
1535 * them beyond the limit.
1536 *
1537 * If extended memory is between 15-16MB (16-17MB phys address range),
1538 * chop it to 15MB.
1539 */
1540 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1541 extmem = 15 * 1024;
1542
1543 physmap[0] = 0;
1544 physmap[1] = basemem * 1024;
1545 physmap_idx = 2;
1546 physmap[physmap_idx] = 0x100000;
1547 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1548
1549physmap_done:
1550 /*
1551 * Now, physmap contains a map of physical memory.
1552 */
1553
1554#ifdef SMP
17a9f566 1555 /* make hole for AP bootstrap code YYY */
984263bc
MD
1556 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1557
1558 /* look for the MP hardware - needed for apic addresses */
1559 mp_probe();
1560#endif
1561
1562 /*
1563 * Maxmem isn't the "maximum memory", it's one larger than the
1564 * highest page of the physical address space. It should be
1565 * called something like "Maxphyspage". We may adjust this
1566 * based on ``hw.physmem'' and the results of the memory test.
1567 */
1568 Maxmem = atop(physmap[physmap_idx + 1]);
1569
1570#ifdef MAXMEM
1571 Maxmem = MAXMEM / 4;
1572#endif
1573
1574 /*
eb7d35b8 1575 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1576 * for the appropriate modifiers. This overrides MAXMEM.
1577 */
1578 if ((cp = getenv("hw.physmem")) != NULL) {
1579 u_int64_t AllowMem, sanity;
1580 char *ep;
1581
1582 sanity = AllowMem = strtouq(cp, &ep, 0);
1583 if ((ep != cp) && (*ep != 0)) {
1584 switch(*ep) {
1585 case 'g':
1586 case 'G':
1587 AllowMem <<= 10;
1588 case 'm':
1589 case 'M':
1590 AllowMem <<= 10;
1591 case 'k':
1592 case 'K':
1593 AllowMem <<= 10;
1594 break;
1595 default:
1596 AllowMem = sanity = 0;
1597 }
1598 if (AllowMem < sanity)
1599 AllowMem = 0;
1600 }
1601 if (AllowMem == 0)
1602 printf("Ignoring invalid memory size of '%s'\n", cp);
1603 else
1604 Maxmem = atop(AllowMem);
1605 }
1606
1607 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1608 (boothowto & RB_VERBOSE))
6ef943a3 1609 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1610
1611 /*
1612 * If Maxmem has been increased beyond what the system has detected,
1613 * extend the last memory segment to the new limit.
1614 */
1615 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1616 physmap[physmap_idx + 1] = ptoa(Maxmem);
1617
1618 /* call pmap initialization to make new kernel address space */
1619 pmap_bootstrap(first, 0);
1620
1621 /*
1622 * Size up each available chunk of physical memory.
1623 */
1624 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1625 pa_indx = 0;
1626 phys_avail[pa_indx++] = physmap[0];
1627 phys_avail[pa_indx] = physmap[0];
b5b32410 1628 pte = CMAP1;
984263bc 1629
28abdbbb
HS
1630 /*
1631 * Get dcons buffer address
1632 */
1633 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1634 getenv_quad("dcons.size", &dcons_size) == 0)
1635 dcons_addr = 0;
1636
984263bc
MD
1637 /*
1638 * physmap is in bytes, so when converting to page boundaries,
1639 * round up the start address and round down the end address.
1640 */
1641 for (i = 0; i <= physmap_idx; i += 2) {
1642 vm_offset_t end;
1643
1644 end = ptoa(Maxmem);
1645 if (physmap[i + 1] < end)
1646 end = trunc_page(physmap[i + 1]);
1647 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1648 int tmp, page_bad;
1649#if 0
1650 int *ptr = 0;
1651#else
1652 int *ptr = (int *)CADDR1;
1653#endif
1654
1655 /*
1656 * block out kernel memory as not available.
1657 */
1658 if (pa >= 0x100000 && pa < first)
1659 continue;
1660
28abdbbb
HS
1661 /*
1662 * block out dcons buffer
1663 */
1664 if (dcons_addr > 0
1665 && pa >= trunc_page(dcons_addr)
1666 && pa < dcons_addr + dcons_size)
1667 continue;
1668
984263bc
MD
1669 page_bad = FALSE;
1670
1671 /*
1672 * map page into kernel: valid, read/write,non-cacheable
1673 */
1674 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1675 cpu_invltlb();
984263bc
MD
1676
1677 tmp = *(int *)ptr;
1678 /*
1679 * Test for alternating 1's and 0's
1680 */
1681 *(volatile int *)ptr = 0xaaaaaaaa;
1682 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1683 page_bad = TRUE;
1684 }
1685 /*
1686 * Test for alternating 0's and 1's
1687 */
1688 *(volatile int *)ptr = 0x55555555;
1689 if (*(volatile int *)ptr != 0x55555555) {
1690 page_bad = TRUE;
1691 }
1692 /*
1693 * Test for all 1's
1694 */
1695 *(volatile int *)ptr = 0xffffffff;
1696 if (*(volatile int *)ptr != 0xffffffff) {
1697 page_bad = TRUE;
1698 }
1699 /*
1700 * Test for all 0's
1701 */
1702 *(volatile int *)ptr = 0x0;
1703 if (*(volatile int *)ptr != 0x0) {
1704 page_bad = TRUE;
1705 }
1706 /*
1707 * Restore original value.
1708 */
1709 *(int *)ptr = tmp;
1710
1711 /*
1712 * Adjust array of valid/good pages.
1713 */
1714 if (page_bad == TRUE) {
1715 continue;
1716 }
1717 /*
1718 * If this good page is a continuation of the
1719 * previous set of good pages, then just increase
1720 * the end pointer. Otherwise start a new chunk.
1721 * Note that "end" points one higher than end,
1722 * making the range >= start and < end.
1723 * If we're also doing a speculative memory
1724 * test and we at or past the end, bump up Maxmem
1725 * so that we keep going. The first bad page
1726 * will terminate the loop.
1727 */
1728 if (phys_avail[pa_indx] == pa) {
1729 phys_avail[pa_indx] += PAGE_SIZE;
1730 } else {
1731 pa_indx++;
ff1a75a1 1732 if (pa_indx >= PHYSMAP_ENTRIES*2) {
984263bc
MD
1733 printf("Too many holes in the physical address space, giving up\n");
1734 pa_indx--;
1735 break;
1736 }
1737 phys_avail[pa_indx++] = pa; /* start */
1738 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1739 }
1740 physmem++;
1741 }
1742 }
1743 *pte = 0;
0f7a3396 1744 cpu_invltlb();
984263bc
MD
1745
1746 /*
1747 * XXX
1748 * The last chunk must contain at least one page plus the message
1749 * buffer to avoid complicating other code (message buffer address
1750 * calculation, etc.).
1751 */
1752 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1753 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1754 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1755 phys_avail[pa_indx--] = 0;
1756 phys_avail[pa_indx--] = 0;
1757 }
1758
1759 Maxmem = atop(phys_avail[pa_indx]);
1760
1761 /* Trim off space for the message buffer. */
1762 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1763
1764 avail_end = phys_avail[pa_indx];
1765}
1766
f7bc9806
MD
1767/*
1768 * IDT VECTORS:
1769 * 0 Divide by zero
1770 * 1 Debug
1771 * 2 NMI
1772 * 3 BreakPoint
1773 * 4 OverFlow
1774 * 5 Bound-Range
1775 * 6 Invalid OpCode
1776 * 7 Device Not Available (x87)
1777 * 8 Double-Fault
1778 * 9 Coprocessor Segment overrun (unsupported, reserved)
1779 * 10 Invalid-TSS
1780 * 11 Segment not present
1781 * 12 Stack
1782 * 13 General Protection
1783 * 14 Page Fault
1784 * 15 Reserved
1785 * 16 x87 FP Exception pending
1786 * 17 Alignment Check
1787 * 18 Machine Check
1788 * 19 SIMD floating point
1789 * 20-31 reserved
1790 * 32-255 INTn/external sources
1791 */
984263bc 1792void
17a9f566 1793init386(int first)
984263bc
MD
1794{
1795 struct gate_descriptor *gdp;
1796 int gsel_tss, metadata_missing, off, x;
85100692 1797 struct mdglobaldata *gd;
984263bc
MD
1798
1799 /*
1800 * Prevent lowering of the ipl if we call tsleep() early.
1801 */
85100692 1802 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1803 bzero(gd, sizeof(*gd));
984263bc 1804
85100692 1805 gd->mi.gd_curthread = &thread0;
984263bc
MD
1806
1807 atdevbase = ISA_HOLE_START + KERNBASE;
1808
1809 metadata_missing = 0;
1810 if (bootinfo.bi_modulep) {
1811 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1812 preload_bootstrap_relocate(KERNBASE);
1813 } else {
1814 metadata_missing = 1;
1815 }
1816 if (bootinfo.bi_envp)
1817 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1818
c5cc06e3
MD
1819 /*
1820 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1821 * at 0.
1822 */
4e8e646b 1823 ncpus = 1;
c5cc06e3 1824 ncpus2 = 1;
984263bc
MD
1825 /* Init basic tunables, hz etc */
1826 init_param1();
1827
1828 /*
1829 * make gdt memory segments, the code segment goes up to end of the
1830 * page with etext in it, the data segment goes to the end of
1831 * the address space
1832 */
1833 /*
1834 * XXX text protection is temporarily (?) disabled. The limit was
1835 * i386_btop(round_page(etext)) - 1.
1836 */
1837 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1838 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1839
984263bc
MD
1840 gdt_segs[GPRIV_SEL].ssd_limit =
1841 atop(sizeof(struct privatespace) - 1);
8ad65e08 1842 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1843 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1844 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1845
85100692 1846 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1847
84b592ba
MD
1848 /*
1849 * Note: on both UP and SMP curthread must be set non-NULL
1850 * early in the boot sequence because the system assumes
1851 * that 'curthread' is never NULL.
1852 */
984263bc
MD
1853
1854 for (x = 0; x < NGDT; x++) {
1855#ifdef BDE_DEBUGGER
1856 /* avoid overwriting db entries with APM ones */
1857 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1858 continue;
1859#endif
1860 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1861 }
1862
1863 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1864 r_gdt.rd_base = (int) gdt;
1865 lgdt(&r_gdt);
1866
73e4f7b9
MD
1867 mi_gdinit(&gd->mi, 0);
1868 cpu_gdinit(gd, 0);
f470d0c8 1869 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
73e4f7b9
MD
1870 lwkt_set_comm(&thread0, "thread0");
1871 proc0.p_addr = (void *)thread0.td_kstack;
065b709a
SS
1872 LIST_INIT(&proc0.p_lwps);
1873 LIST_INSERT_HEAD(&proc0.p_lwps, &proc0.p_lwp, lwp_list);
1874 proc0.p_lwp.lwp_thread = &thread0;
1875 proc0.p_lwp.lwp_proc = &proc0;
cb7f4ab1 1876 proc0.p_usched = usched_init();
98a7f915 1877 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1878 thread0.td_flags |= TDF_RUNNING;
73e4f7b9 1879 thread0.td_proc = &proc0;
ef09c3ed 1880 thread0.td_lwp = &proc0.p_lwp;
73e4f7b9 1881 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
e43a034f 1882 safepri = TDPRI_MAX;
73e4f7b9 1883
984263bc
MD
1884 /* make ldt memory segments */
1885 /*
1886 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1887 * should be spelled ...MAX_USER...
1888 */
1889 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1890 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1891 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1892 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1893
1894 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1895 lldt(_default_ldt);
17a9f566 1896 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1897 /* spinlocks and the BGL */
1898 init_locks();
984263bc
MD
1899
1900 /* exceptions */
f7bc9806
MD
1901 for (x = 0; x < NIDT; x++) {
1902#ifdef DEBUG_INTERRUPTS
1903 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904#else
1905 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906#endif
1907 }
984263bc
MD
1908 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1909 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1913 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1916 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1917 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1918 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1919 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1920 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1923 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1924 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1925 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1926 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1927 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1928 setidt(0x80, &IDTVEC(int0x80_syscall),
1929 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1930 setidt(0x81, &IDTVEC(int0x81_syscall),
1931 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
7062f5b4
EN
1932 setidt(0x82, &IDTVEC(int0x82_syscall),
1933 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1934
1935 r_idt.rd_limit = sizeof(idt0) - 1;
1936 r_idt.rd_base = (int) idt;
1937 lidt(&r_idt);
1938
1939 /*
1940 * Initialize the console before we print anything out.
1941 */
1942 cninit();
1943
1944 if (metadata_missing)
1945 printf("WARNING: loader(8) metadata is missing!\n");
1946
984263bc
MD
1947#if NISA >0
1948 isa_defaultirq();
1949#endif
1950 rand_initialize();
1951
1952#ifdef DDB
1953 kdb_init();
1954 if (boothowto & RB_KDB)
1955 Debugger("Boot flags requested debugger");
1956#endif
1957
1958 finishidentcpu(); /* Final stage of CPU initialization */
1959 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 initializecpu(); /* Initialize CPU registers */
1962
b7c628e4
MD
1963 /*
1964 * make an initial tss so cpu can get interrupt stack on syscall!
1965 * The 16 bytes is to save room for a VM86 context.
1966 */
17a9f566
MD
1967 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1968 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1969 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1970 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1971 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1972 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1973 ltr(gsel_tss);
1974
1975 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1976 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1977 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1978 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1979 dblfault_tss.tss_cr3 = (int)IdlePTD;
1980 dblfault_tss.tss_eip = (int) dblfault_handler;
1981 dblfault_tss.tss_eflags = PSL_KERNEL;
1982 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1983 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1984 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1985 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1986 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1987
1988 vm86_initialize();
1989 getmemsize(first);
1990 init_param2(physmem);
1991
1992 /* now running on new page tables, configured,and u/iom is accessible */
1993
1994 /* Map the message buffer. */
1995 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1996 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1997
1998 msgbufinit(msgbufp, MSGBUF_SIZE);
1999
2000 /* make a call gate to reenter kernel with */
2001 gdp = &ldt[LSYS5CALLS_SEL].gd;
2002
2003 x = (int) &IDTVEC(syscall);
2004 gdp->gd_looffset = x++;
2005 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2006 gdp->gd_stkcpy = 1;
2007 gdp->gd_type = SDT_SYS386CGT;
2008 gdp->gd_dpl = SEL_UPL;
2009 gdp->gd_p = 1;
2010 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2011
2012 /* XXX does this work? */
2013 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2014 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2015
2016 /* transfer to user mode */
2017
2018 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2019 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2020
2021 /* setup proc 0's pcb */
b7c628e4
MD
2022 thread0.td_pcb->pcb_flags = 0;
2023 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2024 thread0.td_pcb->pcb_ext = 0;
065b709a 2025 proc0.p_lwp.lwp_md.md_regs = &proc0_tf;
984263bc
MD
2026}
2027
8ad65e08 2028/*
17a9f566
MD
2029 * Initialize machine-dependant portions of the global data structure.
2030 * Note that the global data area and cpu0's idlestack in the private
2031 * data space were allocated in locore.
ef0fdad1
MD
2032 *
2033 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2034 *
2035 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2036 */
2037void
85100692 2038cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08 2039{
7d0bac62 2040 if (cpu)
a2a5ad0d 2041 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2042
f470d0c8
MD
2043 lwkt_init_thread(&gd->mi.gd_idlethread,
2044 gd->mi.gd_prvspace->idlestack,
d3d32139
MD
2045 sizeof(gd->mi.gd_prvspace->idlestack),
2046 TDF_MPSAFE, &gd->mi);
a2a5ad0d
MD
2047 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2048 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2049 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2050 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2051}
2052
0cd275af
MD
2053int
2054is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2055{
2056 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2057 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2058 return (TRUE);
2059 }
2060 return (FALSE);
2061}
2062
12e4aaff
MD
2063struct globaldata *
2064globaldata_find(int cpu)
2065{
2066 KKASSERT(cpu >= 0 && cpu < ncpus);
2067 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2068}
2069
984263bc
MD
2070#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2071static void f00f_hack(void *unused);
2072SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2073
2074static void
17a9f566
MD
2075f00f_hack(void *unused)
2076{
984263bc 2077 struct gate_descriptor *new_idt;
984263bc
MD
2078 vm_offset_t tmp;
2079
2080 if (!has_f00f_bug)
2081 return;
2082
2083 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2084
2085 r_idt.rd_limit = sizeof(idt0) - 1;
2086
2087 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2088 if (tmp == 0)
2089 panic("kmem_alloc returned 0");
2090 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2091 panic("kmem_alloc returned non-page-aligned memory");
2092 /* Put the first seven entries in the lower page */
2093 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2094 bcopy(idt, new_idt, sizeof(idt0));
2095 r_idt.rd_base = (int)new_idt;
2096 lidt(&r_idt);
2097 idt = new_idt;
2098 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2099 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2100 panic("vm_map_protect failed");
2101 return;
2102}
2103#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2104
2105int
2106ptrace_set_pc(p, addr)
2107 struct proc *p;
2108 unsigned long addr;
2109{
2110 p->p_md.md_regs->tf_eip = addr;
2111 return (0);
2112}
2113
2114int
e9182c58 2115ptrace_single_step(struct lwp *lp)
984263bc 2116{
e9182c58 2117 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
984263bc
MD
2118 return (0);
2119}
2120
2121int ptrace_read_u_check(p, addr, len)
2122 struct proc *p;
2123 vm_offset_t addr;
2124 size_t len;
2125{
2126 vm_offset_t gap;
2127
2128 if ((vm_offset_t) (addr + len) < addr)
2129 return EPERM;
2130 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2131 return 0;
2132
2133 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2134
2135 if ((vm_offset_t) addr < gap)
2136 return EPERM;
2137 if ((vm_offset_t) (addr + len) <=
2138 (vm_offset_t) (gap + sizeof(struct trapframe)))
2139 return 0;
2140 return EPERM;
2141}
2142
2143int ptrace_write_u(p, off, data)
2144 struct proc *p;
2145 vm_offset_t off;
2146 long data;
2147{
2148 struct trapframe frame_copy;
2149 vm_offset_t min;
2150 struct trapframe *tp;
2151
2152 /*
2153 * Privileged kernel state is scattered all over the user area.
2154 * Only allow write access to parts of regs and to fpregs.
2155 */
2156 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2157 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2158 tp = p->p_md.md_regs;
2159 frame_copy = *tp;
2160 *(int *)((char *)&frame_copy + (off - min)) = data;
2161 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2162 !CS_SECURE(frame_copy.tf_cs))
2163 return (EINVAL);
2164 *(int*)((char *)p->p_addr + off) = data;
2165 return (0);
2166 }
b7c628e4
MD
2167
2168 /*
2169 * The PCB is at the end of the user area YYY
2170 */
2171 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2172 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2173 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2174 *(int*)((char *)p->p_addr + off) = data;
2175 return (0);
2176 }
2177 return (EFAULT);
2178}
2179
2180int
e9182c58 2181fill_regs(struct lwp *lp, struct reg *regs)
984263bc
MD
2182{
2183 struct pcb *pcb;
2184 struct trapframe *tp;
2185
e9182c58 2186 tp = lp->lwp_md.md_regs;
984263bc
MD
2187 regs->r_fs = tp->tf_fs;
2188 regs->r_es = tp->tf_es;
2189 regs->r_ds = tp->tf_ds;
2190 regs->r_edi = tp->tf_edi;
2191 regs->r_esi = tp->tf_esi;
2192 regs->r_ebp = tp->tf_ebp;
2193 regs->r_ebx = tp->tf_ebx;
2194 regs->r_edx = tp->tf_edx;
2195 regs->r_ecx = tp->tf_ecx;
2196 regs->r_eax = tp->tf_eax;
2197 regs->r_eip = tp->tf_eip;
2198 regs->r_cs = tp->tf_cs;
2199 regs->r_eflags = tp->tf_eflags;
2200 regs->r_esp = tp->tf_esp;
2201 regs->r_ss = tp->tf_ss;
e9182c58 2202 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2203 regs->r_gs = pcb->pcb_gs;
2204 return (0);
2205}
2206
2207int
e9182c58 2208set_regs(struct lwp *lp, struct reg *regs)
984263bc
MD
2209{
2210 struct pcb *pcb;
2211 struct trapframe *tp;
2212
e9182c58 2213 tp = lp->lwp_md.md_regs;
984263bc
MD
2214 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2215 !CS_SECURE(regs->r_cs))
2216 return (EINVAL);
2217 tp->tf_fs = regs->r_fs;
2218 tp->tf_es = regs->r_es;
2219 tp->tf_ds = regs->r_ds;
2220 tp->tf_edi = regs->r_edi;
2221 tp->tf_esi = regs->r_esi;
2222 tp->tf_ebp = regs->r_ebp;
2223 tp->tf_ebx = regs->r_ebx;
2224 tp->tf_edx = regs->r_edx;
2225 tp->tf_ecx = regs->r_ecx;
2226 tp->tf_eax = regs->r_eax;
2227 tp->tf_eip = regs->r_eip;
2228 tp->tf_cs = regs->r_cs;
2229 tp->tf_eflags = regs->r_eflags;
2230 tp->tf_esp = regs->r_esp;
2231 tp->tf_ss = regs->r_ss;
e9182c58 2232 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2233 pcb->pcb_gs = regs->r_gs;
2234 return (0);
2235}
2236
642a6e88 2237#ifndef CPU_DISABLE_SSE
984263bc
MD
2238static void
2239fill_fpregs_xmm(sv_xmm, sv_87)
2240 struct savexmm *sv_xmm;
2241 struct save87 *sv_87;
2242{
c9faf524
RG
2243 struct env87 *penv_87 = &sv_87->sv_env;
2244 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2245 int i;
2246
2247 /* FPU control/status */
2248 penv_87->en_cw = penv_xmm->en_cw;
2249 penv_87->en_sw = penv_xmm->en_sw;
2250 penv_87->en_tw = penv_xmm->en_tw;
2251 penv_87->en_fip = penv_xmm->en_fip;
2252 penv_87->en_fcs = penv_xmm->en_fcs;
2253 penv_87->en_opcode = penv_xmm->en_opcode;
2254 penv_87->en_foo = penv_xmm->en_foo;
2255 penv_87->en_fos = penv_xmm->en_fos;
2256
2257 /* FPU registers */
2258 for (i = 0; i < 8; ++i)
2259 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2260
2261 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2262}
2263
2264static void
2265set_fpregs_xmm(sv_87, sv_xmm)
2266 struct save87 *sv_87;
2267 struct savexmm *sv_xmm;
2268{
c9faf524
RG
2269 struct env87 *penv_87 = &sv_87->sv_env;
2270 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2271 int i;
2272
2273 /* FPU control/status */
2274 penv_xmm->en_cw = penv_87->en_cw;
2275 penv_xmm->en_sw = penv_87->en_sw;
2276 penv_xmm->en_tw = penv_87->en_tw;
2277 penv_xmm->en_fip = penv_87->en_fip;
2278 penv_xmm->en_fcs = penv_87->en_fcs;
2279 penv_xmm->en_opcode = penv_87->en_opcode;
2280 penv_xmm->en_foo = penv_87->en_foo;
2281 penv_xmm->en_fos = penv_87->en_fos;
2282
2283 /* FPU registers */
2284 for (i = 0; i < 8; ++i)
2285 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2286
2287 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2288}
642a6e88 2289#endif /* CPU_DISABLE_SSE */
984263bc
MD
2290
2291int
e9182c58 2292fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
984263bc 2293{
642a6e88 2294#ifndef CPU_DISABLE_SSE
984263bc 2295 if (cpu_fxsr) {
e9182c58
SZ
2296 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2297 (struct save87 *)fpregs);
984263bc
MD
2298 return (0);
2299 }
642a6e88 2300#endif /* CPU_DISABLE_SSE */
e9182c58 2301 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2302 return (0);
2303}
2304
2305int
e9182c58 2306set_fpregs(struct lwp *lp, struct fpreg *fpregs)
984263bc 2307{
642a6e88 2308#ifndef CPU_DISABLE_SSE
984263bc
MD
2309 if (cpu_fxsr) {
2310 set_fpregs_xmm((struct save87 *)fpregs,
e9182c58 2311 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2312 return (0);
2313 }
642a6e88 2314#endif /* CPU_DISABLE_SSE */
e9182c58 2315 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2316 return (0);
2317}
2318
2319int
e9182c58 2320fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
984263bc 2321{
e9182c58 2322 if (lp == NULL) {
984263bc
MD
2323 dbregs->dr0 = rdr0();
2324 dbregs->dr1 = rdr1();
2325 dbregs->dr2 = rdr2();
2326 dbregs->dr3 = rdr3();
2327 dbregs->dr4 = rdr4();
2328 dbregs->dr5 = rdr5();
2329 dbregs->dr6 = rdr6();
2330 dbregs->dr7 = rdr7();
e9182c58
SZ
2331 } else {
2332 struct pcb *pcb;
2333
2334 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2335 dbregs->dr0 = pcb->pcb_dr0;
2336 dbregs->dr1 = pcb->pcb_dr1;
2337 dbregs->dr2 = pcb->pcb_dr2;
2338 dbregs->dr3 = pcb->pcb_dr3;
2339 dbregs->dr4 = 0;
2340 dbregs->dr5 = 0;
2341 dbregs->dr6 = pcb->pcb_dr6;
2342 dbregs->dr7 = pcb->pcb_dr7;
2343 }
2344 return (0);
2345}
2346
2347int
e9182c58 2348set_dbregs(struct lwp *lp, struct dbreg *dbregs)
984263bc 2349{
e9182c58 2350 if (lp == NULL) {
984263bc
MD
2351 load_dr0(dbregs->dr0);
2352 load_dr1(dbregs->dr1);
2353 load_dr2(dbregs->dr2);
2354 load_dr3(dbregs->dr3);
2355 load_dr4(dbregs->dr4);
2356 load_dr5(dbregs->dr5);
2357 load_dr6(dbregs->dr6);
2358 load_dr7(dbregs->dr7);
e9182c58
SZ
2359 } else {
2360 struct pcb *pcb;
2361 struct ucred *ucred;
2362 int i;
2363 uint32_t mask1, mask2;
2364
984263bc
MD
2365 /*
2366 * Don't let an illegal value for dr7 get set. Specifically,
2367 * check for undefined settings. Setting these bit patterns
2368 * result in undefined behaviour and can lead to an unexpected
2369 * TRCTRAP.
2370 */
2371 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2372 i++, mask1 <<= 2, mask2 <<= 2)
2373 if ((dbregs->dr7 & mask1) == mask2)
2374 return (EINVAL);
2375
e9182c58
SZ
2376 pcb = lp->lwp_thread->td_pcb;
2377 ucred = lp->lwp_proc->p_ucred;
2378
984263bc
MD
2379 /*
2380 * Don't let a process set a breakpoint that is not within the
2381 * process's address space. If a process could do this, it
2382 * could halt the system by setting a breakpoint in the kernel
2383 * (if ddb was enabled). Thus, we need to check to make sure
2384 * that no breakpoints are being enabled for addresses outside
2385 * process's address space, unless, perhaps, we were called by
2386 * uid 0.
2387 *
2388 * XXX - what about when the watched area of the user's
2389 * address space is written into from within the kernel
2390 * ... wouldn't that still cause a breakpoint to be generated
2391 * from within kernel mode?
2392 */
e9182c58
SZ
2393
2394 if (suser_cred(ucred, 0) != 0) {
984263bc
MD
2395 if (dbregs->dr7 & 0x3) {
2396 /* dr0 is enabled */
2397 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2398 return (EINVAL);
2399 }
e9182c58 2400
984263bc
MD
2401 if (dbregs->dr7 & (0x3<<2)) {
2402 /* dr1 is enabled */
2403 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2404 return (EINVAL);
2405 }
e9182c58 2406
984263bc
MD
2407 if (dbregs->dr7 & (0x3<<4)) {
2408 /* dr2 is enabled */
2409 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2410 return (EINVAL);
2411 }
e9182c58 2412
984263bc
MD
2413 if (dbregs->dr7 & (0x3<<6)) {
2414 /* dr3 is enabled */
2415 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2416 return (EINVAL);
2417 }
2418 }
e9182c58 2419
984263bc
MD
2420 pcb->pcb_dr0 = dbregs->dr0;
2421 pcb->pcb_dr1 = dbregs->dr1;
2422 pcb->pcb_dr2 = dbregs->dr2;
2423 pcb->pcb_dr3 = dbregs->dr3;
2424 pcb->pcb_dr6 = dbregs->dr6;
2425 pcb->pcb_dr7 = dbregs->dr7;
e9182c58 2426
984263bc
MD
2427 pcb->pcb_flags |= PCB_DBREGS;
2428 }
2429
2430 return (0);
2431}
2432
2433/*
2434 * Return > 0 if a hardware breakpoint has been hit, and the
2435 * breakpoint was in user space. Return 0, otherwise.
2436 */
2437int
2438user_dbreg_trap(void)
2439{
2440 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2441 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2442 int nbp; /* number of breakpoints that triggered */
2443 caddr_t addr[4]; /* breakpoint addresses */
2444 int i;
2445
2446 dr7 = rdr7();
2447 if ((dr7 & 0x000000ff) == 0) {
2448 /*
2449 * all GE and LE bits in the dr7 register are zero,
2450 * thus the trap couldn't have been caused by the
2451 * hardware debug registers
2452 */
2453 return 0;
2454 }
2455
2456 nbp = 0;
2457 dr6 = rdr6();
2458 bp = dr6 & 0x0000000f;
2459
2460 if (!bp) {
2461 /*
2462 * None of the breakpoint bits are set meaning this
2463 * trap was not caused by any of the debug registers
2464 */
2465 return 0;
2466 }
2467
2468 /*
2469 * at least one of the breakpoints were hit, check to see
2470 * which ones and if any of them are user space addresses
2471 */
2472
2473 if (bp & 0x01) {
2474 addr[nbp++] = (caddr_t)rdr0();
2475 }
2476 if (bp & 0x02) {
2477 addr[nbp++] = (caddr_t)rdr1();
2478 }
2479 if (bp & 0x04) {
2480 addr[nbp++] = (caddr_t)rdr2();
2481 }
2482 if (bp & 0x08) {
2483 addr[nbp++] = (caddr_t)rdr3();
2484 }
2485
2486 for (i=0; i<nbp; i++) {
2487 if (addr[i] <
2488 (caddr_t)VM_MAXUSER_ADDRESS) {
2489 /*
2490 * addr[i] is in user space
2491 */
2492 return nbp;
2493 }
2494 }
2495
2496 /*
2497 * None of the breakpoints are in user space.
2498 */
2499 return 0;
2500}
2501
2502
2503#ifndef DDB
2504void
2505Debugger(const char *msg)
2506{
2507 printf("Debugger(\"%s\") called.\n", msg);
2508}
2509#endif /* no DDB */
2510
2511#include <sys/disklabel.h>
2512
2513/*
2514 * Determine the size of the transfer, and make sure it is
2515 * within the boundaries of the partition. Adjust transfer
2516 * if needed, and signal errors or early completion.
81b5c339
MD
2517 *
2518 * On success a new bio layer is pushed with the translated
2519 * block number, and returned.
984263bc 2520 */
81b5c339
MD
2521struct bio *
2522bounds_check_with_label(dev_t dev, struct bio *bio,
2523 struct disklabel *lp, int wlabel)
984263bc 2524{
81b5c339
MD
2525 struct bio *nbio;
2526 struct buf *bp = bio->bio_buf;
2527 struct partition *p = lp->d_partitions + dkpart(dev);
984263bc
MD
2528 int labelsect = lp->d_partitions[0].p_offset;
2529 int maxsz = p->p_size,
2530 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2531
2532 /* overwriting disk label ? */
2533 /* XXX should also protect bootstrap in first 8K */
81b5c339 2534 if (bio->bio_blkno + p->p_offset <= LABELSECTOR + labelsect &&
984263bc 2535#if LABELSECTOR != 0
81b5c339 2536 bio->bio_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
984263bc
MD
2537#endif
2538 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2539 bp->b_error = EROFS;
2540 goto bad;
2541 }
2542
2543#if defined(DOSBBSECTOR) && defined(notyet)
2544 /* overwriting master boot record? */
81b5c339 2545 if (bio->bio_blkno + p->p_offset <= DOSBBSECTOR &&
984263bc
MD
2546 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2547 bp->b_error = EROFS;
2548 goto bad;
2549 }
2550#endif
2551
2552 /* beyond partition? */
81b5c339 2553 if (bio->bio_blkno < 0 || bio->bio_blkno + sz > maxsz) {
984263bc 2554 /* if exactly at end of disk, return an EOF */
81b5c339 2555 if (bio->bio_blkno == maxsz) {
984263bc
MD
2556 bp->b_resid = bp->b_bcount;
2557 return(0);
2558 }
2559 /* or truncate if part of it fits */
81b5c339 2560 sz = maxsz - bio->bio_blkno;
984263bc
MD
2561 if (sz <= 0) {
2562 bp->b_error = EINVAL;
2563 goto bad;
2564 }
2565 bp->b_bcount = sz << DEV_BSHIFT;
2566 }
81b5c339
MD
2567 nbio = push_bio(bio);
2568 nbio->bio_blkno = bio->bio_blkno + p->p_offset;
2569 return (nbio);
984263bc
MD
2570
2571bad:
2572 bp->b_flags |= B_ERROR;
81b5c339 2573 return (NULL);
984263bc
MD
2574}
2575
2576#ifdef DDB
2577
2578/*
2579 * Provide inb() and outb() as functions. They are normally only
2580 * available as macros calling inlined functions, thus cannot be
2581 * called inside DDB.
2582 *
2583 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2584 */
2585
2586#undef inb
2587#undef outb
2588
2589/* silence compiler warnings */
2590u_char inb(u_int);
2591void outb(u_int, u_char);
2592
2593u_char
2594inb(u_int port)
2595{
2596 u_char data;
2597 /*
2598 * We use %%dx and not %1 here because i/o is done at %dx and not at
2599 * %edx, while gcc generates inferior code (movw instead of movl)
2600 * if we tell it to load (u_short) port.
2601 */
2602 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2603 return (data);
2604}
2605
2606void
2607outb(u_int port, u_char data)
2608{
2609 u_char al;
2610 /*
2611 * Use an unnecessary assignment to help gcc's register allocator.
2612 * This make a large difference for gcc-1.40 and a tiny difference
2613 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2614 * best results. gcc-2.6.0 can't handle this.
2615 */
2616 al = data;
2617 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2618}
2619
2620#endif /* DDB */
8a8d5d85
MD
2621
2622
2623
2624#include "opt_cpu.h"
8a8d5d85
MD
2625
2626
2627/*
2628 * initialize all the SMP locks
2629 */
2630
97359a5b 2631/* critical region when masking or unmasking interupts */
b1af91cb 2632struct spinlock_deprecated imen_spinlock;
8a8d5d85
MD
2633
2634/* Make FAST_INTR() routines sequential */
b1af91cb 2635struct spinlock_deprecated fast_intr_spinlock;
8a8d5d85
MD
2636
2637/* critical region for old style disable_intr/enable_intr */
b1af91cb 2638struct spinlock_deprecated mpintr_spinlock;
8a8d5d85
MD
2639
2640/* critical region around INTR() routines */
b1af91cb 2641struct spinlock_deprecated intr_spinlock;
8a8d5d85
MD
2642
2643/* lock region used by kernel profiling */
b1af91cb 2644struct spinlock_deprecated mcount_spinlock;
8a8d5d85
MD
2645
2646/* locks com (tty) data/hardware accesses: a FASTINTR() */
b1af91cb 2647struct spinlock_deprecated com_spinlock;
8a8d5d85
MD
2648
2649/* locks kernel printfs */
b1af91cb 2650struct spinlock_deprecated cons_spinlock;
8a8d5d85
MD
2651
2652/* lock regions around the clock hardware */
b1af91cb 2653struct spinlock_deprecated clock_spinlock;
8a8d5d85
MD
2654
2655/* lock around the MP rendezvous */
b1af91cb 2656struct spinlock_deprecated smp_rv_spinlock;
8a8d5d85
MD
2657
2658static void
2659init_locks(void)
2660{
2661 /*
2662 * mp_lock = 0; BSP already owns the MP lock
2663 */
2664 /*
2665 * Get the initial mp_lock with a count of 1 for the BSP.
2666 * This uses a LOGICAL cpu ID, ie BSP == 0.
2667 */
2668#ifdef SMP
2669 cpu_get_initial_mplock();
2670#endif
41a01a4d 2671 /* DEPRECATED */
8a8d5d85
MD
2672 spin_lock_init(&mcount_spinlock);
2673 spin_lock_init(&fast_intr_spinlock);
2674 spin_lock_init(&intr_spinlock);
2675 spin_lock_init(&mpintr_spinlock);
2676 spin_lock_init(&imen_spinlock);
2677 spin_lock_init(&smp_rv_spinlock);
2678 spin_lock_init(&com_spinlock);
2679 spin_lock_init(&clock_spinlock);
2680 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2681
2682 /* our token pool needs to work early */
2683 lwkt_token_pool_init();
8a8d5d85
MD
2684}
2685