Silence warnings regarding yyunput being defined and never used.
[dragonfly.git] / sys / dev / agp / agp.c
CommitLineData
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1/*-
2 * Copyright (c) 2000 Doug Rabson
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/pci/agp.c,v 1.3.2.4 2002/08/11 19:58:12 alc Exp $
efda3bd0 27 * $DragonFly: src/sys/dev/agp/agp.c,v 1.23 2006/09/05 00:55:36 dillon Exp $
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28 */
29
30#include "opt_bus.h"
31#include "opt_pci.h"
32
33#include <sys/param.h>
34#include <sys/systm.h>
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35#include <sys/device.h>
36#include <sys/conf.h>
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37#include <sys/malloc.h>
38#include <sys/kernel.h>
39#include <sys/bus.h>
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40#include <sys/ioccom.h>
41#include <sys/agpio.h>
42#include <sys/lock.h>
43#include <sys/proc.h>
44
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45#include <bus/pci/pcivar.h>
46#include <bus/pci/pcireg.h>
47#include "agppriv.h"
48#include "agpvar.h"
49#include "agpreg.h"
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50
51#include <vm/vm.h>
52#include <vm/vm_object.h>
53#include <vm/vm_page.h>
54#include <vm/vm_pageout.h>
55#include <vm/pmap.h>
56
57#include <machine/md_var.h>
58#include <machine/bus.h>
59#include <machine/resource.h>
60#include <sys/rman.h>
61
62MODULE_VERSION(agp, 1);
63
64MALLOC_DEFINE(M_AGP, "agp", "AGP data structures");
65
66#define CDEV_MAJOR 148
67 /* agp_drv.c */
68static d_open_t agp_open;
69static d_close_t agp_close;
70static d_ioctl_t agp_ioctl;
71static d_mmap_t agp_mmap;
72
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73static struct dev_ops agp_ops = {
74 { "agp", CDEV_MAJOR, D_TTY },
75 .d_open = agp_open,
76 .d_close = agp_close,
77 .d_ioctl = agp_ioctl,
78 .d_mmap = agp_mmap,
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79};
80
81static devclass_t agp_devclass;
82#define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev))
83
84/* Helper functions for implementing chipset mini drivers. */
85
86void
c436375a 87agp_flush_cache(void)
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88{
89#ifdef __i386__
90 wbinvd();
91#endif
92}
93
94u_int8_t
95agp_find_caps(device_t dev)
96{
97 u_int32_t status;
98 u_int8_t ptr, next;
99
100 /*
101 * Check the CAP_LIST bit of the PCI status register first.
102 */
103 status = pci_read_config(dev, PCIR_STATUS, 2);
104 if (!(status & 0x10))
105 return 0;
106
107 /*
108 * Traverse the capabilities list.
109 */
110 for (ptr = pci_read_config(dev, AGP_CAPPTR, 1);
111 ptr != 0;
112 ptr = next) {
113 u_int32_t capid = pci_read_config(dev, ptr, 4);
114 next = AGP_CAPID_GET_NEXT_PTR(capid);
115
116 /*
117 * If this capability entry ID is 2, then we are done.
118 */
119 if (AGP_CAPID_GET_CAP_ID(capid) == 2)
120 return ptr;
121 }
122
123 return 0;
124}
125
126/*
127 * Find an AGP display device (if any).
128 */
129static device_t
130agp_find_display(void)
131{
132 devclass_t pci = devclass_find("pci");
133 device_t bus, dev = 0;
134 device_t *kids;
135 int busnum, numkids, i;
136
137 for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) {
138 bus = devclass_get_device(pci, busnum);
139 if (!bus)
140 continue;
141 device_get_children(bus, &kids, &numkids);
142 for (i = 0; i < numkids; i++) {
143 dev = kids[i];
144 if (pci_get_class(dev) == PCIC_DISPLAY
145 && pci_get_subclass(dev) == PCIS_DISPLAY_VGA)
146 if (agp_find_caps(dev)) {
efda3bd0 147 kfree(kids, M_TEMP);
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148 return dev;
149 }
150
151 }
efda3bd0 152 kfree(kids, M_TEMP);
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153 }
154
155 return 0;
156}
157
158struct agp_gatt *
159agp_alloc_gatt(device_t dev)
160{
161 u_int32_t apsize = AGP_GET_APERTURE(dev);
162 u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
163 struct agp_gatt *gatt;
164
165 if (bootverbose)
166 device_printf(dev,
167 "allocating GATT for aperture of size %dM\n",
168 apsize / (1024*1024));
169
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170 if (entries == 0) {
171 device_printf(dev, "bad aperture size\n");
172 return NULL;
173 }
174
efda3bd0 175 gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_INTWAIT);
984263bc 176 gatt->ag_entries = entries;
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177 gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP,
178 M_WAITOK, 0, ~0, PAGE_SIZE, 0);
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179 if (!gatt->ag_virtual) {
180 if (bootverbose)
181 device_printf(dev, "contiguous allocation failed\n");
efda3bd0 182 kfree(gatt, M_AGP);
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183 return 0;
184 }
185 bzero(gatt->ag_virtual, entries * sizeof(u_int32_t));
186 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
187 agp_flush_cache();
188
189 return gatt;
190}
191
192void
193agp_free_gatt(struct agp_gatt *gatt)
194{
195 contigfree(gatt->ag_virtual,
196 gatt->ag_entries * sizeof(u_int32_t), M_AGP);
efda3bd0 197 kfree(gatt, M_AGP);
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198}
199
200static int agp_max[][2] = {
201 {0, 0},
202 {32, 4},
203 {64, 28},
204 {128, 96},
205 {256, 204},
206 {512, 440},
207 {1024, 942},
208 {2048, 1920},
209 {4096, 3932}
210};
211#define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0]))
212
213int
214agp_generic_attach(device_t dev)
215{
216 struct agp_softc *sc = device_get_softc(dev);
217 int rid, memsize, i;
218
219 /*
220 * Find and map the aperture.
221 */
222 rid = AGP_APBASE;
223 sc->as_aperture = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
224 0, ~0, 1, RF_ACTIVE);
225 if (!sc->as_aperture)
226 return ENOMEM;
227
228 /*
229 * Work out an upper bound for agp memory allocation. This
230 * uses a heurisitc table from the Linux driver.
231 */
232 memsize = ptoa(Maxmem) >> 20;
233 for (i = 0; i < agp_max_size; i++) {
234 if (memsize <= agp_max[i][0])
235 break;
236 }
237 if (i == agp_max_size) i = agp_max_size - 1;
238 sc->as_maxmem = agp_max[i][1] << 20U;
239
240 /*
241 * The lock is used to prevent re-entry to
242 * agp_generic_bind_memory() since that function can sleep.
243 */
f2770c70 244 lockinit(&sc->as_lock, "agplk", 0, 0);
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245
246 /*
247 * Initialise stuff for the userland device.
248 */
249 agp_devclass = devclass_find("agp");
250 TAILQ_INIT(&sc->as_memory);
251 sc->as_nextid = 1;
252
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253 dev_ops_add(&agp_ops, -1, device_get_unit(dev));
254 make_dev(&agp_ops, device_get_unit(dev), UID_ROOT, GID_WHEEL,
e4c9c0c8 255 0600, "agpgart");
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256
257 return 0;
258}
259
260int
261agp_generic_detach(device_t dev)
262{
263 struct agp_softc *sc = device_get_softc(dev);
f21c8116 264
984263bc 265 bus_release_resource(dev, SYS_RES_MEMORY, AGP_APBASE, sc->as_aperture);
984263bc 266 agp_flush_cache();
fef8985e 267 dev_ops_remove(&agp_ops, -1, device_get_unit(dev));
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268 return 0;
269}
270
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271/*
272 * This does the enable logic for v3, with the same topology
273 * restrictions as in place for v2 -- one bus, one device on the bus.
274 */
275static int
276agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode)
984263bc 277{
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278 u_int32_t tstatus, mstatus;
279 u_int32_t command;
f7841f3c 280 int rq, sba, fw, rate, arqsz, cal;
984263bc 281
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282 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4);
283 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4);
284
285 /* Set RQ to the min of mode, tstatus and mstatus */
286 rq = AGP_MODE_GET_RQ(mode);
287 if (AGP_MODE_GET_RQ(tstatus) < rq)
288 rq = AGP_MODE_GET_RQ(tstatus);
289 if (AGP_MODE_GET_RQ(mstatus) < rq)
290 rq = AGP_MODE_GET_RQ(mstatus);
291
292 /*
293 * ARQSZ - Set the value to the maximum one.
294 * Don't allow the mode register to override values.
295 */
296 arqsz = AGP_MODE_GET_ARQSZ(mode);
297 if (AGP_MODE_GET_ARQSZ(tstatus) > rq)
298 rq = AGP_MODE_GET_ARQSZ(tstatus);
299 if (AGP_MODE_GET_ARQSZ(mstatus) > rq)
300 rq = AGP_MODE_GET_ARQSZ(mstatus);
301
302 /* Calibration cycle - don't allow override by mode register */
303 cal = AGP_MODE_GET_CAL(tstatus);
304 if (AGP_MODE_GET_CAL(mstatus) < cal)
305 cal = AGP_MODE_GET_CAL(mstatus);
306
307 /* SBA must be supported for AGP v3. */
308 sba = 1;
309
310 /* Set FW if all three support it. */
311 fw = (AGP_MODE_GET_FW(tstatus)
312 & AGP_MODE_GET_FW(mstatus)
313 & AGP_MODE_GET_FW(mode));
314
315 /* Figure out the max rate */
316 rate = (AGP_MODE_GET_RATE(tstatus)
317 & AGP_MODE_GET_RATE(mstatus)
318 & AGP_MODE_GET_RATE(mode));
319 if (rate & AGP_MODE_V3_RATE_8x)
320 rate = AGP_MODE_V3_RATE_8x;
321 else
322 rate = AGP_MODE_V3_RATE_4x;
323 if (bootverbose)
324 device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4);
325
326 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4);
327
328 /* Construct the new mode word and tell the hardware */
329 command = AGP_MODE_SET_RQ(0, rq);
330 command = AGP_MODE_SET_ARQSZ(command, arqsz);
331 command = AGP_MODE_SET_CAL(command, cal);
332 command = AGP_MODE_SET_SBA(command, sba);
333 command = AGP_MODE_SET_FW(command, fw);
334 command = AGP_MODE_SET_RATE(command, rate);
335 command = AGP_MODE_SET_AGP(command, 1);
336 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4);
337 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4);
338
339 return 0;
340}
341
342static int
343agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode)
344{
345 u_int32_t tstatus, mstatus;
346 u_int32_t command;
347 int rq, sba, fw, rate;
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348
349 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4);
350 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4);
351
352 /* Set RQ to the min of mode, tstatus and mstatus */
353 rq = AGP_MODE_GET_RQ(mode);
354 if (AGP_MODE_GET_RQ(tstatus) < rq)
355 rq = AGP_MODE_GET_RQ(tstatus);
356 if (AGP_MODE_GET_RQ(mstatus) < rq)
357 rq = AGP_MODE_GET_RQ(mstatus);
358
359 /* Set SBA if all three can deal with SBA */
360 sba = (AGP_MODE_GET_SBA(tstatus)
361 & AGP_MODE_GET_SBA(mstatus)
362 & AGP_MODE_GET_SBA(mode));
363
364 /* Similar for FW */
365 fw = (AGP_MODE_GET_FW(tstatus)
366 & AGP_MODE_GET_FW(mstatus)
367 & AGP_MODE_GET_FW(mode));
368
369 /* Figure out the max rate */
370 rate = (AGP_MODE_GET_RATE(tstatus)
371 & AGP_MODE_GET_RATE(mstatus)
372 & AGP_MODE_GET_RATE(mode));
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373 if (rate & AGP_MODE_V2_RATE_4x)
374 rate = AGP_MODE_V2_RATE_4x;
375 else if (rate & AGP_MODE_V2_RATE_2x)
376 rate = AGP_MODE_V2_RATE_2x;
984263bc 377 else
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378 rate = AGP_MODE_V2_RATE_1x;
379 if (bootverbose)
380 device_printf(dev, "Setting AGP v2 mode %d\n", rate);
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381
382 /* Construct the new mode word and tell the hardware */
383 command = AGP_MODE_SET_RQ(0, rq);
384 command = AGP_MODE_SET_SBA(command, sba);
385 command = AGP_MODE_SET_FW(command, fw);
386 command = AGP_MODE_SET_RATE(command, rate);
387 command = AGP_MODE_SET_AGP(command, 1);
388 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4);
389 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4);
390
391 return 0;
392}
393
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394int
395agp_generic_enable(device_t dev, u_int32_t mode)
396{
397 device_t mdev = agp_find_display();
398 u_int32_t tstatus, mstatus;
399
400 if (!mdev) {
401 AGP_DPF("can't find display\n");
402 return ENXIO;
403 }
404
405 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4);
406 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4);
407
408 /*
409 * Check display and bridge for AGP v3 support. AGP v3 allows
410 * more variety in topology than v2, e.g. multiple AGP devices
411 * attached to one bridge, or multiple AGP bridges in one
412 * system. This doesn't attempt to address those situations,
413 * but should work fine for a classic single AGP slot system
414 * with AGP v3.
415 */
416 if (AGP_MODE_GET_MODE_3(tstatus) && AGP_MODE_GET_MODE_3(mstatus))
417 return (agp_v3_enable(dev, mdev, mode));
418 else
419 return (agp_v2_enable(dev, mdev, mode));
420}
421
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422struct agp_memory *
423agp_generic_alloc_memory(device_t dev, int type, vm_size_t size)
424{
425 struct agp_softc *sc = device_get_softc(dev);
426 struct agp_memory *mem;
427
428 if ((size & (AGP_PAGE_SIZE - 1)) != 0)
429 return 0;
430
431 if (sc->as_allocated + size > sc->as_maxmem)
432 return 0;
433
434 if (type != 0) {
435 printf("agp_generic_alloc_memory: unsupported type %d\n",
436 type);
437 return 0;
438 }
439
efda3bd0 440 mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
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441 mem->am_id = sc->as_nextid++;
442 mem->am_size = size;
443 mem->am_type = 0;
444 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size)));
445 mem->am_physical = 0;
446 mem->am_offset = 0;
447 mem->am_is_bound = 0;
448 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link);
449 sc->as_allocated += size;
450
451 return mem;
452}
453
454int
455agp_generic_free_memory(device_t dev, struct agp_memory *mem)
456{
457 struct agp_softc *sc = device_get_softc(dev);
458
459 if (mem->am_is_bound)
460 return EBUSY;
461
462 sc->as_allocated -= mem->am_size;
463 TAILQ_REMOVE(&sc->as_memory, mem, am_link);
464 vm_object_deallocate(mem->am_obj);
efda3bd0 465 kfree(mem, M_AGP);
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466 return 0;
467}
468
469int
470agp_generic_bind_memory(device_t dev, struct agp_memory *mem,
471 vm_offset_t offset)
472{
473 struct agp_softc *sc = device_get_softc(dev);
474 vm_offset_t i, j, k;
475 vm_page_t m;
476 int error;
477
df4f70a6 478 lockmgr(&sc->as_lock, LK_EXCLUSIVE);
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479
480 if (mem->am_is_bound) {
481 device_printf(dev, "memory already bound\n");
df4f70a6 482 lockmgr(&sc->as_lock, LK_RELEASE);
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483 return EINVAL;
484 }
485
486 if (offset < 0
487 || (offset & (AGP_PAGE_SIZE - 1)) != 0
488 || offset + mem->am_size > AGP_GET_APERTURE(dev)) {
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489 device_printf(dev, "binding memory at bad offset %#x,%#x,%#x\n",
490 (int) offset, (int)mem->am_size,
491 (int)AGP_GET_APERTURE(dev));
492 printf("Check BIOS's aperature size vs X\n");
df4f70a6 493 lockmgr(&sc->as_lock, LK_RELEASE);
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494 return EINVAL;
495 }
496
497 /*
498 * Bind the individual pages and flush the chipset's
499 * TLB.
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500 */
501 for (i = 0; i < mem->am_size; i += PAGE_SIZE) {
502 /*
503 * Find a page from the object and wire it
504 * down. This page will be mapped using one or more
505 * entries in the GATT (assuming that PAGE_SIZE >=
506 * AGP_PAGE_SIZE. If this is the first call to bind,
507 * the pages will be allocated and zeroed.
508 */
509 m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i),
dc1fd4b3 510 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
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511 if ((m->flags & PG_ZERO) == 0)
512 vm_page_zero_fill(m);
513 AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m));
514 vm_page_wire(m);
515
516 /*
517 * Install entries in the GATT, making sure that if
518 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not
519 * aligned to PAGE_SIZE, we don't modify too many GATT
520 * entries.
521 */
522 for (j = 0; j < PAGE_SIZE && i + j < mem->am_size;
523 j += AGP_PAGE_SIZE) {
524 vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j;
525 AGP_DPF("binding offset %#x to pa %#x\n",
526 offset + i + j, pa);
527 error = AGP_BIND_PAGE(dev, offset + i + j, pa);
528 if (error) {
529 /*
530 * Bail out. Reverse all the mappings
531 * and unwire the pages.
532 */
533 vm_page_wakeup(m);
534 for (k = 0; k < i + j; k += AGP_PAGE_SIZE)
535 AGP_UNBIND_PAGE(dev, offset + k);
536 for (k = 0; k <= i; k += PAGE_SIZE) {
537 m = vm_page_lookup(mem->am_obj,
538 OFF_TO_IDX(k));
539 vm_page_unwire(m, 0);
540 }
df4f70a6 541 lockmgr(&sc->as_lock, LK_RELEASE);
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542 return error;
543 }
544 }
545 vm_page_wakeup(m);
546 }
547
548 /*
549 * Flush the cpu cache since we are providing a new mapping
550 * for these pages.
551 */
552 agp_flush_cache();
553
554 /*
555 * Make sure the chipset gets the new mappings.
556 */
557 AGP_FLUSH_TLB(dev);
558
559 mem->am_offset = offset;
560 mem->am_is_bound = 1;
561
df4f70a6 562 lockmgr(&sc->as_lock, LK_RELEASE);
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563
564 return 0;
565}
566
567int
568agp_generic_unbind_memory(device_t dev, struct agp_memory *mem)
569{
570 struct agp_softc *sc = device_get_softc(dev);
571 vm_page_t m;
572 int i;
573
df4f70a6 574 lockmgr(&sc->as_lock, LK_EXCLUSIVE);
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575
576 if (!mem->am_is_bound) {
577 device_printf(dev, "memory is not bound\n");
df4f70a6 578 lockmgr(&sc->as_lock, LK_RELEASE);
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579 return EINVAL;
580 }
581
582
583 /*
584 * Unbind the individual pages and flush the chipset's
585 * TLB. Unwire the pages so they can be swapped.
586 */
587 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
588 AGP_UNBIND_PAGE(dev, mem->am_offset + i);
589 for (i = 0; i < mem->am_size; i += PAGE_SIZE) {
590 m = vm_page_lookup(mem->am_obj, atop(i));
591 vm_page_unwire(m, 0);
592 }
593
594 agp_flush_cache();
595 AGP_FLUSH_TLB(dev);
596
597 mem->am_offset = 0;
598 mem->am_is_bound = 0;
599
df4f70a6 600 lockmgr(&sc->as_lock, LK_RELEASE);
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601
602 return 0;
603}
604
605/* Helper functions for implementing user/kernel api */
606
607static int
608agp_acquire_helper(device_t dev, enum agp_acquire_state state)
609{
610 struct agp_softc *sc = device_get_softc(dev);
611
612 if (sc->as_state != AGP_ACQUIRE_FREE)
613 return EBUSY;
614 sc->as_state = state;
615
616 return 0;
617}
618
619static int
620agp_release_helper(device_t dev, enum agp_acquire_state state)
621{
622 struct agp_softc *sc = device_get_softc(dev);
623
624 if (sc->as_state == AGP_ACQUIRE_FREE)
625 return 0;
626
627 if (sc->as_state != state)
628 return EBUSY;
629
630 sc->as_state = AGP_ACQUIRE_FREE;
631 return 0;
632}
633
634static struct agp_memory *
635agp_find_memory(device_t dev, int id)
636{
637 struct agp_softc *sc = device_get_softc(dev);
638 struct agp_memory *mem;
639
640 AGP_DPF("searching for memory block %d\n", id);
641 TAILQ_FOREACH(mem, &sc->as_memory, am_link) {
642 AGP_DPF("considering memory block %d\n", mem->am_id);
643 if (mem->am_id == id)
644 return mem;
645 }
646 return 0;
647}
648
649/* Implementation of the userland ioctl api */
650
651static int
652agp_info_user(device_t dev, agp_info *info)
653{
654 struct agp_softc *sc = device_get_softc(dev);
655
656 bzero(info, sizeof *info);
657 info->bridge_id = pci_get_devid(dev);
658 info->agp_mode =
659 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4);
660 info->aper_base = rman_get_start(sc->as_aperture);
661 info->aper_size = AGP_GET_APERTURE(dev) >> 20;
662 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT;
663 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT;
664
665 return 0;
666}
667
668static int
669agp_setup_user(device_t dev, agp_setup *setup)
670{
671 return AGP_ENABLE(dev, setup->agp_mode);
672}
673
674static int
675agp_allocate_user(device_t dev, agp_allocate *alloc)
676{
677 struct agp_memory *mem;
678
679 mem = AGP_ALLOC_MEMORY(dev,
680 alloc->type,
681 alloc->pg_count << AGP_PAGE_SHIFT);
682 if (mem) {
683 alloc->key = mem->am_id;
684 alloc->physical = mem->am_physical;
685 return 0;
686 } else {
687 return ENOMEM;
688 }
689}
690
691static int
692agp_deallocate_user(device_t dev, int id)
693{
fc6d0222 694 struct agp_memory *mem = agp_find_memory(dev, id);
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695
696 if (mem) {
697 AGP_FREE_MEMORY(dev, mem);
698 return 0;
699 } else {
700 return ENOENT;
701 }
702}
703
704static int
705agp_bind_user(device_t dev, agp_bind *bind)
706{
707 struct agp_memory *mem = agp_find_memory(dev, bind->key);
708
709 if (!mem)
710 return ENOENT;
711
712 return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT);
713}
714
715static int
716agp_unbind_user(device_t dev, agp_unbind *unbind)
717{
718 struct agp_memory *mem = agp_find_memory(dev, unbind->key);
719
720 if (!mem)
721 return ENOENT;
722
723 return AGP_UNBIND_MEMORY(dev, mem);
724}
725
726static int
fef8985e 727agp_open(struct dev_open_args *ap)
984263bc 728{
fef8985e 729 dev_t kdev = ap->a_head.a_dev;
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730 device_t dev = KDEV2DEV(kdev);
731 struct agp_softc *sc = device_get_softc(dev);
732
733 if (!sc->as_isopen) {
734 sc->as_isopen = 1;
735 device_busy(dev);
736 }
737
738 return 0;
739}
740
741static int
fef8985e 742agp_close(struct dev_close_args *ap)
984263bc 743{
fef8985e 744 dev_t kdev = ap->a_head.a_dev;
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745 device_t dev = KDEV2DEV(kdev);
746 struct agp_softc *sc = device_get_softc(dev);
747 struct agp_memory *mem;
748
749 /*
750 * Clear the GATT and force release on last close
751 */
752 while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) {
753 if (mem->am_is_bound)
754 AGP_UNBIND_MEMORY(dev, mem);
755 AGP_FREE_MEMORY(dev, mem);
756 }
757 if (sc->as_state == AGP_ACQUIRE_USER)
758 agp_release_helper(dev, AGP_ACQUIRE_USER);
759 sc->as_isopen = 0;
760 device_unbusy(dev);
761
762 return 0;
763}
764
765static int
fef8985e 766agp_ioctl(struct dev_ioctl_args *ap)
984263bc 767{
fef8985e 768 dev_t kdev = ap->a_head.a_dev;
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769 device_t dev = KDEV2DEV(kdev);
770
fef8985e 771 switch (ap->a_cmd) {
984263bc 772 case AGPIOC_INFO:
fef8985e 773 return agp_info_user(dev, (agp_info *)ap->a_data);
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774
775 case AGPIOC_ACQUIRE:
776 return agp_acquire_helper(dev, AGP_ACQUIRE_USER);
777
778 case AGPIOC_RELEASE:
779 return agp_release_helper(dev, AGP_ACQUIRE_USER);
780
781 case AGPIOC_SETUP:
fef8985e 782 return agp_setup_user(dev, (agp_setup *)ap->a_data);
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783
784 case AGPIOC_ALLOCATE:
fef8985e 785 return agp_allocate_user(dev, (agp_allocate *)ap->a_data);
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786
787 case AGPIOC_DEALLOCATE:
fef8985e 788 return agp_deallocate_user(dev, *(int *)ap->a_data);
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789
790 case AGPIOC_BIND:
fef8985e 791 return agp_bind_user(dev, (agp_bind *)ap->a_data);
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792
793 case AGPIOC_UNBIND:
fef8985e 794 return agp_unbind_user(dev, (agp_unbind *)ap->a_data);
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795
796 }
797
798 return EINVAL;
799}
800
801static int
fef8985e 802agp_mmap(struct dev_mmap_args *ap)
984263bc 803{
fef8985e 804 dev_t kdev = ap->a_head.a_dev;
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805 device_t dev = KDEV2DEV(kdev);
806 struct agp_softc *sc = device_get_softc(dev);
807
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808 if (ap->a_offset > AGP_GET_APERTURE(dev))
809 return EINVAL;
810 ap->a_result = atop(rman_get_start(sc->as_aperture) + ap->a_offset);
811 return(0);
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812}
813
814/* Implementation of the kernel api */
815
816device_t
c436375a 817agp_find_device(void)
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818{
819 if (!agp_devclass)
820 return 0;
821 return devclass_get_device(agp_devclass, 0);
822}
823
824enum agp_acquire_state
825agp_state(device_t dev)
826{
827 struct agp_softc *sc = device_get_softc(dev);
828 return sc->as_state;
829}
830
831void
832agp_get_info(device_t dev, struct agp_info *info)
833{
834 struct agp_softc *sc = device_get_softc(dev);
835
836 info->ai_mode =
837 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4);
838 info->ai_aperture_base = rman_get_start(sc->as_aperture);
839 info->ai_aperture_size = (rman_get_end(sc->as_aperture)
840 - rman_get_start(sc->as_aperture)) + 1;
841 info->ai_aperture_va = (vm_offset_t) rman_get_virtual(sc->as_aperture);
842 info->ai_memory_allowed = sc->as_maxmem;
843 info->ai_memory_used = sc->as_allocated;
844}
845
846int
847agp_acquire(device_t dev)
848{
849 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL);
850}
851
852int
853agp_release(device_t dev)
854{
855 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL);
856}
857
858int
859agp_enable(device_t dev, u_int32_t mode)
860{
861 return AGP_ENABLE(dev, mode);
862}
863
864void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes)
865{
866 return (void *) AGP_ALLOC_MEMORY(dev, type, bytes);
867}
868
869void agp_free_memory(device_t dev, void *handle)
870{
871 struct agp_memory *mem = (struct agp_memory *) handle;
872 AGP_FREE_MEMORY(dev, mem);
873}
874
875int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset)
876{
877 struct agp_memory *mem = (struct agp_memory *) handle;
878 return AGP_BIND_MEMORY(dev, mem, offset);
879}
880
881int agp_unbind_memory(device_t dev, void *handle)
882{
883 struct agp_memory *mem = (struct agp_memory *) handle;
884 return AGP_UNBIND_MEMORY(dev, mem);
885}
886
887void agp_memory_info(device_t dev, void *handle, struct
888 agp_memory_info *mi)
889{
890 struct agp_memory *mem = (struct agp_memory *) handle;
891
892 mi->ami_size = mem->am_size;
893 mi->ami_physical = mem->am_physical;
894 mi->ami_offset = mem->am_offset;
895 mi->ami_is_bound = mem->am_is_bound;
896}