kernel - Enhance getcacheblk() (improve saturated write performance (3)).
[dragonfly.git] / sys / kern / lwkt_ipiq.c
CommitLineData
3b6b7bd1 1/*
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2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
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7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
8c10bfcf 10 *
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11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3b6b7bd1 32 * SUCH DAMAGE.
8c10bfcf 33 *
546f2c66 34 * $DragonFly: src/sys/kern/lwkt_ipiq.c,v 1.27 2008/05/18 20:57:56 nth Exp $
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35 */
36
37/*
38 * This module implements IPI message queueing and the MI portion of IPI
39 * message processing.
40 */
41
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42#include "opt_ddb.h"
43
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44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/kernel.h>
47#include <sys/proc.h>
48#include <sys/rtprio.h>
49#include <sys/queue.h>
50#include <sys/thread2.h>
51#include <sys/sysctl.h>
ac72c7f4 52#include <sys/ktr.h>
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53#include <sys/kthread.h>
54#include <machine/cpu.h>
55#include <sys/lock.h>
56#include <sys/caps.h>
57
58#include <vm/vm.h>
59#include <vm/vm_param.h>
60#include <vm/vm_kern.h>
61#include <vm/vm_object.h>
62#include <vm/vm_page.h>
63#include <vm/vm_map.h>
64#include <vm/vm_pager.h>
65#include <vm/vm_extern.h>
66#include <vm/vm_zone.h>
67
68#include <machine/stdarg.h>
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69#include <machine/smp.h>
70#include <machine/atomic.h>
71
3b6b7bd1 72#ifdef SMP
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73static __int64_t ipiq_count; /* total calls to lwkt_send_ipiq*() */
74static __int64_t ipiq_fifofull; /* number of fifo full conditions detected */
75static __int64_t ipiq_avoided; /* interlock with target avoids cpu ipi */
76static __int64_t ipiq_passive; /* passive IPI messages */
77static __int64_t ipiq_cscount; /* number of cpu synchronizations */
78static int ipiq_optimized = 1; /* XXX temporary sysctl */
d5b2d319 79static int ipiq_debug; /* set to 1 for debug */
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80#ifdef PANIC_DEBUG
81static int panic_ipiq_cpu = -1;
82static int panic_ipiq_count = 100;
83#endif
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84#endif
85
3b6b7bd1 86#ifdef SMP
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87SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_count, CTLFLAG_RW, &ipiq_count, 0,
88 "Number of IPI's sent");
89SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_fifofull, CTLFLAG_RW, &ipiq_fifofull, 0,
90 "Number of fifo full conditions detected");
91SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_avoided, CTLFLAG_RW, &ipiq_avoided, 0,
92 "Number of IPI's avoided by interlock with target cpu");
93SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_passive, CTLFLAG_RW, &ipiq_passive, 0,
94 "Number of passive IPI messages sent");
95SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_cscount, CTLFLAG_RW, &ipiq_cscount, 0,
96 "Number of cpu synchronizations");
97SYSCTL_INT(_lwkt, OID_AUTO, ipiq_optimized, CTLFLAG_RW, &ipiq_optimized, 0,
98 "");
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99SYSCTL_INT(_lwkt, OID_AUTO, ipiq_debug, CTLFLAG_RW, &ipiq_debug, 0,
100 "");
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101#ifdef PANIC_DEBUG
102SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_cpu, CTLFLAG_RW, &panic_ipiq_cpu, 0, "");
103SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_count, CTLFLAG_RW, &panic_ipiq_count, 0, "");
104#endif
3b6b7bd1 105
a7adb95a 106#define IPIQ_STRING "func=%p arg1=%p arg2=%d scpu=%d dcpu=%d"
5118bbc4 107#define IPIQ_ARG_SIZE (sizeof(void *) * 2 + sizeof(int) * 3)
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108
109#if !defined(KTR_IPIQ)
110#define KTR_IPIQ KTR_ALL
3b6b7bd1 111#endif
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112KTR_INFO_MASTER(ipiq);
113KTR_INFO(KTR_IPIQ, ipiq, send_norm, 0, IPIQ_STRING, IPIQ_ARG_SIZE);
114KTR_INFO(KTR_IPIQ, ipiq, send_pasv, 1, IPIQ_STRING, IPIQ_ARG_SIZE);
115KTR_INFO(KTR_IPIQ, ipiq, send_nbio, 2, IPIQ_STRING, IPIQ_ARG_SIZE);
116KTR_INFO(KTR_IPIQ, ipiq, send_fail, 3, IPIQ_STRING, IPIQ_ARG_SIZE);
117KTR_INFO(KTR_IPIQ, ipiq, receive, 4, IPIQ_STRING, IPIQ_ARG_SIZE);
d7ed9e5e 118KTR_INFO(KTR_IPIQ, ipiq, sync_start, 5, "cpumask=%08x", sizeof(cpumask_t));
d5b2d319 119KTR_INFO(KTR_IPIQ, ipiq, sync_end, 6, "cpumask=%08x", sizeof(cpumask_t));
866b61fb 120KTR_INFO(KTR_IPIQ, ipiq, cpu_send, 7, IPIQ_STRING, IPIQ_ARG_SIZE);
c92e86f1 121KTR_INFO(KTR_IPIQ, ipiq, send_end, 8, IPIQ_STRING, IPIQ_ARG_SIZE);
ac72c7f4 122
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123#define logipiq(name, func, arg1, arg2, sgd, dgd) \
124 KTR_LOG(ipiq_ ## name, func, arg1, arg2, sgd->gd_cpuid, dgd->gd_cpuid)
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125#define logipiq2(name, arg) \
126 KTR_LOG(ipiq_ ## name, arg)
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127
128#endif /* SMP */
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129
130#ifdef SMP
131
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132static int lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
133 struct intrframe *frame);
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134static void lwkt_cpusync_remote1(lwkt_cpusync_t cs);
135static void lwkt_cpusync_remote2(lwkt_cpusync_t cs);
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136
137/*
138 * Send a function execution request to another cpu. The request is queued
139 * on the cpu<->cpu ipiq matrix. Each cpu owns a unique ipiq FIFO for every
140 * possible target cpu. The FIFO can be written.
141 *
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142 * If the FIFO fills up we have to enable interrupts to avoid an APIC
143 * deadlock and process pending IPIQs while waiting for it to empty.
144 * Otherwise we may soft-deadlock with another cpu whos FIFO is also full.
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145 *
146 * We can safely bump gd_intr_nesting_level because our crit_exit() at the
147 * end will take care of any pending interrupts.
148 *
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149 * The actual hardware IPI is avoided if the target cpu is already processing
150 * the queue from a prior IPI. It is possible to pipeline IPI messages
151 * very quickly between cpus due to the FIFO hysteresis.
152 *
153 * Need not be called from a critical section.
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154 */
155int
b8a98473 156lwkt_send_ipiq3(globaldata_t target, ipifunc3_t func, void *arg1, int arg2)
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157{
158 lwkt_ipiq_t ip;
159 int windex;
160 struct globaldata *gd = mycpu;
161
a7adb95a 162 logipiq(send_norm, func, arg1, arg2, gd, target);
ac72c7f4 163
3b6b7bd1 164 if (target == gd) {
b8a98473 165 func(arg1, arg2, NULL);
c92e86f1 166 logipiq(send_end, func, arg1, arg2, gd, target);
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167 return(0);
168 }
169 crit_enter();
170 ++gd->gd_intr_nesting_level;
171#ifdef INVARIANTS
172 if (gd->gd_intr_nesting_level > 20)
173 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
174#endif
f9235b6d 175 KKASSERT(curthread->td_critcount);
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176 ++ipiq_count;
177 ip = &gd->gd_ipiq[target->gd_cpuid];
178
179 /*
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180 * Do not allow the FIFO to become full. Interrupts must be physically
181 * enabled while we liveloop to avoid deadlocking the APIC.
182 */
183 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
46d4e165 184#if defined(__i386__)
4c9f5a7f 185 unsigned int eflags = read_eflags();
b2b3ffcd 186#elif defined(__x86_64__)
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JG
187 unsigned long rflags = read_rflags();
188#endif
4c9f5a7f 189
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190 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0) {
191 logipiq(cpu_send, func, arg1, arg2, gd, target);
4c9f5a7f 192 cpu_send_ipiq(target->gd_cpuid);
866b61fb 193 }
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194 cpu_enable_intr();
195 ++ipiq_fifofull;
196 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
197 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
198 lwkt_process_ipiq();
199 }
46d4e165 200#if defined(__i386__)
4c9f5a7f 201 write_eflags(eflags);
b2b3ffcd 202#elif defined(__x86_64__)
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203 write_rflags(rflags);
204#endif
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205 }
206
207 /*
208 * Queue the new message
3b6b7bd1 209 */
3b6b7bd1 210 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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211 ip->ip_func[windex] = func;
212 ip->ip_arg1[windex] = arg1;
213 ip->ip_arg2[windex] = arg2;
35238fa5 214 cpu_sfence();
3b6b7bd1 215 ++ip->ip_windex;
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216 --gd->gd_intr_nesting_level;
217
218 /*
219 * signal the target cpu that there is work pending.
220 */
221 if (atomic_poll_acquire_int(&ip->ip_npoll)) {
866b61fb 222 logipiq(cpu_send, func, arg1, arg2, gd, target);
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223 cpu_send_ipiq(target->gd_cpuid);
224 } else {
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225 if (ipiq_optimized == 0) {
226 logipiq(cpu_send, func, arg1, arg2, gd, target);
4c9f5a7f 227 cpu_send_ipiq(target->gd_cpuid);
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228 } else {
229 ++ipiq_avoided;
230 }
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231 }
232 crit_exit();
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233
234 logipiq(send_end, func, arg1, arg2, gd, target);
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235 return(ip->ip_windex);
236}
237
238/*
239 * Similar to lwkt_send_ipiq() but this function does not actually initiate
240 * the IPI to the target cpu unless the FIFO has become too full, so it is
241 * very fast.
242 *
243 * This function is used for non-critical IPI messages, such as memory
244 * deallocations. The queue will typically be flushed by the target cpu at
245 * the next clock interrupt.
246 *
247 * Need not be called from a critical section.
248 */
249int
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250lwkt_send_ipiq3_passive(globaldata_t target, ipifunc3_t func,
251 void *arg1, int arg2)
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252{
253 lwkt_ipiq_t ip;
254 int windex;
255 struct globaldata *gd = mycpu;
256
257 KKASSERT(target != gd);
258 crit_enter();
a7adb95a 259 logipiq(send_pasv, func, arg1, arg2, gd, target);
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260 ++gd->gd_intr_nesting_level;
261#ifdef INVARIANTS
262 if (gd->gd_intr_nesting_level > 20)
263 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
264#endif
f9235b6d 265 KKASSERT(curthread->td_critcount);
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266 ++ipiq_count;
267 ++ipiq_passive;
268 ip = &gd->gd_ipiq[target->gd_cpuid];
269
270 /*
271 * Do not allow the FIFO to become full. Interrupts must be physically
272 * enabled while we liveloop to avoid deadlocking the APIC.
273 */
3b6b7bd1 274 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
46d4e165 275#if defined(__i386__)
3b6b7bd1 276 unsigned int eflags = read_eflags();
b2b3ffcd 277#elif defined(__x86_64__)
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JG
278 unsigned long rflags = read_rflags();
279#endif
4c9f5a7f 280
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281 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0) {
282 logipiq(cpu_send, func, arg1, arg2, gd, target);
4c9f5a7f 283 cpu_send_ipiq(target->gd_cpuid);
866b61fb 284 }
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285 cpu_enable_intr();
286 ++ipiq_fifofull;
287 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
288 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
289 lwkt_process_ipiq();
290 }
46d4e165 291#if defined(__i386__)
3b6b7bd1 292 write_eflags(eflags);
b2b3ffcd 293#elif defined(__x86_64__)
46d4e165
JG
294 write_rflags(rflags);
295#endif
3b6b7bd1 296 }
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297
298 /*
299 * Queue the new message
300 */
301 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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302 ip->ip_func[windex] = func;
303 ip->ip_arg1[windex] = arg1;
304 ip->ip_arg2[windex] = arg2;
35238fa5 305 cpu_sfence();
4c9f5a7f 306 ++ip->ip_windex;
3b6b7bd1 307 --gd->gd_intr_nesting_level;
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308
309 /*
310 * Do not signal the target cpu, it will pick up the IPI when it next
311 * polls (typically on the next tick).
312 */
3b6b7bd1 313 crit_exit();
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314
315 logipiq(send_end, func, arg1, arg2, gd, target);
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316 return(ip->ip_windex);
317}
318
41a01a4d 319/*
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320 * Send an IPI request without blocking, return 0 on success, ENOENT on
321 * failure. The actual queueing of the hardware IPI may still force us
322 * to spin and process incoming IPIs but that will eventually go away
323 * when we've gotten rid of the other general IPIs.
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324 */
325int
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326lwkt_send_ipiq3_nowait(globaldata_t target, ipifunc3_t func,
327 void *arg1, int arg2)
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328{
329 lwkt_ipiq_t ip;
330 int windex;
331 struct globaldata *gd = mycpu;
332
a7adb95a 333 logipiq(send_nbio, func, arg1, arg2, gd, target);
f9235b6d 334 KKASSERT(curthread->td_critcount);
41a01a4d 335 if (target == gd) {
b8a98473 336 func(arg1, arg2, NULL);
c92e86f1 337 logipiq(send_end, func, arg1, arg2, gd, target);
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338 return(0);
339 }
340 ++ipiq_count;
341 ip = &gd->gd_ipiq[target->gd_cpuid];
342
ac72c7f4 343 if (ip->ip_windex - ip->ip_rindex >= MAXCPUFIFO * 2 / 3) {
a7adb95a 344 logipiq(send_fail, func, arg1, arg2, gd, target);
41a01a4d 345 return(ENOENT);
ac72c7f4 346 }
41a01a4d 347 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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348 ip->ip_func[windex] = func;
349 ip->ip_arg1[windex] = arg1;
350 ip->ip_arg2[windex] = arg2;
35238fa5 351 cpu_sfence();
41a01a4d 352 ++ip->ip_windex;
4c9f5a7f 353
41a01a4d 354 /*
4c9f5a7f 355 * This isn't a passive IPI, we still have to signal the target cpu.
41a01a4d 356 */
4c9f5a7f 357 if (atomic_poll_acquire_int(&ip->ip_npoll)) {
866b61fb 358 logipiq(cpu_send, func, arg1, arg2, gd, target);
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359 cpu_send_ipiq(target->gd_cpuid);
360 } else {
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361 if (ipiq_optimized == 0) {
362 logipiq(cpu_send, func, arg1, arg2, gd, target);
4c9f5a7f 363 cpu_send_ipiq(target->gd_cpuid);
866b61fb 364 } else {
728f6208 365 ++ipiq_avoided;
866b61fb 366 }
4c9f5a7f 367 }
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368
369 logipiq(send_end, func, arg1, arg2, gd, target);
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370 return(0);
371}
372
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373/*
374 * deprecated, used only by fast int forwarding.
375 */
376int
b8a98473 377lwkt_send_ipiq3_bycpu(int dcpu, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1 378{
b8a98473 379 return(lwkt_send_ipiq3(globaldata_find(dcpu), func, arg1, arg2));
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380}
381
382/*
383 * Send a message to several target cpus. Typically used for scheduling.
384 * The message will not be sent to stopped cpus.
385 */
386int
da23a592 387lwkt_send_ipiq3_mask(cpumask_t mask, ipifunc3_t func, void *arg1, int arg2)
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388{
389 int cpuid;
390 int count = 0;
391
392 mask &= ~stopped_cpus;
393 while (mask) {
da23a592 394 cpuid = BSFCPUMASK(mask);
b8a98473 395 lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
da23a592 396 mask &= ~CPUMASK(cpuid);
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397 ++count;
398 }
399 return(count);
400}
401
402/*
403 * Wait for the remote cpu to finish processing a function.
404 *
405 * YYY we have to enable interrupts and process the IPIQ while waiting
406 * for it to empty or we may deadlock with another cpu. Create a CPU_*()
407 * function to do this! YYY we really should 'block' here.
408 *
409 * MUST be called from a critical section. This routine may be called
410 * from an interrupt (for example, if an interrupt wakes a foreign thread
411 * up).
412 */
413void
414lwkt_wait_ipiq(globaldata_t target, int seq)
415{
416 lwkt_ipiq_t ip;
417 int maxc = 100000000;
418
419 if (target != mycpu) {
420 ip = &mycpu->gd_ipiq[target->gd_cpuid];
421 if ((int)(ip->ip_xindex - seq) < 0) {
46d4e165 422#if defined(__i386__)
3b6b7bd1 423 unsigned int eflags = read_eflags();
b2b3ffcd 424#elif defined(__x86_64__)
46d4e165
JG
425 unsigned long rflags = read_rflags();
426#endif
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MD
427 cpu_enable_intr();
428 while ((int)(ip->ip_xindex - seq) < 0) {
41a01a4d 429 crit_enter();
3b6b7bd1 430 lwkt_process_ipiq();
41a01a4d 431 crit_exit();
3b6b7bd1 432 if (--maxc == 0)
6ea70f76 433 kprintf("LWKT_WAIT_IPIQ WARNING! %d wait %d (%d)\n", mycpu->gd_cpuid, target->gd_cpuid, ip->ip_xindex - seq);
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434 if (maxc < -1000000)
435 panic("LWKT_WAIT_IPIQ");
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436 /*
437 * xindex may be modified by another cpu, use a load fence
438 * to ensure that the loop does not use a speculative value
439 * (which may improve performance).
440 */
441 cpu_lfence();
3b6b7bd1 442 }
46d4e165 443#if defined(__i386__)
3b6b7bd1 444 write_eflags(eflags);
b2b3ffcd 445#elif defined(__x86_64__)
46d4e165
JG
446 write_rflags(rflags);
447#endif
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448 }
449 }
450}
451
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452int
453lwkt_seq_ipiq(globaldata_t target)
454{
455 lwkt_ipiq_t ip;
456
457 ip = &mycpu->gd_ipiq[target->gd_cpuid];
458 return(ip->ip_windex);
459}
460
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461/*
462 * Called from IPI interrupt (like a fast interrupt), which has placed
463 * us in a critical section. The MP lock may or may not be held.
464 * May also be called from doreti or splz, or be reentrantly called
465 * indirectly through the ip_func[] we run.
466 *
467 * There are two versions, one where no interrupt frame is available (when
468 * called from the send code and from splz, and one where an interrupt
469 * frame is available.
d5b2d319
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470 *
471 * When the current cpu is mastering a cpusync we do NOT internally loop
472 * on the cpusyncq poll. We also do not re-flag a pending ipi due to
473 * the cpusyncq poll because this can cause doreti/splz to loop internally.
474 * The cpusync master's own loop must be allowed to run to avoid a deadlock.
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475 */
476void
477lwkt_process_ipiq(void)
478{
479 globaldata_t gd = mycpu;
ac72c7f4 480 globaldata_t sgd;
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481 lwkt_ipiq_t ip;
482 int n;
483
484again:
485 for (n = 0; n < ncpus; ++n) {
486 if (n != gd->gd_cpuid) {
ac72c7f4
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487 sgd = globaldata_find(n);
488 ip = sgd->gd_ipiq;
3b6b7bd1 489 if (ip != NULL) {
b8a98473 490 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], NULL))
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491 ;
492 }
493 }
494 }
495 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
b8a98473 496 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL)) {
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497 if (gd->gd_curthread->td_cscount == 0)
498 goto again;
0f7a3396 499 }
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500 }
501}
502
3b6b7bd1 503void
c7eb0589 504lwkt_process_ipiq_frame(struct intrframe *frame)
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505{
506 globaldata_t gd = mycpu;
ac72c7f4 507 globaldata_t sgd;
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508 lwkt_ipiq_t ip;
509 int n;
510
511again:
512 for (n = 0; n < ncpus; ++n) {
513 if (n != gd->gd_cpuid) {
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514 sgd = globaldata_find(n);
515 ip = sgd->gd_ipiq;
3b6b7bd1 516 if (ip != NULL) {
c7eb0589 517 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], frame))
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518 ;
519 }
520 }
521 }
522 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
c7eb0589 523 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, frame)) {
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524 if (gd->gd_curthread->td_cscount == 0)
525 goto again;
0f7a3396 526 }
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527 }
528}
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529
530static int
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531lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
532 struct intrframe *frame)
3b6b7bd1 533{
2de4f77e 534 globaldata_t mygd = mycpu;
3b6b7bd1 535 int ri;
35238fa5 536 int wi;
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537 ipifunc3_t copy_func;
538 void *copy_arg1;
539 int copy_arg2;
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540
541 /*
542 * Obtain the current write index, which is modified by a remote cpu.
543 * Issue a load fence to prevent speculative reads of e.g. data written
544 * by the other cpu prior to it updating the index.
545 */
f9235b6d 546 KKASSERT(curthread->td_critcount);
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547 wi = ip->ip_windex;
548 cpu_lfence();
2de4f77e 549 ++mygd->gd_intr_nesting_level;
35238fa5 550
3b6b7bd1 551 /*
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552 * NOTE: xindex is only updated after we are sure the function has
553 * finished execution. Beware lwkt_process_ipiq() reentrancy!
554 * The function may send an IPI which may block/drain.
d64a7617 555 *
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556 * NOTE: Due to additional IPI operations that the callback function
557 * may make, it is possible for both rindex and windex to advance and
558 * thus for rindex to advance passed our cached windex.
559 *
d5b2d319 560 * NOTE: A load fence is required to prevent speculative loads prior
562273ea 561 * to the loading of ip_rindex. Even though stores might be
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562 * ordered, loads are probably not. A memory fence is required
563 * to prevent reordering of the loads after the ip_rindex update.
3b6b7bd1 564 */
d64a7617 565 while (wi - (ri = ip->ip_rindex) > 0) {
3b6b7bd1 566 ri &= MAXCPUFIFO_MASK;
d5b2d319 567 cpu_lfence();
728f6208 568 copy_func = ip->ip_func[ri];
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569 copy_arg1 = ip->ip_arg1[ri];
570 copy_arg2 = ip->ip_arg2[ri];
d5b2d319 571 cpu_mfence();
728f6208 572 ++ip->ip_rindex;
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573 KKASSERT((ip->ip_rindex & MAXCPUFIFO_MASK) ==
574 ((ri + 1) & MAXCPUFIFO_MASK));
a7adb95a 575 logipiq(receive, copy_func, copy_arg1, copy_arg2, sgd, mycpu);
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576#ifdef INVARIANTS
577 if (ipiq_debug && (ip->ip_rindex & 0xFFFFFF) == 0) {
578 kprintf("cpu %d ipifunc %p %p %d (frame %p)\n",
579 mycpu->gd_cpuid,
580 copy_func, copy_arg1, copy_arg2,
581#if defined(__i386__)
582 (frame ? (void *)frame->if_eip : NULL));
583#elif defined(__amd64__)
584 (frame ? (void *)frame->if_rip : NULL));
585#else
586 NULL);
587#endif
588 }
589#endif
b8a98473 590 copy_func(copy_arg1, copy_arg2, frame);
35238fa5 591 cpu_sfence();
3b6b7bd1 592 ip->ip_xindex = ip->ip_rindex;
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593
594#ifdef PANIC_DEBUG
595 /*
596 * Simulate panics during the processing of an IPI
597 */
598 if (mycpu->gd_cpuid == panic_ipiq_cpu && panic_ipiq_count) {
599 if (--panic_ipiq_count == 0) {
600#ifdef DDB
601 Debugger("PANIC_DEBUG");
602#else
603 panic("PANIC_DEBUG");
604#endif
605 }
606 }
607#endif
3b6b7bd1 608 }
2de4f77e 609 --mygd->gd_intr_nesting_level;
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610
611 /*
612 * Return non-zero if there are more IPI messages pending on this
613 * ipiq. ip_npoll is left set as long as possible to reduce the
614 * number of IPIs queued by the originating cpu, but must be cleared
615 * *BEFORE* checking windex.
616 */
617 atomic_poll_release_int(&ip->ip_npoll);
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618 return(wi != ip->ip_windex);
619}
620
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621static void
622lwkt_sync_ipiq(void *arg)
623{
624 cpumask_t *cpumask = arg;
625
da23a592 626 atomic_clear_cpumask(cpumask, mycpu->gd_cpumask);
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627 if (*cpumask == 0)
628 wakeup(cpumask);
629}
630
631void
632lwkt_synchronize_ipiqs(const char *wmesg)
633{
634 cpumask_t other_cpumask;
635
636 other_cpumask = mycpu->gd_other_cpus & smp_active_mask;
637 lwkt_send_ipiq_mask(other_cpumask, lwkt_sync_ipiq, &other_cpumask);
638
6c92c1f2 639 while (other_cpumask != 0) {
ae8e83e6 640 tsleep_interlock(&other_cpumask, 0);
6c92c1f2 641 if (other_cpumask != 0)
d9345d3a 642 tsleep(&other_cpumask, PINTERLOCKED, wmesg, 0);
6c92c1f2 643 }
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644}
645
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646#endif
647
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648/*
649 * CPU Synchronization Support
5c71a36a 650 *
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651 * lwkt_cpusync_interlock() - Place specified cpus in a quiescent state.
652 * The current cpu is placed in a hard critical
653 * section.
5c71a36a 654 *
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655 * lwkt_cpusync_deinterlock() - Execute cs_func on specified cpus, including
656 * current cpu if specified, then return.
3b6b7bd1 657 */
3b6b7bd1 658void
d5b2d319 659lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *arg)
5c71a36a 660{
d5b2d319 661 struct lwkt_cpusync cs;
5c71a36a 662
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663 lwkt_cpusync_init(&cs, mask, func, arg);
664 lwkt_cpusync_interlock(&cs);
665 lwkt_cpusync_deinterlock(&cs);
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666}
667
d5b2d319 668
5c71a36a 669void
d5b2d319 670lwkt_cpusync_interlock(lwkt_cpusync_t cs)
3b6b7bd1 671{
d5b2d319 672#ifdef SMP
0f7a3396 673 globaldata_t gd = mycpu;
d5b2d319 674 cpumask_t mask;
0f7a3396 675
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676 /*
677 * mask acknowledge (cs_mack): 0->mask for stage 1
678 *
679 * mack does not include the current cpu.
680 */
681 mask = cs->cs_mask & gd->gd_other_cpus & smp_active_mask;
682 cs->cs_mack = 0;
683 crit_enter_id("cpusync");
684 if (mask) {
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685 ++ipiq_cscount;
686 ++gd->gd_curthread->td_cscount;
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687 lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote1, cs);
688 logipiq2(sync_start, mask);
689 while (cs->cs_mack != mask) {
0f7a3396 690 lwkt_process_ipiq();
d5b2d319 691 cpu_pause();
0f7a3396 692 }
3b6b7bd1 693 }
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694#else
695 cs->cs_mack = 0;
0f7a3396 696#endif
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697}
698
699/*
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700 * Interlocked cpus have executed remote1 and are polling in remote2.
701 * To deinterlock we clear cs_mack and wait for the cpus to execute
702 * the func and set their bit in cs_mack again.
0f7a3396 703 *
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704 */
705void
d5b2d319 706lwkt_cpusync_deinterlock(lwkt_cpusync_t cs)
3b6b7bd1 707{
0f7a3396 708 globaldata_t gd = mycpu;
0f7a3396 709#ifdef SMP
d5b2d319
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710 cpumask_t mask;
711
712 /*
713 * mask acknowledge (cs_mack): mack->0->mack for stage 2
714 *
715 * Clearing cpu bits for polling cpus in cs_mack will cause them to
716 * execute stage 2, which executes the cs_func(cs_data) and then sets
717 * their bit in cs_mack again.
718 *
719 * mack does not include the current cpu.
720 */
721 mask = cs->cs_mack;
722 cpu_ccfence();
723 cs->cs_mack = 0;
724 if (cs->cs_func && (cs->cs_mask & gd->gd_cpumask))
725 cs->cs_func(cs->cs_data);
726 if (mask) {
727 while (cs->cs_mack != mask) {
0f7a3396 728 lwkt_process_ipiq();
d5b2d319 729 cpu_pause();
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730 }
731 --gd->gd_curthread->td_cscount;
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732 lwkt_process_ipiq();
733 logipiq2(sync_end, mask);
3b6b7bd1 734 }
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735 crit_exit_id("cpusync");
736#else
737 if (cs->cs_func && (cs->cs_mask & gd->gd_cpumask))
738 cs->cs_func(cs->cs_data);
0f7a3396 739#endif
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740}
741
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742#ifdef SMP
743
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744/*
745 * helper IPI remote messaging function.
746 *
747 * Called on remote cpu when a new cpu synchronization request has been
748 * sent to us. Execute the run function and adjust cs_count, then requeue
749 * the request so we spin on it.
750 */
751static void
d5b2d319 752lwkt_cpusync_remote1(lwkt_cpusync_t cs)
3b6b7bd1 753{
d5b2d319
MD
754 globaldata_t gd = mycpu;
755
756 atomic_set_cpumask(&cs->cs_mack, gd->gd_cpumask);
757 lwkt_cpusync_remote2(cs);
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758}
759
760/*
761 * helper IPI remote messaging function.
762 *
763 * Poll for the originator telling us to finish. If it hasn't, requeue
d5b2d319 764 * our request so we spin on it.
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765 */
766static void
d5b2d319 767lwkt_cpusync_remote2(lwkt_cpusync_t cs)
3b6b7bd1 768{
d5b2d319
MD
769 globaldata_t gd = mycpu;
770
771 if ((cs->cs_mack & gd->gd_cpumask) == 0) {
772 if (cs->cs_func)
773 cs->cs_func(cs->cs_data);
774 atomic_set_cpumask(&cs->cs_mack, gd->gd_cpumask);
3b6b7bd1 775 } else {
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MD
776 lwkt_ipiq_t ip;
777 int wi;
778
779 ip = &gd->gd_cpusyncq;
780 wi = ip->ip_windex & MAXCPUFIFO_MASK;
b8a98473 781 ip->ip_func[wi] = (ipifunc3_t)(ipifunc1_t)lwkt_cpusync_remote2;
d5b2d319 782 ip->ip_arg1[wi] = cs;
b8a98473 783 ip->ip_arg2[wi] = 0;
35238fa5 784 cpu_sfence();
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MD
785 ++ip->ip_windex;
786 }
787}
788
3b6b7bd1 789#endif