Although defined in sys/time.h we don't have CLOCK_VIRTUAL and CLOCK_PROF
[dragonfly.git] / sys / platform / vkernel / i386 / swtch.s
CommitLineData
e4a473f1
MD
1/*
2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * Copyright (c) 1990 The Regents of the University of California.
35 * All rights reserved.
36 *
37 * This code is derived from software contributed to Berkeley by
38 * William Jolitz.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. All advertising materials mentioning features or use of this software
49 * must display the following acknowledgement:
50 * This product includes software developed by the University of
51 * California, Berkeley and its contributors.
52 * 4. Neither the name of the University nor the names of its contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
55 *
56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 * SUCH DAMAGE.
67 *
68 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
164b8401 69 * $DragonFly: src/sys/platform/vkernel/i386/swtch.s,v 1.5 2007/02/16 23:11:40 corecode Exp $
e4a473f1
MD
70 */
71
72#include "use_npx.h"
73
74#include <sys/rtprio.h>
75
76#include <machine/asmacros.h>
77#include <machine/segments.h>
78
79#include <machine/pmap.h>
80#include <machine/lock.h>
81
82#include "assym.s"
83
84#if defined(SMP)
85#define MPLOCKED lock ;
86#else
87#define MPLOCKED
88#endif
89
90 .data
91
92 .globl panic
93
94#if defined(SWTCH_OPTIM_STATS)
95 .globl swtch_optim_stats, tlb_flush_count
96swtch_optim_stats: .long 0 /* number of _swtch_optims */
97tlb_flush_count: .long 0
98#endif
99
100 .text
101
102
103/*
104 * cpu_heavy_switch(next_thread)
105 *
106 * Switch from the current thread to a new thread. This entry
107 * is normally called via the thread->td_switch function, and will
108 * only be called when the current thread is a heavy weight process.
109 *
110 * Some instructions have been reordered to reduce pipeline stalls.
111 *
112 * YYY disable interrupts once giant is removed.
113 */
114ENTRY(cpu_heavy_switch)
115 /*
116 * Save general regs
117 */
118 movl PCPU(curthread),%ecx
119 movl (%esp),%eax /* (reorder optimization) */
120 movl TD_PCB(%ecx),%edx /* EDX = PCB */
121 movl %eax,PCB_EIP(%edx) /* return PC may be modified */
122 movl %ebx,PCB_EBX(%edx)
123 movl %esp,PCB_ESP(%edx)
124 movl %ebp,PCB_EBP(%edx)
125 movl %esi,PCB_ESI(%edx)
126 movl %edi,PCB_EDI(%edx)
e4a473f1
MD
127
128 movl %ecx,%ebx /* EBX = curthread */
129 movl TD_PROC(%ecx),%ecx
130 movl PCPU(cpuid), %eax
131 movl P_VMSPACE(%ecx), %ecx /* ECX = vmspace */
132 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
133
134 /*
135 * Push the LWKT switch restore function, which resumes a heavy
136 * weight process. Note that the LWKT switcher is based on
137 * TD_SP, while the heavy weight process switcher is based on
138 * PCB_ESP. TD_SP is usually two ints pushed relative to
139 * PCB_ESP. We push the flags for later restore by cpu_heavy_restore.
140 */
141 pushfl
142 pushl $cpu_heavy_restore
143 movl %esp,TD_SP(%ebx)
144
145 /*
146 * Save debug regs if necessary
147 */
148 movb PCB_FLAGS(%edx),%al
149 andb $PCB_DBREGS,%al
150 jz 1f /* no, skip over */
151 movl %dr7,%eax /* yes, do the save */
152 movl %eax,PCB_DR7(%edx)
153 andl $0x0000fc00, %eax /* disable all watchpoints */
154 movl %eax,%dr7
155 movl %dr6,%eax
156 movl %eax,PCB_DR6(%edx)
157 movl %dr3,%eax
158 movl %eax,PCB_DR3(%edx)
159 movl %dr2,%eax
160 movl %eax,PCB_DR2(%edx)
161 movl %dr1,%eax
162 movl %eax,PCB_DR1(%edx)
163 movl %dr0,%eax
164 movl %eax,PCB_DR0(%edx)
1651:
166
167#if NNPX > 0
168 /*
169 * Save the FP state if we have used the FP. Note that calling
170 * npxsave will NULL out PCPU(npxthread).
171 */
172 cmpl %ebx,PCPU(npxthread)
173 jne 1f
174 pushl TD_SAVEFPU(%ebx)
175 call npxsave /* do it in a big C function */
176 addl $4,%esp /* EAX, ECX, EDX trashed */
1771:
178#endif /* NNPX > 0 */
179
180 /*
181 * Switch to the next thread, which was passed as an argument
182 * to cpu_heavy_switch(). Due to the eflags and switch-restore
183 * function we pushed, the argument is at 12(%esp). Set the current
184 * thread, load the stack pointer, and 'ret' into the switch-restore
185 * function.
186 *
187 * The switch restore function expects the new thread to be in %eax
188 * and the old one to be in %ebx.
189 *
190 * There is a one-instruction window where curthread is the new
191 * thread but %esp still points to the old thread's stack, but
192 * we are protected by a critical section so it is ok.
193 */
194 movl 12(%esp),%eax /* EAX = newtd, EBX = oldtd */
195 movl %eax,PCPU(curthread)
196 movl TD_SP(%eax),%esp
197 ret
198
199/*
200 * cpu_exit_switch()
201 *
202 * The switch function is changed to this when a thread is going away
203 * for good. We have to ensure that the MMU state is not cached, and
204 * we don't bother saving the existing thread state before switching.
205 *
206 * At this point we are in a critical section and this cpu owns the
207 * thread's token, which serves as an interlock until the switchout is
208 * complete.
209 */
210ENTRY(cpu_exit_switch)
211 /*
212 * Get us out of the vmspace
213 */
6f7b98e0 214#if 0
e4a473f1
MD
215 movl IdlePTD,%ecx
216 movl %cr3,%eax
217 cmpl %ecx,%eax
218 je 1f
219 movl %ecx,%cr3
2201:
6f7b98e0 221#endif
e4a473f1
MD
222 movl PCPU(curthread),%ebx
223 /*
224 * Switch to the next thread. RET into the restore function, which
225 * expects the new thread in EAX and the old in EBX.
226 *
227 * There is a one-instruction window where curthread is the new
228 * thread but %esp still points to the old thread's stack, but
229 * we are protected by a critical section so it is ok.
230 */
231 movl 4(%esp),%eax
232 movl %eax,PCPU(curthread)
233 movl TD_SP(%eax),%esp
234 ret
235
236/*
237 * cpu_heavy_restore() (current thread in %eax on entry)
238 *
239 * Restore the thread after an LWKT switch. This entry is normally
240 * called via the LWKT switch restore function, which was pulled
241 * off the thread stack and jumped to.
242 *
243 * This entry is only called if the thread was previously saved
244 * using cpu_heavy_switch() (the heavy weight process thread switcher),
245 * or when a new process is initially scheduled. The first thing we
246 * do is clear the TDF_RUNNING bit in the old thread and set it in the
247 * new thread.
248 *
164b8401 249 * NOTE: The lwp may be in any state, not necessarily LSRUN, because
e4a473f1
MD
250 * a preemption switch may interrupt the process and then return via
251 * cpu_heavy_restore.
252 *
253 * YYY theoretically we do not have to restore everything here, a lot
254 * of this junk can wait until we return to usermode. But for now
255 * we restore everything.
256 *
257 * YYY the PCB crap is really crap, it makes startup a bitch because
258 * we can't switch away.
259 *
260 * YYY note: spl check is done in mi_switch when it splx()'s.
261 */
262
263ENTRY(cpu_heavy_restore)
264 popfl
265 movl TD_PCB(%eax),%edx /* EDX = PCB */
266 movl TD_PROC(%eax),%ecx
267
268#if defined(SWTCH_OPTIM_STATS)
269 incl _swtch_optim_stats
270#endif
271 /*
272 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
273 * safely test/reload %cr3 until after we have set the bit in the
274 * pmap (remember, we do not hold the MP lock in the switch code).
275 */
276 movl P_VMSPACE(%ecx), %ecx /* ECX = vmspace */
277 movl PCPU(cpuid), %esi
278 MPLOCKED btsl %esi, VM_PMAP+PM_ACTIVE(%ecx)
279
280 /*
281 * Restore the MMU address space. If it is the same as the last
282 * thread we don't have to invalidate the tlb (i.e. reload cr3).
283 * YYY which naturally also means that the PM_ACTIVE bit had better
284 * already have been set before we set it above, check? YYY
285 */
6f7b98e0 286#if 0
e4a473f1
MD
287 movl %cr3,%esi
288 movl PCB_CR3(%edx),%ecx
289 cmpl %esi,%ecx
290 je 4f
291#if defined(SWTCH_OPTIM_STATS)
292 decl _swtch_optim_stats
293 incl _tlb_flush_count
294#endif
295 movl %ecx,%cr3
2964:
6f7b98e0 297#endif
e4a473f1
MD
298 /*
299 * Clear TDF_RUNNING flag in old thread only after cleaning up
300 * %cr3. The target thread is already protected by being TDF_RUNQ
301 * so setting TDF_RUNNING isn't as big a deal.
302 */
303 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
304 orl $TDF_RUNNING,TD_FLAGS(%eax)
305
6f7b98e0 306#if 0
e4a473f1
MD
307 /*
308 * Deal with the PCB extension, restore the private tss
309 */
310 movl PCB_EXT(%edx),%edi /* check for a PCB extension */
311 movl $1,%ebx /* maybe mark use of a private tss */
312 testl %edi,%edi
313 jnz 2f
314
315 /*
316 * Going back to the common_tss. We may need to update TSS_ESP0
317 * which sets the top of the supervisor stack when entering from
318 * usermode. The PCB is at the top of the stack but we need another
319 * 16 bytes to take vm86 into account.
320 */
321 leal -16(%edx),%ebx
322 movl %ebx, PCPU(common_tss) + TSS_ESP0
323
324 cmpl $0,PCPU(private_tss) /* don't have to reload if */
325 je 3f /* already using the common TSS */
326
327 subl %ebx,%ebx /* unmark use of private tss */
328
329 /*
330 * Get the address of the common TSS descriptor for the ltr.
331 * There is no way to get the address of a segment-accessed variable
332 * so we store a self-referential pointer at the base of the per-cpu
333 * data area and add the appropriate offset.
334 */
335 movl $gd_common_tssd, %edi
336 addl %fs:0, %edi
337
338 /*
339 * Move the correct TSS descriptor into the GDT slot, then reload
340 * ltr.
341 */
3422:
343 movl %ebx,PCPU(private_tss) /* mark/unmark private tss */
344 movl PCPU(tss_gdt), %ebx /* entry in GDT */
345 movl 0(%edi), %eax
346 movl %eax, 0(%ebx)
347 movl 4(%edi), %eax
348 movl %eax, 4(%ebx)
349 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
350 ltr %si
e4a473f1 3513:
6f7b98e0 352#endif
e4a473f1
MD
353 /*
354 * Restore general registers.
355 */
356 movl PCB_EBX(%edx),%ebx
357 movl PCB_ESP(%edx),%esp
358 movl PCB_EBP(%edx),%ebp
359 movl PCB_ESI(%edx),%esi
360 movl PCB_EDI(%edx),%edi
361 movl PCB_EIP(%edx),%eax
362 movl %eax,(%esp)
363
6f7b98e0 364#if 0
e4a473f1
MD
365 /*
366 * Restore the user LDT if we have one
367 */
368 cmpl $0, PCB_USERLDT(%edx)
369 jnz 1f
370 movl _default_ldt,%eax
371 cmpl PCPU(currentldt),%eax
372 je 2f
373 lldt _default_ldt
374 movl %eax,PCPU(currentldt)
375 jmp 2f
3761: pushl %edx
377 call set_user_ldt
378 popl %edx
3792:
6f7b98e0
MD
380#endif
381#if 0
e4a473f1
MD
382 /*
383 * Restore the user TLS if we have one
384 */
385 pushl %edx
386 call set_user_TLS
387 popl %edx
6f7b98e0 388#endif
e4a473f1
MD
389
390 /*
391 * Restore the DEBUG register state if necessary.
392 */
393 movb PCB_FLAGS(%edx),%al
394 andb $PCB_DBREGS,%al
395 jz 1f /* no, skip over */
396 movl PCB_DR6(%edx),%eax /* yes, do the restore */
397 movl %eax,%dr6
398 movl PCB_DR3(%edx),%eax
399 movl %eax,%dr3
400 movl PCB_DR2(%edx),%eax
401 movl %eax,%dr2
402 movl PCB_DR1(%edx),%eax
403 movl %eax,%dr1
404 movl PCB_DR0(%edx),%eax
405 movl %eax,%dr0
406 movl %dr7,%eax /* load dr7 so as not to disturb */
407 andl $0x0000fc00,%eax /* reserved bits */
408 pushl %ebx
409 movl PCB_DR7(%edx),%ebx
410 andl $~0x0000fc00,%ebx
411 orl %ebx,%eax
412 popl %ebx
413 movl %eax,%dr7
4141:
415
416 ret
417
418/*
419 * savectx(pcb)
420 *
421 * Update pcb, saving current processor state.
422 */
423ENTRY(savectx)
424 /* fetch PCB */
425 movl 4(%esp),%ecx
426
427 /* caller's return address - child won't execute this routine */
428 movl (%esp),%eax
429 movl %eax,PCB_EIP(%ecx)
430 movl %ebx,PCB_EBX(%ecx)
431 movl %esp,PCB_ESP(%ecx)
432 movl %ebp,PCB_EBP(%ecx)
433 movl %esi,PCB_ESI(%ecx)
434 movl %edi,PCB_EDI(%ecx)
e4a473f1
MD
435
436#if NNPX > 0
437 /*
438 * If npxthread == NULL, then the npx h/w state is irrelevant and the
439 * state had better already be in the pcb. This is true for forks
440 * but not for dumps (the old book-keeping with FP flags in the pcb
441 * always lost for dumps because the dump pcb has 0 flags).
442 *
443 * If npxthread != NULL, then we have to save the npx h/w state to
444 * npxthread's pcb and copy it to the requested pcb, or save to the
445 * requested pcb and reload. Copying is easier because we would
446 * have to handle h/w bugs for reloading. We used to lose the
447 * parent's npx state for forks by forgetting to reload.
448 */
449 movl PCPU(npxthread),%eax
450 testl %eax,%eax
451 je 1f
452
453 pushl %ecx /* target pcb */
454 movl TD_SAVEFPU(%eax),%eax /* originating savefpu area */
455 pushl %eax
456
457 pushl %eax
458 call npxsave
459 addl $4,%esp
460
461 popl %eax
462 popl %ecx
463
464 pushl $PCB_SAVEFPU_SIZE
465 leal PCB_SAVEFPU(%ecx),%ecx
466 pushl %ecx
467 pushl %eax
468 call bcopy
469 addl $12,%esp
470#endif /* NNPX > 0 */
471
4721:
473 ret
474
475/*
476 * cpu_idle_restore() (current thread in %eax on entry) (one-time execution)
477 *
478 * Don't bother setting up any regs other then %ebp so backtraces
479 * don't die. This restore function is used to bootstrap into the
480 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
481 * switching.
482 *
483 * Clear TDF_RUNNING in old thread only after we've cleaned up %cr3.
484 *
485 * If we are an AP we have to call ap_init() before jumping to
486 * cpu_idle(). ap_init() will synchronize with the BP and finish
487 * setting up various ncpu-dependant globaldata fields. This may
488 * happen on UP as well as SMP if we happen to be simulating multiple
489 * cpus.
490 */
491ENTRY(cpu_idle_restore)
492 /* cli */
493 movl $0,%ebp
494 pushl $0
495 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
496 orl $TDF_RUNNING,TD_FLAGS(%eax)
497#ifdef SMP
498 cmpl $0,PCPU(cpuid)
499 je 1f
500 call ap_init
5011:
502#endif
503 /* sti */
504 jmp cpu_idle
505
506/*
507 * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
508 *
509 * Don't bother setting up any regs other then %ebp so backtraces
510 * don't die. This restore function is used to bootstrap into an
511 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
512 * after this.
513 *
514 * Since all of our context is on the stack we are reentrant and
515 * we can release our critical section and enable interrupts early.
516 */
517ENTRY(cpu_kthread_restore)
518 /*sti*/
519 movl TD_PCB(%eax),%edx
520 movl $0,%ebp
521 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
522 orl $TDF_RUNNING,TD_FLAGS(%eax)
523 subl $TDPRI_CRIT,TD_PRI(%eax)
524 popl %eax /* kthread exit function */
525 pushl PCB_EBX(%edx) /* argument to ESI function */
526 pushl %eax /* set exit func as return address */
527 movl PCB_ESI(%edx),%eax
528 jmp *%eax
529
530/*
531 * cpu_lwkt_switch()
532 *
533 * Standard LWKT switching function. Only non-scratch registers are
534 * saved and we don't bother with the MMU state or anything else.
535 *
536 * This function is always called while in a critical section.
537 *
538 * There is a one-instruction window where curthread is the new
539 * thread but %esp still points to the old thread's stack, but
540 * we are protected by a critical section so it is ok.
541 *
542 * YYY BGL, SPL
543 */
544ENTRY(cpu_lwkt_switch)
545 pushl %ebp /* note: GDB hacked to locate ebp relative to td_sp */
546 pushl %ebx
547 movl PCPU(curthread),%ebx
548 pushl %esi
549 pushl %edi
550 pushfl
551 /* warning: adjust movl into %eax below if you change the pushes */
552
553#if NNPX > 0
554 /*
555 * Save the FP state if we have used the FP. Note that calling
556 * npxsave will NULL out PCPU(npxthread).
557 *
558 * We have to deal with the FP state for LWKT threads in case they
559 * happen to get preempted or block while doing an optimized
560 * bzero/bcopy/memcpy.
561 */
562 cmpl %ebx,PCPU(npxthread)
563 jne 1f
564 pushl TD_SAVEFPU(%ebx)
565 call npxsave /* do it in a big C function */
566 addl $4,%esp /* EAX, ECX, EDX trashed */
5671:
568#endif /* NNPX > 0 */
569
570 movl 4+20(%esp),%eax /* switch to this thread */
571 pushl $cpu_lwkt_restore
572 movl %esp,TD_SP(%ebx)
573 movl %eax,PCPU(curthread)
574 movl TD_SP(%eax),%esp
575
576 /*
577 * eax contains new thread, ebx contains old thread.
578 */
579 ret
580
581/*
582 * cpu_lwkt_restore() (current thread in %eax on entry)
583 *
584 * Standard LWKT restore function. This function is always called
585 * while in a critical section.
586 *
587 * Warning: due to preemption the restore function can be used to
588 * 'return' to the original thread. Interrupt disablement must be
589 * protected through the switch so we cannot run splz here.
590 */
591ENTRY(cpu_lwkt_restore)
592 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
593 orl $TDF_RUNNING,TD_FLAGS(%eax)
594 popfl
595 popl %edi
596 popl %esi
597 popl %ebx
598 popl %ebp
599 ret
600