Make all network interrupt service routines MPSAFE part 1/3.
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
78195a76 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.34 2005/11/28 17:13:38 dillon Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
41d6c56f 103#include <sys/thread2.h>
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104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
537b8fd3 317 struct an_ltv_ssidlist_new ssid;
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318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
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323 if (error)
324 return (error);
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325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
902f6373 328 return(ENXIO);
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329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
537b8fd3 342 sc->mpi350 = 0;
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343 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
344 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
345
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346 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
347 device_get_unit(dev));
984263bc 348 an_reset(sc);
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349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
902f6373 351 return(ENXIO);
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352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
902f6373 354 return(ENXIO);
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355
356 /* See if the ssid matches what we expect ... but doesn't have to */
537b8fd3 357 if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID))
902f6373 358 return(ENXIO);
984263bc 359
902f6373 360 return(0);
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361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
c45c9d6a 472 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
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473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 477 BUS_DMA_WAITOK, &dma->an_dma_map);
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478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
c45c9d6a 485 mapflags);
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486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
b92f9c1c 509 dma->an_dma_vaddr = NULL;
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510 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
511}
512
513/*
514 * Release all resources
515 */
516void
517an_release_resources(dev)
518 device_t dev;
519{
520 struct an_softc *sc = device_get_softc(dev);
521 int i;
522
523 if (sc->port_res) {
524 bus_release_resource(dev, SYS_RES_IOPORT,
525 sc->port_rid, sc->port_res);
526 sc->port_res = 0;
527 }
528 if (sc->mem_res) {
529 bus_release_resource(dev, SYS_RES_MEMORY,
530 sc->mem_rid, sc->mem_res);
531 sc->mem_res = 0;
532 }
533 if (sc->mem_aux_res) {
534 bus_release_resource(dev, SYS_RES_MEMORY,
535 sc->mem_aux_rid, sc->mem_aux_res);
536 sc->mem_aux_res = 0;
537 }
538 if (sc->irq_res) {
539 bus_release_resource(dev, SYS_RES_IRQ,
540 sc->irq_rid, sc->irq_res);
541 sc->irq_res = 0;
542 }
543 if (sc->an_rid_buffer.an_dma_paddr) {
544 an_dma_free(sc, &sc->an_rid_buffer);
545 }
546 for (i = 0; i < AN_MAX_RX_DESC; i++)
547 if (sc->an_rx_buffer[i].an_dma_paddr) {
548 an_dma_free(sc, &sc->an_rx_buffer[i]);
549 }
550 for (i = 0; i < AN_MAX_TX_DESC; i++)
551 if (sc->an_tx_buffer[i].an_dma_paddr) {
552 an_dma_free(sc, &sc->an_tx_buffer[i]);
553 }
554 if (sc->an_dtag) {
555 bus_dma_tag_destroy(sc->an_dtag);
556 }
557
558}
559
560int
561an_init_mpi350_desc(sc)
562 struct an_softc *sc;
563{
564 struct an_command cmd_struct;
565 struct an_reply reply;
566 struct an_card_rid_desc an_rid_desc;
567 struct an_card_rx_desc an_rx_desc;
568 struct an_card_tx_desc an_tx_desc;
569 int i, desc;
570
571 if(!sc->an_rid_buffer.an_dma_paddr)
572 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
573 &sc->an_rid_buffer, 0);
574 for (i = 0; i < AN_MAX_RX_DESC; i++)
575 if(!sc->an_rx_buffer[i].an_dma_paddr)
576 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
577 &sc->an_rx_buffer[i], 0);
578 for (i = 0; i < AN_MAX_TX_DESC; i++)
579 if(!sc->an_tx_buffer[i].an_dma_paddr)
580 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
581 &sc->an_tx_buffer[i], 0);
582
583 /*
584 * Allocate RX descriptor
585 */
586 bzero(&reply,sizeof(reply));
587 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
588 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
589 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
590 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
591 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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592 if_printf(&sc->arpcom.ac_if,
593 "failed to allocate RX descriptor\n");
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594 return(EIO);
595 }
596
597 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
598 bzero(&an_rx_desc, sizeof(an_rx_desc));
599 an_rx_desc.an_valid = 1;
600 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
601 an_rx_desc.an_done = 0;
602 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
603
604 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
605 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
606 + (desc * sizeof(an_rx_desc))
607 + (i * 4),
608 ((u_int32_t*)&an_rx_desc)[i]);
609 }
610
611 /*
612 * Allocate TX descriptor
613 */
614
615 bzero(&reply,sizeof(reply));
616 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
617 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
618 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
619 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
620 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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621 if_printf(&sc->arpcom.ac_if,
622 "failed to allocate TX descriptor\n");
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623 return(EIO);
624 }
625
626 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
627 bzero(&an_tx_desc, sizeof(an_tx_desc));
628 an_tx_desc.an_offset = 0;
629 an_tx_desc.an_eoc = 0;
630 an_tx_desc.an_valid = 0;
631 an_tx_desc.an_len = 0;
632 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
633
634 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
635 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
636 + (desc * sizeof(an_tx_desc))
637 + (i * 4),
638 ((u_int32_t*)&an_tx_desc)[i]);
639 }
640
641 /*
642 * Allocate RID descriptor
643 */
644
645 bzero(&reply,sizeof(reply));
646 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
647 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
648 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
649 cmd_struct.an_parm2 = 1;
650 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
651 if_printf(&sc->arpcom.ac_if,
652 "failed to allocate host descriptor\n");
984263bc
MD
653 return(EIO);
654 }
655
656 bzero(&an_rid_desc, sizeof(an_rid_desc));
657 an_rid_desc.an_valid = 1;
658 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
659 an_rid_desc.an_rid = 0;
660 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
661
662 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
663 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
664 ((u_int32_t*)&an_rid_desc)[i]);
665
666 return(0);
667}
668
669int
1c70eebf 670an_attach(sc, dev, flags)
984263bc 671 struct an_softc *sc;
1c70eebf 672 device_t dev;
984263bc
MD
673 int flags;
674{
675 struct ifnet *ifp = &sc->arpcom.ac_if;
676 int error;
677
89c0f216 678 callout_init(&sc->an_stat_timer);
984263bc
MD
679 sc->an_associated = 0;
680 sc->an_monitor = 0;
681 sc->an_was_monitor = 0;
682 sc->an_flash_buffer = NULL;
683
1c70eebf
JS
684 ifp->if_softc = sc;
685 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
686
984263bc
MD
687 /* Reset the NIC. */
688 an_reset(sc);
689 if (sc->mpi350) {
690 error = an_init_mpi350_desc(sc);
691 if (error)
692 return(error);
693 }
694
695 /* Load factory config */
696 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 697 device_printf(dev, "failed to load config data\n");
984263bc
MD
698 return(EIO);
699 }
700
701 /* Read the current configuration */
702 sc->an_config.an_type = AN_RID_GENCONFIG;
703 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
704 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 705 device_printf(dev, "read record failed\n");
984263bc
MD
706 return(EIO);
707 }
708
709 /* Read the card capabilities */
710 sc->an_caps.an_type = AN_RID_CAPABILITIES;
711 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
712 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 713 device_printf(dev, "read record failed\n");
984263bc
MD
714 return(EIO);
715 }
716
717 /* Read ssid list */
718 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 719 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 720 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 721 device_printf(dev, "read record failed\n");
984263bc
MD
722 return(EIO);
723 }
724
725 /* Read AP list */
726 sc->an_aplist.an_type = AN_RID_APLIST;
727 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
728 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 729 device_printf(dev, "read record failed\n");
984263bc
MD
730 return(EIO);
731 }
732
733#ifdef ANCACHE
734 /* Read the RSSI <-> dBm map */
735 sc->an_have_rssimap = 0;
736 if (sc->an_caps.an_softcaps & 8) {
737 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
738 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
739 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 740 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 741 } else {
1c70eebf 742 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
743 sc->an_have_rssimap = 1;
744 }
745 } else {
1c70eebf 746 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
747 }
748#endif
749
984263bc
MD
750 ifp->if_mtu = ETHERMTU;
751 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
752 ifp->if_ioctl = an_ioctl;
984263bc
MD
753 ifp->if_start = an_start;
754 ifp->if_watchdog = an_watchdog;
755 ifp->if_init = an_init;
756 ifp->if_baudrate = 10000000;
38de8487
JS
757 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
758 ifq_set_ready(&ifp->if_snd);
984263bc
MD
759
760 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
761 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
762 sizeof(AN_DEFAULT_NODENAME) - 1);
763
537b8fd3
JS
764 bzero(sc->an_ssidlist.an_entry[0].an_ssid,
765 sizeof(sc->an_ssidlist.an_entry[0].an_ssid));
766 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid,
767 sizeof(AN_DEFAULT_NETNAME) - 1);
768 sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME);
984263bc
MD
769
770 sc->an_config.an_opmode =
771 AN_OPMODE_INFRASTRUCTURE_STATION;
772
773 sc->an_tx_rate = 0;
774 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
775
776 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
777#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
778 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
779 IFM_IEEE80211_ADHOC, 0), 0);
780 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
781 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
782 IFM_IEEE80211_ADHOC, 0), 0);
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
784 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
786 IFM_IEEE80211_ADHOC, 0), 0);
787 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
788 }
789 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
791 IFM_IEEE80211_ADHOC, 0), 0);
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
793 }
794 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
795 IFM_IEEE80211_ADHOC, 0), 0);
796 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
797#undef ADD
798 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
799 0, 0));
800
801 /*
802 * Call MI attach routine.
803 */
78195a76 804 ether_ifattach(ifp, sc->an_caps.an_oemaddr, NULL);
984263bc
MD
805
806 return(0);
807}
808
fcb0f42c
JS
809int
810an_detach(device_t dev)
811{
812 struct an_softc *sc = device_get_softc(dev);
813 struct ifnet *ifp = &sc->arpcom.ac_if;
814
78195a76 815 lwkt_serialize_enter(ifp->if_serializer);
fcb0f42c
JS
816 an_stop(sc);
817 ifmedia_removeall(&sc->an_ifmedia);
818 ether_ifdetach(ifp);
819 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
fcb0f42c 820 an_release_resources(dev);
78195a76 821 lwkt_serialize_exit(ifp->if_serializer);
fcb0f42c
JS
822 return 0;
823}
824
984263bc
MD
825static void
826an_rxeof(sc)
827 struct an_softc *sc;
828{
829 struct ifnet *ifp;
830 struct ether_header *eh;
831 struct ieee80211_frame *ih;
832 struct an_rxframe rx_frame;
833 struct an_rxframe_802_3 rx_frame_802_3;
834 struct mbuf *m;
835 int len, id, error = 0, i, count = 0;
836 int ieee80211_header_len;
837 u_char *bpf_buf;
838 u_short fc1;
839 struct an_card_rx_desc an_rx_desc;
840 u_int8_t *buf;
841
842 ifp = &sc->arpcom.ac_if;
843
844 if (!sc->mpi350) {
845 id = CSR_READ_2(sc, AN_RX_FID);
846
847 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
848 /* read raw 802.11 packet */
849 bpf_buf = sc->buf_802_11;
850
851 /* read header */
852 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
853 sizeof(rx_frame))) {
854 ifp->if_ierrors++;
855 return;
856 }
857
858 /*
859 * skip beacon by default since this increases the
860 * system load a lot
861 */
862
863 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
864 (rx_frame.an_frame_ctl &
865 IEEE80211_FC0_SUBTYPE_BEACON)) {
866 return;
867 }
868
869 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
870 len = rx_frame.an_rx_payload_len
871 + sizeof(rx_frame);
872 /* Check for insane frame length */
873 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
874 if_printf(ifp,
875 "oversized packet received "
876 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
877 ifp->if_ierrors++;
878 return;
879 }
880
881 bcopy((char *)&rx_frame,
882 bpf_buf, sizeof(rx_frame));
883
884 error = an_read_data(sc, id, sizeof(rx_frame),
885 (caddr_t)bpf_buf+sizeof(rx_frame),
886 rx_frame.an_rx_payload_len);
887 } else {
888 fc1=rx_frame.an_frame_ctl >> 8;
889 ieee80211_header_len =
890 sizeof(struct ieee80211_frame);
891 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
892 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
893 ieee80211_header_len += ETHER_ADDR_LEN;
894 }
895
896 len = rx_frame.an_rx_payload_len
897 + ieee80211_header_len;
898 /* Check for insane frame length */
899 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
900 if_printf(ifp,
901 "oversized packet received "
902 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
903 ifp->if_ierrors++;
904 return;
905 }
906
907 ih = (struct ieee80211_frame *)bpf_buf;
908
909 bcopy((char *)&rx_frame.an_frame_ctl,
910 (char *)ih, ieee80211_header_len);
911
912 error = an_read_data(sc, id, sizeof(rx_frame) +
913 rx_frame.an_gaplen,
914 (caddr_t)ih +ieee80211_header_len,
915 rx_frame.an_rx_payload_len);
916 }
7600679e 917 BPF_TAP(ifp, bpf_buf, len);
984263bc 918 } else {
17b71a59 919 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
920 if (m == NULL) {
921 ifp->if_ierrors++;
922 return;
923 }
984263bc
MD
924 m->m_pkthdr.rcvif = ifp;
925 /* Read Ethernet encapsulated packet */
926
927#ifdef ANCACHE
928 /* Read NIC frame header */
929 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
930 sizeof(rx_frame))) {
931 ifp->if_ierrors++;
932 return;
933 }
934#endif
935 /* Read in the 802_3 frame header */
936 if (an_read_data(sc, id, 0x34,
937 (caddr_t)&rx_frame_802_3,
938 sizeof(rx_frame_802_3))) {
939 ifp->if_ierrors++;
940 return;
941 }
942 if (rx_frame_802_3.an_rx_802_3_status != 0) {
943 ifp->if_ierrors++;
944 return;
945 }
946 /* Check for insane frame length */
947 len = rx_frame_802_3.an_rx_802_3_payload_len;
948 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
949 if_printf(ifp,
950 "oversized packet received (%d, %d)\n",
951 len, MCLBYTES);
984263bc
MD
952 ifp->if_ierrors++;
953 return;
954 }
955 m->m_pkthdr.len = m->m_len =
956 rx_frame_802_3.an_rx_802_3_payload_len + 12;
957
958 eh = mtod(m, struct ether_header *);
959
960 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
961 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
962 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
963 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
964
965 /* in mbuf header type is just before payload */
966 error = an_read_data(sc, id, 0x44,
967 (caddr_t)&(eh->ether_type),
968 rx_frame_802_3.an_rx_802_3_payload_len);
969
970 if (error) {
971 m_freem(m);
972 ifp->if_ierrors++;
973 return;
974 }
975 ifp->if_ipackets++;
976
984263bc 977#ifdef ANCACHE
3013ac0e 978 an_cache_store(sc, m,
984263bc
MD
979 rx_frame.an_rx_signal_strength,
980 rx_frame.an_rsvd0);
981#endif
78195a76 982 ifp->if_input(ifp, m);
984263bc
MD
983 }
984
985 } else { /* MPI-350 */
986 for (count = 0; count < AN_MAX_RX_DESC; count++){
987 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
988 ((u_int32_t*)&an_rx_desc)[i]
989 = CSR_MEM_AUX_READ_4(sc,
990 AN_RX_DESC_OFFSET
991 + (count * sizeof(an_rx_desc))
992 + (i * 4));
993
994 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
995 buf = sc->an_rx_buffer[count].an_dma_vaddr;
996
17b71a59 997 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
998 if (m == NULL) {
999 ifp->if_ierrors++;
1000 return;
1001 }
984263bc
MD
1002 m->m_pkthdr.rcvif = ifp;
1003 /* Read Ethernet encapsulated packet */
1004
1005 /*
1006 * No ANCACHE support since we just get back
1007 * an Ethernet packet no 802.11 info
1008 */
1009#if 0
1010#ifdef ANCACHE
1011 /* Read NIC frame header */
1012 bcopy(buf, (caddr_t)&rx_frame,
1013 sizeof(rx_frame));
1014#endif
1015#endif
1016 /* Check for insane frame length */
1017 len = an_rx_desc.an_len + 12;
1018 if (len > MCLBYTES) {
1c70eebf
JS
1019 if_printf(ifp,
1020 "oversized packet received "
1021 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1022 ifp->if_ierrors++;
1023 return;
1024 }
1025
1026 m->m_pkthdr.len = m->m_len =
1027 an_rx_desc.an_len + 12;
1028
1029 eh = mtod(m, struct ether_header *);
1030
1031 bcopy(buf, (char *)eh,
1032 m->m_pkthdr.len);
1033
1034 ifp->if_ipackets++;
1035
984263bc
MD
1036#if 0
1037#ifdef ANCACHE
3013ac0e 1038 an_cache_store(sc, m,
984263bc
MD
1039 rx_frame.an_rx_signal_strength,
1040 rx_frame.an_rsvd0);
1041#endif
1042#endif
78195a76 1043 ifp->if_input(ifp, m);
984263bc
MD
1044
1045 an_rx_desc.an_valid = 1;
1046 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1047 an_rx_desc.an_done = 0;
1048 an_rx_desc.an_phys =
1049 sc->an_rx_buffer[count].an_dma_paddr;
1050
1051 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1052 CSR_MEM_AUX_WRITE_4(sc,
1053 AN_RX_DESC_OFFSET
1054 + (count * sizeof(an_rx_desc))
1055 + (i * 4),
1056 ((u_int32_t*)&an_rx_desc)[i]);
1057
1058 } else {
1c70eebf
JS
1059 if_printf(ifp, "Didn't get valid RX packet "
1060 "%x %x %d\n",
1061 an_rx_desc.an_done,
1062 an_rx_desc.an_valid,
1063 an_rx_desc.an_len);
984263bc
MD
1064 }
1065 }
1066 }
1067}
1068
1069static void
1070an_txeof(sc, status)
1071 struct an_softc *sc;
1072 int status;
1073{
1074 struct ifnet *ifp;
1075 int id, i;
1076
1077 ifp = &sc->arpcom.ac_if;
1078
1079 ifp->if_timer = 0;
1080 ifp->if_flags &= ~IFF_OACTIVE;
1081
1082 if (!sc->mpi350) {
537b8fd3 1083 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
984263bc
MD
1084
1085 if (status & AN_EV_TX_EXC) {
1086 ifp->if_oerrors++;
1087 } else
1088 ifp->if_opackets++;
1089
1090 for (i = 0; i < AN_TX_RING_CNT; i++) {
1091 if (id == sc->an_rdata.an_tx_ring[i]) {
1092 sc->an_rdata.an_tx_ring[i] = 0;
1093 break;
1094 }
1095 }
1096
1097 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1098 } else { /* MPI 350 */
537b8fd3
JS
1099 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
1100 if (!sc->an_rdata.an_tx_empty){
1101 if (status & AN_EV_TX_EXC) {
1102 ifp->if_oerrors++;
1103 } else
1104 ifp->if_opackets++;
1105 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1106 if (sc->an_rdata.an_tx_prod ==
1107 sc->an_rdata.an_tx_cons)
1108 sc->an_rdata.an_tx_empty = 1;
1109 }
984263bc 1110 }
984263bc
MD
1111}
1112
1113/*
1114 * We abuse the stats updater to check the current NIC status. This
1115 * is important because we don't want to allow transmissions until
1116 * the NIC has synchronized to the current cell (either as the master
1117 * in an ad-hoc group, or as a station connected to an access point).
1118 */
1119static void
1120an_stats_update(xsc)
1121 void *xsc;
1122{
1123 struct an_softc *sc;
1124 struct ifnet *ifp;
984263bc
MD
1125
1126 sc = xsc;
1127 ifp = &sc->arpcom.ac_if;
1128
78195a76 1129 lwkt_serialize_enter(sc->arpcom.ac_if.if_serializer);
41d6c56f 1130
984263bc
MD
1131 sc->an_status.an_type = AN_RID_STATUS;
1132 sc->an_status.an_len = sizeof(struct an_ltv_status);
1133 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1134
1135 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1136 sc->an_associated = 1;
1137 else
1138 sc->an_associated = 0;
1139
41d6c56f
JS
1140 /* Don't do this while we're not transmitting */
1141 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
1142 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1143 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1144 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
984263bc
MD
1145 }
1146
89c0f216 1147 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 1148
78195a76 1149 lwkt_serialize_exit(sc->arpcom.ac_if.if_serializer);
984263bc
MD
1150}
1151
1152void
1153an_intr(xsc)
1154 void *xsc;
1155{
1156 struct an_softc *sc;
1157 struct ifnet *ifp;
1158 u_int16_t status;
1159
1160 sc = (struct an_softc*)xsc;
1161
984263bc
MD
1162 ifp = &sc->arpcom.ac_if;
1163
1164 /* Disable interrupts. */
1165 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1166
1167 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
537b8fd3 1168 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350));
984263bc 1169
537b8fd3
JS
1170 if (status & AN_EV_MIC)
1171 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC);
984263bc
MD
1172
1173 if (status & AN_EV_LINKSTAT) {
1174 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1175 == AN_LINKSTAT_ASSOCIATED)
1176 sc->an_associated = 1;
1177 else
1178 sc->an_associated = 0;
1179 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1180 }
1181
1182 if (status & AN_EV_RX) {
1183 an_rxeof(sc);
1184 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1185 }
1186
537b8fd3
JS
1187 if (sc->mpi350 && status & AN_EV_TX_CPY) {
1188 an_txeof(sc, status);
1189 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_CPY);
1190 }
1191
984263bc
MD
1192 if (status & AN_EV_TX) {
1193 an_txeof(sc, status);
1194 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1195 }
1196
1197 if (status & AN_EV_TX_EXC) {
1198 an_txeof(sc, status);
1199 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1200 }
1201
1202 if (status & AN_EV_ALLOC)
1203 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1204
1205 /* Re-enable interrupts. */
537b8fd3 1206 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc 1207
38de8487 1208 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1209 an_start(ifp);
1210
1211 return;
1212}
1213
1214static int
1215an_cmd_struct(sc, cmd, reply)
1216 struct an_softc *sc;
1217 struct an_command *cmd;
1218 struct an_reply *reply;
1219{
1220 int i;
1221
1222 for (i = 0; i != AN_TIMEOUT; i++) {
1223 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1224 DELAY(1000);
1225 } else
1226 break;
1227 }
1228 if( i == AN_TIMEOUT) {
1229 printf("BUSY\n");
1230 return(ETIMEDOUT);
1231 }
1232
1233 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1234 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1235 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1236 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1237
1238 for (i = 0; i < AN_TIMEOUT; i++) {
1239 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1240 break;
1241 DELAY(1000);
1242 }
1243
1244 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1245 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1246 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1247 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1248
1249 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1250 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1251
1252 /* Ack the command */
1253 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1254
1255 if (i == AN_TIMEOUT)
1256 return(ETIMEDOUT);
1257
1258 return(0);
1259}
1260
1261static int
1262an_cmd(sc, cmd, val)
1263 struct an_softc *sc;
1264 int cmd;
1265 int val;
1266{
1267 int i, s = 0;
1268
1269 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1270 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1271 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1272 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1273
1274 for (i = 0; i < AN_TIMEOUT; i++) {
1275 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1276 break;
1277 else {
1278 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1279 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1280 }
1281 }
1282
1283 for (i = 0; i < AN_TIMEOUT; i++) {
1284 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1285 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1286 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1287 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1288 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1289 break;
1290 }
1291
1292 /* Ack the command */
1293 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1294
1295 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1296 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1297
1298 if (i == AN_TIMEOUT)
1299 return(ETIMEDOUT);
1300
1301 return(0);
1302}
1303
1304/*
1305 * This reset sequence may look a little strange, but this is the
1306 * most reliable method I've found to really kick the NIC in the
1307 * head and force it to reboot correctly.
1308 */
1309static void
1310an_reset(sc)
1311 struct an_softc *sc;
1312{
984263bc
MD
1313 an_cmd(sc, AN_CMD_ENABLE, 0);
1314 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1315 an_cmd(sc, AN_CMD_NOOP2, 0);
1316
1317 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1318 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1319
1320 an_cmd(sc, AN_CMD_DISABLE, 0);
1321
1322 return;
1323}
1324
1325/*
1326 * Read an LTV record from the NIC.
1327 */
1328static int
1329an_read_record(sc, ltv)
1330 struct an_softc *sc;
1331 struct an_ltv_gen *ltv;
1332{
1333 struct an_ltv_gen *an_ltv;
1334 struct an_card_rid_desc an_rid_desc;
1335 struct an_command cmd;
1336 struct an_reply reply;
1337 u_int16_t *ptr;
1338 u_int8_t *ptr2;
1339 int i, len;
1340
1341 if (ltv->an_len < 4 || ltv->an_type == 0)
1342 return(EINVAL);
1343
1344 if (!sc->mpi350){
1345 /* Tell the NIC to enter record read mode. */
1346 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1347 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1348 return(EIO);
1349 }
1350
1351 /* Seek to the record. */
1352 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1353 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1354 return(EIO);
1355 }
1356
1357 /*
1358 * Read the length and record type and make sure they
1359 * match what we expect (this verifies that we have enough
1360 * room to hold all of the returned data).
1361 * Length includes type but not length.
1362 */
1363 len = CSR_READ_2(sc, AN_DATA1);
1364 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1365 if_printf(&sc->arpcom.ac_if,
1366 "record length mismatch -- expected %d, "
1367 "got %d for Rid %x\n",
1368 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1369 len = ltv->an_len - 2;
1370 } else {
1371 ltv->an_len = len + 2;
1372 }
1373
1374 /* Now read the data. */
1375 len -= 2; /* skip the type */
1376 ptr = &ltv->an_val;
1377 for (i = len; i > 1; i -= 2)
1378 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1379 if (i) {
1380 ptr2 = (u_int8_t *)ptr;
1381 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1382 }
1383 } else { /* MPI-350 */
b92f9c1c
JS
1384 if (sc->an_rid_buffer.an_dma_vaddr == NULL)
1385 return(EIO);
984263bc
MD
1386 an_rid_desc.an_valid = 1;
1387 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1388 an_rid_desc.an_rid = 0;
1389 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1390 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1391
1392 bzero(&cmd, sizeof(cmd));
1393 bzero(&reply, sizeof(reply));
1394 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1395 cmd.an_parm0 = ltv->an_type;
1396
1397 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1398 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1399 ((u_int32_t*)&an_rid_desc)[i]);
1400
1401 if (an_cmd_struct(sc, &cmd, &reply)
1402 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1403 if_printf(&sc->arpcom.ac_if,
1404 "failed to read RID %x %x %x %x %x, %d\n",
1405 ltv->an_type,
1406 reply.an_status,
1407 reply.an_resp0,
1408 reply.an_resp1,
1409 reply.an_resp2,
1410 i);
984263bc
MD
1411 return(EIO);
1412 }
1413
1414 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1415 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1416 an_rid_desc.an_len = an_ltv->an_len;
1417 }
1418
b92f9c1c
JS
1419 len = an_rid_desc.an_len;
1420 if (len > (ltv->an_len - 2)) {
1421 if_printf(&sc->arpcom.ac_if,
1422 "record length mismatch -- expected %d, "
1423 "got %d for Rid %x\n",
1424 ltv->an_len - 2, len, ltv->an_type);
1425 len = ltv->an_len - 2;
1426 } else {
1427 ltv->an_len = len + 2;
1428 }
1429 bcopy(&an_ltv->an_type, &ltv->an_val, len);
984263bc
MD
1430 }
1431
1432 if (an_dump)
1433 an_dump_record(sc, ltv, "Read");
1434
1435 return(0);
1436}
1437
1438/*
1439 * Same as read, except we inject data instead of reading it.
1440 */
1441static int
1442an_write_record(sc, ltv)
1443 struct an_softc *sc;
1444 struct an_ltv_gen *ltv;
1445{
1446 struct an_card_rid_desc an_rid_desc;
1447 struct an_command cmd;
1448 struct an_reply reply;
1449 char *buf;
1450 u_int16_t *ptr;
1451 u_int8_t *ptr2;
1452 int i, len;
1453
1454 if (an_dump)
1455 an_dump_record(sc, ltv, "Write");
1456
1457 if (!sc->mpi350){
1458 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1459 return(EIO);
1460
1461 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1462 return(EIO);
1463
1464 /*
1465 * Length includes type but not length.
1466 */
1467 len = ltv->an_len - 2;
1468 CSR_WRITE_2(sc, AN_DATA1, len);
1469
1470 len -= 2; /* skip the type */
1471 ptr = &ltv->an_val;
1472 for (i = len; i > 1; i -= 2)
1473 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1474 if (i) {
1475 ptr2 = (u_int8_t *)ptr;
1476 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1477 }
1478
1479 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1480 return(EIO);
1481 } else {
1482 /* MPI-350 */
1483
1484 for (i = 0; i != AN_TIMEOUT; i++) {
1485 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1486 & AN_CMD_BUSY) {
1487 DELAY(10);
1488 } else
1489 break;
1490 }
1491 if (i == AN_TIMEOUT) {
1492 printf("BUSY\n");
1493 }
1494
1495 an_rid_desc.an_valid = 1;
1496 an_rid_desc.an_len = ltv->an_len - 2;
1497 an_rid_desc.an_rid = ltv->an_type;
1498 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1499
1500 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1501 an_rid_desc.an_len);
1502
1503 bzero(&cmd,sizeof(cmd));
1504 bzero(&reply,sizeof(reply));
1505 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1506 cmd.an_parm0 = ltv->an_type;
1507
1508 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1509 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1510 ((u_int32_t*)&an_rid_desc)[i]);
1511
1512 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1513 if_printf(&sc->arpcom.ac_if,
1514 "failed to write RID 1 %x %x %x %x %x, %d\n",
1515 ltv->an_type,
984263bc
MD
1516 reply.an_status,
1517 reply.an_resp0,
1518 reply.an_resp1,
1519 reply.an_resp2,
1520 i);
1521 return(EIO);
1522 }
1523
1524 ptr = (u_int16_t *)buf;
1525
1526 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1527 if_printf(&sc->arpcom.ac_if,
1528 "failed to write RID 2 %x %x %x %x %x, %d\n",
1529 ltv->an_type,
984263bc
MD
1530 reply.an_status,
1531 reply.an_resp0,
1532 reply.an_resp1,
1533 reply.an_resp2,
1534 i);
1535 return(EIO);
1536 }
1537 }
1538
1539 return(0);
1540}
1541
1542static void
1543an_dump_record(sc, ltv, string)
1544 struct an_softc *sc;
1545 struct an_ltv_gen *ltv;
1546 char *string;
1547{
1548 u_int8_t *ptr2;
1549 int len;
1550 int i;
1551 int count = 0;
1552 char buf[17], temp;
1553
1554 len = ltv->an_len - 4;
1c70eebf
JS
1555 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1556 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1557
1558 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1559 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1560 bzero(buf,sizeof(buf));
1561
1562 ptr2 = (u_int8_t *)&ltv->an_val;
1563 for (i = len; i > 0; i--) {
1564 printf("%02x ", *ptr2);
1565
1566 temp = *ptr2++;
1567 if (temp >= ' ' && temp <= '~')
1568 buf[count] = temp;
1569 else if (temp >= 'A' && temp <= 'Z')
1570 buf[count] = temp;
1571 else
1572 buf[count] = '.';
1573 if (++count == 16) {
1574 count = 0;
1575 printf("%s\n",buf);
1c70eebf 1576 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1577 bzero(buf,sizeof(buf));
1578 }
1579 }
1580 for (; count != 16; count++) {
1581 printf(" ");
1582 }
1583 printf(" %s\n",buf);
1584 }
1585}
1586
1587static int
1588an_seek(sc, id, off, chan)
1589 struct an_softc *sc;
1590 int id, off, chan;
1591{
1592 int i;
1593 int selreg, offreg;
1594
1595 switch (chan) {
1596 case AN_BAP0:
1597 selreg = AN_SEL0;
1598 offreg = AN_OFF0;
1599 break;
1600 case AN_BAP1:
1601 selreg = AN_SEL1;
1602 offreg = AN_OFF1;
1603 break;
1604 default:
1c70eebf 1605 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1606 return(EIO);
1607 }
1608
1609 CSR_WRITE_2(sc, selreg, id);
1610 CSR_WRITE_2(sc, offreg, off);
1611
1612 for (i = 0; i < AN_TIMEOUT; i++) {
1613 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1614 break;
1615 }
1616
1617 if (i == AN_TIMEOUT)
1618 return(ETIMEDOUT);
1619
1620 return(0);
1621}
1622
1623static int
1624an_read_data(sc, id, off, buf, len)
1625 struct an_softc *sc;
1626 int id, off;
1627 caddr_t buf;
1628 int len;
1629{
1630 int i;
1631 u_int16_t *ptr;
1632 u_int8_t *ptr2;
1633
1634 if (off != -1) {
1635 if (an_seek(sc, id, off, AN_BAP1))
1636 return(EIO);
1637 }
1638
1639 ptr = (u_int16_t *)buf;
1640 for (i = len; i > 1; i -= 2)
1641 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1642 if (i) {
1643 ptr2 = (u_int8_t *)ptr;
1644 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1645 }
1646
1647 return(0);
1648}
1649
1650static int
1651an_write_data(sc, id, off, buf, len)
1652 struct an_softc *sc;
1653 int id, off;
1654 caddr_t buf;
1655 int len;
1656{
1657 int i;
1658 u_int16_t *ptr;
1659 u_int8_t *ptr2;
1660
1661 if (off != -1) {
1662 if (an_seek(sc, id, off, AN_BAP0))
1663 return(EIO);
1664 }
1665
1666 ptr = (u_int16_t *)buf;
1667 for (i = len; i > 1; i -= 2)
1668 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1669 if (i) {
1670 ptr2 = (u_int8_t *)ptr;
1671 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1672 }
1673
1674 return(0);
1675}
1676
1677/*
1678 * Allocate a region of memory inside the NIC and zero
1679 * it out.
1680 */
1681static int
1682an_alloc_nicmem(sc, len, id)
1683 struct an_softc *sc;
1684 int len;
1685 int *id;
1686{
1687 int i;
1688
1689 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1690 if_printf(&sc->arpcom.ac_if,
1691 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1692 return(ENOMEM);
1693 }
1694
1695 for (i = 0; i < AN_TIMEOUT; i++) {
1696 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1697 break;
1698 }
1699
1700 if (i == AN_TIMEOUT)
1701 return(ETIMEDOUT);
1702
1703 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1704 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1705
1706 if (an_seek(sc, *id, 0, AN_BAP0))
1707 return(EIO);
1708
1709 for (i = 0; i < len / 2; i++)
1710 CSR_WRITE_2(sc, AN_DATA0, 0);
1711
1712 return(0);
1713}
1714
1715static void
1716an_setdef(sc, areq)
1717 struct an_softc *sc;
1718 struct an_req *areq;
1719{
984263bc
MD
1720 struct ifnet *ifp;
1721 struct an_ltv_genconfig *cfg;
537b8fd3 1722 struct an_ltv_ssidlist_new *ssid;
984263bc
MD
1723 struct an_ltv_aplist *ap;
1724 struct an_ltv_gen *sp;
1725
1726 ifp = &sc->arpcom.ac_if;
1727
1728 switch (areq->an_type) {
1729 case AN_RID_GENCONFIG:
1730 cfg = (struct an_ltv_genconfig *)areq;
1731
984263bc
MD
1732 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1733 ETHER_ADDR_LEN);
f2682cb9 1734 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1735
1736 bcopy((char *)cfg, (char *)&sc->an_config,
1737 sizeof(struct an_ltv_genconfig));
1738 break;
1739 case AN_RID_SSIDLIST:
537b8fd3 1740 ssid = (struct an_ltv_ssidlist_new *)areq;
984263bc 1741 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
537b8fd3 1742 sizeof(struct an_ltv_ssidlist_new));
984263bc
MD
1743 break;
1744 case AN_RID_APLIST:
1745 ap = (struct an_ltv_aplist *)areq;
1746 bcopy((char *)ap, (char *)&sc->an_aplist,
1747 sizeof(struct an_ltv_aplist));
1748 break;
1749 case AN_RID_TX_SPEED:
1750 sp = (struct an_ltv_gen *)areq;
1751 sc->an_tx_rate = sp->an_val;
1752
1753 /* Read the current configuration */
1754 sc->an_config.an_type = AN_RID_GENCONFIG;
1755 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1756 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1757 cfg = &sc->an_config;
1758
1759 /* clear other rates and set the only one we want */
1760 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1761 cfg->an_rates[0] = sc->an_tx_rate;
1762
1763 /* Save the new rate */
1764 sc->an_config.an_type = AN_RID_GENCONFIG;
1765 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1766 break;
1767 case AN_RID_WEP_TEMP:
1768 /* Cache the temp keys */
1769 bcopy(areq,
1770 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1771 sizeof(struct an_ltv_key));
1772 case AN_RID_WEP_PERM:
1773 case AN_RID_LEAPUSERNAME:
1774 case AN_RID_LEAPPASSWORD:
537b8fd3
JS
1775 an_init(sc);
1776
984263bc
MD
1777 /* Disable the MAC. */
1778 an_cmd(sc, AN_CMD_DISABLE, 0);
1779
1780 /* Write the key */
1781 an_write_record(sc, (struct an_ltv_gen *)areq);
1782
1783 /* Turn the MAC back on. */
1784 an_cmd(sc, AN_CMD_ENABLE, 0);
1785
1786 break;
1787 case AN_RID_MONITOR_MODE:
1788 cfg = (struct an_ltv_genconfig *)areq;
1789 bpfdetach(ifp);
1790 if (ng_ether_detach_p != NULL)
1791 (*ng_ether_detach_p) (ifp);
1792 sc->an_monitor = cfg->an_len;
1793
1794 if (sc->an_monitor & AN_MONITOR) {
1795 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1796 bpfattach(ifp, DLT_AIRONET_HEADER,
1797 sizeof(struct ether_header));
1798 } else {
1799 bpfattach(ifp, DLT_IEEE802_11,
1800 sizeof(struct ether_header));
1801 }
1802 } else {
1803 bpfattach(ifp, DLT_EN10MB,
1804 sizeof(struct ether_header));
1805 if (ng_ether_attach_p != NULL)
1806 (*ng_ether_attach_p) (ifp);
1807 }
1808 break;
1809 default:
1c70eebf 1810 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc 1811 return;
984263bc
MD
1812 }
1813
1814
1815 /* Reinitialize the card. */
1816 if (ifp->if_flags)
1817 an_init(sc);
1818
1819 return;
1820}
1821
1822/*
1823 * Derived from Linux driver to enable promiscious mode.
1824 */
1825
1826static void
1827an_promisc(sc, promisc)
1828 struct an_softc *sc;
1829 int promisc;
1830{
1831 if (sc->an_was_monitor)
1832 an_reset(sc);
1c70eebf
JS
1833 if (sc->mpi350)
1834 an_init_mpi350_desc(sc);
984263bc
MD
1835 if (sc->an_monitor || sc->an_was_monitor)
1836 an_init(sc);
1837
1838 sc->an_was_monitor = sc->an_monitor;
1839 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1840
1841 return;
1842}
1843
1844static int
bd4539cc 1845an_ioctl(ifp, command, data, cr)
984263bc
MD
1846 struct ifnet *ifp;
1847 u_long command;
1848 caddr_t data;
bd4539cc 1849 struct ucred *cr;
984263bc 1850{
41d6c56f 1851 int error = 0;
984263bc 1852 int len;
537b8fd3 1853 int i, max;
984263bc
MD
1854 struct an_softc *sc;
1855 struct ifreq *ifr;
984263bc
MD
1856 struct ieee80211req *ireq;
1857 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1858 u_int8_t *tmpptr;
1859 struct an_ltv_genconfig *config;
1860 struct an_ltv_key *key;
1861 struct an_ltv_status *status;
537b8fd3 1862 struct an_ltv_ssidlist_new *ssids;
984263bc
MD
1863 int mode;
1864 struct aironet_ioctl l_ioctl;
1865
1866 sc = ifp->if_softc;
984263bc
MD
1867 ifr = (struct ifreq *)data;
1868 ireq = (struct ieee80211req *)data;
1869
1870 config = (struct an_ltv_genconfig *)&sc->areq;
1871 key = (struct an_ltv_key *)&sc->areq;
1872 status = (struct an_ltv_status *)&sc->areq;
537b8fd3 1873 ssids = (struct an_ltv_ssidlist_new *)&sc->areq;
984263bc 1874
984263bc 1875 switch (command) {
984263bc
MD
1876 case SIOCSIFFLAGS:
1877 if (ifp->if_flags & IFF_UP) {
1878 if (ifp->if_flags & IFF_RUNNING &&
1879 ifp->if_flags & IFF_PROMISC &&
1880 !(sc->an_if_flags & IFF_PROMISC)) {
1881 an_promisc(sc, 1);
1882 } else if (ifp->if_flags & IFF_RUNNING &&
1883 !(ifp->if_flags & IFF_PROMISC) &&
1884 sc->an_if_flags & IFF_PROMISC) {
1885 an_promisc(sc, 0);
1886 } else
1887 an_init(sc);
1888 } else {
1889 if (ifp->if_flags & IFF_RUNNING)
1890 an_stop(sc);
1891 }
1892 sc->an_if_flags = ifp->if_flags;
1893 error = 0;
1894 break;
1895 case SIOCSIFMEDIA:
1896 case SIOCGIFMEDIA:
1897 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1898 break;
1899 case SIOCADDMULTI:
1900 case SIOCDELMULTI:
1901 /* The Aironet has no multicast filter. */
1902 error = 0;
1903 break;
1904 case SIOCGAIRONET:
1905 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1906 if (error != 0)
1907 break;
1908#ifdef ANCACHE
1909 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1910 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1911 if (error)
1912 break;
1913 sc->an_sigitems = sc->an_nextitem = 0;
1914 break;
1915 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1916 char *pt = (char *)&sc->areq.an_val;
1917 bcopy((char *)&sc->an_sigitems, (char *)pt,
1918 sizeof(int));
1919 pt += sizeof(int);
1920 sc->areq.an_len = sizeof(int) / 2;
1921 bcopy((char *)&sc->an_sigcache, (char *)pt,
1922 sizeof(struct an_sigcache) * sc->an_sigitems);
1923 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1924 sc->an_sigitems) / 2) + 1;
1925 } else
1926#endif
1927 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1928 error = EINVAL;
1929 break;
1930 }
1931 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1932 break;
1933 case SIOCSAIRONET:
bd4539cc 1934 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1935 break;
984263bc
MD
1936 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1937 if (error != 0)
1938 break;
1939 an_setdef(sc, &sc->areq);
1940 break;
1941 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1942 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1943 break;
984263bc
MD
1944 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1945 mode = l_ioctl.command;
1946
1947 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1948 error = readrids(ifp, &l_ioctl);
1949 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1950 error = writerids(ifp, &l_ioctl);
1951 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1952 error = flashcard(ifp, &l_ioctl);
1953 } else {
1954 error =-1;
1955 }
1956
1957 /* copy out the updated command info */
1958 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1959
1960 break;
1961 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1962 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1963 break;
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MD
1964 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1965 l_ioctl.command = 0;
1966 error = AIROMAGIC;
1967 copyout(&error, l_ioctl.data, sizeof(error));
1968 error = 0;
1969 break;
1970 case SIOCG80211:
1971 sc->areq.an_len = sizeof(sc->areq);
1972 /* was that a good idea DJA we are doing a short-cut */
1973 switch (ireq->i_type) {
1974 case IEEE80211_IOC_SSID:
1975 if (ireq->i_val == -1) {
1976 sc->areq.an_type = AN_RID_STATUS;
1977 if (an_read_record(sc,
1978 (struct an_ltv_gen *)&sc->areq)) {
1979 error = EINVAL;
1980 break;
1981 }
1982 len = status->an_ssidlen;
1983 tmpptr = status->an_ssid;
1984 } else if (ireq->i_val >= 0) {
1985 sc->areq.an_type = AN_RID_SSIDLIST;
1986 if (an_read_record(sc,
1987 (struct an_ltv_gen *)&sc->areq)) {
1988 error = EINVAL;
1989 break;
1990 }
537b8fd3
JS
1991 max = (sc->areq.an_len - 4)
1992 / sizeof(struct an_ltv_ssid_entry);
1993 if ( max > MAX_SSIDS ) {
1994 printf("To many SSIDs only using "
1995 "%d of %d\n",
1996 MAX_SSIDS, max);
1997 max = MAX_SSIDS;
1998 }
1999 if (ireq->i_val > max) {
984263bc
MD
2000 error = EINVAL;
2001 break;
537b8fd3
JS
2002 } else {
2003 len = ssids->an_entry[ireq->i_val].an_len;
2004 tmpptr = ssids->an_entry[ireq->i_val].an_ssid;
984263bc
MD
2005 }
2006 } else {
2007 error = EINVAL;
2008 break;
2009 }
2010 if (len > IEEE80211_NWID_LEN) {
2011 error = EINVAL;
2012 break;
2013 }
2014 ireq->i_len = len;
2015 bzero(tmpstr, IEEE80211_NWID_LEN);
2016 bcopy(tmpptr, tmpstr, len);
2017 error = copyout(tmpstr, ireq->i_data,
2018 IEEE80211_NWID_LEN);
2019 break;
2020 case IEEE80211_IOC_NUMSSIDS:
537b8fd3
JS
2021 sc->areq.an_len = sizeof(sc->areq);
2022 sc->areq.an_type = AN_RID_SSIDLIST;
2023 if (an_read_record(sc,
2024 (struct an_ltv_gen *)&sc->areq)) {
2025 error = EINVAL;
2026 break;
2027 }
2028 max = (sc->areq.an_len - 4)
2029 / sizeof(struct an_ltv_ssid_entry);
2030 if (max > MAX_SSIDS) {
2031 printf("To many SSIDs only using "
2032 "%d of %d\n",
2033 MAX_SSIDS, max);
2034 max = MAX_SSIDS;
2035 }
2036 ireq->i_val = max;
984263bc
MD
2037 break;
2038 case IEEE80211_IOC_WEP:
2039 sc->areq.an_type = AN_RID_ACTUALCFG;
2040 if (an_read_record(sc,
2041 (struct an_ltv_gen *)&sc->areq)) {
2042 error = EINVAL;
2043 break;
2044 }
2045 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2046 if (config->an_authtype &
2047 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2048 ireq->i_val = IEEE80211_WEP_MIXED;
2049 else
2050 ireq->i_val = IEEE80211_WEP_ON;
2051 } else {
2052 ireq->i_val = IEEE80211_WEP_OFF;
2053 }
2054 break;
2055 case IEEE80211_IOC_WEPKEY:
2056 /*
2057 * XXX: I'm not entierly convinced this is
2058 * correct, but it's what is implemented in
2059 * ancontrol so it will have to do until we get
2060 * access to actual Cisco code.
2061 */
2062 if (ireq->i_val < 0 || ireq->i_val > 8) {
2063 error = EINVAL;
2064 break;
2065 }
2066 len = 0;
2067 if (ireq->i_val < 5) {
2068 sc->areq.an_type = AN_RID_WEP_TEMP;
2069 for (i = 0; i < 5; i++) {
2070 if (an_read_record(sc,
2071 (struct an_ltv_gen *)&sc->areq)) {
2072 error = EINVAL;
2073 break;
2074 }
2075 if (key->kindex == 0xffff)
2076 break;
2077 if (key->kindex == ireq->i_val)
2078 len = key->klen;
2079 /* Required to get next entry */
2080 sc->areq.an_type = AN_RID_WEP_PERM;
2081 }
2082 if (error != 0)
2083 break;
2084 }
2085 /* We aren't allowed to read the value of the
2086 * key from the card so we just output zeros
2087 * like we would if we could read the card, but
2088 * denied the user access.
2089 */
2090 bzero(tmpstr, len);
2091 ireq->i_len = len;
2092 error = copyout(tmpstr, ireq->i_data, len);
2093 break;
2094 case IEEE80211_IOC_NUMWEPKEYS:
2095 ireq->i_val = 9; /* include home key */
2096 break;
2097 case IEEE80211_IOC_WEPTXKEY:
2098 /*
2099 * For some strange reason, you have to read all
2100 * keys before you can read the txkey.
2101 */
2102 sc->areq.an_type = AN_RID_WEP_TEMP;
2103 for (i = 0; i < 5; i++) {
2104 if (an_read_record(sc,
2105 (struct an_ltv_gen *) &sc->areq)) {
2106 error = EINVAL;
2107 break;
2108 }
2109 if (key->kindex == 0xffff)
2110 break;
2111 /* Required to get next entry */
2112 sc->areq.an_type = AN_RID_WEP_PERM;
2113 }
2114 if (error != 0)
2115 break;
2116
2117 sc->areq.an_type = AN_RID_WEP_PERM;
2118 key->kindex = 0xffff;
2119 if (an_read_record(sc,
2120 (struct an_ltv_gen *)&sc->areq)) {
2121 error = EINVAL;
2122 break;
2123 }
2124 ireq->i_val = key->mac[0];
2125 /*
2126 * Check for home mode. Map home mode into
2127 * 5th key since that is how it is stored on
2128 * the card
2129 */
2130 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2131 sc->areq.an_type = AN_RID_GENCONFIG;
2132 if (an_read_record(sc,
2133 (struct an_ltv_gen *)&sc->areq)) {
2134 error = EINVAL;
2135 break;
2136 }
2137 if (config->an_home_product & AN_HOME_NETWORK)
2138 ireq->i_val = 4;
2139 break;
2140 case IEEE80211_IOC_AUTHMODE:
2141 sc->areq.an_type = AN_RID_ACTUALCFG;
2142 if (an_read_record(sc,
2143 (struct an_ltv_gen *)&sc->areq)) {
2144 error = EINVAL;
2145 break;
2146 }
2147 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2148 AN_AUTHTYPE_NONE) {
2149 ireq->i_val = IEEE80211_AUTH_NONE;
2150 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2151 AN_AUTHTYPE_OPEN) {
2152 ireq->i_val = IEEE80211_AUTH_OPEN;
2153 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2154 AN_AUTHTYPE_SHAREDKEY) {
2155 ireq->i_val = IEEE80211_AUTH_SHARED;
2156 } else
2157 error = EINVAL;
2158 break;
2159 case IEEE80211_IOC_STATIONNAME:
2160 sc->areq.an_type = AN_RID_ACTUALCFG;
2161 if (an_read_record(sc,
2162 (struct an_ltv_gen *)&sc->areq)) {
2163 error = EINVAL;
2164 break;
2165 }
2166 ireq->i_len = sizeof(config->an_nodename);
2167 tmpptr = config->an_nodename;
2168 bzero(tmpstr, IEEE80211_NWID_LEN);
2169 bcopy(tmpptr, tmpstr, ireq->i_len);
2170 error = copyout(tmpstr, ireq->i_data,
2171 IEEE80211_NWID_LEN);
2172 break;
2173 case IEEE80211_IOC_CHANNEL:
2174 sc->areq.an_type = AN_RID_STATUS;
2175 if (an_read_record(sc,
2176 (struct an_ltv_gen *)&sc->areq)) {
2177 error = EINVAL;
2178 break;
2179 }
2180 ireq->i_val = status->an_cur_channel;
2181 break;
2182 case IEEE80211_IOC_POWERSAVE:
2183 sc->areq.an_type = AN_RID_ACTUALCFG;
2184 if (an_read_record(sc,
2185 (struct an_ltv_gen *)&sc->areq)) {
2186 error = EINVAL;
2187 break;
2188 }
2189 if (config->an_psave_mode == AN_PSAVE_NONE) {
2190 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2191 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2192 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2193 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2194 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2195 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2196 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2197 } else
2198 error = EINVAL;
2199 break;
2200 case IEEE80211_IOC_POWERSAVESLEEP:
2201 sc->areq.an_type = AN_RID_ACTUALCFG;
2202 if (an_read_record(sc,
2203 (struct an_ltv_gen *)&sc->areq)) {
2204 error = EINVAL;
2205 break;
2206 }
2207 ireq->i_val = config->an_listen_interval;
2208 break;
2209 }
2210 break;
2211 case SIOCS80211:
bd4539cc 2212 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 2213 break;
984263bc
MD
2214 sc->areq.an_len = sizeof(sc->areq);
2215 /*
2216 * We need a config structure for everything but the WEP
2217 * key management and SSIDs so we get it now so avoid
2218 * duplicating this code every time.
2219 */
2220 if (ireq->i_type != IEEE80211_IOC_SSID &&
2221 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2222 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2223 sc->areq.an_type = AN_RID_GENCONFIG;
2224 if (an_read_record(sc,
2225 (struct an_ltv_gen *)&sc->areq)) {
2226 error = EINVAL;
2227 break;
2228 }
2229 }
2230 switch (ireq->i_type) {
2231 case IEEE80211_IOC_SSID:
537b8fd3 2232 sc->areq.an_len = sizeof(sc->areq);
984263bc
MD
2233 sc->areq.an_type = AN_RID_SSIDLIST;
2234 if (an_read_record(sc,
2235 (struct an_ltv_gen *)&sc->areq)) {
2236 error = EINVAL;
2237 break;
2238 }
2239 if (ireq->i_len > IEEE80211_NWID_LEN) {
2240 error = EINVAL;
2241 break;
2242 }
537b8fd3
JS
2243 max = (sc->areq.an_len - 4)
2244 / sizeof(struct an_ltv_ssid_entry);
2245 if (max > MAX_SSIDS) {
2246 printf("To many SSIDs only using "
2247 "%d of %d\n",
2248 MAX_SSIDS, max);
2249 max = MAX_SSIDS;
984263bc 2250 }
537b8fd3
JS
2251 if (ireq->i_val > max) {
2252 error = EINVAL;
2253 break;
2254 } else {
2255 error = copyin(ireq->i_data,
2256 ssids->an_entry[ireq->i_val].an_ssid,
2257 ireq->i_len);
2258 ssids->an_entry[ireq->i_val].an_len
2259 = ireq->i_len;
2260 break;
2261 }
984263bc
MD
2262 break;
2263 case IEEE80211_IOC_WEP:
2264 switch (ireq->i_val) {
2265 case IEEE80211_WEP_OFF:
2266 config->an_authtype &=
2267 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2268 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2269 break;
2270 case IEEE80211_WEP_ON:
2271 config->an_authtype |=
2272 AN_AUTHTYPE_PRIVACY_IN_USE;
2273 config->an_authtype &=
2274 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2275 break;
2276 case IEEE80211_WEP_MIXED:
2277 config->an_authtype |=
2278 AN_AUTHTYPE_PRIVACY_IN_USE |
2279 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2280 break;
2281 default:
2282 error = EINVAL;
2283 break;
2284 }
2285 break;
2286 case IEEE80211_IOC_WEPKEY:
2287 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2288 ireq->i_len > 13) {
2289 error = EINVAL;
2290 break;
2291 }
2292 error = copyin(ireq->i_data, tmpstr, 13);
2293 if (error != 0)
2294 break;
2295 /*
2296 * Map the 9th key into the home mode
2297 * since that is how it is stored on
2298 * the card
2299 */
2300 bzero(&sc->areq, sizeof(struct an_ltv_key));
2301 sc->areq.an_len = sizeof(struct an_ltv_key);
2302 key->mac[0] = 1; /* The others are 0. */
2303 if (ireq->i_val < 4) {
2304 sc->areq.an_type = AN_RID_WEP_TEMP;
2305 key->kindex = ireq->i_val;
2306 } else {
2307 sc->areq.an_type = AN_RID_WEP_PERM;
2308 key->kindex = ireq->i_val - 4;
2309 }
2310 key->klen = ireq->i_len;
2311 bcopy(tmpstr, key->key, key->klen);
2312 break;
2313 case IEEE80211_IOC_WEPTXKEY:
2314 if (ireq->i_val < 0 || ireq->i_val > 4) {
2315 error = EINVAL;
2316 break;
2317 }
2318
2319 /*
2320 * Map the 5th key into the home mode
2321 * since that is how it is stored on
2322 * the card
2323 */
2324 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2325 sc->areq.an_type = AN_RID_ACTUALCFG;
2326 if (an_read_record(sc,
2327 (struct an_ltv_gen *)&sc->areq)) {
2328 error = EINVAL;
2329 break;
2330 }
2331 if (ireq->i_val == 4) {
2332 config->an_home_product |= AN_HOME_NETWORK;
2333 ireq->i_val = 0;
2334 } else {
2335 config->an_home_product &= ~AN_HOME_NETWORK;
2336 }
2337
2338 sc->an_config.an_home_product
2339 = config->an_home_product;
2340
2341 /* update configuration */
2342 an_init(sc);
2343
2344 bzero(&sc->areq, sizeof(struct an_ltv_key));
2345 sc->areq.an_len = sizeof(struct an_ltv_key);
2346 sc->areq.an_type = AN_RID_WEP_PERM;
2347 key->kindex = 0xffff;
2348 key->mac[0] = ireq->i_val;
2349 break;
2350 case IEEE80211_IOC_AUTHMODE:
2351 switch (ireq->i_val) {
2352 case IEEE80211_AUTH_NONE:
2353 config->an_authtype = AN_AUTHTYPE_NONE |
2354 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2355 break;
2356 case IEEE80211_AUTH_OPEN:
2357 config->an_authtype = AN_AUTHTYPE_OPEN |
2358 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2359 break;
2360 case IEEE80211_AUTH_SHARED:
2361 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2362 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2363 break;
2364 default:
2365 error = EINVAL;
2366 }
2367 break;
2368 case IEEE80211_IOC_STATIONNAME:
2369 if (ireq->i_len > 16) {
2370 error = EINVAL;
2371 break;
2372 }
2373 bzero(config->an_nodename, 16);
2374 error = copyin(ireq->i_data,
2375 config->an_nodename, ireq->i_len);
2376 break;
2377 case IEEE80211_IOC_CHANNEL:
2378 /*
2379 * The actual range is 1-14, but if you set it
2380 * to 0 you get the default so we let that work
2381 * too.
2382 */
2383 if (ireq->i_val < 0 || ireq->i_val >14) {
2384 error = EINVAL;
2385 break;
2386 }
2387 config->an_ds_channel = ireq->i_val;
2388 break;
2389 case IEEE80211_IOC_POWERSAVE:
2390 switch (ireq->i_val) {
2391 case IEEE80211_POWERSAVE_OFF:
2392 config->an_psave_mode = AN_PSAVE_NONE;
2393 break;
2394 case IEEE80211_POWERSAVE_CAM:
2395 config->an_psave_mode = AN_PSAVE_CAM;
2396 break;
2397 case IEEE80211_POWERSAVE_PSP:
2398 config->an_psave_mode = AN_PSAVE_PSP;
2399 break;
2400 case IEEE80211_POWERSAVE_PSP_CAM:
2401 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2402 break;
2403 default:
2404 error = EINVAL;
2405 break;
2406 }
2407 break;
2408 case IEEE80211_IOC_POWERSAVESLEEP:
2409 config->an_listen_interval = ireq->i_val;
2410 break;
2411 }
2412
2413 if (!error)
2414 an_setdef(sc, &sc->areq);
2415 break;
2416 default:
4cde4dd5 2417 error = ether_ioctl(ifp, command, data);
984263bc
MD
2418 break;
2419 }
41d6c56f 2420
984263bc
MD
2421 return(error != 0);
2422}
2423
2424static int
2425an_init_tx_ring(sc)
2426 struct an_softc *sc;
2427{
2428 int i;
2429 int id;
2430
984263bc
MD
2431 if (!sc->mpi350) {
2432 for (i = 0; i < AN_TX_RING_CNT; i++) {
2433 if (an_alloc_nicmem(sc, 1518 +
2434 0x44, &id))
2435 return(ENOMEM);
2436 sc->an_rdata.an_tx_fids[i] = id;
2437 sc->an_rdata.an_tx_ring[i] = 0;
2438 }
2439 }
2440
2441 sc->an_rdata.an_tx_prod = 0;
2442 sc->an_rdata.an_tx_cons = 0;
2443 sc->an_rdata.an_tx_empty = 1;
2444
2445 return(0);
2446}
2447
2448static void
2449an_init(xsc)
2450 void *xsc;
2451{
2452 struct an_softc *sc = xsc;
2453 struct ifnet *ifp = &sc->arpcom.ac_if;
984263bc 2454
984263bc
MD
2455 if (ifp->if_flags & IFF_RUNNING)
2456 an_stop(sc);
2457
2458 sc->an_associated = 0;
2459
2460 /* Allocate the TX buffers */
2461 if (an_init_tx_ring(sc)) {
2462 an_reset(sc);
2463 if (sc->mpi350)
2464 an_init_mpi350_desc(sc);
2465 if (an_init_tx_ring(sc)) {
1c70eebf 2466 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2467 return;
2468 }
2469 }
2470
2471 /* Set our MAC address. */
2472 bcopy((char *)&sc->arpcom.ac_enaddr,
2473 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2474
2475 if (ifp->if_flags & IFF_BROADCAST)
2476 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2477 else
2478 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2479
2480 if (ifp->if_flags & IFF_MULTICAST)
2481 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2482
2483 if (ifp->if_flags & IFF_PROMISC) {
2484 if (sc->an_monitor & AN_MONITOR) {
2485 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2486 sc->an_config.an_rxmode |=
2487 AN_RXMODE_80211_MONITOR_ANYBSS |
2488 AN_RXMODE_NO_8023_HEADER;
2489 } else {
2490 sc->an_config.an_rxmode |=
2491 AN_RXMODE_80211_MONITOR_CURBSS |
2492 AN_RXMODE_NO_8023_HEADER;
2493 }
2494 }
2495 }
2496
2497 if (sc->an_have_rssimap)
2498 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2499
2500 /* Set the ssid list */
2501 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 2502 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 2503 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 2504 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2505 return;
2506 }
2507
2508 /* Set the AP list */
2509 sc->an_aplist.an_type = AN_RID_APLIST;
2510 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2511 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 2512 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2513 return;
2514 }
2515
2516 /* Set the configuration in the NIC */
2517 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2518 sc->an_config.an_type = AN_RID_GENCONFIG;
2519 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 2520 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2521 return;
2522 }
2523
2524 /* Enable the MAC */
2525 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
1c70eebf 2526 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2527 return;
2528 }
2529
2530 if (ifp->if_flags & IFF_PROMISC)
2531 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2532
2533 /* enable interrupts */
537b8fd3 2534 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD
2535
2536 ifp->if_flags |= IFF_RUNNING;
2537 ifp->if_flags &= ~IFF_OACTIVE;
2538
89c0f216 2539 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2540}
2541
2542static void
2543an_start(ifp)
2544 struct ifnet *ifp;
2545{
2546 struct an_softc *sc;
2547 struct mbuf *m0 = NULL;
2548 struct an_txframe_802_3 tx_frame_802_3;
2549 struct ether_header *eh;
2550 int id, idx, i;
2551 unsigned char txcontrol;
2552 struct an_card_tx_desc an_tx_desc;
984263bc
MD
2553 u_int8_t *buf;
2554
2555 sc = ifp->if_softc;
2556
984263bc
MD
2557 if (ifp->if_flags & IFF_OACTIVE)
2558 return;
2559
2560 if (!sc->an_associated)
2561 return;
2562
2563 /* We can't send in monitor mode so toss any attempts. */
2564 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2565 ifq_purge(&ifp->if_snd);
984263bc
MD
2566 return;
2567 }
2568
2569 idx = sc->an_rdata.an_tx_prod;
2570
2571 if (!sc->mpi350) {
2572 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2573
2574 while (sc->an_rdata.an_tx_ring[idx] == 0) {
d2c71fa0 2575 m0 = ifq_dequeue(&ifp->if_snd, NULL);
984263bc
MD
2576 if (m0 == NULL)
2577 break;
2578
2579 id = sc->an_rdata.an_tx_fids[idx];
2580 eh = mtod(m0, struct ether_header *);
2581
2582 bcopy((char *)&eh->ether_dhost,
2583 (char *)&tx_frame_802_3.an_tx_dst_addr,
2584 ETHER_ADDR_LEN);
2585 bcopy((char *)&eh->ether_shost,
2586 (char *)&tx_frame_802_3.an_tx_src_addr,
2587 ETHER_ADDR_LEN);
2588
2589 /* minus src/dest mac & type */
2590 tx_frame_802_3.an_tx_802_3_payload_len =
2591 m0->m_pkthdr.len - 12;
2592
2593 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2594 tx_frame_802_3.an_tx_802_3_payload_len,
2595 (caddr_t)&sc->an_txbuf);
2596
2597 txcontrol = AN_TXCTL_8023;
2598 /* write the txcontrol only */
2599 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2600 sizeof(txcontrol));
2601
2602 /* 802_3 header */
2603 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2604 sizeof(struct an_txframe_802_3));
2605
2606 /* in mbuf header type is just before payload */
2607 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2608 tx_frame_802_3.an_tx_802_3_payload_len);
2609
7600679e 2610 BPF_MTAP(ifp, m0);
984263bc
MD
2611
2612 m_freem(m0);
2613 m0 = NULL;
2614
2615 sc->an_rdata.an_tx_ring[idx] = id;
2616 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2617 if_printf(ifp, "xmit failed\n");
984263bc
MD
2618
2619 AN_INC(idx, AN_TX_RING_CNT);
537b8fd3
JS
2620
2621 /*
2622 * Set a timeout in case the chip goes out to lunch.
2623 */
2624 ifp->if_timer = 5;
984263bc
MD
2625 }
2626 } else { /* MPI-350 */
2da352b0
JS
2627 /* Disable interrupts. */
2628 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2629
984263bc
MD
2630 while (sc->an_rdata.an_tx_empty ||
2631 idx != sc->an_rdata.an_tx_cons) {
d2c71fa0 2632 m0 = ifq_dequeue(&ifp->if_snd, NULL);
984263bc
MD
2633 if (m0 == NULL) {
2634 break;
2635 }
2636 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2637
2638 eh = mtod(m0, struct ether_header *);
2639
2640 /* DJA optimize this to limit bcopy */
2641 bcopy((char *)&eh->ether_dhost,
2642 (char *)&tx_frame_802_3.an_tx_dst_addr,
2643 ETHER_ADDR_LEN);
2644 bcopy((char *)&eh->ether_shost,
2645 (char *)&tx_frame_802_3.an_tx_src_addr,
2646 ETHER_ADDR_LEN);
2647
2648 /* minus src/dest mac & type */
2649 tx_frame_802_3.an_tx_802_3_payload_len =
2650 m0->m_pkthdr.len - 12;
2651
2652 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2653 tx_frame_802_3.an_tx_802_3_payload_len,
2654 (caddr_t)&sc->an_txbuf);
2655
2656 txcontrol = AN_TXCTL_8023;
2657 /* write the txcontrol only */
2658 bcopy((caddr_t)&txcontrol, &buf[0x08],
2659 sizeof(txcontrol));
2660
2661 /* 802_3 header */
2662 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2663 sizeof(struct an_txframe_802_3));
2664
2665 /* in mbuf header type is just before payload */
2666 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2667 tx_frame_802_3.an_tx_802_3_payload_len);
2668
2669
2670 bzero(&an_tx_desc, sizeof(an_tx_desc));
2671 an_tx_desc.an_offset = 0;
2672 an_tx_desc.an_eoc = 1;
2673 an_tx_desc.an_valid = 1;
2674 an_tx_desc.an_len = 0x44 +
2675 tx_frame_802_3.an_tx_802_3_payload_len;
2676 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
537b8fd3
JS
2677 for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) {
2678 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
2679 /* zero for now */
2680 + (0 * sizeof(an_tx_desc))
2681 + (i * 4),
2682 ((u_int32_t*)&an_tx_desc)[i]);
2683 }
984263bc 2684
7600679e 2685 BPF_MTAP(ifp, m0);
984263bc
MD
2686
2687 m_freem(m0);
2688 m0 = NULL;
2689
984263bc
MD
2690 AN_INC(idx, AN_MAX_TX_DESC);
2691 sc->an_rdata.an_tx_empty = 0;
537b8fd3
JS
2692
2693 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2694
2695 /*
2696 * Set a timeout in case the chip goes out to lunch.
2697 */
2698 ifp->if_timer = 5;
984263bc 2699 }
2da352b0
JS
2700
2701 /* Re-enable interrupts. */
2702 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD
2703 }
2704
2705 if (m0 != NULL)
2706 ifp->if_flags |= IFF_OACTIVE;
2707
2708 sc->an_rdata.an_tx_prod = idx;
984263bc
MD
2709}
2710
2711void
2712an_stop(sc)
2713 struct an_softc *sc;
2714{
2715 struct ifnet *ifp;
2716 int i;
984263bc 2717
984263bc
MD
2718 ifp = &sc->arpcom.ac_if;
2719
2720 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2721 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2722 an_cmd(sc, AN_CMD_DISABLE, 0);
2723
2724 for (i = 0; i < AN_TX_RING_CNT; i++)
2725 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2726
89c0f216 2727 callout_stop(&sc->an_stat_timer);
984263bc
MD
2728
2729 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2730
2731 if (sc->an_flash_buffer) {
2732 free(sc->an_flash_buffer, M_DEVBUF);
2733 sc->an_flash_buffer = NULL;
2734 }
984263bc
MD
2735}
2736
2737static void
2738an_watchdog(ifp)
2739 struct ifnet *ifp;
2740{
2741 struct an_softc *sc;
984263bc
MD
2742
2743 sc = ifp->if_softc;
984263bc
MD
2744
2745 an_reset(sc);
2746 if (sc->mpi350)
2747 an_init_mpi350_desc(sc);
2748 an_init(sc);
2749
2750 ifp->if_oerrors++;
984263bc 2751
41d6c56f 2752 if_printf(ifp, "device timeout\n");
984263bc
MD
2753}
2754
2755void
2756an_shutdown(dev)
2757 device_t dev;
2758{
2759 struct an_softc *sc;
2760
2761 sc = device_get_softc(dev);
2762 an_stop(sc);
2763
2764 return;
2765}
2766
2767void
2768an_resume(dev)
2769 device_t dev;
2770{
2771 struct an_softc *sc;
2772 struct ifnet *ifp;
2773 int i;
2774
2775 sc = device_get_softc(dev);
2776 ifp = &sc->arpcom.ac_if;
2777
2778 an_reset(sc);
2779 if (sc->mpi350)
2780 an_init_mpi350_desc(sc);
2781 an_init(sc);
2782
2783 /* Recovery temporary keys */
2784 for (i = 0; i < 4; i++) {
2785 sc->areq.an_type = AN_RID_WEP_TEMP;
2786 sc->areq.an_len = sizeof(struct an_ltv_key);
2787 bcopy(&sc->an_temp_keys[i],
2788 &sc->areq, sizeof(struct an_ltv_key));
2789 an_setdef(sc, &sc->areq);
2790 }
2791
2792 if (ifp->if_flags & IFF_UP)
2793 an_start(ifp);
2794
2795 return;
2796}
2797
2798#ifdef ANCACHE
2799/* Aironet signal strength cache code.
2800 * store signal/noise/quality on per MAC src basis in
2801 * a small fixed cache. The cache wraps if > MAX slots
2802 * used. The cache may be zeroed out to start over.
2803 * Two simple filters exist to reduce computation:
2804 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2805 * to ignore some packets. It defaults to ip only.
2806 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2807 * 2. multicast/broadcast only. This may be used to
2808 * ignore unicast packets and only cache signal strength
2809 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2810 * beacons and not unicast traffic.
2811 *
2812 * The cache stores (MAC src(index), IP src (major clue), signal,
2813 * quality, noise)
2814 *
2815 * No apologies for storing IP src here. It's easy and saves much
2816 * trouble elsewhere. The cache is assumed to be INET dependent,
2817 * although it need not be.
2818 *
2819 * Note: the Aironet only has a single byte of signal strength value
2820 * in the rx frame header, and it's not scaled to anything sensible.
2821 * This is kind of lame, but it's all we've got.
2822 */
2823
2824#ifdef documentation
2825
2826int an_sigitems; /* number of cached entries */
2827struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2828int an_nextitem; /* index/# of entries */
2829
2830
2831#endif
2832
2833/* control variables for cache filtering. Basic idea is
2834 * to reduce cost (e.g., to only Mobile-IP agent beacons
2835 * which are broadcast or multicast). Still you might
2836 * want to measure signal strength anth unicast ping packets
2837 * on a pt. to pt. ant. setup.
2838 */
2839/* set true if you want to limit cache items to broadcast/mcast
2840 * only packets (not unicast). Useful for mobile-ip beacons which
2841 * are broadcast/multicast at network layer. Default is all packets
2842 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2843 */
2844static int an_cache_mcastonly = 0;
2845SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2846 &an_cache_mcastonly, 0, "");
2847
2848/* set true if you want to limit cache items to IP packets only
2849*/
2850static int an_cache_iponly = 1;
2851SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2852 &an_cache_iponly, 0, "");
2853
2854/*
2855 * an_cache_store, per rx packet store signal
2856 * strength in MAC (src) indexed cache.
2857 */
2858static void
3013ac0e 2859an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2860 struct an_softc *sc;
984263bc
MD
2861 struct mbuf *m;
2862 u_int8_t rx_rssi;
2863 u_int8_t rx_quality;
2864{
3013ac0e
JS
2865 struct ether_header *eh = mtod(m, struct ether_header *);
2866 struct ip *ip = NULL;
984263bc
MD
2867 int i;
2868 static int cache_slot = 0; /* use this cache entry */
2869 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2870
2871 /* filters:
2872 * 1. ip only
2873 * 2. configurable filter to throw out unicast packets,
2874 * keep multicast only.
2875 */
2876
3013ac0e
JS
2877 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2878 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2879 else if (an_cache_iponly)
984263bc 2880 return;
984263bc
MD
2881
2882 /* filter for broadcast/multicast only
2883 */
2884 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2885 return;
2886 }
2887
2888#ifdef SIGDEBUG
1c70eebf
JS
2889 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2890 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2891#endif
2892
984263bc
MD
2893 /* do a linear search for a matching MAC address
2894 * in the cache table
2895 * . MAC address is 6 bytes,
2896 * . var w_nextitem holds total number of entries already cached
2897 */
2898 for (i = 0; i < sc->an_nextitem; i++) {
2899 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2900 /* Match!,
2901 * so we already have this entry,
2902 * update the data
2903 */
2904 break;
2905 }
2906 }
2907
2908 /* did we find a matching mac address?
2909 * if yes, then overwrite a previously existing cache entry
2910 */
2911 if (i < sc->an_nextitem ) {
2912 cache_slot = i;
2913 }
2914 /* else, have a new address entry,so
2915 * add this new entry,
2916 * if table full, then we need to replace LRU entry
2917 */
2918 else {
2919
2920 /* check for space in cache table
2921 * note: an_nextitem also holds number of entries
2922 * added in the cache table
2923 */
2924 if ( sc->an_nextitem < MAXANCACHE ) {
2925 cache_slot = sc->an_nextitem;
2926 sc->an_nextitem++;
2927 sc->an_sigitems = sc->an_nextitem;
2928 }
2929 /* no space found, so simply wrap anth wrap index
2930 * and "zap" the next entry
2931 */
2932 else {
2933 if (wrapindex == MAXANCACHE) {
2934 wrapindex = 0;
2935 }
2936 cache_slot = wrapindex++;
2937 }
2938 }
2939
2940 /* invariant: cache_slot now points at some slot
2941 * in cache.
2942 */
2943 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2944 log(LOG_ERR, "an_cache_store, bad index: %d of "
2945 "[0..%d], gross cache error\n",
2946 cache_slot, MAXANCACHE);
2947 return;
2948 }
2949
2950 /* store items in cache
2951 * .ip source address
2952 * .mac src
2953 * .signal, etc.
2954 */
3013ac0e 2955 if (ip != NULL) {
984263bc
MD
2956 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2957 }
2958 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2959
2960
2961 switch (an_cache_mode) {
2962 case DBM:
2963 if (sc->an_have_rssimap) {
2964 sc->an_sigcache[cache_slot].signal =
2965 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2966 sc->an_sigcache[cache_slot].quality =
2967 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2968 } else {
2969 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2970 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2971 }
2972 break;
2973 case PERCENT:
2974 if (sc->an_have_rssimap) {
2975 sc->an_sigcache[cache_slot].signal =
2976 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2977 sc->an_sigcache[cache_slot].quality =
2978 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2979 } else {
2980 if (rx_rssi > 100)
2981 rx_rssi = 100;
2982 if (rx_quality > 100)
2983 rx_quality = 100;
2984 sc->an_sigcache[cache_slot].signal = rx_rssi;
2985 sc->an_sigcache[cache_slot].quality = rx_quality;
2986 }
2987 break;
2988 case RAW:
2989 sc->an_sigcache[cache_slot].signal = rx_rssi;
2990 sc->an_sigcache[cache_slot].quality = rx_quality;
2991 break;
2992 }
2993
2994 sc->an_sigcache[cache_slot].noise = 0;
2995
2996 return;
2997}
2998#endif
2999
3000static int
3001an_media_change(ifp)
3002 struct ifnet *ifp;
3003{
3004 struct an_softc *sc = ifp->if_softc;
3005 struct an_ltv_genconfig *cfg;
3006 int otype = sc->an_config.an_opmode;
3007 int orate = sc->an_tx_rate;
3008
984263bc
MD
3009 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3010 case IFM_IEEE80211_DS1:
3011 sc->an_tx_rate = AN_RATE_1MBPS;
3012 break;
3013 case IFM_IEEE80211_DS2:
3014 sc->an_tx_rate = AN_RATE_2MBPS;
3015 break;
3016 case IFM_IEEE80211_DS5:
3017 sc->an_tx_rate = AN_RATE_5_5MBPS;
3018 break;
3019 case IFM_IEEE80211_DS11:
3020 sc->an_tx_rate = AN_RATE_11MBPS;
3021 break;
3022 case IFM_AUTO:
3023 sc->an_tx_rate = 0;
3024 break;
3025 }
3026
3027 if (orate != sc->an_tx_rate) {
3028 /* Read the current configuration */
3029 sc->an_config.an_type = AN_RID_GENCONFIG;
3030 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3031 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3032 cfg = &sc->an_config;
3033
3034 /* clear other rates and set the only one we want */
3035 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3036 cfg->an_rates[0] = sc->an_tx_rate;
3037
3038 /* Save the new rate */
3039 sc->an_config.an_type = AN_RID_GENCONFIG;
3040 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3041 }
3042
537b8fd3
JS
3043 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3044 sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION;
3045 else
3046 sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION;
3047
984263bc
MD
3048 if (otype != sc->an_config.an_opmode ||
3049 orate != sc->an_tx_rate)
3050 an_init(sc);
3051
3052 return(0);
3053}
3054
3055static void
3056an_media_status(ifp, imr)
3057 struct ifnet *ifp;
3058 struct ifmediareq *imr;
3059{
3060 struct an_ltv_status status;
3061 struct an_softc *sc = ifp->if_softc;
3062
3063 status.an_len = sizeof(status);
3064 status.an_type = AN_RID_STATUS;
3065 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3066 /* If the status read fails, just lie. */
3067 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3068 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3069 }
3070
3071 if (sc->an_tx_rate == 0) {
3072 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3073 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3074 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3075 switch (status.an_current_tx_rate) {
3076 case AN_RATE_1MBPS:
3077 imr->ifm_active |= IFM_IEEE80211_DS1;
3078 break;
3079 case AN_RATE_2MBPS:
3080 imr->ifm_active |= IFM_IEEE80211_DS2;
3081 break;
3082 case AN_RATE_5_5MBPS:
3083 imr->ifm_active |= IFM_IEEE80211_DS5;
3084 break;
3085 case AN_RATE_11MBPS:
3086 imr->ifm_active |= IFM_IEEE80211_DS11;
3087 break;
3088 }
3089 } else {
3090 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3091 }
3092
3093 imr->ifm_status = IFM_AVALID;
3094 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3095 imr->ifm_status |= IFM_ACTIVE;
3096}
3097
3098/********************** Cisco utility support routines *************/
3099
3100/*
3101 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3102 * Linux driver
3103 */
3104
3105static int
3106readrids(ifp, l_ioctl)
3107 struct ifnet *ifp;
3108 struct aironet_ioctl *l_ioctl;
3109{
3110 unsigned short rid;
3111 struct an_softc *sc;
3112
3113 switch (l_ioctl->command) {
3114 case AIROGCAP:
3115 rid = AN_RID_CAPABILITIES;
3116 break;
3117 case AIROGCFG:
3118 rid = AN_RID_GENCONFIG;
3119 break;
3120 case AIROGSLIST:
3121 rid = AN_RID_SSIDLIST;
3122 break;
3123 case AIROGVLIST:
3124 rid = AN_RID_APLIST;
3125 break;
3126 case AIROGDRVNAM:
3127 rid = AN_RID_DRVNAME;
3128 break;
3129 case AIROGEHTENC:
3130 rid = AN_RID_ENCAPPROTO;
3131 break;
3132 case AIROGWEPKTMP:
3133 rid = AN_RID_WEP_TEMP;
3134 break;
3135 case AIROGWEPKNV:
3136 rid = AN_RID_WEP_PERM;
3137 break;
3138 case AIROGSTAT:
3139 rid = AN_RID_STATUS;
3140 break;
3141 case AIROGSTATSD32:
3142 rid = AN_RID_32BITS_DELTA;
3143 break;
3144 case AIROGSTATSC32:
3145 rid = AN_RID_32BITS_CUM;
3146 break;
3147 default:
3148 rid = 999;
3149 break;
3150 }
3151
3152 if (rid == 999) /* Is bad command */
3153 return -EINVAL;
3154
3155 sc = ifp->if_softc;
3156 sc->areq.an_len = AN_MAX_DATALEN;
3157 sc->areq.an_type = rid;
3158
3159 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3160
3161 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3162
3163 /* the data contains the length at first */
3164 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3165 sizeof(sc->areq.an_len))) {
3166 return -EFAULT;
3167 }
3168 /* Just copy the data back */
3169 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3170 l_ioctl->len)) {
3171 return -EFAULT;
3172 }
3173 return 0;
3174}
3175
3176static int
3177writerids(ifp, l_ioctl)
3178 struct ifnet *ifp;
3179 struct aironet_ioctl *l_ioctl;
3180{
3181 struct an_softc *sc;
3182 int rid, command;
3183
3184 sc = ifp->if_softc;
3185 rid = 0;
3186 command = l_ioctl->command;
3187
3188 switch (command) {
3189 case AIROPSIDS:
3190 rid = AN_RID_SSIDLIST;
3191 break;
3192 case AIROPCAP:
3193 rid = AN_RID_CAPABILITIES;
3194 break;
3195 case AIROPAPLIST:
3196 rid = AN_RID_APLIST;
3197 break;
3198 case AIROPCFG:
3199 rid = AN_RID_GENCONFIG;
3200 break;
3201 case AIROPMACON:
3202 an_cmd(sc, AN_CMD_ENABLE, 0);
3203 return 0;
3204 break;
3205 case AIROPMACOFF:
3206 an_cmd(sc, AN_CMD_DISABLE, 0);
3207 return 0;
3208 break;
3209 case AIROPSTCLR:
3210 /*
3211 * This command merely clears the counts does not actually
3212 * store any data only reads rid. But as it changes the cards
3213 * state, I put it in the writerid routines.
3214 */
3215
3216 rid = AN_RID_32BITS_DELTACLR;
3217 sc = ifp->if_softc;
3218 sc->areq.an_len = AN_MAX_DATALEN;
3219 sc->areq.an_type = rid;
3220
3221 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3222 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3223
3224 /* the data contains the length at first */
3225 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3226 sizeof(sc->areq.an_len))) {
3227 return -EFAULT;
3228 }
3229 /* Just copy the data */
3230 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3231 l_ioctl->len)) {
3232 return -EFAULT;
3233 }
3234 return 0;
3235 break;
3236 case AIROPWEPKEY:
3237 rid = AN_RID_WEP_TEMP;
3238 break;
3239 case AIROPWEPKEYNV:
3240 rid = AN_RID_WEP_PERM;
3241 break;
3242 case AIROPLEAPUSR:
3243 rid = AN_RID_LEAPUSERNAME;
3244 break;
3245 case AIROPLEAPPWD:
3246 rid = AN_RID_LEAPPASSWORD;
3247 break;
3248 default:
3249 return -EOPNOTSUPP;
3250 }
3251
3252 if (rid) {
3253 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3254 return -EINVAL;
3255 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3256 sc->areq.an_type = rid;
3257
3258 /* Just copy the data back */
3259 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3260 l_ioctl->len);
3261
3262 an_cmd(sc, AN_CMD_DISABLE, 0);
3263 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3264 an_cmd(sc, AN_CMD_ENABLE, 0);
3265 return 0;
3266 }
3267 return -EOPNOTSUPP;
3268}
3269
3270/*
3271 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3272 * Linux driver
3273 */
3274
377d4740 3275#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3276#define FLASH_COMMAND 0x7e7e
3277#define FLASH_SIZE 32 * 1024
3278
3279static int
3280unstickbusy(ifp)
3281 struct ifnet *ifp;
3282{
3283 struct an_softc *sc = ifp->if_softc;
3284
3285 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3286 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3287 AN_EV_CLR_STUCK_BUSY);
3288 return 1;
3289 }
3290 return 0;
3291}
3292
3293/*
3294 * Wait for busy completion from card wait for delay uSec's Return true for
3295 * success meaning command reg is clear
3296 */
3297
3298static int
3299WaitBusy(ifp, uSec)
3300 struct ifnet *ifp;
3301 int uSec;
3302{
3303 int statword = 0xffff;
3304 int delay = 0;
3305 struct an_softc *sc = ifp->if_softc;
3306
3307 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3308 FLASH_DELAY(10);
3309 delay += 10;
3310 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3311
3312 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3313 unstickbusy(ifp);
3314 }
3315 }
3316
3317 return 0 == (AN_CMD_BUSY & statword);
3318}
3319
3320/*
3321 * STEP 1) Disable MAC and do soft reset on card.
3322 */
3323
3324static int
3325cmdreset(ifp)
3326 struct ifnet *ifp;
3327{
3328 int status;
3329 struct an_softc *sc = ifp->if_softc;
3330
3331 an_stop(sc);
3332
3333 an_cmd(sc, AN_CMD_DISABLE, 0);
3334
3335 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3336 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3337 return -EBUSY;
3338 }
3339 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3340
3341 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3342
3343
3344 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3345 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3346 return -EBUSY;
3347 }
3348 return 0;
3349}
3350
3351/*
3352 * STEP 2) Put the card in legendary flash mode
3353 */
3354
3355static int
3356setflashmode(ifp)
3357 struct ifnet *ifp;
3358{
3359 int status;
3360 struct an_softc *sc = ifp->if_softc;
3361
3362 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3363 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3364 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3365 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3366
3367 /*
3368 * mdelay(500); // 500ms delay
3369 */
3370
3371 FLASH_DELAY(500);
3372
3373 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3374 printf("Waitbusy hang after setflash mode\n");
3375 return -EIO;
3376 }
3377 return 0;
3378}
3379
3380/*
3381 * Get a character from the card matching matchbyte Step 3)
3382 */
3383
3384static int
3385flashgchar(ifp, matchbyte, dwelltime)
3386 struct ifnet *ifp;
3387 int matchbyte;
3388 int dwelltime;
3389{
3390 int rchar;
3391 unsigned char rbyte = 0;
3392 int success = -1;
3393 struct an_softc *sc = ifp->if_softc;
3394
3395
3396 do {
3397 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3398
3399 if (dwelltime && !(0x8000 & rchar)) {
3400 dwelltime -= 10;
3401 FLASH_DELAY(10);
3402 continue;
3403 }
3404 rbyte = 0xff & rchar;
3405
3406 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3407 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3408 success = 1;
3409 break;
3410 }
3411 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3412 break;
3413 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3414
3415 } while (dwelltime > 0);
3416 return success;
3417}
3418
3419/*
3420 * Put character to SWS0 wait for dwelltime x 50us for echo .
3421 */
3422
3423static int
3424flashpchar(ifp, byte, dwelltime)
3425 struct ifnet *ifp;
3426 int byte;
3427 int dwelltime;
3428{
3429 int echo;
3430 int pollbusy, waittime;
3431 struct an_softc *sc = ifp->if_softc;
3432
3433 byte |= 0x8000;
3434
3435 if (dwelltime == 0)
3436 dwelltime = 200;
3437
3438 waittime = dwelltime;
3439
3440 /*
3441 * Wait for busy bit d15 to go false indicating buffer empty
3442 */
3443 do {
3444 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3445
3446 if (pollbusy & 0x8000) {
3447 FLASH_DELAY(50);
3448 waittime -= 50;
3449 continue;
3450 } else
3451 break;
3452 }
3453 while (waittime >= 0);
3454
3455 /* timeout for busy clear wait */
3456
3457 if (waittime <= 0) {
1c70eebf 3458 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3459 return -1;
3460 }
3461 /*
3462 * Port is clear now write byte and wait for it to echo back
3463 */
3464 do {
3465 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3466 FLASH_DELAY(50);
3467 dwelltime -= 50;
3468 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3469 } while (dwelltime >= 0 && echo != byte);
3470
3471
3472 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3473
3474 return echo == byte;
3475}
3476
3477/*
3478 * Transfer 32k of firmware data from user buffer to our buffer and send to
3479 * the card
3480 */
3481
3482static int
3483flashputbuf(ifp)
3484 struct ifnet *ifp;
3485{
3486 unsigned short *bufp;
3487 int nwords;
3488 struct an_softc *sc = ifp->if_softc;
3489
3490 /* Write stuff */
3491
3492 bufp = sc->an_flash_buffer;
3493
3494 if (!sc->mpi350) {
3495 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3496 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3497
3498 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3499 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3500 }
3501 } else {
3502 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3503 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3504 ((u_int32_t *)bufp)[nwords] & 0xffff);
3505 }
3506 }
3507
3508 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3509
3510 return 0;
3511}
3512
3513/*
3514 * After flashing restart the card.
3515 */
3516
3517static int
3518flashrestart(ifp)
3519 struct ifnet *ifp;
3520{
3521 int status = 0;
3522 struct an_softc *sc = ifp->if_softc;
3523
3524 FLASH_DELAY(1024); /* Added 12/7/00 */
3525
3526 an_init(sc);
3527
3528 FLASH_DELAY(1024); /* Added 12/7/00 */
3529 return status;
3530}
3531
3532/*
3533 * Entry point for flash ioclt.
3534 */
3535
3536static int
3537flashcard(ifp, l_ioctl)
3538 struct ifnet *ifp;
3539 struct aironet_ioctl *l_ioctl;
3540{
3541 int z = 0, status;
3542 struct an_softc *sc;
3543
3544 sc = ifp->if_softc;
3545 if (sc->mpi350) {
1c70eebf 3546 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3547 return(-1);
3548 }
3549 status = l_ioctl->command;
3550
3551 switch (l_ioctl->command) {
3552 case AIROFLSHRST:
3553 return cmdreset(ifp);
3554 break;
3555 case AIROFLSHSTFL:
3556 if (sc->an_flash_buffer) {
3557 free(sc->an_flash_buffer, M_DEVBUF);
3558 sc->an_flash_buffer = NULL;
3559 }
3560 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3561 if (sc->an_flash_buffer)
3562 return setflashmode(ifp);
3563 else
3564 return ENOBUFS;
3565 break;
3566 case AIROFLSHGCHR: /* Get char from aux */
3567 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3568 z = *(int *)&sc->areq;
3569 if ((status = flashgchar(ifp, z, 8000)) == 1)
3570 return 0;
3571 else
3572 return -1;
3573 break;
3574 case AIROFLSHPCHR: /* Send char to card. */
3575 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3576 z = *(int *)&sc->areq;
3577 if ((status = flashpchar(ifp, z, 8000)) == -1)
3578 return -EIO;
3579 else
3580 return 0;
3581 break;
3582 case AIROFLPUTBUF: /* Send 32k to card */
3583 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3584 if_printf(ifp, "Buffer to big, %x %x\n",
3585 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3586 return -EINVAL;
3587 }
3588 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3589
3590 if ((status = flashputbuf(ifp)) != 0)
3591 return -EIO;
3592 else
3593 return 0;
3594 break;
3595 case AIRORESTART:
3596 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3597 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3598 return -EIO;
3599 } else
3600 return 0;
3601
3602 break;
3603 default:
3604 return -EINVAL;
3605 }
3606
3607 return -EINVAL;
3608}